1
2
3#ifndef __MT7603_H
4#define __MT7603_H
5
6#include <linux/interrupt.h>
7#include <linux/ktime.h>
8#include "../mt76.h"
9#include "regs.h"
10
11#define MT7603_MAX_INTERFACES 4
12#define MT7603_WTBL_SIZE 128
13#define MT7603_WTBL_RESERVED (MT7603_WTBL_SIZE - 1)
14#define MT7603_WTBL_STA (MT7603_WTBL_RESERVED - MT7603_MAX_INTERFACES)
15
16#define MT7603_RATE_RETRY 2
17
18#define MT7603_MCU_RX_RING_SIZE 64
19#define MT7603_RX_RING_SIZE 128
20#define MT7603_TX_RING_SIZE 256
21#define MT7603_PSD_RING_SIZE 128
22
23#define MT7603_FIRMWARE_E1 "mt7603_e1.bin"
24#define MT7603_FIRMWARE_E2 "mt7603_e2.bin"
25#define MT7628_FIRMWARE_E1 "mt7628_e1.bin"
26#define MT7628_FIRMWARE_E2 "mt7628_e2.bin"
27
28#define MT7603_EEPROM_SIZE 1024
29
30#define MT_AGG_SIZE_LIMIT(_n) (((_n) + 1) * 4)
31
32#define MT7603_PRE_TBTT_TIME 5000
33
34#define MT7603_WATCHDOG_TIME 100
35#define MT7603_WATCHDOG_TIMEOUT 10
36
37#define MT7603_EDCCA_BLOCK_TH 10
38
39#define MT7603_CFEND_RATE_DEFAULT 0x69
40#define MT7603_CFEND_RATE_11B 0x03
41
42struct mt7603_vif;
43struct mt7603_sta;
44
45enum {
46 MT7603_REV_E1 = 0x00,
47 MT7603_REV_E2 = 0x10,
48 MT7628_REV_E1 = 0x8a00,
49};
50
51enum mt7603_bw {
52 MT_BW_20,
53 MT_BW_40,
54 MT_BW_80,
55};
56
57struct mt7603_rate_set {
58 struct ieee80211_tx_rate probe_rate;
59 struct ieee80211_tx_rate rates[4];
60};
61
62struct mt7603_sta {
63 struct mt76_wcid wcid;
64
65 struct mt7603_vif *vif;
66
67 struct list_head poll_list;
68 u32 tx_airtime_ac[4];
69
70 struct sk_buff_head psq;
71
72 struct ieee80211_tx_rate rates[4];
73
74 struct mt7603_rate_set rateset[2];
75 u32 rate_set_tsf;
76
77 u8 rate_count;
78 u8 n_rates;
79
80 u8 rate_probe;
81 u8 smps;
82
83 u8 ps;
84};
85
86struct mt7603_vif {
87 struct mt7603_sta sta;
88
89 u8 idx;
90};
91
92enum mt7603_reset_cause {
93 RESET_CAUSE_TX_HANG,
94 RESET_CAUSE_TX_BUSY,
95 RESET_CAUSE_RX_BUSY,
96 RESET_CAUSE_BEACON_STUCK,
97 RESET_CAUSE_RX_PSE_BUSY,
98 RESET_CAUSE_MCU_HANG,
99 RESET_CAUSE_RESET_FAILED,
100 __RESET_CAUSE_MAX
101};
102
103struct mt7603_dev {
104 union {
105 struct mt76_dev mt76;
106 struct mt76_phy mphy;
107 };
108
109 const struct mt76_bus_ops *bus_ops;
110
111 u32 rxfilter;
112
113 struct list_head sta_poll_list;
114 spinlock_t sta_poll_lock;
115
116 struct mt7603_sta global_sta;
117
118 u32 agc0, agc3;
119 u32 false_cca_ofdm, false_cca_cck;
120 unsigned long last_cca_adj;
121
122 u32 ampdu_ref;
123 u32 rx_ampdu_ts;
124 u8 rssi_offset[3];
125
126 u8 slottime;
127 s16 coverage_class;
128
129 s8 tx_power_limit;
130
131 ktime_t ed_time;
132
133 spinlock_t ps_lock;
134
135 u8 mcu_running;
136
137 u8 ed_monitor_enabled;
138 u8 ed_monitor;
139 s8 ed_trigger;
140 u8 ed_strict_mode;
141 u8 ed_strong_signal;
142
143 bool dynamic_sensitivity;
144 s8 sensitivity;
145 u8 sensitivity_limit;
146
147 u8 beacon_check;
148 u8 tx_hang_check;
149 u8 tx_dma_check;
150 u8 rx_dma_check;
151 u8 rx_pse_check;
152 u8 mcu_hang;
153
154 enum mt7603_reset_cause cur_reset_cause;
155
156 u16 tx_dma_idx[4];
157 u16 rx_dma_idx;
158
159 u32 reset_test;
160
161 unsigned int reset_cause[__RESET_CAUSE_MAX];
162};
163
164extern const struct mt76_driver_ops mt7603_drv_ops;
165extern const struct ieee80211_ops mt7603_ops;
166extern struct pci_driver mt7603_pci_driver;
167extern struct platform_driver mt76_wmac_driver;
168
169static inline bool is_mt7603(struct mt7603_dev *dev)
170{
171 return mt76xx_chip(dev) == 0x7603;
172}
173
174static inline bool is_mt7628(struct mt7603_dev *dev)
175{
176 return mt76xx_chip(dev) == 0x7628;
177}
178
179
180#define MT_RATE_DRIVER_DATA_OFFSET 4
181
182u32 mt7603_reg_map(struct mt7603_dev *dev, u32 addr);
183
184irqreturn_t mt7603_irq_handler(int irq, void *dev_instance);
185
186int mt7603_register_device(struct mt7603_dev *dev);
187void mt7603_unregister_device(struct mt7603_dev *dev);
188int mt7603_eeprom_init(struct mt7603_dev *dev);
189int mt7603_dma_init(struct mt7603_dev *dev);
190void mt7603_dma_cleanup(struct mt7603_dev *dev);
191int mt7603_mcu_init(struct mt7603_dev *dev);
192void mt7603_init_debugfs(struct mt7603_dev *dev);
193
194static inline void mt7603_irq_enable(struct mt7603_dev *dev, u32 mask)
195{
196 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
197}
198
199static inline void mt7603_irq_disable(struct mt7603_dev *dev, u32 mask)
200{
201 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
202}
203
204void mt7603_mac_reset_counters(struct mt7603_dev *dev);
205void mt7603_mac_dma_start(struct mt7603_dev *dev);
206void mt7603_mac_start(struct mt7603_dev *dev);
207void mt7603_mac_stop(struct mt7603_dev *dev);
208void mt7603_mac_work(struct work_struct *work);
209void mt7603_mac_set_timing(struct mt7603_dev *dev);
210void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval);
211int mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb);
212void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data);
213void mt7603_mac_rx_ba_reset(struct mt7603_dev *dev, void *addr, u8 tid);
214void mt7603_mac_tx_ba_reset(struct mt7603_dev *dev, int wcid, int tid,
215 int ba_size);
216void mt7603_mac_sta_poll(struct mt7603_dev *dev);
217
218void mt7603_pse_client_reset(struct mt7603_dev *dev);
219
220int mt7603_mcu_set_channel(struct mt7603_dev *dev);
221int mt7603_mcu_set_eeprom(struct mt7603_dev *dev);
222void mt7603_mcu_exit(struct mt7603_dev *dev);
223
224void mt7603_wtbl_init(struct mt7603_dev *dev, int idx, int vif,
225 const u8 *mac_addr);
226void mt7603_wtbl_clear(struct mt7603_dev *dev, int idx);
227void mt7603_wtbl_update_cap(struct mt7603_dev *dev, struct ieee80211_sta *sta);
228void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta,
229 struct ieee80211_tx_rate *probe_rate,
230 struct ieee80211_tx_rate *rates);
231int mt7603_wtbl_set_key(struct mt7603_dev *dev, int wcid,
232 struct ieee80211_key_conf *key);
233void mt7603_wtbl_set_ps(struct mt7603_dev *dev, struct mt7603_sta *sta,
234 bool enabled);
235void mt7603_wtbl_set_smps(struct mt7603_dev *dev, struct mt7603_sta *sta,
236 bool enabled);
237void mt7603_filter_tx(struct mt7603_dev *dev, int idx, bool abort);
238
239int mt7603_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
240 enum mt76_txq_id qid, struct mt76_wcid *wcid,
241 struct ieee80211_sta *sta,
242 struct mt76_tx_info *tx_info);
243
244void mt7603_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
245
246void mt7603_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
247 struct sk_buff *skb);
248void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
249void mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
250int mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
251 struct ieee80211_sta *sta);
252void mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
253 struct ieee80211_sta *sta);
254void mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
255 struct ieee80211_sta *sta);
256
257void mt7603_pre_tbtt_tasklet(struct tasklet_struct *t);
258
259void mt7603_update_channel(struct mt76_phy *mphy);
260
261void mt7603_edcca_set_strict(struct mt7603_dev *dev, bool val);
262void mt7603_cca_stats_reset(struct mt7603_dev *dev);
263
264void mt7603_init_edcca(struct mt7603_dev *dev);
265#endif
266
