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21#include <linux/module.h>
22#include <linux/interrupt.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25#include <linux/kernel.h>
26#include <linux/slab.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/timer.h>
30#include <linux/init.h>
31#include <linux/spinlock.h>
32#include <linux/compat.h>
33#include <linux/blktrace_api.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/completion.h>
38#include <linux/moduleparam.h>
39#include <scsi/scsi.h>
40#include <scsi/scsi_cmnd.h>
41#include <scsi/scsi_device.h>
42#include <scsi/scsi_host.h>
43#include <scsi/scsi_tcq.h>
44#include <scsi/scsi_eh.h>
45#include <scsi/scsi_transport_sas.h>
46#include <scsi/scsi_dbg.h>
47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
50#include <linux/atomic.h>
51#include <linux/jiffies.h>
52#include <linux/percpu-defs.h>
53#include <linux/percpu.h>
54#include <asm/unaligned.h>
55#include <asm/div64.h>
56#include "hpsa_cmd.h"
57#include "hpsa.h"
58
59
60
61
62
63#define HPSA_DRIVER_VERSION "3.4.20-200"
64#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65#define HPSA "hpsa"
66
67
68#define CLEAR_EVENT_WAIT_INTERVAL 20
69#define MODE_CHANGE_WAIT_INTERVAL 10
70#define MAX_CLEAR_EVENT_WAIT 30000
71#define MAX_MODE_CHANGE_WAIT 2000
72#define MAX_IOCTL_CONFIG_WAIT 1000
73
74
75#define MAX_CMD_RETRIES 3
76
77#define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78
79
80MODULE_AUTHOR("Hewlett-Packard Company");
81MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82 HPSA_DRIVER_VERSION);
83MODULE_VERSION(HPSA_DRIVER_VERSION);
84MODULE_LICENSE("GPL");
85MODULE_ALIAS("cciss");
86
87static int hpsa_simple_mode;
88module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
89MODULE_PARM_DESC(hpsa_simple_mode,
90 "Use 'simple mode' rather than 'performant mode'");
91
92
93static const struct pci_device_id hpsa_pci_device_id[] = {
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151 {0,}
152};
153
154MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155
156
157
158
159
160static struct board_type products[] = {
161 {0x40700E11, "Smart Array 5300", &SA5A_access},
162 {0x40800E11, "Smart Array 5i", &SA5B_access},
163 {0x40820E11, "Smart Array 532", &SA5B_access},
164 {0x40830E11, "Smart Array 5312", &SA5B_access},
165 {0x409A0E11, "Smart Array 641", &SA5A_access},
166 {0x409B0E11, "Smart Array 642", &SA5A_access},
167 {0x409C0E11, "Smart Array 6400", &SA5A_access},
168 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169 {0x40910E11, "Smart Array 6i", &SA5A_access},
170 {0x3225103C, "Smart Array P600", &SA5A_access},
171 {0x3223103C, "Smart Array P800", &SA5A_access},
172 {0x3234103C, "Smart Array P400", &SA5A_access},
173 {0x3235103C, "Smart Array P400i", &SA5A_access},
174 {0x3211103C, "Smart Array E200i", &SA5A_access},
175 {0x3212103C, "Smart Array E200", &SA5A_access},
176 {0x3213103C, "Smart Array E200i", &SA5A_access},
177 {0x3214103C, "Smart Array E200i", &SA5A_access},
178 {0x3215103C, "Smart Array E200i", &SA5A_access},
179 {0x3237103C, "Smart Array E500", &SA5A_access},
180 {0x323D103C, "Smart Array P700m", &SA5A_access},
181 {0x3241103C, "Smart Array P212", &SA5_access},
182 {0x3243103C, "Smart Array P410", &SA5_access},
183 {0x3245103C, "Smart Array P410i", &SA5_access},
184 {0x3247103C, "Smart Array P411", &SA5_access},
185 {0x3249103C, "Smart Array P812", &SA5_access},
186 {0x324A103C, "Smart Array P712m", &SA5_access},
187 {0x324B103C, "Smart Array P711m", &SA5_access},
188 {0x3233103C, "HP StorageWorks 1210m", &SA5_access},
189 {0x3350103C, "Smart Array P222", &SA5_access},
190 {0x3351103C, "Smart Array P420", &SA5_access},
191 {0x3352103C, "Smart Array P421", &SA5_access},
192 {0x3353103C, "Smart Array P822", &SA5_access},
193 {0x3354103C, "Smart Array P420i", &SA5_access},
194 {0x3355103C, "Smart Array P220i", &SA5_access},
195 {0x3356103C, "Smart Array P721m", &SA5_access},
196 {0x1920103C, "Smart Array P430i", &SA5_access},
197 {0x1921103C, "Smart Array P830i", &SA5_access},
198 {0x1922103C, "Smart Array P430", &SA5_access},
199 {0x1923103C, "Smart Array P431", &SA5_access},
200 {0x1924103C, "Smart Array P830", &SA5_access},
201 {0x1925103C, "Smart Array P831", &SA5_access},
202 {0x1926103C, "Smart Array P731m", &SA5_access},
203 {0x1928103C, "Smart Array P230i", &SA5_access},
204 {0x1929103C, "Smart Array P530", &SA5_access},
205 {0x21BD103C, "Smart Array P244br", &SA5_access},
206 {0x21BE103C, "Smart Array P741m", &SA5_access},
207 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
208 {0x21C0103C, "Smart Array P440ar", &SA5_access},
209 {0x21C1103C, "Smart Array P840ar", &SA5_access},
210 {0x21C2103C, "Smart Array P440", &SA5_access},
211 {0x21C3103C, "Smart Array P441", &SA5_access},
212 {0x21C4103C, "Smart Array", &SA5_access},
213 {0x21C5103C, "Smart Array P841", &SA5_access},
214 {0x21C6103C, "Smart HBA H244br", &SA5_access},
215 {0x21C7103C, "Smart HBA H240", &SA5_access},
216 {0x21C8103C, "Smart HBA H241", &SA5_access},
217 {0x21C9103C, "Smart Array", &SA5_access},
218 {0x21CA103C, "Smart Array P246br", &SA5_access},
219 {0x21CB103C, "Smart Array P840", &SA5_access},
220 {0x21CC103C, "Smart Array", &SA5_access},
221 {0x21CD103C, "Smart Array", &SA5_access},
222 {0x21CE103C, "Smart HBA", &SA5_access},
223 {0x05809005, "SmartHBA-SA", &SA5_access},
224 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
225 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
227 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
228 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
229 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
230 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
231 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
232 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
233 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
235};
236
237static struct scsi_transport_template *hpsa_sas_transport_template;
238static int hpsa_add_sas_host(struct ctlr_info *h);
239static void hpsa_delete_sas_host(struct ctlr_info *h);
240static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241 struct hpsa_scsi_dev_t *device);
242static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243static struct hpsa_scsi_dev_t
244 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245 struct sas_rphy *rphy);
246
247#define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248static const struct scsi_cmnd hpsa_cmd_busy;
249#define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250static const struct scsi_cmnd hpsa_cmd_idle;
251static int number_of_controllers;
252
253static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
254static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
255static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
256 void __user *arg);
257static int hpsa_passthru_ioctl(struct ctlr_info *h,
258 IOCTL_Command_struct *iocommand);
259static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
260 BIG_IOCTL_Command_struct *ioc);
261
262#ifdef CONFIG_COMPAT
263static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
264 void __user *arg);
265#endif
266
267static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268static struct CommandList *cmd_alloc(struct ctlr_info *h);
269static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
270static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
271 struct scsi_cmnd *scmd);
272static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274 int cmd_type);
275static void hpsa_free_cmd_pool(struct ctlr_info *h);
276#define VPD_PAGE (1 << 8)
277#define HPSA_SIMPLE_ERROR_BITS 0x03
278
279static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280static void hpsa_scan_start(struct Scsi_Host *);
281static int hpsa_scan_finished(struct Scsi_Host *sh,
282 unsigned long elapsed_time);
283static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284
285static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286static int hpsa_slave_alloc(struct scsi_device *sdev);
287static int hpsa_slave_configure(struct scsi_device *sdev);
288static void hpsa_slave_destroy(struct scsi_device *sdev);
289
290static void hpsa_update_scsi_devices(struct ctlr_info *h);
291static int check_for_unit_attention(struct ctlr_info *h,
292 struct CommandList *c);
293static void check_ioctl_unit_attention(struct ctlr_info *h,
294 struct CommandList *c);
295
296static void calc_bucket_map(int *bucket, int num_buckets,
297 int nsgs, int min_blocks, u32 *bucket_map);
298static void hpsa_free_performant_mode(struct ctlr_info *h);
299static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
300static inline u32 next_command(struct ctlr_info *h, u8 q);
301static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
302 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
303 u64 *cfg_offset);
304static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
305 unsigned long *memory_bar);
306static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
307 bool *legacy_board);
308static int wait_for_device_to_become_ready(struct ctlr_info *h,
309 unsigned char lunaddr[],
310 int reply_queue);
311static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
312 int wait_for_ready);
313static inline void finish_cmd(struct CommandList *c);
314static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
315#define BOARD_NOT_READY 0
316#define BOARD_READY 1
317static void hpsa_drain_accel_commands(struct ctlr_info *h);
318static void hpsa_flush_cache(struct ctlr_info *h);
319static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
320 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
321 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
322static void hpsa_command_resubmit_worker(struct work_struct *work);
323static u32 lockup_detected(struct ctlr_info *h);
324static int detect_controller_lockup(struct ctlr_info *h);
325static void hpsa_disable_rld_caching(struct ctlr_info *h);
326static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
327 struct ReportExtendedLUNdata *buf, int bufsize);
328static bool hpsa_vpd_page_supported(struct ctlr_info *h,
329 unsigned char scsi3addr[], u8 page);
330static int hpsa_luns_changed(struct ctlr_info *h);
331static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
332 struct hpsa_scsi_dev_t *dev,
333 unsigned char *scsi3addr);
334
335static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
336{
337 unsigned long *priv = shost_priv(sdev->host);
338 return (struct ctlr_info *) *priv;
339}
340
341static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
342{
343 unsigned long *priv = shost_priv(sh);
344 return (struct ctlr_info *) *priv;
345}
346
347static inline bool hpsa_is_cmd_idle(struct CommandList *c)
348{
349 return c->scsi_cmd == SCSI_CMD_IDLE;
350}
351
352
353static void decode_sense_data(const u8 *sense_data, int sense_data_len,
354 u8 *sense_key, u8 *asc, u8 *ascq)
355{
356 struct scsi_sense_hdr sshdr;
357 bool rc;
358
359 *sense_key = -1;
360 *asc = -1;
361 *ascq = -1;
362
363 if (sense_data_len < 1)
364 return;
365
366 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
367 if (rc) {
368 *sense_key = sshdr.sense_key;
369 *asc = sshdr.asc;
370 *ascq = sshdr.ascq;
371 }
372}
373
374static int check_for_unit_attention(struct ctlr_info *h,
375 struct CommandList *c)
376{
377 u8 sense_key, asc, ascq;
378 int sense_len;
379
380 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
381 sense_len = sizeof(c->err_info->SenseInfo);
382 else
383 sense_len = c->err_info->SenseLen;
384
385 decode_sense_data(c->err_info->SenseInfo, sense_len,
386 &sense_key, &asc, &ascq);
387 if (sense_key != UNIT_ATTENTION || asc == 0xff)
388 return 0;
389
390 switch (asc) {
391 case STATE_CHANGED:
392 dev_warn(&h->pdev->dev,
393 "%s: a state change detected, command retried\n",
394 h->devname);
395 break;
396 case LUN_FAILED:
397 dev_warn(&h->pdev->dev,
398 "%s: LUN failure detected\n", h->devname);
399 break;
400 case REPORT_LUNS_CHANGED:
401 dev_warn(&h->pdev->dev,
402 "%s: report LUN data changed\n", h->devname);
403
404
405
406
407 break;
408 case POWER_OR_RESET:
409 dev_warn(&h->pdev->dev,
410 "%s: a power on or device reset detected\n",
411 h->devname);
412 break;
413 case UNIT_ATTENTION_CLEARED:
414 dev_warn(&h->pdev->dev,
415 "%s: unit attention cleared by another initiator\n",
416 h->devname);
417 break;
418 default:
419 dev_warn(&h->pdev->dev,
420 "%s: unknown unit attention detected\n",
421 h->devname);
422 break;
423 }
424 return 1;
425}
426
427static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428{
429 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
430 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
431 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432 return 0;
433 dev_warn(&h->pdev->dev, HPSA "device busy");
434 return 1;
435}
436
437static u32 lockup_detected(struct ctlr_info *h);
438static ssize_t host_show_lockup_detected(struct device *dev,
439 struct device_attribute *attr, char *buf)
440{
441 int ld;
442 struct ctlr_info *h;
443 struct Scsi_Host *shost = class_to_shost(dev);
444
445 h = shost_to_hba(shost);
446 ld = lockup_detected(h);
447
448 return sprintf(buf, "ld=%d\n", ld);
449}
450
451static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count)
454{
455 int status, len;
456 struct ctlr_info *h;
457 struct Scsi_Host *shost = class_to_shost(dev);
458 char tmpbuf[10];
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463 strncpy(tmpbuf, buf, len);
464 tmpbuf[len] = '\0';
465 if (sscanf(tmpbuf, "%d", &status) != 1)
466 return -EINVAL;
467 h = shost_to_hba(shost);
468 h->acciopath_status = !!status;
469 dev_warn(&h->pdev->dev,
470 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
471 h->acciopath_status ? "enabled" : "disabled");
472 return count;
473}
474
475static ssize_t host_store_raid_offload_debug(struct device *dev,
476 struct device_attribute *attr,
477 const char *buf, size_t count)
478{
479 int debug_level, len;
480 struct ctlr_info *h;
481 struct Scsi_Host *shost = class_to_shost(dev);
482 char tmpbuf[10];
483
484 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
485 return -EACCES;
486 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
487 strncpy(tmpbuf, buf, len);
488 tmpbuf[len] = '\0';
489 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
490 return -EINVAL;
491 if (debug_level < 0)
492 debug_level = 0;
493 h = shost_to_hba(shost);
494 h->raid_offload_debug = debug_level;
495 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
496 h->raid_offload_debug);
497 return count;
498}
499
500static ssize_t host_store_rescan(struct device *dev,
501 struct device_attribute *attr,
502 const char *buf, size_t count)
503{
504 struct ctlr_info *h;
505 struct Scsi_Host *shost = class_to_shost(dev);
506 h = shost_to_hba(shost);
507 hpsa_scan_start(h->scsi_host);
508 return count;
509}
510
511static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
512{
513 device->offload_enabled = 0;
514 device->offload_to_be_enabled = 0;
515}
516
517static ssize_t host_show_firmware_revision(struct device *dev,
518 struct device_attribute *attr, char *buf)
519{
520 struct ctlr_info *h;
521 struct Scsi_Host *shost = class_to_shost(dev);
522 unsigned char *fwrev;
523
524 h = shost_to_hba(shost);
525 if (!h->hba_inquiry_data)
526 return 0;
527 fwrev = &h->hba_inquiry_data[32];
528 return snprintf(buf, 20, "%c%c%c%c\n",
529 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
530}
531
532static ssize_t host_show_commands_outstanding(struct device *dev,
533 struct device_attribute *attr, char *buf)
534{
535 struct Scsi_Host *shost = class_to_shost(dev);
536 struct ctlr_info *h = shost_to_hba(shost);
537
538 return snprintf(buf, 20, "%d\n",
539 atomic_read(&h->commands_outstanding));
540}
541
542static ssize_t host_show_transport_mode(struct device *dev,
543 struct device_attribute *attr, char *buf)
544{
545 struct ctlr_info *h;
546 struct Scsi_Host *shost = class_to_shost(dev);
547
548 h = shost_to_hba(shost);
549 return snprintf(buf, 20, "%s\n",
550 h->transMethod & CFGTBL_Trans_Performant ?
551 "performant" : "simple");
552}
553
554static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
555 struct device_attribute *attr, char *buf)
556{
557 struct ctlr_info *h;
558 struct Scsi_Host *shost = class_to_shost(dev);
559
560 h = shost_to_hba(shost);
561 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
562 (h->acciopath_status == 1) ? "enabled" : "disabled");
563}
564
565
566static u32 unresettable_controller[] = {
567 0x324a103C,
568 0x324b103C,
569 0x3223103C,
570 0x3234103C,
571 0x3235103C,
572 0x3211103C,
573 0x3212103C,
574 0x3213103C,
575 0x3214103C,
576 0x3215103C,
577 0x3237103C,
578 0x323D103C,
579 0x40800E11,
580 0x409C0E11,
581 0x409D0E11,
582 0x40700E11,
583 0x40820E11,
584 0x40830E11,
585 0x409A0E11,
586 0x409B0E11,
587 0x40910E11,
588};
589
590
591static u32 soft_unresettable_controller[] = {
592 0x40800E11,
593 0x40700E11,
594 0x40820E11,
595 0x40830E11,
596 0x409A0E11,
597 0x409B0E11,
598 0x40910E11,
599
600
601
602
603
604
605
606 0x409C0E11,
607 0x409D0E11,
608};
609
610static int board_id_in_array(u32 a[], int nelems, u32 board_id)
611{
612 int i;
613
614 for (i = 0; i < nelems; i++)
615 if (a[i] == board_id)
616 return 1;
617 return 0;
618}
619
620static int ctlr_is_hard_resettable(u32 board_id)
621{
622 return !board_id_in_array(unresettable_controller,
623 ARRAY_SIZE(unresettable_controller), board_id);
624}
625
626static int ctlr_is_soft_resettable(u32 board_id)
627{
628 return !board_id_in_array(soft_unresettable_controller,
629 ARRAY_SIZE(soft_unresettable_controller), board_id);
630}
631
632static int ctlr_is_resettable(u32 board_id)
633{
634 return ctlr_is_hard_resettable(board_id) ||
635 ctlr_is_soft_resettable(board_id);
636}
637
638static ssize_t host_show_resettable(struct device *dev,
639 struct device_attribute *attr, char *buf)
640{
641 struct ctlr_info *h;
642 struct Scsi_Host *shost = class_to_shost(dev);
643
644 h = shost_to_hba(shost);
645 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
646}
647
648static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
649{
650 return (scsi3addr[3] & 0xC0) == 0x40;
651}
652
653static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
654 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
655};
656#define HPSA_RAID_0 0
657#define HPSA_RAID_4 1
658#define HPSA_RAID_1 2
659#define HPSA_RAID_5 3
660#define HPSA_RAID_51 4
661#define HPSA_RAID_6 5
662#define HPSA_RAID_ADM 6
663#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
664#define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
665
666static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
667{
668 return !device->physical_device;
669}
670
671static ssize_t raid_level_show(struct device *dev,
672 struct device_attribute *attr, char *buf)
673{
674 ssize_t l = 0;
675 unsigned char rlevel;
676 struct ctlr_info *h;
677 struct scsi_device *sdev;
678 struct hpsa_scsi_dev_t *hdev;
679 unsigned long flags;
680
681 sdev = to_scsi_device(dev);
682 h = sdev_to_hba(sdev);
683 spin_lock_irqsave(&h->lock, flags);
684 hdev = sdev->hostdata;
685 if (!hdev) {
686 spin_unlock_irqrestore(&h->lock, flags);
687 return -ENODEV;
688 }
689
690
691 if (!is_logical_device(hdev)) {
692 spin_unlock_irqrestore(&h->lock, flags);
693 l = snprintf(buf, PAGE_SIZE, "N/A\n");
694 return l;
695 }
696
697 rlevel = hdev->raid_level;
698 spin_unlock_irqrestore(&h->lock, flags);
699 if (rlevel > RAID_UNKNOWN)
700 rlevel = RAID_UNKNOWN;
701 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
702 return l;
703}
704
705static ssize_t lunid_show(struct device *dev,
706 struct device_attribute *attr, char *buf)
707{
708 struct ctlr_info *h;
709 struct scsi_device *sdev;
710 struct hpsa_scsi_dev_t *hdev;
711 unsigned long flags;
712 unsigned char lunid[8];
713
714 sdev = to_scsi_device(dev);
715 h = sdev_to_hba(sdev);
716 spin_lock_irqsave(&h->lock, flags);
717 hdev = sdev->hostdata;
718 if (!hdev) {
719 spin_unlock_irqrestore(&h->lock, flags);
720 return -ENODEV;
721 }
722 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
723 spin_unlock_irqrestore(&h->lock, flags);
724 return snprintf(buf, 20, "0x%8phN\n", lunid);
725}
726
727static ssize_t unique_id_show(struct device *dev,
728 struct device_attribute *attr, char *buf)
729{
730 struct ctlr_info *h;
731 struct scsi_device *sdev;
732 struct hpsa_scsi_dev_t *hdev;
733 unsigned long flags;
734 unsigned char sn[16];
735
736 sdev = to_scsi_device(dev);
737 h = sdev_to_hba(sdev);
738 spin_lock_irqsave(&h->lock, flags);
739 hdev = sdev->hostdata;
740 if (!hdev) {
741 spin_unlock_irqrestore(&h->lock, flags);
742 return -ENODEV;
743 }
744 memcpy(sn, hdev->device_id, sizeof(sn));
745 spin_unlock_irqrestore(&h->lock, flags);
746 return snprintf(buf, 16 * 2 + 2,
747 "%02X%02X%02X%02X%02X%02X%02X%02X"
748 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
749 sn[0], sn[1], sn[2], sn[3],
750 sn[4], sn[5], sn[6], sn[7],
751 sn[8], sn[9], sn[10], sn[11],
752 sn[12], sn[13], sn[14], sn[15]);
753}
754
755static ssize_t sas_address_show(struct device *dev,
756 struct device_attribute *attr, char *buf)
757{
758 struct ctlr_info *h;
759 struct scsi_device *sdev;
760 struct hpsa_scsi_dev_t *hdev;
761 unsigned long flags;
762 u64 sas_address;
763
764 sdev = to_scsi_device(dev);
765 h = sdev_to_hba(sdev);
766 spin_lock_irqsave(&h->lock, flags);
767 hdev = sdev->hostdata;
768 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
769 spin_unlock_irqrestore(&h->lock, flags);
770 return -ENODEV;
771 }
772 sas_address = hdev->sas_address;
773 spin_unlock_irqrestore(&h->lock, flags);
774
775 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
776}
777
778static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
779 struct device_attribute *attr, char *buf)
780{
781 struct ctlr_info *h;
782 struct scsi_device *sdev;
783 struct hpsa_scsi_dev_t *hdev;
784 unsigned long flags;
785 int offload_enabled;
786
787 sdev = to_scsi_device(dev);
788 h = sdev_to_hba(sdev);
789 spin_lock_irqsave(&h->lock, flags);
790 hdev = sdev->hostdata;
791 if (!hdev) {
792 spin_unlock_irqrestore(&h->lock, flags);
793 return -ENODEV;
794 }
795 offload_enabled = hdev->offload_enabled;
796 spin_unlock_irqrestore(&h->lock, flags);
797
798 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
799 return snprintf(buf, 20, "%d\n", offload_enabled);
800 else
801 return snprintf(buf, 40, "%s\n",
802 "Not applicable for a controller");
803}
804
805#define MAX_PATHS 8
806static ssize_t path_info_show(struct device *dev,
807 struct device_attribute *attr, char *buf)
808{
809 struct ctlr_info *h;
810 struct scsi_device *sdev;
811 struct hpsa_scsi_dev_t *hdev;
812 unsigned long flags;
813 int i;
814 int output_len = 0;
815 u8 box;
816 u8 bay;
817 u8 path_map_index = 0;
818 char *active;
819 unsigned char phys_connector[2];
820
821 sdev = to_scsi_device(dev);
822 h = sdev_to_hba(sdev);
823 spin_lock_irqsave(&h->devlock, flags);
824 hdev = sdev->hostdata;
825 if (!hdev) {
826 spin_unlock_irqrestore(&h->devlock, flags);
827 return -ENODEV;
828 }
829
830 bay = hdev->bay;
831 for (i = 0; i < MAX_PATHS; i++) {
832 path_map_index = 1<<i;
833 if (i == hdev->active_path_index)
834 active = "Active";
835 else if (hdev->path_map & path_map_index)
836 active = "Inactive";
837 else
838 continue;
839
840 output_len += scnprintf(buf + output_len,
841 PAGE_SIZE - output_len,
842 "[%d:%d:%d:%d] %20.20s ",
843 h->scsi_host->host_no,
844 hdev->bus, hdev->target, hdev->lun,
845 scsi_device_type(hdev->devtype));
846
847 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
848 output_len += scnprintf(buf + output_len,
849 PAGE_SIZE - output_len,
850 "%s\n", active);
851 continue;
852 }
853
854 box = hdev->box[i];
855 memcpy(&phys_connector, &hdev->phys_connector[i],
856 sizeof(phys_connector));
857 if (phys_connector[0] < '0')
858 phys_connector[0] = '0';
859 if (phys_connector[1] < '0')
860 phys_connector[1] = '0';
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "PORT: %.2s ",
864 phys_connector);
865 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
866 hdev->expose_device) {
867 if (box == 0 || box == 0xFF) {
868 output_len += scnprintf(buf + output_len,
869 PAGE_SIZE - output_len,
870 "BAY: %hhu %s\n",
871 bay, active);
872 } else {
873 output_len += scnprintf(buf + output_len,
874 PAGE_SIZE - output_len,
875 "BOX: %hhu BAY: %hhu %s\n",
876 box, bay, active);
877 }
878 } else if (box != 0 && box != 0xFF) {
879 output_len += scnprintf(buf + output_len,
880 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
881 box, active);
882 } else
883 output_len += scnprintf(buf + output_len,
884 PAGE_SIZE - output_len, "%s\n", active);
885 }
886
887 spin_unlock_irqrestore(&h->devlock, flags);
888 return output_len;
889}
890
891static ssize_t host_show_ctlr_num(struct device *dev,
892 struct device_attribute *attr, char *buf)
893{
894 struct ctlr_info *h;
895 struct Scsi_Host *shost = class_to_shost(dev);
896
897 h = shost_to_hba(shost);
898 return snprintf(buf, 20, "%d\n", h->ctlr);
899}
900
901static ssize_t host_show_legacy_board(struct device *dev,
902 struct device_attribute *attr, char *buf)
903{
904 struct ctlr_info *h;
905 struct Scsi_Host *shost = class_to_shost(dev);
906
907 h = shost_to_hba(shost);
908 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
909}
910
911static DEVICE_ATTR_RO(raid_level);
912static DEVICE_ATTR_RO(lunid);
913static DEVICE_ATTR_RO(unique_id);
914static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
915static DEVICE_ATTR_RO(sas_address);
916static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
917 host_show_hp_ssd_smart_path_enabled, NULL);
918static DEVICE_ATTR_RO(path_info);
919static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
920 host_show_hp_ssd_smart_path_status,
921 host_store_hp_ssd_smart_path_status);
922static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
923 host_store_raid_offload_debug);
924static DEVICE_ATTR(firmware_revision, S_IRUGO,
925 host_show_firmware_revision, NULL);
926static DEVICE_ATTR(commands_outstanding, S_IRUGO,
927 host_show_commands_outstanding, NULL);
928static DEVICE_ATTR(transport_mode, S_IRUGO,
929 host_show_transport_mode, NULL);
930static DEVICE_ATTR(resettable, S_IRUGO,
931 host_show_resettable, NULL);
932static DEVICE_ATTR(lockup_detected, S_IRUGO,
933 host_show_lockup_detected, NULL);
934static DEVICE_ATTR(ctlr_num, S_IRUGO,
935 host_show_ctlr_num, NULL);
936static DEVICE_ATTR(legacy_board, S_IRUGO,
937 host_show_legacy_board, NULL);
938
939static struct attribute *hpsa_sdev_attrs[] = {
940 &dev_attr_raid_level.attr,
941 &dev_attr_lunid.attr,
942 &dev_attr_unique_id.attr,
943 &dev_attr_hp_ssd_smart_path_enabled.attr,
944 &dev_attr_path_info.attr,
945 &dev_attr_sas_address.attr,
946 NULL,
947};
948
949ATTRIBUTE_GROUPS(hpsa_sdev);
950
951static struct attribute *hpsa_shost_attrs[] = {
952 &dev_attr_rescan.attr,
953 &dev_attr_firmware_revision.attr,
954 &dev_attr_commands_outstanding.attr,
955 &dev_attr_transport_mode.attr,
956 &dev_attr_resettable.attr,
957 &dev_attr_hp_ssd_smart_path_status.attr,
958 &dev_attr_raid_offload_debug.attr,
959 &dev_attr_lockup_detected.attr,
960 &dev_attr_ctlr_num.attr,
961 &dev_attr_legacy_board.attr,
962 NULL,
963};
964
965ATTRIBUTE_GROUPS(hpsa_shost);
966
967#define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
968 HPSA_MAX_CONCURRENT_PASSTHRUS)
969
970static struct scsi_host_template hpsa_driver_template = {
971 .module = THIS_MODULE,
972 .name = HPSA,
973 .proc_name = HPSA,
974 .queuecommand = hpsa_scsi_queue_command,
975 .scan_start = hpsa_scan_start,
976 .scan_finished = hpsa_scan_finished,
977 .change_queue_depth = hpsa_change_queue_depth,
978 .this_id = -1,
979 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
980 .ioctl = hpsa_ioctl,
981 .slave_alloc = hpsa_slave_alloc,
982 .slave_configure = hpsa_slave_configure,
983 .slave_destroy = hpsa_slave_destroy,
984#ifdef CONFIG_COMPAT
985 .compat_ioctl = hpsa_compat_ioctl,
986#endif
987 .sdev_groups = hpsa_sdev_groups,
988 .shost_groups = hpsa_shost_groups,
989 .max_sectors = 2048,
990 .no_write_same = 1,
991};
992
993static inline u32 next_command(struct ctlr_info *h, u8 q)
994{
995 u32 a;
996 struct reply_queue_buffer *rq = &h->reply_queue[q];
997
998 if (h->transMethod & CFGTBL_Trans_io_accel1)
999 return h->access.command_completed(h, q);
1000
1001 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
1002 return h->access.command_completed(h, q);
1003
1004 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1005 a = rq->head[rq->current_entry];
1006 rq->current_entry++;
1007 atomic_dec(&h->commands_outstanding);
1008 } else {
1009 a = FIFO_EMPTY;
1010 }
1011
1012 if (rq->current_entry == h->max_commands) {
1013 rq->current_entry = 0;
1014 rq->wraparound ^= 1;
1015 }
1016 return a;
1017}
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050#define DEFAULT_REPLY_QUEUE (-1)
1051static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1052 int reply_queue)
1053{
1054 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1055 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1056 if (unlikely(!h->msix_vectors))
1057 return;
1058 c->Header.ReplyQueue = reply_queue;
1059 }
1060}
1061
1062static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1063 struct CommandList *c,
1064 int reply_queue)
1065{
1066 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1067
1068
1069
1070
1071
1072 cp->ReplyQueue = reply_queue;
1073
1074
1075
1076
1077
1078
1079 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1080 IOACCEL1_BUSADDR_CMDTYPE;
1081}
1082
1083static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1084 struct CommandList *c,
1085 int reply_queue)
1086{
1087 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1088 &h->ioaccel2_cmd_pool[c->cmdindex];
1089
1090
1091
1092
1093 cp->reply_queue = reply_queue;
1094
1095
1096
1097
1098
1099 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1100}
1101
1102static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1103 struct CommandList *c,
1104 int reply_queue)
1105{
1106 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1107
1108
1109
1110
1111
1112 cp->reply_queue = reply_queue;
1113
1114
1115
1116
1117
1118
1119 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1120}
1121
1122static int is_firmware_flash_cmd(u8 *cdb)
1123{
1124 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1125}
1126
1127
1128
1129
1130
1131
1132#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1133#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1134#define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1135static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1136 struct CommandList *c)
1137{
1138 if (!is_firmware_flash_cmd(c->Request.CDB))
1139 return;
1140 atomic_inc(&h->firmware_flash_in_progress);
1141 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1142}
1143
1144static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1145 struct CommandList *c)
1146{
1147 if (is_firmware_flash_cmd(c->Request.CDB) &&
1148 atomic_dec_and_test(&h->firmware_flash_in_progress))
1149 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1150}
1151
1152static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1153 struct CommandList *c, int reply_queue)
1154{
1155 dial_down_lockup_detection_during_fw_flash(h, c);
1156 atomic_inc(&h->commands_outstanding);
1157
1158
1159
1160 if (c->device && !c->retry_pending)
1161 atomic_inc(&c->device->commands_outstanding);
1162
1163 reply_queue = h->reply_map[raw_smp_processor_id()];
1164 switch (c->cmd_type) {
1165 case CMD_IOACCEL1:
1166 set_ioaccel1_performant_mode(h, c, reply_queue);
1167 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1168 break;
1169 case CMD_IOACCEL2:
1170 set_ioaccel2_performant_mode(h, c, reply_queue);
1171 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1172 break;
1173 case IOACCEL2_TMF:
1174 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1175 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1176 break;
1177 default:
1178 set_performant_mode(h, c, reply_queue);
1179 h->access.submit_command(h, c);
1180 }
1181}
1182
1183static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1184{
1185 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1186}
1187
1188static inline int is_hba_lunid(unsigned char scsi3addr[])
1189{
1190 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1191}
1192
1193static inline int is_scsi_rev_5(struct ctlr_info *h)
1194{
1195 if (!h->hba_inquiry_data)
1196 return 0;
1197 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1198 return 1;
1199 return 0;
1200}
1201
1202static int hpsa_find_target_lun(struct ctlr_info *h,
1203 unsigned char scsi3addr[], int bus, int *target, int *lun)
1204{
1205
1206
1207
1208 int i, found = 0;
1209 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1210
1211 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1212
1213 for (i = 0; i < h->ndevices; i++) {
1214 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1215 __set_bit(h->dev[i]->target, lun_taken);
1216 }
1217
1218 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1219 if (i < HPSA_MAX_DEVICES) {
1220
1221 *target = i;
1222 *lun = 0;
1223 found = 1;
1224 }
1225 return !found;
1226}
1227
1228static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1229 struct hpsa_scsi_dev_t *dev, char *description)
1230{
1231#define LABEL_SIZE 25
1232 char label[LABEL_SIZE];
1233
1234 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1235 return;
1236
1237 switch (dev->devtype) {
1238 case TYPE_RAID:
1239 snprintf(label, LABEL_SIZE, "controller");
1240 break;
1241 case TYPE_ENCLOSURE:
1242 snprintf(label, LABEL_SIZE, "enclosure");
1243 break;
1244 case TYPE_DISK:
1245 case TYPE_ZBC:
1246 if (dev->external)
1247 snprintf(label, LABEL_SIZE, "external");
1248 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1249 snprintf(label, LABEL_SIZE, "%s",
1250 raid_label[PHYSICAL_DRIVE]);
1251 else
1252 snprintf(label, LABEL_SIZE, "RAID-%s",
1253 dev->raid_level > RAID_UNKNOWN ? "?" :
1254 raid_label[dev->raid_level]);
1255 break;
1256 case TYPE_ROM:
1257 snprintf(label, LABEL_SIZE, "rom");
1258 break;
1259 case TYPE_TAPE:
1260 snprintf(label, LABEL_SIZE, "tape");
1261 break;
1262 case TYPE_MEDIUM_CHANGER:
1263 snprintf(label, LABEL_SIZE, "changer");
1264 break;
1265 default:
1266 snprintf(label, LABEL_SIZE, "UNKNOWN");
1267 break;
1268 }
1269
1270 dev_printk(level, &h->pdev->dev,
1271 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1272 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1273 description,
1274 scsi_device_type(dev->devtype),
1275 dev->vendor,
1276 dev->model,
1277 label,
1278 dev->offload_config ? '+' : '-',
1279 dev->offload_to_be_enabled ? '+' : '-',
1280 dev->expose_device);
1281}
1282
1283
1284static int hpsa_scsi_add_entry(struct ctlr_info *h,
1285 struct hpsa_scsi_dev_t *device,
1286 struct hpsa_scsi_dev_t *added[], int *nadded)
1287{
1288
1289 int n = h->ndevices;
1290 int i;
1291 unsigned char addr1[8], addr2[8];
1292 struct hpsa_scsi_dev_t *sd;
1293
1294 if (n >= HPSA_MAX_DEVICES) {
1295 dev_err(&h->pdev->dev, "too many devices, some will be "
1296 "inaccessible.\n");
1297 return -1;
1298 }
1299
1300
1301 if (device->lun != -1)
1302
1303 goto lun_assigned;
1304
1305
1306
1307
1308
1309 if (device->scsi3addr[4] == 0) {
1310
1311 if (hpsa_find_target_lun(h, device->scsi3addr,
1312 device->bus, &device->target, &device->lun) != 0)
1313 return -1;
1314 goto lun_assigned;
1315 }
1316
1317
1318
1319
1320
1321
1322
1323 memcpy(addr1, device->scsi3addr, 8);
1324 addr1[4] = 0;
1325 addr1[5] = 0;
1326 for (i = 0; i < n; i++) {
1327 sd = h->dev[i];
1328 memcpy(addr2, sd->scsi3addr, 8);
1329 addr2[4] = 0;
1330 addr2[5] = 0;
1331
1332 if (memcmp(addr1, addr2, 8) == 0) {
1333 device->bus = sd->bus;
1334 device->target = sd->target;
1335 device->lun = device->scsi3addr[4];
1336 break;
1337 }
1338 }
1339 if (device->lun == -1) {
1340 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1341 " suspect firmware bug or unsupported hardware "
1342 "configuration.\n");
1343 return -1;
1344 }
1345
1346lun_assigned:
1347
1348 h->dev[n] = device;
1349 h->ndevices++;
1350 added[*nadded] = device;
1351 (*nadded)++;
1352 hpsa_show_dev_msg(KERN_INFO, h, device,
1353 device->expose_device ? "added" : "masked");
1354 return 0;
1355}
1356
1357
1358
1359
1360
1361
1362static void hpsa_scsi_update_entry(struct ctlr_info *h,
1363 int entry, struct hpsa_scsi_dev_t *new_entry)
1364{
1365
1366 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1367
1368
1369 h->dev[entry]->raid_level = new_entry->raid_level;
1370
1371
1372
1373
1374 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1375
1376
1377 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1378
1379
1380
1381
1382
1383
1384
1385
1386 h->dev[entry]->raid_map = new_entry->raid_map;
1387 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1388 }
1389 if (new_entry->offload_to_be_enabled) {
1390 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1391 wmb();
1392 }
1393 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1394 h->dev[entry]->offload_config = new_entry->offload_config;
1395 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1396 h->dev[entry]->queue_depth = new_entry->queue_depth;
1397
1398
1399
1400
1401
1402
1403 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1404
1405
1406
1407
1408 if (!new_entry->offload_to_be_enabled)
1409 h->dev[entry]->offload_enabled = 0;
1410
1411 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1412}
1413
1414
1415static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1416 int entry, struct hpsa_scsi_dev_t *new_entry,
1417 struct hpsa_scsi_dev_t *added[], int *nadded,
1418 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1419{
1420
1421 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1422 removed[*nremoved] = h->dev[entry];
1423 (*nremoved)++;
1424
1425
1426
1427
1428
1429 if (new_entry->target == -1) {
1430 new_entry->target = h->dev[entry]->target;
1431 new_entry->lun = h->dev[entry]->lun;
1432 }
1433
1434 h->dev[entry] = new_entry;
1435 added[*nadded] = new_entry;
1436 (*nadded)++;
1437
1438 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1439}
1440
1441
1442static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1443 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1444{
1445
1446 int i;
1447 struct hpsa_scsi_dev_t *sd;
1448
1449 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1450
1451 sd = h->dev[entry];
1452 removed[*nremoved] = h->dev[entry];
1453 (*nremoved)++;
1454
1455 for (i = entry; i < h->ndevices-1; i++)
1456 h->dev[i] = h->dev[i+1];
1457 h->ndevices--;
1458 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1459}
1460
1461#define SCSI3ADDR_EQ(a, b) ( \
1462 (a)[7] == (b)[7] && \
1463 (a)[6] == (b)[6] && \
1464 (a)[5] == (b)[5] && \
1465 (a)[4] == (b)[4] && \
1466 (a)[3] == (b)[3] && \
1467 (a)[2] == (b)[2] && \
1468 (a)[1] == (b)[1] && \
1469 (a)[0] == (b)[0])
1470
1471static void fixup_botched_add(struct ctlr_info *h,
1472 struct hpsa_scsi_dev_t *added)
1473{
1474
1475
1476
1477 unsigned long flags;
1478 int i, j;
1479
1480 spin_lock_irqsave(&h->lock, flags);
1481 for (i = 0; i < h->ndevices; i++) {
1482 if (h->dev[i] == added) {
1483 for (j = i; j < h->ndevices-1; j++)
1484 h->dev[j] = h->dev[j+1];
1485 h->ndevices--;
1486 break;
1487 }
1488 }
1489 spin_unlock_irqrestore(&h->lock, flags);
1490 kfree(added);
1491}
1492
1493static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1494 struct hpsa_scsi_dev_t *dev2)
1495{
1496
1497
1498
1499
1500 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1501 sizeof(dev1->scsi3addr)) != 0)
1502 return 0;
1503 if (memcmp(dev1->device_id, dev2->device_id,
1504 sizeof(dev1->device_id)) != 0)
1505 return 0;
1506 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1507 return 0;
1508 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1509 return 0;
1510 if (dev1->devtype != dev2->devtype)
1511 return 0;
1512 if (dev1->bus != dev2->bus)
1513 return 0;
1514 return 1;
1515}
1516
1517static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1518 struct hpsa_scsi_dev_t *dev2)
1519{
1520
1521
1522
1523
1524 if (dev1->raid_level != dev2->raid_level)
1525 return 1;
1526 if (dev1->offload_config != dev2->offload_config)
1527 return 1;
1528 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1529 return 1;
1530 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1531 if (dev1->queue_depth != dev2->queue_depth)
1532 return 1;
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1543 return 1;
1544 return 0;
1545}
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1556 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1557 int *index)
1558{
1559 int i;
1560#define DEVICE_NOT_FOUND 0
1561#define DEVICE_CHANGED 1
1562#define DEVICE_SAME 2
1563#define DEVICE_UPDATED 3
1564 if (needle == NULL)
1565 return DEVICE_NOT_FOUND;
1566
1567 for (i = 0; i < haystack_size; i++) {
1568 if (haystack[i] == NULL)
1569 continue;
1570 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1571 *index = i;
1572 if (device_is_the_same(needle, haystack[i])) {
1573 if (device_updated(needle, haystack[i]))
1574 return DEVICE_UPDATED;
1575 return DEVICE_SAME;
1576 } else {
1577
1578 if (needle->volume_offline)
1579 return DEVICE_NOT_FOUND;
1580 return DEVICE_CHANGED;
1581 }
1582 }
1583 }
1584 *index = -1;
1585 return DEVICE_NOT_FOUND;
1586}
1587
1588static void hpsa_monitor_offline_device(struct ctlr_info *h,
1589 unsigned char scsi3addr[])
1590{
1591 struct offline_device_entry *device;
1592 unsigned long flags;
1593
1594
1595 spin_lock_irqsave(&h->offline_device_lock, flags);
1596 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1597 if (memcmp(device->scsi3addr, scsi3addr,
1598 sizeof(device->scsi3addr)) == 0) {
1599 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1600 return;
1601 }
1602 }
1603 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1604
1605
1606 device = kmalloc(sizeof(*device), GFP_KERNEL);
1607 if (!device)
1608 return;
1609
1610 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1611 spin_lock_irqsave(&h->offline_device_lock, flags);
1612 list_add_tail(&device->offline_list, &h->offline_device_list);
1613 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1614}
1615
1616
1617static void hpsa_show_volume_status(struct ctlr_info *h,
1618 struct hpsa_scsi_dev_t *sd)
1619{
1620 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1621 dev_info(&h->pdev->dev,
1622 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1623 h->scsi_host->host_no,
1624 sd->bus, sd->target, sd->lun);
1625 switch (sd->volume_offline) {
1626 case HPSA_LV_OK:
1627 break;
1628 case HPSA_LV_UNDERGOING_ERASE:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_NOT_AVAILABLE:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_UNDERGOING_RPI:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_PENDING_RPI:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_ENCRYPTED_NO_KEY:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_UNDERGOING_ENCRYPTION:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 case HPSA_LV_PENDING_ENCRYPTION:
1683 dev_info(&h->pdev->dev,
1684 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1685 h->scsi_host->host_no,
1686 sd->bus, sd->target, sd->lun);
1687 break;
1688 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1689 dev_info(&h->pdev->dev,
1690 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1691 h->scsi_host->host_no,
1692 sd->bus, sd->target, sd->lun);
1693 break;
1694 }
1695}
1696
1697
1698
1699
1700
1701static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1702 struct hpsa_scsi_dev_t *dev[], int ndevices,
1703 struct hpsa_scsi_dev_t *logical_drive)
1704{
1705 struct raid_map_data *map = &logical_drive->raid_map;
1706 struct raid_map_disk_data *dd = &map->data[0];
1707 int i, j;
1708 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1709 le16_to_cpu(map->metadata_disks_per_row);
1710 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1711 le16_to_cpu(map->layout_map_count) *
1712 total_disks_per_row;
1713 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1714 total_disks_per_row;
1715 int qdepth;
1716
1717 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1718 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1719
1720 logical_drive->nphysical_disks = nraid_map_entries;
1721
1722 qdepth = 0;
1723 for (i = 0; i < nraid_map_entries; i++) {
1724 logical_drive->phys_disk[i] = NULL;
1725 if (!logical_drive->offload_config)
1726 continue;
1727 for (j = 0; j < ndevices; j++) {
1728 if (dev[j] == NULL)
1729 continue;
1730 if (dev[j]->devtype != TYPE_DISK &&
1731 dev[j]->devtype != TYPE_ZBC)
1732 continue;
1733 if (is_logical_device(dev[j]))
1734 continue;
1735 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1736 continue;
1737
1738 logical_drive->phys_disk[i] = dev[j];
1739 if (i < nphys_disk)
1740 qdepth = min(h->nr_cmds, qdepth +
1741 logical_drive->phys_disk[i]->queue_depth);
1742 break;
1743 }
1744
1745
1746
1747
1748
1749
1750
1751
1752 if (!logical_drive->phys_disk[i]) {
1753 dev_warn(&h->pdev->dev,
1754 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1755 __func__,
1756 h->scsi_host->host_no, logical_drive->bus,
1757 logical_drive->target, logical_drive->lun);
1758 hpsa_turn_off_ioaccel_for_device(logical_drive);
1759 logical_drive->queue_depth = 8;
1760 }
1761 }
1762 if (nraid_map_entries)
1763
1764
1765
1766
1767 logical_drive->queue_depth = qdepth;
1768 else {
1769 if (logical_drive->external)
1770 logical_drive->queue_depth = EXTERNAL_QD;
1771 else
1772 logical_drive->queue_depth = h->nr_cmds;
1773 }
1774}
1775
1776static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1777 struct hpsa_scsi_dev_t *dev[], int ndevices)
1778{
1779 int i;
1780
1781 for (i = 0; i < ndevices; i++) {
1782 if (dev[i] == NULL)
1783 continue;
1784 if (dev[i]->devtype != TYPE_DISK &&
1785 dev[i]->devtype != TYPE_ZBC)
1786 continue;
1787 if (!is_logical_device(dev[i]))
1788 continue;
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1810 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1811 }
1812}
1813
1814static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1815{
1816 int rc = 0;
1817
1818 if (!h->scsi_host)
1819 return 1;
1820
1821 if (is_logical_device(device))
1822 rc = scsi_add_device(h->scsi_host, device->bus,
1823 device->target, device->lun);
1824 else
1825 rc = hpsa_add_sas_device(h->sas_host, device);
1826
1827 return rc;
1828}
1829
1830static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1831 struct hpsa_scsi_dev_t *dev)
1832{
1833 int i;
1834 int count = 0;
1835
1836 for (i = 0; i < h->nr_cmds; i++) {
1837 struct CommandList *c = h->cmd_pool + i;
1838 int refcount = atomic_inc_return(&c->refcount);
1839
1840 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1841 dev->scsi3addr)) {
1842 unsigned long flags;
1843
1844 spin_lock_irqsave(&h->lock, flags);
1845 if (!hpsa_is_cmd_idle(c))
1846 ++count;
1847 spin_unlock_irqrestore(&h->lock, flags);
1848 }
1849
1850 cmd_free(h, c);
1851 }
1852
1853 return count;
1854}
1855
1856#define NUM_WAIT 20
1857static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1858 struct hpsa_scsi_dev_t *device)
1859{
1860 int cmds = 0;
1861 int waits = 0;
1862 int num_wait = NUM_WAIT;
1863
1864 if (device->external)
1865 num_wait = HPSA_EH_PTRAID_TIMEOUT;
1866
1867 while (1) {
1868 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1869 if (cmds == 0)
1870 break;
1871 if (++waits > num_wait)
1872 break;
1873 msleep(1000);
1874 }
1875
1876 if (waits > num_wait) {
1877 dev_warn(&h->pdev->dev,
1878 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1879 __func__,
1880 h->scsi_host->host_no,
1881 device->bus, device->target, device->lun, cmds);
1882 }
1883}
1884
1885static void hpsa_remove_device(struct ctlr_info *h,
1886 struct hpsa_scsi_dev_t *device)
1887{
1888 struct scsi_device *sdev = NULL;
1889
1890 if (!h->scsi_host)
1891 return;
1892
1893
1894
1895
1896 device->removed = 1;
1897 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1898
1899 if (is_logical_device(device)) {
1900 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1901 device->target, device->lun);
1902 if (sdev) {
1903 scsi_remove_device(sdev);
1904 scsi_device_put(sdev);
1905 } else {
1906
1907
1908
1909
1910
1911 hpsa_show_dev_msg(KERN_WARNING, h, device,
1912 "didn't find device for removal.");
1913 }
1914 } else {
1915
1916 hpsa_remove_sas_device(device);
1917 }
1918}
1919
1920static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1921 struct hpsa_scsi_dev_t *sd[], int nsds)
1922{
1923
1924
1925
1926
1927 int i, entry, device_change, changes = 0;
1928 struct hpsa_scsi_dev_t *csd;
1929 unsigned long flags;
1930 struct hpsa_scsi_dev_t **added, **removed;
1931 int nadded, nremoved;
1932
1933
1934
1935
1936
1937 spin_lock_irqsave(&h->reset_lock, flags);
1938 if (h->reset_in_progress) {
1939 h->drv_req_rescan = 1;
1940 spin_unlock_irqrestore(&h->reset_lock, flags);
1941 return;
1942 }
1943 spin_unlock_irqrestore(&h->reset_lock, flags);
1944
1945 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1946 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1947
1948 if (!added || !removed) {
1949 dev_warn(&h->pdev->dev, "out of memory in "
1950 "adjust_hpsa_scsi_table\n");
1951 goto free_and_out;
1952 }
1953
1954 spin_lock_irqsave(&h->devlock, flags);
1955
1956
1957
1958
1959
1960
1961
1962
1963 i = 0;
1964 nremoved = 0;
1965 nadded = 0;
1966 while (i < h->ndevices) {
1967 csd = h->dev[i];
1968 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1969 if (device_change == DEVICE_NOT_FOUND) {
1970 changes++;
1971 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1972 continue;
1973 } else if (device_change == DEVICE_CHANGED) {
1974 changes++;
1975 hpsa_scsi_replace_entry(h, i, sd[entry],
1976 added, &nadded, removed, &nremoved);
1977
1978
1979
1980 sd[entry] = NULL;
1981 } else if (device_change == DEVICE_UPDATED) {
1982 hpsa_scsi_update_entry(h, i, sd[entry]);
1983 }
1984 i++;
1985 }
1986
1987
1988
1989
1990
1991 for (i = 0; i < nsds; i++) {
1992 if (!sd[i])
1993 continue;
1994
1995
1996
1997
1998
1999
2000 if (sd[i]->volume_offline) {
2001 hpsa_show_volume_status(h, sd[i]);
2002 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
2003 continue;
2004 }
2005
2006 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2007 h->ndevices, &entry);
2008 if (device_change == DEVICE_NOT_FOUND) {
2009 changes++;
2010 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2011 break;
2012 sd[i] = NULL;
2013 } else if (device_change == DEVICE_CHANGED) {
2014
2015 changes++;
2016 dev_warn(&h->pdev->dev,
2017 "device unexpectedly changed.\n");
2018
2019 }
2020 }
2021 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031 for (i = 0; i < h->ndevices; i++) {
2032 if (h->dev[i] == NULL)
2033 continue;
2034 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2035 }
2036
2037 spin_unlock_irqrestore(&h->devlock, flags);
2038
2039
2040
2041
2042
2043 for (i = 0; i < nsds; i++) {
2044 if (!sd[i])
2045 continue;
2046 if (sd[i]->volume_offline)
2047 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2048 }
2049
2050
2051
2052
2053
2054 if (!changes)
2055 goto free_and_out;
2056
2057
2058 for (i = 0; i < nremoved; i++) {
2059 if (removed[i] == NULL)
2060 continue;
2061 if (removed[i]->expose_device)
2062 hpsa_remove_device(h, removed[i]);
2063 kfree(removed[i]);
2064 removed[i] = NULL;
2065 }
2066
2067
2068 for (i = 0; i < nadded; i++) {
2069 int rc = 0;
2070
2071 if (added[i] == NULL)
2072 continue;
2073 if (!(added[i]->expose_device))
2074 continue;
2075 rc = hpsa_add_device(h, added[i]);
2076 if (!rc)
2077 continue;
2078 dev_warn(&h->pdev->dev,
2079 "addition failed %d, device not added.", rc);
2080
2081
2082
2083 fixup_botched_add(h, added[i]);
2084 h->drv_req_rescan = 1;
2085 }
2086
2087free_and_out:
2088 kfree(added);
2089 kfree(removed);
2090}
2091
2092
2093
2094
2095
2096static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2097 int bus, int target, int lun)
2098{
2099 int i;
2100 struct hpsa_scsi_dev_t *sd;
2101
2102 for (i = 0; i < h->ndevices; i++) {
2103 sd = h->dev[i];
2104 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2105 return sd;
2106 }
2107 return NULL;
2108}
2109
2110static int hpsa_slave_alloc(struct scsi_device *sdev)
2111{
2112 struct hpsa_scsi_dev_t *sd = NULL;
2113 unsigned long flags;
2114 struct ctlr_info *h;
2115
2116 h = sdev_to_hba(sdev);
2117 spin_lock_irqsave(&h->devlock, flags);
2118 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2119 struct scsi_target *starget;
2120 struct sas_rphy *rphy;
2121
2122 starget = scsi_target(sdev);
2123 rphy = target_to_rphy(starget);
2124 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2125 if (sd) {
2126 sd->target = sdev_id(sdev);
2127 sd->lun = sdev->lun;
2128 }
2129 }
2130 if (!sd)
2131 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2132 sdev_id(sdev), sdev->lun);
2133
2134 if (sd && sd->expose_device) {
2135 atomic_set(&sd->ioaccel_cmds_out, 0);
2136 sdev->hostdata = sd;
2137 } else
2138 sdev->hostdata = NULL;
2139 spin_unlock_irqrestore(&h->devlock, flags);
2140 return 0;
2141}
2142
2143
2144#define CTLR_TIMEOUT (120 * HZ)
2145static int hpsa_slave_configure(struct scsi_device *sdev)
2146{
2147 struct hpsa_scsi_dev_t *sd;
2148 int queue_depth;
2149
2150 sd = sdev->hostdata;
2151 sdev->no_uld_attach = !sd || !sd->expose_device;
2152
2153 if (sd) {
2154 sd->was_removed = 0;
2155 queue_depth = sd->queue_depth != 0 ?
2156 sd->queue_depth : sdev->host->can_queue;
2157 if (sd->external) {
2158 queue_depth = EXTERNAL_QD;
2159 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2160 blk_queue_rq_timeout(sdev->request_queue,
2161 HPSA_EH_PTRAID_TIMEOUT);
2162 }
2163 if (is_hba_lunid(sd->scsi3addr)) {
2164 sdev->eh_timeout = CTLR_TIMEOUT;
2165 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2166 }
2167 } else {
2168 queue_depth = sdev->host->can_queue;
2169 }
2170
2171 scsi_change_queue_depth(sdev, queue_depth);
2172
2173 return 0;
2174}
2175
2176static void hpsa_slave_destroy(struct scsi_device *sdev)
2177{
2178 struct hpsa_scsi_dev_t *hdev = NULL;
2179
2180 hdev = sdev->hostdata;
2181
2182 if (hdev)
2183 hdev->was_removed = 1;
2184}
2185
2186static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2187{
2188 int i;
2189
2190 if (!h->ioaccel2_cmd_sg_list)
2191 return;
2192 for (i = 0; i < h->nr_cmds; i++) {
2193 kfree(h->ioaccel2_cmd_sg_list[i]);
2194 h->ioaccel2_cmd_sg_list[i] = NULL;
2195 }
2196 kfree(h->ioaccel2_cmd_sg_list);
2197 h->ioaccel2_cmd_sg_list = NULL;
2198}
2199
2200static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2201{
2202 int i;
2203
2204 if (h->chainsize <= 0)
2205 return 0;
2206
2207 h->ioaccel2_cmd_sg_list =
2208 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2209 GFP_KERNEL);
2210 if (!h->ioaccel2_cmd_sg_list)
2211 return -ENOMEM;
2212 for (i = 0; i < h->nr_cmds; i++) {
2213 h->ioaccel2_cmd_sg_list[i] =
2214 kmalloc_array(h->maxsgentries,
2215 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2216 GFP_KERNEL);
2217 if (!h->ioaccel2_cmd_sg_list[i])
2218 goto clean;
2219 }
2220 return 0;
2221
2222clean:
2223 hpsa_free_ioaccel2_sg_chain_blocks(h);
2224 return -ENOMEM;
2225}
2226
2227static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2228{
2229 int i;
2230
2231 if (!h->cmd_sg_list)
2232 return;
2233 for (i = 0; i < h->nr_cmds; i++) {
2234 kfree(h->cmd_sg_list[i]);
2235 h->cmd_sg_list[i] = NULL;
2236 }
2237 kfree(h->cmd_sg_list);
2238 h->cmd_sg_list = NULL;
2239}
2240
2241static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2242{
2243 int i;
2244
2245 if (h->chainsize <= 0)
2246 return 0;
2247
2248 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2249 GFP_KERNEL);
2250 if (!h->cmd_sg_list)
2251 return -ENOMEM;
2252
2253 for (i = 0; i < h->nr_cmds; i++) {
2254 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2255 sizeof(*h->cmd_sg_list[i]),
2256 GFP_KERNEL);
2257 if (!h->cmd_sg_list[i])
2258 goto clean;
2259
2260 }
2261 return 0;
2262
2263clean:
2264 hpsa_free_sg_chain_blocks(h);
2265 return -ENOMEM;
2266}
2267
2268static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2269 struct io_accel2_cmd *cp, struct CommandList *c)
2270{
2271 struct ioaccel2_sg_element *chain_block;
2272 u64 temp64;
2273 u32 chain_size;
2274
2275 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2276 chain_size = le32_to_cpu(cp->sg[0].length);
2277 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2278 DMA_TO_DEVICE);
2279 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2280
2281 cp->sg->address = 0;
2282 return -1;
2283 }
2284 cp->sg->address = cpu_to_le64(temp64);
2285 return 0;
2286}
2287
2288static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2289 struct io_accel2_cmd *cp)
2290{
2291 struct ioaccel2_sg_element *chain_sg;
2292 u64 temp64;
2293 u32 chain_size;
2294
2295 chain_sg = cp->sg;
2296 temp64 = le64_to_cpu(chain_sg->address);
2297 chain_size = le32_to_cpu(cp->sg[0].length);
2298 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2299}
2300
2301static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2302 struct CommandList *c)
2303{
2304 struct SGDescriptor *chain_sg, *chain_block;
2305 u64 temp64;
2306 u32 chain_len;
2307
2308 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2309 chain_block = h->cmd_sg_list[c->cmdindex];
2310 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2311 chain_len = sizeof(*chain_sg) *
2312 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2313 chain_sg->Len = cpu_to_le32(chain_len);
2314 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2315 DMA_TO_DEVICE);
2316 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2317
2318 chain_sg->Addr = cpu_to_le64(0);
2319 return -1;
2320 }
2321 chain_sg->Addr = cpu_to_le64(temp64);
2322 return 0;
2323}
2324
2325static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2326 struct CommandList *c)
2327{
2328 struct SGDescriptor *chain_sg;
2329
2330 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2331 return;
2332
2333 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2334 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2335 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2336}
2337
2338
2339
2340
2341
2342
2343static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2344 struct CommandList *c,
2345 struct scsi_cmnd *cmd,
2346 struct io_accel2_cmd *c2,
2347 struct hpsa_scsi_dev_t *dev)
2348{
2349 int data_len;
2350 int retry = 0;
2351 u32 ioaccel2_resid = 0;
2352
2353 switch (c2->error_data.serv_response) {
2354 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2355 switch (c2->error_data.status) {
2356 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2357 if (cmd)
2358 cmd->result = 0;
2359 break;
2360 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2361 cmd->result |= SAM_STAT_CHECK_CONDITION;
2362 if (c2->error_data.data_present !=
2363 IOACCEL2_SENSE_DATA_PRESENT) {
2364 memset(cmd->sense_buffer, 0,
2365 SCSI_SENSE_BUFFERSIZE);
2366 break;
2367 }
2368
2369 data_len = c2->error_data.sense_data_len;
2370 if (data_len > SCSI_SENSE_BUFFERSIZE)
2371 data_len = SCSI_SENSE_BUFFERSIZE;
2372 if (data_len > sizeof(c2->error_data.sense_data_buff))
2373 data_len =
2374 sizeof(c2->error_data.sense_data_buff);
2375 memcpy(cmd->sense_buffer,
2376 c2->error_data.sense_data_buff, data_len);
2377 retry = 1;
2378 break;
2379 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2380 retry = 1;
2381 break;
2382 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2383 retry = 1;
2384 break;
2385 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2386 retry = 1;
2387 break;
2388 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2389 retry = 1;
2390 break;
2391 default:
2392 retry = 1;
2393 break;
2394 }
2395 break;
2396 case IOACCEL2_SERV_RESPONSE_FAILURE:
2397 switch (c2->error_data.status) {
2398 case IOACCEL2_STATUS_SR_IO_ERROR:
2399 case IOACCEL2_STATUS_SR_IO_ABORTED:
2400 case IOACCEL2_STATUS_SR_OVERRUN:
2401 retry = 1;
2402 break;
2403 case IOACCEL2_STATUS_SR_UNDERRUN:
2404 cmd->result = (DID_OK << 16);
2405 ioaccel2_resid = get_unaligned_le32(
2406 &c2->error_data.resid_cnt[0]);
2407 scsi_set_resid(cmd, ioaccel2_resid);
2408 break;
2409 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2410 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2411 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2412
2413
2414
2415
2416
2417
2418
2419
2420 if (dev->physical_device && dev->expose_device) {
2421 cmd->result = DID_NO_CONNECT << 16;
2422 dev->removed = 1;
2423 h->drv_req_rescan = 1;
2424 dev_warn(&h->pdev->dev,
2425 "%s: device is gone!\n", __func__);
2426 } else
2427
2428
2429
2430
2431
2432 retry = 1;
2433 break;
2434 default:
2435 retry = 1;
2436 }
2437 break;
2438 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2439 break;
2440 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2441 break;
2442 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2443 retry = 1;
2444 break;
2445 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2446 break;
2447 default:
2448 retry = 1;
2449 break;
2450 }
2451
2452 if (dev->in_reset)
2453 retry = 0;
2454
2455 return retry;
2456}
2457
2458static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2459 struct CommandList *c)
2460{
2461 struct hpsa_scsi_dev_t *dev = c->device;
2462
2463
2464
2465
2466
2467
2468 c->scsi_cmd = SCSI_CMD_IDLE;
2469 mb();
2470 if (dev) {
2471 atomic_dec(&dev->commands_outstanding);
2472 if (dev->in_reset &&
2473 atomic_read(&dev->commands_outstanding) <= 0)
2474 wake_up_all(&h->event_sync_wait_queue);
2475 }
2476}
2477
2478static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2479 struct CommandList *c)
2480{
2481 hpsa_cmd_resolve_events(h, c);
2482 cmd_tagged_free(h, c);
2483}
2484
2485static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2486 struct CommandList *c, struct scsi_cmnd *cmd)
2487{
2488 hpsa_cmd_resolve_and_free(h, c);
2489 if (cmd)
2490 scsi_done(cmd);
2491}
2492
2493static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2494{
2495 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2496 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2497}
2498
2499static void process_ioaccel2_completion(struct ctlr_info *h,
2500 struct CommandList *c, struct scsi_cmnd *cmd,
2501 struct hpsa_scsi_dev_t *dev)
2502{
2503 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2504
2505
2506 if (likely(c2->error_data.serv_response == 0 &&
2507 c2->error_data.status == 0)) {
2508 cmd->result = 0;
2509 return hpsa_cmd_free_and_done(h, c, cmd);
2510 }
2511
2512
2513
2514
2515
2516
2517 if (is_logical_device(dev) &&
2518 c2->error_data.serv_response ==
2519 IOACCEL2_SERV_RESPONSE_FAILURE) {
2520 if (c2->error_data.status ==
2521 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2522 hpsa_turn_off_ioaccel_for_device(dev);
2523 }
2524
2525 if (dev->in_reset) {
2526 cmd->result = DID_RESET << 16;
2527 return hpsa_cmd_free_and_done(h, c, cmd);
2528 }
2529
2530 return hpsa_retry_cmd(h, c);
2531 }
2532
2533 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2534 return hpsa_retry_cmd(h, c);
2535
2536 return hpsa_cmd_free_and_done(h, c, cmd);
2537}
2538
2539
2540static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2541 struct CommandList *cp)
2542{
2543 u8 tmf_status = cp->err_info->ScsiStatus;
2544
2545 switch (tmf_status) {
2546 case CISS_TMF_COMPLETE:
2547
2548
2549
2550
2551 case CISS_TMF_SUCCESS:
2552 return 0;
2553 case CISS_TMF_INVALID_FRAME:
2554 case CISS_TMF_NOT_SUPPORTED:
2555 case CISS_TMF_FAILED:
2556 case CISS_TMF_WRONG_LUN:
2557 case CISS_TMF_OVERLAPPED_TAG:
2558 break;
2559 default:
2560 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2561 tmf_status);
2562 break;
2563 }
2564 return -tmf_status;
2565}
2566
2567static void complete_scsi_command(struct CommandList *cp)
2568{
2569 struct scsi_cmnd *cmd;
2570 struct ctlr_info *h;
2571 struct ErrorInfo *ei;
2572 struct hpsa_scsi_dev_t *dev;
2573 struct io_accel2_cmd *c2;
2574
2575 u8 sense_key;
2576 u8 asc;
2577 u8 ascq;
2578 unsigned long sense_data_size;
2579
2580 ei = cp->err_info;
2581 cmd = cp->scsi_cmd;
2582 h = cp->h;
2583
2584 if (!cmd->device) {
2585 cmd->result = DID_NO_CONNECT << 16;
2586 return hpsa_cmd_free_and_done(h, cp, cmd);
2587 }
2588
2589 dev = cmd->device->hostdata;
2590 if (!dev) {
2591 cmd->result = DID_NO_CONNECT << 16;
2592 return hpsa_cmd_free_and_done(h, cp, cmd);
2593 }
2594 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2595
2596 scsi_dma_unmap(cmd);
2597 if ((cp->cmd_type == CMD_SCSI) &&
2598 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2599 hpsa_unmap_sg_chain_block(h, cp);
2600
2601 if ((cp->cmd_type == CMD_IOACCEL2) &&
2602 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2603 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2604
2605 cmd->result = (DID_OK << 16);
2606
2607
2608 if (dev->was_removed) {
2609 hpsa_cmd_resolve_and_free(h, cp);
2610 return;
2611 }
2612
2613 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2614 if (dev->physical_device && dev->expose_device &&
2615 dev->removed) {
2616 cmd->result = DID_NO_CONNECT << 16;
2617 return hpsa_cmd_free_and_done(h, cp, cmd);
2618 }
2619 if (likely(cp->phys_disk != NULL))
2620 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2621 }
2622
2623
2624
2625
2626
2627
2628 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2629
2630 cmd->result = DID_NO_CONNECT << 16;
2631 return hpsa_cmd_free_and_done(h, cp, cmd);
2632 }
2633
2634 if (cp->cmd_type == CMD_IOACCEL2)
2635 return process_ioaccel2_completion(h, cp, cmd, dev);
2636
2637 scsi_set_resid(cmd, ei->ResidualCnt);
2638 if (ei->CommandStatus == 0)
2639 return hpsa_cmd_free_and_done(h, cp, cmd);
2640
2641
2642
2643
2644 if (cp->cmd_type == CMD_IOACCEL1) {
2645 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2646 cp->Header.SGList = scsi_sg_count(cmd);
2647 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2648 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2649 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2650 cp->Header.tag = c->tag;
2651 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2652 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2653
2654
2655
2656
2657
2658 if (is_logical_device(dev)) {
2659 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2660 dev->offload_enabled = 0;
2661 return hpsa_retry_cmd(h, cp);
2662 }
2663 }
2664
2665
2666 switch (ei->CommandStatus) {
2667
2668 case CMD_TARGET_STATUS:
2669 cmd->result |= ei->ScsiStatus;
2670
2671 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2672 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2673 else
2674 sense_data_size = sizeof(ei->SenseInfo);
2675 if (ei->SenseLen < sense_data_size)
2676 sense_data_size = ei->SenseLen;
2677 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2678 if (ei->ScsiStatus)
2679 decode_sense_data(ei->SenseInfo, sense_data_size,
2680 &sense_key, &asc, &ascq);
2681 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2682 switch (sense_key) {
2683 case ABORTED_COMMAND:
2684 cmd->result |= DID_SOFT_ERROR << 16;
2685 break;
2686 case UNIT_ATTENTION:
2687 if (asc == 0x3F && ascq == 0x0E)
2688 h->drv_req_rescan = 1;
2689 break;
2690 case ILLEGAL_REQUEST:
2691 if (asc == 0x25 && ascq == 0x00) {
2692 dev->removed = 1;
2693 cmd->result = DID_NO_CONNECT << 16;
2694 }
2695 break;
2696 }
2697 break;
2698 }
2699
2700
2701
2702 if (ei->ScsiStatus) {
2703 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2704 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2705 "Returning result: 0x%x\n",
2706 cp, ei->ScsiStatus,
2707 sense_key, asc, ascq,
2708 cmd->result);
2709 } else {
2710 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2711 "Returning no connection.\n", cp),
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725 cmd->result = DID_NO_CONNECT << 16;
2726 }
2727 break;
2728
2729 case CMD_DATA_UNDERRUN:
2730 break;
2731 case CMD_DATA_OVERRUN:
2732 dev_warn(&h->pdev->dev,
2733 "CDB %16phN data overrun\n", cp->Request.CDB);
2734 break;
2735 case CMD_INVALID: {
2736
2737
2738
2739
2740
2741
2742
2743
2744 cmd->result = DID_NO_CONNECT << 16;
2745 }
2746 break;
2747 case CMD_PROTOCOL_ERR:
2748 cmd->result = DID_ERROR << 16;
2749 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2750 cp->Request.CDB);
2751 break;
2752 case CMD_HARDWARE_ERR:
2753 cmd->result = DID_ERROR << 16;
2754 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2755 cp->Request.CDB);
2756 break;
2757 case CMD_CONNECTION_LOST:
2758 cmd->result = DID_ERROR << 16;
2759 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2760 cp->Request.CDB);
2761 break;
2762 case CMD_ABORTED:
2763 cmd->result = DID_ABORT << 16;
2764 break;
2765 case CMD_ABORT_FAILED:
2766 cmd->result = DID_ERROR << 16;
2767 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2768 cp->Request.CDB);
2769 break;
2770 case CMD_UNSOLICITED_ABORT:
2771 cmd->result = DID_SOFT_ERROR << 16;
2772 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2773 cp->Request.CDB);
2774 break;
2775 case CMD_TIMEOUT:
2776 cmd->result = DID_TIME_OUT << 16;
2777 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2778 cp->Request.CDB);
2779 break;
2780 case CMD_UNABORTABLE:
2781 cmd->result = DID_ERROR << 16;
2782 dev_warn(&h->pdev->dev, "Command unabortable\n");
2783 break;
2784 case CMD_TMF_STATUS:
2785 if (hpsa_evaluate_tmf_status(h, cp))
2786 cmd->result = DID_ERROR << 16;
2787 break;
2788 case CMD_IOACCEL_DISABLED:
2789
2790
2791
2792 cmd->result = DID_SOFT_ERROR << 16;
2793 dev_warn(&h->pdev->dev,
2794 "cp %p had HP SSD Smart Path error\n", cp);
2795 break;
2796 default:
2797 cmd->result = DID_ERROR << 16;
2798 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2799 cp, ei->CommandStatus);
2800 }
2801
2802 return hpsa_cmd_free_and_done(h, cp, cmd);
2803}
2804
2805static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2806 int sg_used, enum dma_data_direction data_direction)
2807{
2808 int i;
2809
2810 for (i = 0; i < sg_used; i++)
2811 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2812 le32_to_cpu(c->SG[i].Len),
2813 data_direction);
2814}
2815
2816static int hpsa_map_one(struct pci_dev *pdev,
2817 struct CommandList *cp,
2818 unsigned char *buf,
2819 size_t buflen,
2820 enum dma_data_direction data_direction)
2821{
2822 u64 addr64;
2823
2824 if (buflen == 0 || data_direction == DMA_NONE) {
2825 cp->Header.SGList = 0;
2826 cp->Header.SGTotal = cpu_to_le16(0);
2827 return 0;
2828 }
2829
2830 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2831 if (dma_mapping_error(&pdev->dev, addr64)) {
2832
2833 cp->Header.SGList = 0;
2834 cp->Header.SGTotal = cpu_to_le16(0);
2835 return -1;
2836 }
2837 cp->SG[0].Addr = cpu_to_le64(addr64);
2838 cp->SG[0].Len = cpu_to_le32(buflen);
2839 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST);
2840 cp->Header.SGList = 1;
2841 cp->Header.SGTotal = cpu_to_le16(1);
2842 return 0;
2843}
2844
2845#define NO_TIMEOUT ((unsigned long) -1)
2846#define DEFAULT_TIMEOUT 30000
2847static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2848 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2849{
2850 DECLARE_COMPLETION_ONSTACK(wait);
2851
2852 c->waiting = &wait;
2853 __enqueue_cmd_and_start_io(h, c, reply_queue);
2854 if (timeout_msecs == NO_TIMEOUT) {
2855
2856 wait_for_completion_io(&wait);
2857 return IO_OK;
2858 }
2859 if (!wait_for_completion_io_timeout(&wait,
2860 msecs_to_jiffies(timeout_msecs))) {
2861 dev_warn(&h->pdev->dev, "Command timed out.\n");
2862 return -ETIMEDOUT;
2863 }
2864 return IO_OK;
2865}
2866
2867static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2868 int reply_queue, unsigned long timeout_msecs)
2869{
2870 if (unlikely(lockup_detected(h))) {
2871 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2872 return IO_OK;
2873 }
2874 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2875}
2876
2877static u32 lockup_detected(struct ctlr_info *h)
2878{
2879 int cpu;
2880 u32 rc, *lockup_detected;
2881
2882 cpu = get_cpu();
2883 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2884 rc = *lockup_detected;
2885 put_cpu();
2886 return rc;
2887}
2888
2889#define MAX_DRIVER_CMD_RETRIES 25
2890static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2891 struct CommandList *c, enum dma_data_direction data_direction,
2892 unsigned long timeout_msecs)
2893{
2894 int backoff_time = 10, retry_count = 0;
2895 int rc;
2896
2897 do {
2898 memset(c->err_info, 0, sizeof(*c->err_info));
2899 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2900 timeout_msecs);
2901 if (rc)
2902 break;
2903 retry_count++;
2904 if (retry_count > 3) {
2905 msleep(backoff_time);
2906 if (backoff_time < 1000)
2907 backoff_time *= 2;
2908 }
2909 } while ((check_for_unit_attention(h, c) ||
2910 check_for_busy(h, c)) &&
2911 retry_count <= MAX_DRIVER_CMD_RETRIES);
2912 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2913 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2914 rc = -EIO;
2915 return rc;
2916}
2917
2918static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2919 struct CommandList *c)
2920{
2921 const u8 *cdb = c->Request.CDB;
2922 const u8 *lun = c->Header.LUN.LunAddrBytes;
2923
2924 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2925 txt, lun, cdb);
2926}
2927
2928static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2929 struct CommandList *cp)
2930{
2931 const struct ErrorInfo *ei = cp->err_info;
2932 struct device *d = &cp->h->pdev->dev;
2933 u8 sense_key, asc, ascq;
2934 int sense_len;
2935
2936 switch (ei->CommandStatus) {
2937 case CMD_TARGET_STATUS:
2938 if (ei->SenseLen > sizeof(ei->SenseInfo))
2939 sense_len = sizeof(ei->SenseInfo);
2940 else
2941 sense_len = ei->SenseLen;
2942 decode_sense_data(ei->SenseInfo, sense_len,
2943 &sense_key, &asc, &ascq);
2944 hpsa_print_cmd(h, "SCSI status", cp);
2945 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2946 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2947 sense_key, asc, ascq);
2948 else
2949 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2950 if (ei->ScsiStatus == 0)
2951 dev_warn(d, "SCSI status is abnormally zero. "
2952 "(probably indicates selection timeout "
2953 "reported incorrectly due to a known "
2954 "firmware bug, circa July, 2001.)\n");
2955 break;
2956 case CMD_DATA_UNDERRUN:
2957 break;
2958 case CMD_DATA_OVERRUN:
2959 hpsa_print_cmd(h, "overrun condition", cp);
2960 break;
2961 case CMD_INVALID: {
2962
2963
2964
2965 hpsa_print_cmd(h, "invalid command", cp);
2966 dev_warn(d, "probably means device no longer present\n");
2967 }
2968 break;
2969 case CMD_PROTOCOL_ERR:
2970 hpsa_print_cmd(h, "protocol error", cp);
2971 break;
2972 case CMD_HARDWARE_ERR:
2973 hpsa_print_cmd(h, "hardware error", cp);
2974 break;
2975 case CMD_CONNECTION_LOST:
2976 hpsa_print_cmd(h, "connection lost", cp);
2977 break;
2978 case CMD_ABORTED:
2979 hpsa_print_cmd(h, "aborted", cp);
2980 break;
2981 case CMD_ABORT_FAILED:
2982 hpsa_print_cmd(h, "abort failed", cp);
2983 break;
2984 case CMD_UNSOLICITED_ABORT:
2985 hpsa_print_cmd(h, "unsolicited abort", cp);
2986 break;
2987 case CMD_TIMEOUT:
2988 hpsa_print_cmd(h, "timed out", cp);
2989 break;
2990 case CMD_UNABORTABLE:
2991 hpsa_print_cmd(h, "unabortable", cp);
2992 break;
2993 case CMD_CTLR_LOCKUP:
2994 hpsa_print_cmd(h, "controller lockup detected", cp);
2995 break;
2996 default:
2997 hpsa_print_cmd(h, "unknown status", cp);
2998 dev_warn(d, "Unknown command status %x\n",
2999 ei->CommandStatus);
3000 }
3001}
3002
3003static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
3004 u8 page, u8 *buf, size_t bufsize)
3005{
3006 int rc = IO_OK;
3007 struct CommandList *c;
3008 struct ErrorInfo *ei;
3009
3010 c = cmd_alloc(h);
3011 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3012 page, scsi3addr, TYPE_CMD)) {
3013 rc = -1;
3014 goto out;
3015 }
3016 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3017 NO_TIMEOUT);
3018 if (rc)
3019 goto out;
3020 ei = c->err_info;
3021 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3022 hpsa_scsi_interpret_error(h, c);
3023 rc = -1;
3024 }
3025out:
3026 cmd_free(h, c);
3027 return rc;
3028}
3029
3030static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3031 u8 *scsi3addr)
3032{
3033 u8 *buf;
3034 u64 sa = 0;
3035 int rc = 0;
3036
3037 buf = kzalloc(1024, GFP_KERNEL);
3038 if (!buf)
3039 return 0;
3040
3041 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3042 buf, 1024);
3043
3044 if (rc)
3045 goto out;
3046
3047 sa = get_unaligned_be64(buf+12);
3048
3049out:
3050 kfree(buf);
3051 return sa;
3052}
3053
3054static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3055 u16 page, unsigned char *buf,
3056 unsigned char bufsize)
3057{
3058 int rc = IO_OK;
3059 struct CommandList *c;
3060 struct ErrorInfo *ei;
3061
3062 c = cmd_alloc(h);
3063
3064 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3065 page, scsi3addr, TYPE_CMD)) {
3066 rc = -1;
3067 goto out;
3068 }
3069 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3070 NO_TIMEOUT);
3071 if (rc)
3072 goto out;
3073 ei = c->err_info;
3074 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3075 hpsa_scsi_interpret_error(h, c);
3076 rc = -1;
3077 }
3078out:
3079 cmd_free(h, c);
3080 return rc;
3081}
3082
3083static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3084 u8 reset_type, int reply_queue)
3085{
3086 int rc = IO_OK;
3087 struct CommandList *c;
3088 struct ErrorInfo *ei;
3089
3090 c = cmd_alloc(h);
3091 c->device = dev;
3092
3093
3094 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3095 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3096 if (rc) {
3097 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3098 goto out;
3099 }
3100
3101
3102 ei = c->err_info;
3103 if (ei->CommandStatus != 0) {
3104 hpsa_scsi_interpret_error(h, c);
3105 rc = -1;
3106 }
3107out:
3108 cmd_free(h, c);
3109 return rc;
3110}
3111
3112static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3113 struct hpsa_scsi_dev_t *dev,
3114 unsigned char *scsi3addr)
3115{
3116 int i;
3117 bool match = false;
3118 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3119 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3120
3121 if (hpsa_is_cmd_idle(c))
3122 return false;
3123
3124 switch (c->cmd_type) {
3125 case CMD_SCSI:
3126 case CMD_IOCTL_PEND:
3127 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3128 sizeof(c->Header.LUN.LunAddrBytes));
3129 break;
3130
3131 case CMD_IOACCEL1:
3132 case CMD_IOACCEL2:
3133 if (c->phys_disk == dev) {
3134
3135 match = true;
3136 } else {
3137
3138
3139
3140
3141 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3142
3143
3144
3145
3146 match = dev->phys_disk[i] == c->phys_disk;
3147 }
3148 }
3149 break;
3150
3151 case IOACCEL2_TMF:
3152 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3153 match = dev->phys_disk[i]->ioaccel_handle ==
3154 le32_to_cpu(ac->it_nexus);
3155 }
3156 break;
3157
3158 case 0:
3159 match = false;
3160 break;
3161
3162 default:
3163 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3164 c->cmd_type);
3165 BUG();
3166 }
3167
3168 return match;
3169}
3170
3171static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3172 u8 reset_type, int reply_queue)
3173{
3174 int rc = 0;
3175
3176
3177 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3178 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3179 return -EINTR;
3180 }
3181
3182 rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3183 if (!rc) {
3184
3185 atomic_dec(&dev->commands_outstanding);
3186 wait_event(h->event_sync_wait_queue,
3187 atomic_read(&dev->commands_outstanding) <= 0 ||
3188 lockup_detected(h));
3189 }
3190
3191 if (unlikely(lockup_detected(h))) {
3192 dev_warn(&h->pdev->dev,
3193 "Controller lockup detected during reset wait\n");
3194 rc = -ENODEV;
3195 }
3196
3197 if (!rc)
3198 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3199
3200 mutex_unlock(&h->reset_mutex);
3201 return rc;
3202}
3203
3204static void hpsa_get_raid_level(struct ctlr_info *h,
3205 unsigned char *scsi3addr, unsigned char *raid_level)
3206{
3207 int rc;
3208 unsigned char *buf;
3209
3210 *raid_level = RAID_UNKNOWN;
3211 buf = kzalloc(64, GFP_KERNEL);
3212 if (!buf)
3213 return;
3214
3215 if (!hpsa_vpd_page_supported(h, scsi3addr,
3216 HPSA_VPD_LV_DEVICE_GEOMETRY))
3217 goto exit;
3218
3219 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3220 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3221
3222 if (rc == 0)
3223 *raid_level = buf[8];
3224 if (*raid_level > RAID_UNKNOWN)
3225 *raid_level = RAID_UNKNOWN;
3226exit:
3227 kfree(buf);
3228 return;
3229}
3230
3231#define HPSA_MAP_DEBUG
3232#ifdef HPSA_MAP_DEBUG
3233static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3234 struct raid_map_data *map_buff)
3235{
3236 struct raid_map_disk_data *dd = &map_buff->data[0];
3237 int map, row, col;
3238 u16 map_cnt, row_cnt, disks_per_row;
3239
3240 if (rc != 0)
3241 return;
3242
3243
3244 if (h->raid_offload_debug < 2)
3245 return;
3246
3247 dev_info(&h->pdev->dev, "structure_size = %u\n",
3248 le32_to_cpu(map_buff->structure_size));
3249 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3250 le32_to_cpu(map_buff->volume_blk_size));
3251 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3252 le64_to_cpu(map_buff->volume_blk_cnt));
3253 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3254 map_buff->phys_blk_shift);
3255 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3256 map_buff->parity_rotation_shift);
3257 dev_info(&h->pdev->dev, "strip_size = %u\n",
3258 le16_to_cpu(map_buff->strip_size));
3259 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3260 le64_to_cpu(map_buff->disk_starting_blk));
3261 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3262 le64_to_cpu(map_buff->disk_blk_cnt));
3263 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3264 le16_to_cpu(map_buff->data_disks_per_row));
3265 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3266 le16_to_cpu(map_buff->metadata_disks_per_row));
3267 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3268 le16_to_cpu(map_buff->row_cnt));
3269 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3270 le16_to_cpu(map_buff->layout_map_count));
3271 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3272 le16_to_cpu(map_buff->flags));
3273 dev_info(&h->pdev->dev, "encryption = %s\n",
3274 le16_to_cpu(map_buff->flags) &
3275 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3276 dev_info(&h->pdev->dev, "dekindex = %u\n",
3277 le16_to_cpu(map_buff->dekindex));
3278 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3279 for (map = 0; map < map_cnt; map++) {
3280 dev_info(&h->pdev->dev, "Map%u:\n", map);
3281 row_cnt = le16_to_cpu(map_buff->row_cnt);
3282 for (row = 0; row < row_cnt; row++) {
3283 dev_info(&h->pdev->dev, " Row%u:\n", row);
3284 disks_per_row =
3285 le16_to_cpu(map_buff->data_disks_per_row);
3286 for (col = 0; col < disks_per_row; col++, dd++)
3287 dev_info(&h->pdev->dev,
3288 " D%02u: h=0x%04x xor=%u,%u\n",
3289 col, dd->ioaccel_handle,
3290 dd->xor_mult[0], dd->xor_mult[1]);
3291 disks_per_row =
3292 le16_to_cpu(map_buff->metadata_disks_per_row);
3293 for (col = 0; col < disks_per_row; col++, dd++)
3294 dev_info(&h->pdev->dev,
3295 " M%02u: h=0x%04x xor=%u,%u\n",
3296 col, dd->ioaccel_handle,
3297 dd->xor_mult[0], dd->xor_mult[1]);
3298 }
3299 }
3300}
3301#else
3302static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3303 __attribute__((unused)) int rc,
3304 __attribute__((unused)) struct raid_map_data *map_buff)
3305{
3306}
3307#endif
3308
3309static int hpsa_get_raid_map(struct ctlr_info *h,
3310 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3311{
3312 int rc = 0;
3313 struct CommandList *c;
3314 struct ErrorInfo *ei;
3315
3316 c = cmd_alloc(h);
3317
3318 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3319 sizeof(this_device->raid_map), 0,
3320 scsi3addr, TYPE_CMD)) {
3321 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3322 cmd_free(h, c);
3323 return -1;
3324 }
3325 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3326 NO_TIMEOUT);
3327 if (rc)
3328 goto out;
3329 ei = c->err_info;
3330 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3331 hpsa_scsi_interpret_error(h, c);
3332 rc = -1;
3333 goto out;
3334 }
3335 cmd_free(h, c);
3336
3337
3338 if (le32_to_cpu(this_device->raid_map.structure_size) >
3339 sizeof(this_device->raid_map)) {
3340 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3341 rc = -1;
3342 }
3343 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3344 return rc;
3345out:
3346 cmd_free(h, c);
3347 return rc;
3348}
3349
3350static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3351 unsigned char scsi3addr[], u16 bmic_device_index,
3352 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3353{
3354 int rc = IO_OK;
3355 struct CommandList *c;
3356 struct ErrorInfo *ei;
3357
3358 c = cmd_alloc(h);
3359
3360 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3361 0, RAID_CTLR_LUNID, TYPE_CMD);
3362 if (rc)
3363 goto out;
3364
3365 c->Request.CDB[2] = bmic_device_index & 0xff;
3366 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3367
3368 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3369 NO_TIMEOUT);
3370 if (rc)
3371 goto out;
3372 ei = c->err_info;
3373 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3374 hpsa_scsi_interpret_error(h, c);
3375 rc = -1;
3376 }
3377out:
3378 cmd_free(h, c);
3379 return rc;
3380}
3381
3382static int hpsa_bmic_id_controller(struct ctlr_info *h,
3383 struct bmic_identify_controller *buf, size_t bufsize)
3384{
3385 int rc = IO_OK;
3386 struct CommandList *c;
3387 struct ErrorInfo *ei;
3388
3389 c = cmd_alloc(h);
3390
3391 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3392 0, RAID_CTLR_LUNID, TYPE_CMD);
3393 if (rc)
3394 goto out;
3395
3396 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3397 NO_TIMEOUT);
3398 if (rc)
3399 goto out;
3400 ei = c->err_info;
3401 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3402 hpsa_scsi_interpret_error(h, c);
3403 rc = -1;
3404 }
3405out:
3406 cmd_free(h, c);
3407 return rc;
3408}
3409
3410static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3411 unsigned char scsi3addr[], u16 bmic_device_index,
3412 struct bmic_identify_physical_device *buf, size_t bufsize)
3413{
3414 int rc = IO_OK;
3415 struct CommandList *c;
3416 struct ErrorInfo *ei;
3417
3418 c = cmd_alloc(h);
3419 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3420 0, RAID_CTLR_LUNID, TYPE_CMD);
3421 if (rc)
3422 goto out;
3423
3424 c->Request.CDB[2] = bmic_device_index & 0xff;
3425 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3426
3427 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3428 NO_TIMEOUT);
3429 ei = c->err_info;
3430 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3431 hpsa_scsi_interpret_error(h, c);
3432 rc = -1;
3433 }
3434out:
3435 cmd_free(h, c);
3436
3437 return rc;
3438}
3439
3440
3441
3442
3443
3444
3445
3446static void hpsa_get_enclosure_info(struct ctlr_info *h,
3447 unsigned char *scsi3addr,
3448 struct ReportExtendedLUNdata *rlep, int rle_index,
3449 struct hpsa_scsi_dev_t *encl_dev)
3450{
3451 int rc = -1;
3452 struct CommandList *c = NULL;
3453 struct ErrorInfo *ei = NULL;
3454 struct bmic_sense_storage_box_params *bssbp = NULL;
3455 struct bmic_identify_physical_device *id_phys = NULL;
3456 struct ext_report_lun_entry *rle;
3457 u16 bmic_device_index = 0;
3458
3459 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3460 return;
3461
3462 rle = &rlep->LUN[rle_index];
3463
3464 encl_dev->eli =
3465 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3466
3467 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3468
3469 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3470 rc = IO_OK;
3471 goto out;
3472 }
3473
3474 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3475 rc = IO_OK;
3476 goto out;
3477 }
3478
3479 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3480 if (!bssbp)
3481 goto out;
3482
3483 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3484 if (!id_phys)
3485 goto out;
3486
3487 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3488 id_phys, sizeof(*id_phys));
3489 if (rc) {
3490 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3491 __func__, encl_dev->external, bmic_device_index);
3492 goto out;
3493 }
3494
3495 c = cmd_alloc(h);
3496
3497 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3498 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3499
3500 if (rc)
3501 goto out;
3502
3503 if (id_phys->phys_connector[1] == 'E')
3504 c->Request.CDB[5] = id_phys->box_index;
3505 else
3506 c->Request.CDB[5] = 0;
3507
3508 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3509 NO_TIMEOUT);
3510 if (rc)
3511 goto out;
3512
3513 ei = c->err_info;
3514 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3515 rc = -1;
3516 goto out;
3517 }
3518
3519 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3520 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3521 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3522
3523 rc = IO_OK;
3524out:
3525 kfree(bssbp);
3526 kfree(id_phys);
3527
3528 if (c)
3529 cmd_free(h, c);
3530
3531 if (rc != IO_OK)
3532 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3533 "Error, could not get enclosure information");
3534}
3535
3536static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3537 unsigned char *scsi3addr)
3538{
3539 struct ReportExtendedLUNdata *physdev;
3540 u32 nphysicals;
3541 u64 sa = 0;
3542 int i;
3543
3544 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3545 if (!physdev)
3546 return 0;
3547
3548 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3549 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3550 kfree(physdev);
3551 return 0;
3552 }
3553 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3554
3555 for (i = 0; i < nphysicals; i++)
3556 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3557 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3558 break;
3559 }
3560
3561 kfree(physdev);
3562
3563 return sa;
3564}
3565
3566static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3567 struct hpsa_scsi_dev_t *dev)
3568{
3569 int rc;
3570 u64 sa = 0;
3571
3572 if (is_hba_lunid(scsi3addr)) {
3573 struct bmic_sense_subsystem_info *ssi;
3574
3575 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3576 if (!ssi)
3577 return;
3578
3579 rc = hpsa_bmic_sense_subsystem_information(h,
3580 scsi3addr, 0, ssi, sizeof(*ssi));
3581 if (rc == 0) {
3582 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3583 h->sas_address = sa;
3584 }
3585
3586 kfree(ssi);
3587 } else
3588 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3589
3590 dev->sas_address = sa;
3591}
3592
3593static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3594 struct ReportExtendedLUNdata *physdev)
3595{
3596 u32 nphysicals;
3597 int i;
3598
3599 if (h->discovery_polling)
3600 return;
3601
3602 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3603
3604 for (i = 0; i < nphysicals; i++) {
3605 if (physdev->LUN[i].device_type ==
3606 BMIC_DEVICE_TYPE_CONTROLLER
3607 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3608 dev_info(&h->pdev->dev,
3609 "External controller present, activate discovery polling and disable rld caching\n");
3610 hpsa_disable_rld_caching(h);
3611 h->discovery_polling = 1;
3612 break;
3613 }
3614 }
3615}
3616
3617
3618static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3619 unsigned char scsi3addr[], u8 page)
3620{
3621 int rc;
3622 int i;
3623 int pages;
3624 unsigned char *buf, bufsize;
3625
3626 buf = kzalloc(256, GFP_KERNEL);
3627 if (!buf)
3628 return false;
3629
3630
3631 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3632 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3633 buf, HPSA_VPD_HEADER_SZ);
3634 if (rc != 0)
3635 goto exit_unsupported;
3636 pages = buf[3];
3637 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3638 bufsize = pages + HPSA_VPD_HEADER_SZ;
3639 else
3640 bufsize = 255;
3641
3642
3643 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3644 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3645 buf, bufsize);
3646 if (rc != 0)
3647 goto exit_unsupported;
3648
3649 pages = buf[3];
3650 for (i = 1; i <= pages; i++)
3651 if (buf[3 + i] == page)
3652 goto exit_supported;
3653exit_unsupported:
3654 kfree(buf);
3655 return false;
3656exit_supported:
3657 kfree(buf);
3658 return true;
3659}
3660
3661
3662
3663
3664
3665
3666
3667
3668static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3669 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3670{
3671 int rc;
3672 unsigned char *buf;
3673 u8 ioaccel_status;
3674
3675 this_device->offload_config = 0;
3676 this_device->offload_enabled = 0;
3677 this_device->offload_to_be_enabled = 0;
3678
3679 buf = kzalloc(64, GFP_KERNEL);
3680 if (!buf)
3681 return;
3682 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3683 goto out;
3684 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3685 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3686 if (rc != 0)
3687 goto out;
3688
3689#define IOACCEL_STATUS_BYTE 4
3690#define OFFLOAD_CONFIGURED_BIT 0x01
3691#define OFFLOAD_ENABLED_BIT 0x02
3692 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3693 this_device->offload_config =
3694 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3695 if (this_device->offload_config) {
3696 bool offload_enabled =
3697 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3698
3699
3700
3701 if (offload_enabled) {
3702 rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3703 if (rc)
3704 goto out;
3705 this_device->offload_to_be_enabled = 1;
3706 }
3707 }
3708
3709out:
3710 kfree(buf);
3711 return;
3712}
3713
3714
3715static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3716 unsigned char *device_id, int index, int buflen)
3717{
3718 int rc;
3719 unsigned char *buf;
3720
3721
3722 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3723 return 1;
3724
3725 buf = kzalloc(64, GFP_KERNEL);
3726 if (!buf)
3727 return -ENOMEM;
3728
3729 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3730 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3731 if (rc == 0) {
3732 if (buflen > 16)
3733 buflen = 16;
3734 memcpy(device_id, &buf[8], buflen);
3735 }
3736
3737 kfree(buf);
3738
3739 return rc;
3740}
3741
3742static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3743 void *buf, int bufsize,
3744 int extended_response)
3745{
3746 int rc = IO_OK;
3747 struct CommandList *c;
3748 unsigned char scsi3addr[8];
3749 struct ErrorInfo *ei;
3750
3751 c = cmd_alloc(h);
3752
3753
3754 memset(scsi3addr, 0, sizeof(scsi3addr));
3755 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3756 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3757 rc = -EAGAIN;
3758 goto out;
3759 }
3760 if (extended_response)
3761 c->Request.CDB[1] = extended_response;
3762 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3763 NO_TIMEOUT);
3764 if (rc)
3765 goto out;
3766 ei = c->err_info;
3767 if (ei->CommandStatus != 0 &&
3768 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3769 hpsa_scsi_interpret_error(h, c);
3770 rc = -EIO;
3771 } else {
3772 struct ReportLUNdata *rld = buf;
3773
3774 if (rld->extended_response_flag != extended_response) {
3775 if (!h->legacy_board) {
3776 dev_err(&h->pdev->dev,
3777 "report luns requested format %u, got %u\n",
3778 extended_response,
3779 rld->extended_response_flag);
3780 rc = -EINVAL;
3781 } else
3782 rc = -EOPNOTSUPP;
3783 }
3784 }
3785out:
3786 cmd_free(h, c);
3787 return rc;
3788}
3789
3790static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3791 struct ReportExtendedLUNdata *buf, int bufsize)
3792{
3793 int rc;
3794 struct ReportLUNdata *lbuf;
3795
3796 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3797 HPSA_REPORT_PHYS_EXTENDED);
3798 if (!rc || rc != -EOPNOTSUPP)
3799 return rc;
3800
3801
3802 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3803 if (!lbuf)
3804 return -ENOMEM;
3805
3806 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3807 if (!rc) {
3808 int i;
3809 u32 nphys;
3810
3811
3812 memcpy(buf, lbuf, 8);
3813 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3814 for (i = 0; i < nphys; i++)
3815 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3816 }
3817 kfree(lbuf);
3818 return rc;
3819}
3820
3821static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3822 struct ReportLUNdata *buf, int bufsize)
3823{
3824 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3825}
3826
3827static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3828 int bus, int target, int lun)
3829{
3830 device->bus = bus;
3831 device->target = target;
3832 device->lun = lun;
3833}
3834
3835
3836static int hpsa_get_volume_status(struct ctlr_info *h,
3837 unsigned char scsi3addr[])
3838{
3839 int rc;
3840 int status;
3841 int size;
3842 unsigned char *buf;
3843
3844 buf = kzalloc(64, GFP_KERNEL);
3845 if (!buf)
3846 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3847
3848
3849 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3850 goto exit_failed;
3851
3852
3853 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3854 buf, HPSA_VPD_HEADER_SZ);
3855 if (rc != 0)
3856 goto exit_failed;
3857 size = buf[3];
3858
3859
3860 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3861 buf, size + HPSA_VPD_HEADER_SZ);
3862 if (rc != 0)
3863 goto exit_failed;
3864 status = buf[4];
3865
3866 kfree(buf);
3867 return status;
3868exit_failed:
3869 kfree(buf);
3870 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3871}
3872
3873
3874
3875
3876
3877
3878
3879
3880static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3881 unsigned char scsi3addr[])
3882{
3883 struct CommandList *c;
3884 unsigned char *sense;
3885 u8 sense_key, asc, ascq;
3886 int sense_len;
3887 int rc, ldstat = 0;
3888#define ASC_LUN_NOT_READY 0x04
3889#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3890#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3891
3892 c = cmd_alloc(h);
3893
3894 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3895 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3896 NO_TIMEOUT);
3897 if (rc) {
3898 cmd_free(h, c);
3899 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3900 }
3901 sense = c->err_info->SenseInfo;
3902 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3903 sense_len = sizeof(c->err_info->SenseInfo);
3904 else
3905 sense_len = c->err_info->SenseLen;
3906 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3907 cmd_free(h, c);
3908
3909
3910 ldstat = hpsa_get_volume_status(h, scsi3addr);
3911
3912
3913 switch (ldstat) {
3914 case HPSA_LV_FAILED:
3915 case HPSA_LV_UNDERGOING_ERASE:
3916 case HPSA_LV_NOT_AVAILABLE:
3917 case HPSA_LV_UNDERGOING_RPI:
3918 case HPSA_LV_PENDING_RPI:
3919 case HPSA_LV_ENCRYPTED_NO_KEY:
3920 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3921 case HPSA_LV_UNDERGOING_ENCRYPTION:
3922 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3923 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3924 return ldstat;
3925 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3926
3927
3928
3929 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3930 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3931 return ldstat;
3932 break;
3933 default:
3934 break;
3935 }
3936 return HPSA_LV_OK;
3937}
3938
3939static int hpsa_update_device_info(struct ctlr_info *h,
3940 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3941 unsigned char *is_OBDR_device)
3942{
3943
3944#define OBDR_SIG_OFFSET 43
3945#define OBDR_TAPE_SIG "$DR-10"
3946#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3947#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3948
3949 unsigned char *inq_buff;
3950 unsigned char *obdr_sig;
3951 int rc = 0;
3952
3953 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3954 if (!inq_buff) {
3955 rc = -ENOMEM;
3956 goto bail_out;
3957 }
3958
3959
3960 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3961 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3962 dev_err(&h->pdev->dev,
3963 "%s: inquiry failed, device will be skipped.\n",
3964 __func__);
3965 rc = HPSA_INQUIRY_FAILED;
3966 goto bail_out;
3967 }
3968
3969 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3970 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3971
3972 this_device->devtype = (inq_buff[0] & 0x1f);
3973 memcpy(this_device->scsi3addr, scsi3addr, 8);
3974 memcpy(this_device->vendor, &inq_buff[8],
3975 sizeof(this_device->vendor));
3976 memcpy(this_device->model, &inq_buff[16],
3977 sizeof(this_device->model));
3978 this_device->rev = inq_buff[2];
3979 memset(this_device->device_id, 0,
3980 sizeof(this_device->device_id));
3981 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3982 sizeof(this_device->device_id)) < 0) {
3983 dev_err(&h->pdev->dev,
3984 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3985 h->ctlr, __func__,
3986 h->scsi_host->host_no,
3987 this_device->bus, this_device->target,
3988 this_device->lun,
3989 scsi_device_type(this_device->devtype),
3990 this_device->model);
3991 rc = HPSA_LV_FAILED;
3992 goto bail_out;
3993 }
3994
3995 if ((this_device->devtype == TYPE_DISK ||
3996 this_device->devtype == TYPE_ZBC) &&
3997 is_logical_dev_addr_mode(scsi3addr)) {
3998 unsigned char volume_offline;
3999
4000 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
4001 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
4002 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
4003 volume_offline = hpsa_volume_offline(h, scsi3addr);
4004 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
4005 h->legacy_board) {
4006
4007
4008
4009 dev_info(&h->pdev->dev,
4010 "C0:T%d:L%d Volume status not available, assuming online.\n",
4011 this_device->target, this_device->lun);
4012 volume_offline = 0;
4013 }
4014 this_device->volume_offline = volume_offline;
4015 if (volume_offline == HPSA_LV_FAILED) {
4016 rc = HPSA_LV_FAILED;
4017 dev_err(&h->pdev->dev,
4018 "%s: LV failed, device will be skipped.\n",
4019 __func__);
4020 goto bail_out;
4021 }
4022 } else {
4023 this_device->raid_level = RAID_UNKNOWN;
4024 this_device->offload_config = 0;
4025 hpsa_turn_off_ioaccel_for_device(this_device);
4026 this_device->hba_ioaccel_enabled = 0;
4027 this_device->volume_offline = 0;
4028 this_device->queue_depth = h->nr_cmds;
4029 }
4030
4031 if (this_device->external)
4032 this_device->queue_depth = EXTERNAL_QD;
4033
4034 if (is_OBDR_device) {
4035
4036
4037
4038 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4039 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4040 strncmp(obdr_sig, OBDR_TAPE_SIG,
4041 OBDR_SIG_LEN) == 0);
4042 }
4043 kfree(inq_buff);
4044 return 0;
4045
4046bail_out:
4047 kfree(inq_buff);
4048 return rc;
4049}
4050
4051
4052
4053
4054
4055
4056
4057static void figure_bus_target_lun(struct ctlr_info *h,
4058 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4059{
4060 u32 lunid = get_unaligned_le32(lunaddrbytes);
4061
4062 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4063
4064 if (is_hba_lunid(lunaddrbytes)) {
4065 int bus = HPSA_HBA_BUS;
4066
4067 if (!device->rev)
4068 bus = HPSA_LEGACY_HBA_BUS;
4069 hpsa_set_bus_target_lun(device,
4070 bus, 0, lunid & 0x3fff);
4071 } else
4072
4073 hpsa_set_bus_target_lun(device,
4074 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4075 return;
4076 }
4077
4078 if (device->external) {
4079 hpsa_set_bus_target_lun(device,
4080 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4081 lunid & 0x00ff);
4082 return;
4083 }
4084 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4085 0, lunid & 0x3fff);
4086}
4087
4088static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4089 int i, int nphysicals, int nlocal_logicals)
4090{
4091
4092
4093
4094 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4095
4096 if (i == raid_ctlr_position)
4097 return 0;
4098
4099 if (i < logicals_start)
4100 return 0;
4101
4102
4103 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4104 return 0;
4105
4106 return 1;
4107}
4108
4109
4110
4111
4112
4113
4114
4115static int hpsa_gather_lun_info(struct ctlr_info *h,
4116 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4117 struct ReportLUNdata *logdev, u32 *nlogicals)
4118{
4119 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4120 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4121 return -1;
4122 }
4123 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4124 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4125 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4126 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4127 *nphysicals = HPSA_MAX_PHYS_LUN;
4128 }
4129 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4130 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4131 return -1;
4132 }
4133 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4134
4135 if (*nlogicals > HPSA_MAX_LUN) {
4136 dev_warn(&h->pdev->dev,
4137 "maximum logical LUNs (%d) exceeded. "
4138 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4139 *nlogicals - HPSA_MAX_LUN);
4140 *nlogicals = HPSA_MAX_LUN;
4141 }
4142 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4143 dev_warn(&h->pdev->dev,
4144 "maximum logical + physical LUNs (%d) exceeded. "
4145 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4146 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4147 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4148 }
4149 return 0;
4150}
4151
4152static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4153 int i, int nphysicals, int nlogicals,
4154 struct ReportExtendedLUNdata *physdev_list,
4155 struct ReportLUNdata *logdev_list)
4156{
4157
4158
4159
4160
4161
4162 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4163 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4164
4165 if (i == raid_ctlr_position)
4166 return RAID_CTLR_LUNID;
4167
4168 if (i < logicals_start)
4169 return &physdev_list->LUN[i -
4170 (raid_ctlr_position == 0)].lunid[0];
4171
4172 if (i < last_device)
4173 return &logdev_list->LUN[i - nphysicals -
4174 (raid_ctlr_position == 0)][0];
4175 BUG();
4176 return NULL;
4177}
4178
4179
4180static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4181 struct hpsa_scsi_dev_t *dev,
4182 struct ReportExtendedLUNdata *rlep, int rle_index,
4183 struct bmic_identify_physical_device *id_phys)
4184{
4185 int rc;
4186 struct ext_report_lun_entry *rle;
4187
4188 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4189 return;
4190
4191 rle = &rlep->LUN[rle_index];
4192
4193 dev->ioaccel_handle = rle->ioaccel_handle;
4194 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4195 dev->hba_ioaccel_enabled = 1;
4196 memset(id_phys, 0, sizeof(*id_phys));
4197 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4198 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4199 sizeof(*id_phys));
4200 if (!rc)
4201
4202#define DRIVE_CMDS_RESERVED_FOR_FW 2
4203#define DRIVE_QUEUE_DEPTH 7
4204 dev->queue_depth =
4205 le16_to_cpu(id_phys->current_queue_depth_limit) -
4206 DRIVE_CMDS_RESERVED_FOR_FW;
4207 else
4208 dev->queue_depth = DRIVE_QUEUE_DEPTH;
4209}
4210
4211static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4212 struct ReportExtendedLUNdata *rlep, int rle_index,
4213 struct bmic_identify_physical_device *id_phys)
4214{
4215 struct ext_report_lun_entry *rle;
4216
4217 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4218 return;
4219
4220 rle = &rlep->LUN[rle_index];
4221
4222 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4223 this_device->hba_ioaccel_enabled = 1;
4224
4225 memcpy(&this_device->active_path_index,
4226 &id_phys->active_path_number,
4227 sizeof(this_device->active_path_index));
4228 memcpy(&this_device->path_map,
4229 &id_phys->redundant_path_present_map,
4230 sizeof(this_device->path_map));
4231 memcpy(&this_device->box,
4232 &id_phys->alternate_paths_phys_box_on_port,
4233 sizeof(this_device->box));
4234 memcpy(&this_device->phys_connector,
4235 &id_phys->alternate_paths_phys_connector,
4236 sizeof(this_device->phys_connector));
4237 memcpy(&this_device->bay,
4238 &id_phys->phys_bay_in_box,
4239 sizeof(this_device->bay));
4240}
4241
4242
4243static int hpsa_set_local_logical_count(struct ctlr_info *h,
4244 struct bmic_identify_controller *id_ctlr,
4245 u32 *nlocals)
4246{
4247 int rc;
4248
4249 if (!id_ctlr) {
4250 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4251 __func__);
4252 return -ENOMEM;
4253 }
4254 memset(id_ctlr, 0, sizeof(*id_ctlr));
4255 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4256 if (!rc)
4257 if (id_ctlr->configured_logical_drive_count < 255)
4258 *nlocals = id_ctlr->configured_logical_drive_count;
4259 else
4260 *nlocals = le16_to_cpu(
4261 id_ctlr->extended_logical_unit_count);
4262 else
4263 *nlocals = -1;
4264 return rc;
4265}
4266
4267static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4268{
4269 struct bmic_identify_physical_device *id_phys;
4270 bool is_spare = false;
4271 int rc;
4272
4273 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4274 if (!id_phys)
4275 return false;
4276
4277 rc = hpsa_bmic_id_physical_device(h,
4278 lunaddrbytes,
4279 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4280 id_phys, sizeof(*id_phys));
4281 if (rc == 0)
4282 is_spare = (id_phys->more_flags >> 6) & 0x01;
4283
4284 kfree(id_phys);
4285 return is_spare;
4286}
4287
4288#define RPL_DEV_FLAG_NON_DISK 0x1
4289#define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4290#define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4291
4292#define BMIC_DEVICE_TYPE_ENCLOSURE 6
4293
4294static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4295 struct ext_report_lun_entry *rle)
4296{
4297 u8 device_flags;
4298 u8 device_type;
4299
4300 if (!MASKED_DEVICE(lunaddrbytes))
4301 return false;
4302
4303 device_flags = rle->device_flags;
4304 device_type = rle->device_type;
4305
4306 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4307 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4308 return false;
4309 return true;
4310 }
4311
4312 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4313 return false;
4314
4315 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4316 return false;
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326 if (hpsa_is_disk_spare(h, lunaddrbytes))
4327 return true;
4328
4329 return false;
4330}
4331
4332static void hpsa_update_scsi_devices(struct ctlr_info *h)
4333{
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344 struct ReportExtendedLUNdata *physdev_list = NULL;
4345 struct ReportLUNdata *logdev_list = NULL;
4346 struct bmic_identify_physical_device *id_phys = NULL;
4347 struct bmic_identify_controller *id_ctlr = NULL;
4348 u32 nphysicals = 0;
4349 u32 nlogicals = 0;
4350 u32 nlocal_logicals = 0;
4351 u32 ndev_allocated = 0;
4352 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4353 int ncurrent = 0;
4354 int i, ndevs_to_allocate;
4355 int raid_ctlr_position;
4356 bool physical_device;
4357
4358 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4359 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4360 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4361 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4362 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4363 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4364
4365 if (!currentsd || !physdev_list || !logdev_list ||
4366 !tmpdevice || !id_phys || !id_ctlr) {
4367 dev_err(&h->pdev->dev, "out of memory\n");
4368 goto out;
4369 }
4370
4371 h->drv_req_rescan = 0;
4372
4373 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4374 logdev_list, &nlogicals)) {
4375 h->drv_req_rescan = 1;
4376 goto out;
4377 }
4378
4379
4380 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4381 dev_warn(&h->pdev->dev,
4382 "%s: Can't determine number of local logical devices.\n",
4383 __func__);
4384 }
4385
4386
4387
4388
4389
4390 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4391
4392 hpsa_ext_ctrl_present(h, physdev_list);
4393
4394
4395 for (i = 0; i < ndevs_to_allocate; i++) {
4396 if (i >= HPSA_MAX_DEVICES) {
4397 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4398 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4399 ndevs_to_allocate - HPSA_MAX_DEVICES);
4400 break;
4401 }
4402
4403 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4404 if (!currentsd[i]) {
4405 h->drv_req_rescan = 1;
4406 goto out;
4407 }
4408 ndev_allocated++;
4409 }
4410
4411 if (is_scsi_rev_5(h))
4412 raid_ctlr_position = 0;
4413 else
4414 raid_ctlr_position = nphysicals + nlogicals;
4415
4416
4417 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4418 u8 *lunaddrbytes, is_OBDR = 0;
4419 int rc = 0;
4420 int phys_dev_index = i - (raid_ctlr_position == 0);
4421 bool skip_device = false;
4422
4423 memset(tmpdevice, 0, sizeof(*tmpdevice));
4424
4425 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4426
4427
4428 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4429 i, nphysicals, nlogicals, physdev_list, logdev_list);
4430
4431
4432 tmpdevice->external =
4433 figure_external_status(h, raid_ctlr_position, i,
4434 nphysicals, nlocal_logicals);
4435
4436
4437
4438
4439 if (phys_dev_index >= 0 && !tmpdevice->external &&
4440 physical_device) {
4441 skip_device = hpsa_skip_device(h, lunaddrbytes,
4442 &physdev_list->LUN[phys_dev_index]);
4443 if (skip_device)
4444 continue;
4445 }
4446
4447
4448 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4449 &is_OBDR);
4450 if (rc == -ENOMEM) {
4451 dev_warn(&h->pdev->dev,
4452 "Out of memory, rescan deferred.\n");
4453 h->drv_req_rescan = 1;
4454 goto out;
4455 }
4456 if (rc) {
4457 h->drv_req_rescan = 1;
4458 continue;
4459 }
4460
4461 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4462 this_device = currentsd[ncurrent];
4463
4464 *this_device = *tmpdevice;
4465 this_device->physical_device = physical_device;
4466
4467
4468
4469
4470
4471 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4472 this_device->expose_device = 0;
4473 else
4474 this_device->expose_device = 1;
4475
4476
4477
4478
4479
4480 if (this_device->physical_device && this_device->expose_device)
4481 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4482
4483 switch (this_device->devtype) {
4484 case TYPE_ROM:
4485
4486
4487
4488
4489
4490
4491
4492 if (is_OBDR)
4493 ncurrent++;
4494 break;
4495 case TYPE_DISK:
4496 case TYPE_ZBC:
4497 if (this_device->physical_device) {
4498
4499
4500 this_device->offload_enabled = 0;
4501 hpsa_get_ioaccel_drive_info(h, this_device,
4502 physdev_list, phys_dev_index, id_phys);
4503 hpsa_get_path_info(this_device,
4504 physdev_list, phys_dev_index, id_phys);
4505 }
4506 ncurrent++;
4507 break;
4508 case TYPE_TAPE:
4509 case TYPE_MEDIUM_CHANGER:
4510 ncurrent++;
4511 break;
4512 case TYPE_ENCLOSURE:
4513 if (!this_device->external)
4514 hpsa_get_enclosure_info(h, lunaddrbytes,
4515 physdev_list, phys_dev_index,
4516 this_device);
4517 ncurrent++;
4518 break;
4519 case TYPE_RAID:
4520
4521
4522
4523
4524
4525 if (!is_hba_lunid(lunaddrbytes))
4526 break;
4527 ncurrent++;
4528 break;
4529 default:
4530 break;
4531 }
4532 if (ncurrent >= HPSA_MAX_DEVICES)
4533 break;
4534 }
4535
4536 if (h->sas_host == NULL) {
4537 int rc = 0;
4538
4539 rc = hpsa_add_sas_host(h);
4540 if (rc) {
4541 dev_warn(&h->pdev->dev,
4542 "Could not add sas host %d\n", rc);
4543 goto out;
4544 }
4545 }
4546
4547 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4548out:
4549 kfree(tmpdevice);
4550 for (i = 0; i < ndev_allocated; i++)
4551 kfree(currentsd[i]);
4552 kfree(currentsd);
4553 kfree(physdev_list);
4554 kfree(logdev_list);
4555 kfree(id_ctlr);
4556 kfree(id_phys);
4557}
4558
4559static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4560 struct scatterlist *sg)
4561{
4562 u64 addr64 = (u64) sg_dma_address(sg);
4563 unsigned int len = sg_dma_len(sg);
4564
4565 desc->Addr = cpu_to_le64(addr64);
4566 desc->Len = cpu_to_le32(len);
4567 desc->Ext = 0;
4568}
4569
4570
4571
4572
4573
4574
4575static int hpsa_scatter_gather(struct ctlr_info *h,
4576 struct CommandList *cp,
4577 struct scsi_cmnd *cmd)
4578{
4579 struct scatterlist *sg;
4580 int use_sg, i, sg_limit, chained;
4581 struct SGDescriptor *curr_sg;
4582
4583 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4584
4585 use_sg = scsi_dma_map(cmd);
4586 if (use_sg < 0)
4587 return use_sg;
4588
4589 if (!use_sg)
4590 goto sglist_finished;
4591
4592
4593
4594
4595
4596
4597
4598
4599 curr_sg = cp->SG;
4600 chained = use_sg > h->max_cmd_sg_entries;
4601 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4602 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4603 hpsa_set_sg_descriptor(curr_sg, sg);
4604 curr_sg++;
4605 }
4606
4607 if (chained) {
4608
4609
4610
4611
4612
4613
4614 curr_sg = h->cmd_sg_list[cp->cmdindex];
4615 sg_limit = use_sg - sg_limit;
4616 for_each_sg(sg, sg, sg_limit, i) {
4617 hpsa_set_sg_descriptor(curr_sg, sg);
4618 curr_sg++;
4619 }
4620 }
4621
4622
4623 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4624
4625 if (use_sg + chained > h->maxSG)
4626 h->maxSG = use_sg + chained;
4627
4628 if (chained) {
4629 cp->Header.SGList = h->max_cmd_sg_entries;
4630 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4631 if (hpsa_map_sg_chain_block(h, cp)) {
4632 scsi_dma_unmap(cmd);
4633 return -1;
4634 }
4635 return 0;
4636 }
4637
4638sglist_finished:
4639
4640 cp->Header.SGList = (u8) use_sg;
4641 cp->Header.SGTotal = cpu_to_le16(use_sg);
4642 return 0;
4643}
4644
4645static inline void warn_zero_length_transfer(struct ctlr_info *h,
4646 u8 *cdb, int cdb_len,
4647 const char *func)
4648{
4649 dev_warn(&h->pdev->dev,
4650 "%s: Blocking zero-length request: CDB:%*phN\n",
4651 func, cdb_len, cdb);
4652}
4653
4654#define IO_ACCEL_INELIGIBLE 1
4655
4656static bool is_zero_length_transfer(u8 *cdb)
4657{
4658 u32 block_cnt;
4659
4660
4661 switch (cdb[0]) {
4662 case READ_10:
4663 case WRITE_10:
4664 case VERIFY:
4665 case WRITE_VERIFY:
4666 block_cnt = get_unaligned_be16(&cdb[7]);
4667 break;
4668 case READ_12:
4669 case WRITE_12:
4670 case VERIFY_12:
4671 case WRITE_VERIFY_12:
4672 block_cnt = get_unaligned_be32(&cdb[6]);
4673 break;
4674 case READ_16:
4675 case WRITE_16:
4676 case VERIFY_16:
4677 block_cnt = get_unaligned_be32(&cdb[10]);
4678 break;
4679 default:
4680 return false;
4681 }
4682
4683 return block_cnt == 0;
4684}
4685
4686static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4687{
4688 int is_write = 0;
4689 u32 block;
4690 u32 block_cnt;
4691
4692
4693 switch (cdb[0]) {
4694 case WRITE_6:
4695 case WRITE_12:
4696 is_write = 1;
4697 fallthrough;
4698 case READ_6:
4699 case READ_12:
4700 if (*cdb_len == 6) {
4701 block = (((cdb[1] & 0x1F) << 16) |
4702 (cdb[2] << 8) |
4703 cdb[3]);
4704 block_cnt = cdb[4];
4705 if (block_cnt == 0)
4706 block_cnt = 256;
4707 } else {
4708 BUG_ON(*cdb_len != 12);
4709 block = get_unaligned_be32(&cdb[2]);
4710 block_cnt = get_unaligned_be32(&cdb[6]);
4711 }
4712 if (block_cnt > 0xffff)
4713 return IO_ACCEL_INELIGIBLE;
4714
4715 cdb[0] = is_write ? WRITE_10 : READ_10;
4716 cdb[1] = 0;
4717 cdb[2] = (u8) (block >> 24);
4718 cdb[3] = (u8) (block >> 16);
4719 cdb[4] = (u8) (block >> 8);
4720 cdb[5] = (u8) (block);
4721 cdb[6] = 0;
4722 cdb[7] = (u8) (block_cnt >> 8);
4723 cdb[8] = (u8) (block_cnt);
4724 cdb[9] = 0;
4725 *cdb_len = 10;
4726 break;
4727 }
4728 return 0;
4729}
4730
4731static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4732 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4733 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4734{
4735 struct scsi_cmnd *cmd = c->scsi_cmd;
4736 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4737 unsigned int len;
4738 unsigned int total_len = 0;
4739 struct scatterlist *sg;
4740 u64 addr64;
4741 int use_sg, i;
4742 struct SGDescriptor *curr_sg;
4743 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4744
4745
4746 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4747 atomic_dec(&phys_disk->ioaccel_cmds_out);
4748 return IO_ACCEL_INELIGIBLE;
4749 }
4750
4751 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4752
4753 if (is_zero_length_transfer(cdb)) {
4754 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4755 atomic_dec(&phys_disk->ioaccel_cmds_out);
4756 return IO_ACCEL_INELIGIBLE;
4757 }
4758
4759 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4760 atomic_dec(&phys_disk->ioaccel_cmds_out);
4761 return IO_ACCEL_INELIGIBLE;
4762 }
4763
4764 c->cmd_type = CMD_IOACCEL1;
4765
4766
4767 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4768 (c->cmdindex * sizeof(*cp));
4769 BUG_ON(c->busaddr & 0x0000007F);
4770
4771 use_sg = scsi_dma_map(cmd);
4772 if (use_sg < 0) {
4773 atomic_dec(&phys_disk->ioaccel_cmds_out);
4774 return use_sg;
4775 }
4776
4777 if (use_sg) {
4778 curr_sg = cp->SG;
4779 scsi_for_each_sg(cmd, sg, use_sg, i) {
4780 addr64 = (u64) sg_dma_address(sg);
4781 len = sg_dma_len(sg);
4782 total_len += len;
4783 curr_sg->Addr = cpu_to_le64(addr64);
4784 curr_sg->Len = cpu_to_le32(len);
4785 curr_sg->Ext = cpu_to_le32(0);
4786 curr_sg++;
4787 }
4788 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4789
4790 switch (cmd->sc_data_direction) {
4791 case DMA_TO_DEVICE:
4792 control |= IOACCEL1_CONTROL_DATA_OUT;
4793 break;
4794 case DMA_FROM_DEVICE:
4795 control |= IOACCEL1_CONTROL_DATA_IN;
4796 break;
4797 case DMA_NONE:
4798 control |= IOACCEL1_CONTROL_NODATAXFER;
4799 break;
4800 default:
4801 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4802 cmd->sc_data_direction);
4803 BUG();
4804 break;
4805 }
4806 } else {
4807 control |= IOACCEL1_CONTROL_NODATAXFER;
4808 }
4809
4810 c->Header.SGList = use_sg;
4811
4812 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4813 cp->transfer_len = cpu_to_le32(total_len);
4814 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4815 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4816 cp->control = cpu_to_le32(control);
4817 memcpy(cp->CDB, cdb, cdb_len);
4818 memcpy(cp->CISS_LUN, scsi3addr, 8);
4819
4820 enqueue_cmd_and_start_io(h, c);
4821 return 0;
4822}
4823
4824
4825
4826
4827
4828static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4829 struct CommandList *c)
4830{
4831 struct scsi_cmnd *cmd = c->scsi_cmd;
4832 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4833
4834 if (!dev)
4835 return -1;
4836
4837 c->phys_disk = dev;
4838
4839 if (dev->in_reset)
4840 return -1;
4841
4842 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4843 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4844}
4845
4846
4847
4848
4849static void set_encrypt_ioaccel2(struct ctlr_info *h,
4850 struct CommandList *c, struct io_accel2_cmd *cp)
4851{
4852 struct scsi_cmnd *cmd = c->scsi_cmd;
4853 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4854 struct raid_map_data *map = &dev->raid_map;
4855 u64 first_block;
4856
4857
4858 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4859 return;
4860
4861 cp->dekindex = map->dekindex;
4862
4863
4864 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4865
4866
4867
4868
4869
4870 switch (cmd->cmnd[0]) {
4871
4872 case READ_6:
4873 case WRITE_6:
4874 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4875 (cmd->cmnd[2] << 8) |
4876 cmd->cmnd[3]);
4877 break;
4878 case WRITE_10:
4879 case READ_10:
4880
4881 case WRITE_12:
4882 case READ_12:
4883 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4884 break;
4885 case WRITE_16:
4886 case READ_16:
4887 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4888 break;
4889 default:
4890 dev_err(&h->pdev->dev,
4891 "ERROR: %s: size (0x%x) not supported for encryption\n",
4892 __func__, cmd->cmnd[0]);
4893 BUG();
4894 break;
4895 }
4896
4897 if (le32_to_cpu(map->volume_blk_size) != 512)
4898 first_block = first_block *
4899 le32_to_cpu(map->volume_blk_size)/512;
4900
4901 cp->tweak_lower = cpu_to_le32(first_block);
4902 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4903}
4904
4905static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4906 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4907 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4908{
4909 struct scsi_cmnd *cmd = c->scsi_cmd;
4910 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4911 struct ioaccel2_sg_element *curr_sg;
4912 int use_sg, i;
4913 struct scatterlist *sg;
4914 u64 addr64;
4915 u32 len;
4916 u32 total_len = 0;
4917
4918 if (!cmd->device)
4919 return -1;
4920
4921 if (!cmd->device->hostdata)
4922 return -1;
4923
4924 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4925
4926 if (is_zero_length_transfer(cdb)) {
4927 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4928 atomic_dec(&phys_disk->ioaccel_cmds_out);
4929 return IO_ACCEL_INELIGIBLE;
4930 }
4931
4932 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4933 atomic_dec(&phys_disk->ioaccel_cmds_out);
4934 return IO_ACCEL_INELIGIBLE;
4935 }
4936
4937 c->cmd_type = CMD_IOACCEL2;
4938
4939 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4940 (c->cmdindex * sizeof(*cp));
4941 BUG_ON(c->busaddr & 0x0000007F);
4942
4943 memset(cp, 0, sizeof(*cp));
4944 cp->IU_type = IOACCEL2_IU_TYPE;
4945
4946 use_sg = scsi_dma_map(cmd);
4947 if (use_sg < 0) {
4948 atomic_dec(&phys_disk->ioaccel_cmds_out);
4949 return use_sg;
4950 }
4951
4952 if (use_sg) {
4953 curr_sg = cp->sg;
4954 if (use_sg > h->ioaccel_maxsg) {
4955 addr64 = le64_to_cpu(
4956 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4957 curr_sg->address = cpu_to_le64(addr64);
4958 curr_sg->length = 0;
4959 curr_sg->reserved[0] = 0;
4960 curr_sg->reserved[1] = 0;
4961 curr_sg->reserved[2] = 0;
4962 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4963
4964 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4965 }
4966 scsi_for_each_sg(cmd, sg, use_sg, i) {
4967 addr64 = (u64) sg_dma_address(sg);
4968 len = sg_dma_len(sg);
4969 total_len += len;
4970 curr_sg->address = cpu_to_le64(addr64);
4971 curr_sg->length = cpu_to_le32(len);
4972 curr_sg->reserved[0] = 0;
4973 curr_sg->reserved[1] = 0;
4974 curr_sg->reserved[2] = 0;
4975 curr_sg->chain_indicator = 0;
4976 curr_sg++;
4977 }
4978
4979
4980
4981
4982 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4983
4984 switch (cmd->sc_data_direction) {
4985 case DMA_TO_DEVICE:
4986 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4987 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4988 break;
4989 case DMA_FROM_DEVICE:
4990 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4991 cp->direction |= IOACCEL2_DIR_DATA_IN;
4992 break;
4993 case DMA_NONE:
4994 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4995 cp->direction |= IOACCEL2_DIR_NO_DATA;
4996 break;
4997 default:
4998 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4999 cmd->sc_data_direction);
5000 BUG();
5001 break;
5002 }
5003 } else {
5004 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
5005 cp->direction |= IOACCEL2_DIR_NO_DATA;
5006 }
5007
5008
5009 set_encrypt_ioaccel2(h, c, cp);
5010
5011 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5012 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5013 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5014
5015 cp->data_len = cpu_to_le32(total_len);
5016 cp->err_ptr = cpu_to_le64(c->busaddr +
5017 offsetof(struct io_accel2_cmd, error_data));
5018 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5019
5020
5021 if (use_sg > h->ioaccel_maxsg) {
5022 cp->sg_count = 1;
5023 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5024 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5025 atomic_dec(&phys_disk->ioaccel_cmds_out);
5026 scsi_dma_unmap(cmd);
5027 return -1;
5028 }
5029 } else
5030 cp->sg_count = (u8) use_sg;
5031
5032 if (phys_disk->in_reset) {
5033 cmd->result = DID_RESET << 16;
5034 return -1;
5035 }
5036
5037 enqueue_cmd_and_start_io(h, c);
5038 return 0;
5039}
5040
5041
5042
5043
5044static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5045 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5046 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5047{
5048 if (!c->scsi_cmd->device)
5049 return -1;
5050
5051 if (!c->scsi_cmd->device->hostdata)
5052 return -1;
5053
5054 if (phys_disk->in_reset)
5055 return -1;
5056
5057
5058 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5059 phys_disk->queue_depth) {
5060 atomic_dec(&phys_disk->ioaccel_cmds_out);
5061 return IO_ACCEL_INELIGIBLE;
5062 }
5063 if (h->transMethod & CFGTBL_Trans_io_accel1)
5064 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5065 cdb, cdb_len, scsi3addr,
5066 phys_disk);
5067 else
5068 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5069 cdb, cdb_len, scsi3addr,
5070 phys_disk);
5071}
5072
5073static void raid_map_helper(struct raid_map_data *map,
5074 int offload_to_mirror, u32 *map_index, u32 *current_group)
5075{
5076 if (offload_to_mirror == 0) {
5077
5078 *map_index %= le16_to_cpu(map->data_disks_per_row);
5079 return;
5080 }
5081 do {
5082
5083 *current_group = *map_index /
5084 le16_to_cpu(map->data_disks_per_row);
5085 if (offload_to_mirror == *current_group)
5086 continue;
5087 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5088
5089 *map_index += le16_to_cpu(map->data_disks_per_row);
5090 (*current_group)++;
5091 } else {
5092
5093 *map_index %= le16_to_cpu(map->data_disks_per_row);
5094 *current_group = 0;
5095 }
5096 } while (offload_to_mirror != *current_group);
5097}
5098
5099
5100
5101
5102static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5103 struct CommandList *c)
5104{
5105 struct scsi_cmnd *cmd = c->scsi_cmd;
5106 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5107 struct raid_map_data *map = &dev->raid_map;
5108 struct raid_map_disk_data *dd = &map->data[0];
5109 int is_write = 0;
5110 u32 map_index;
5111 u64 first_block, last_block;
5112 u32 block_cnt;
5113 u32 blocks_per_row;
5114 u64 first_row, last_row;
5115 u32 first_row_offset, last_row_offset;
5116 u32 first_column, last_column;
5117 u64 r0_first_row, r0_last_row;
5118 u32 r5or6_blocks_per_row;
5119 u64 r5or6_first_row, r5or6_last_row;
5120 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5121 u32 r5or6_first_column, r5or6_last_column;
5122 u32 total_disks_per_row;
5123 u32 stripesize;
5124 u32 first_group, last_group, current_group;
5125 u32 map_row;
5126 u32 disk_handle;
5127 u64 disk_block;
5128 u32 disk_block_cnt;
5129 u8 cdb[16];
5130 u8 cdb_len;
5131 u16 strip_size;
5132#if BITS_PER_LONG == 32
5133 u64 tmpdiv;
5134#endif
5135 int offload_to_mirror;
5136
5137 if (!dev)
5138 return -1;
5139
5140 if (dev->in_reset)
5141 return -1;
5142
5143
5144 switch (cmd->cmnd[0]) {
5145 case WRITE_6:
5146 is_write = 1;
5147 fallthrough;
5148 case READ_6:
5149 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5150 (cmd->cmnd[2] << 8) |
5151 cmd->cmnd[3]);
5152 block_cnt = cmd->cmnd[4];
5153 if (block_cnt == 0)
5154 block_cnt = 256;
5155 break;
5156 case WRITE_10:
5157 is_write = 1;
5158 fallthrough;
5159 case READ_10:
5160 first_block =
5161 (((u64) cmd->cmnd[2]) << 24) |
5162 (((u64) cmd->cmnd[3]) << 16) |
5163 (((u64) cmd->cmnd[4]) << 8) |
5164 cmd->cmnd[5];
5165 block_cnt =
5166 (((u32) cmd->cmnd[7]) << 8) |
5167 cmd->cmnd[8];
5168 break;
5169 case WRITE_12:
5170 is_write = 1;
5171 fallthrough;
5172 case READ_12:
5173 first_block =
5174 (((u64) cmd->cmnd[2]) << 24) |
5175 (((u64) cmd->cmnd[3]) << 16) |
5176 (((u64) cmd->cmnd[4]) << 8) |
5177 cmd->cmnd[5];
5178 block_cnt =
5179 (((u32) cmd->cmnd[6]) << 24) |
5180 (((u32) cmd->cmnd[7]) << 16) |
5181 (((u32) cmd->cmnd[8]) << 8) |
5182 cmd->cmnd[9];
5183 break;
5184 case WRITE_16:
5185 is_write = 1;
5186 fallthrough;
5187 case READ_16:
5188 first_block =
5189 (((u64) cmd->cmnd[2]) << 56) |
5190 (((u64) cmd->cmnd[3]) << 48) |
5191 (((u64) cmd->cmnd[4]) << 40) |
5192 (((u64) cmd->cmnd[5]) << 32) |
5193 (((u64) cmd->cmnd[6]) << 24) |
5194 (((u64) cmd->cmnd[7]) << 16) |
5195 (((u64) cmd->cmnd[8]) << 8) |
5196 cmd->cmnd[9];
5197 block_cnt =
5198 (((u32) cmd->cmnd[10]) << 24) |
5199 (((u32) cmd->cmnd[11]) << 16) |
5200 (((u32) cmd->cmnd[12]) << 8) |
5201 cmd->cmnd[13];
5202 break;
5203 default:
5204 return IO_ACCEL_INELIGIBLE;
5205 }
5206 last_block = first_block + block_cnt - 1;
5207
5208
5209 if (is_write && dev->raid_level != 0)
5210 return IO_ACCEL_INELIGIBLE;
5211
5212
5213 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5214 last_block < first_block)
5215 return IO_ACCEL_INELIGIBLE;
5216
5217
5218 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5219 le16_to_cpu(map->strip_size);
5220 strip_size = le16_to_cpu(map->strip_size);
5221#if BITS_PER_LONG == 32
5222 tmpdiv = first_block;
5223 (void) do_div(tmpdiv, blocks_per_row);
5224 first_row = tmpdiv;
5225 tmpdiv = last_block;
5226 (void) do_div(tmpdiv, blocks_per_row);
5227 last_row = tmpdiv;
5228 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5229 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5230 tmpdiv = first_row_offset;
5231 (void) do_div(tmpdiv, strip_size);
5232 first_column = tmpdiv;
5233 tmpdiv = last_row_offset;
5234 (void) do_div(tmpdiv, strip_size);
5235 last_column = tmpdiv;
5236#else
5237 first_row = first_block / blocks_per_row;
5238 last_row = last_block / blocks_per_row;
5239 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5240 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5241 first_column = first_row_offset / strip_size;
5242 last_column = last_row_offset / strip_size;
5243#endif
5244
5245
5246 if ((first_row != last_row) || (first_column != last_column))
5247 return IO_ACCEL_INELIGIBLE;
5248
5249
5250 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5251 le16_to_cpu(map->metadata_disks_per_row);
5252 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5253 le16_to_cpu(map->row_cnt);
5254 map_index = (map_row * total_disks_per_row) + first_column;
5255
5256 switch (dev->raid_level) {
5257 case HPSA_RAID_0:
5258 break;
5259 case HPSA_RAID_1:
5260
5261
5262
5263
5264
5265 if (le16_to_cpu(map->layout_map_count) != 2) {
5266 hpsa_turn_off_ioaccel_for_device(dev);
5267 return IO_ACCEL_INELIGIBLE;
5268 }
5269 if (dev->offload_to_mirror)
5270 map_index += le16_to_cpu(map->data_disks_per_row);
5271 dev->offload_to_mirror = !dev->offload_to_mirror;
5272 break;
5273 case HPSA_RAID_ADM:
5274
5275
5276
5277
5278 if (le16_to_cpu(map->layout_map_count) != 3) {
5279 hpsa_turn_off_ioaccel_for_device(dev);
5280 return IO_ACCEL_INELIGIBLE;
5281 }
5282
5283 offload_to_mirror = dev->offload_to_mirror;
5284 raid_map_helper(map, offload_to_mirror,
5285 &map_index, ¤t_group);
5286
5287 offload_to_mirror =
5288 (offload_to_mirror >=
5289 le16_to_cpu(map->layout_map_count) - 1)
5290 ? 0 : offload_to_mirror + 1;
5291 dev->offload_to_mirror = offload_to_mirror;
5292
5293
5294
5295
5296 break;
5297 case HPSA_RAID_5:
5298 case HPSA_RAID_6:
5299 if (le16_to_cpu(map->layout_map_count) <= 1)
5300 break;
5301
5302
5303 r5or6_blocks_per_row =
5304 le16_to_cpu(map->strip_size) *
5305 le16_to_cpu(map->data_disks_per_row);
5306 if (r5or6_blocks_per_row == 0) {
5307 hpsa_turn_off_ioaccel_for_device(dev);
5308 return IO_ACCEL_INELIGIBLE;
5309 }
5310 stripesize = r5or6_blocks_per_row *
5311 le16_to_cpu(map->layout_map_count);
5312#if BITS_PER_LONG == 32
5313 tmpdiv = first_block;
5314 first_group = do_div(tmpdiv, stripesize);
5315 tmpdiv = first_group;
5316 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5317 first_group = tmpdiv;
5318 tmpdiv = last_block;
5319 last_group = do_div(tmpdiv, stripesize);
5320 tmpdiv = last_group;
5321 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5322 last_group = tmpdiv;
5323#else
5324 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5325 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5326#endif
5327 if (first_group != last_group)
5328 return IO_ACCEL_INELIGIBLE;
5329
5330
5331#if BITS_PER_LONG == 32
5332 tmpdiv = first_block;
5333 (void) do_div(tmpdiv, stripesize);
5334 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5335 tmpdiv = last_block;
5336 (void) do_div(tmpdiv, stripesize);
5337 r5or6_last_row = r0_last_row = tmpdiv;
5338#else
5339 first_row = r5or6_first_row = r0_first_row =
5340 first_block / stripesize;
5341 r5or6_last_row = r0_last_row = last_block / stripesize;
5342#endif
5343 if (r5or6_first_row != r5or6_last_row)
5344 return IO_ACCEL_INELIGIBLE;
5345
5346
5347
5348#if BITS_PER_LONG == 32
5349 tmpdiv = first_block;
5350 first_row_offset = do_div(tmpdiv, stripesize);
5351 tmpdiv = first_row_offset;
5352 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5353 r5or6_first_row_offset = first_row_offset;
5354 tmpdiv = last_block;
5355 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5356 tmpdiv = r5or6_last_row_offset;
5357 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5358 tmpdiv = r5or6_first_row_offset;
5359 (void) do_div(tmpdiv, map->strip_size);
5360 first_column = r5or6_first_column = tmpdiv;
5361 tmpdiv = r5or6_last_row_offset;
5362 (void) do_div(tmpdiv, map->strip_size);
5363 r5or6_last_column = tmpdiv;
5364#else
5365 first_row_offset = r5or6_first_row_offset =
5366 (u32)((first_block % stripesize) %
5367 r5or6_blocks_per_row);
5368
5369 r5or6_last_row_offset =
5370 (u32)((last_block % stripesize) %
5371 r5or6_blocks_per_row);
5372
5373 first_column = r5or6_first_column =
5374 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5375 r5or6_last_column =
5376 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5377#endif
5378 if (r5or6_first_column != r5or6_last_column)
5379 return IO_ACCEL_INELIGIBLE;
5380
5381
5382 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5383 le16_to_cpu(map->row_cnt);
5384
5385 map_index = (first_group *
5386 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5387 (map_row * total_disks_per_row) + first_column;
5388 break;
5389 default:
5390 return IO_ACCEL_INELIGIBLE;
5391 }
5392
5393 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5394 return IO_ACCEL_INELIGIBLE;
5395
5396 c->phys_disk = dev->phys_disk[map_index];
5397 if (!c->phys_disk)
5398 return IO_ACCEL_INELIGIBLE;
5399
5400 disk_handle = dd[map_index].ioaccel_handle;
5401 disk_block = le64_to_cpu(map->disk_starting_blk) +
5402 first_row * le16_to_cpu(map->strip_size) +
5403 (first_row_offset - first_column *
5404 le16_to_cpu(map->strip_size));
5405 disk_block_cnt = block_cnt;
5406
5407
5408 if (map->phys_blk_shift) {
5409 disk_block <<= map->phys_blk_shift;
5410 disk_block_cnt <<= map->phys_blk_shift;
5411 }
5412 BUG_ON(disk_block_cnt > 0xffff);
5413
5414
5415 if (disk_block > 0xffffffff) {
5416 cdb[0] = is_write ? WRITE_16 : READ_16;
5417 cdb[1] = 0;
5418 cdb[2] = (u8) (disk_block >> 56);
5419 cdb[3] = (u8) (disk_block >> 48);
5420 cdb[4] = (u8) (disk_block >> 40);
5421 cdb[5] = (u8) (disk_block >> 32);
5422 cdb[6] = (u8) (disk_block >> 24);
5423 cdb[7] = (u8) (disk_block >> 16);
5424 cdb[8] = (u8) (disk_block >> 8);
5425 cdb[9] = (u8) (disk_block);
5426 cdb[10] = (u8) (disk_block_cnt >> 24);
5427 cdb[11] = (u8) (disk_block_cnt >> 16);
5428 cdb[12] = (u8) (disk_block_cnt >> 8);
5429 cdb[13] = (u8) (disk_block_cnt);
5430 cdb[14] = 0;
5431 cdb[15] = 0;
5432 cdb_len = 16;
5433 } else {
5434 cdb[0] = is_write ? WRITE_10 : READ_10;
5435 cdb[1] = 0;
5436 cdb[2] = (u8) (disk_block >> 24);
5437 cdb[3] = (u8) (disk_block >> 16);
5438 cdb[4] = (u8) (disk_block >> 8);
5439 cdb[5] = (u8) (disk_block);
5440 cdb[6] = 0;
5441 cdb[7] = (u8) (disk_block_cnt >> 8);
5442 cdb[8] = (u8) (disk_block_cnt);
5443 cdb[9] = 0;
5444 cdb_len = 10;
5445 }
5446 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5447 dev->scsi3addr,
5448 dev->phys_disk[map_index]);
5449}
5450
5451
5452
5453
5454
5455
5456static int hpsa_ciss_submit(struct ctlr_info *h,
5457 struct CommandList *c, struct scsi_cmnd *cmd,
5458 struct hpsa_scsi_dev_t *dev)
5459{
5460 cmd->host_scribble = (unsigned char *) c;
5461 c->cmd_type = CMD_SCSI;
5462 c->scsi_cmd = cmd;
5463 c->Header.ReplyQueue = 0;
5464 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5465 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5466
5467
5468
5469 c->Request.Timeout = 0;
5470 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5471 c->Request.CDBLen = cmd->cmd_len;
5472 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5473 switch (cmd->sc_data_direction) {
5474 case DMA_TO_DEVICE:
5475 c->Request.type_attr_dir =
5476 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5477 break;
5478 case DMA_FROM_DEVICE:
5479 c->Request.type_attr_dir =
5480 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5481 break;
5482 case DMA_NONE:
5483 c->Request.type_attr_dir =
5484 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5485 break;
5486 case DMA_BIDIRECTIONAL:
5487
5488
5489
5490
5491
5492 c->Request.type_attr_dir =
5493 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5494
5495
5496
5497
5498
5499
5500
5501
5502 break;
5503
5504 default:
5505 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5506 cmd->sc_data_direction);
5507 BUG();
5508 break;
5509 }
5510
5511 if (hpsa_scatter_gather(h, c, cmd) < 0) {
5512 hpsa_cmd_resolve_and_free(h, c);
5513 return SCSI_MLQUEUE_HOST_BUSY;
5514 }
5515
5516 if (dev->in_reset) {
5517 hpsa_cmd_resolve_and_free(h, c);
5518 return SCSI_MLQUEUE_HOST_BUSY;
5519 }
5520
5521 c->device = dev;
5522
5523 enqueue_cmd_and_start_io(h, c);
5524
5525 return 0;
5526}
5527
5528static void hpsa_cmd_init(struct ctlr_info *h, int index,
5529 struct CommandList *c)
5530{
5531 dma_addr_t cmd_dma_handle, err_dma_handle;
5532
5533
5534 memset(c, 0, offsetof(struct CommandList, refcount));
5535 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5536 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5537 c->err_info = h->errinfo_pool + index;
5538 memset(c->err_info, 0, sizeof(*c->err_info));
5539 err_dma_handle = h->errinfo_pool_dhandle
5540 + index * sizeof(*c->err_info);
5541 c->cmdindex = index;
5542 c->busaddr = (u32) cmd_dma_handle;
5543 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5544 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5545 c->h = h;
5546 c->scsi_cmd = SCSI_CMD_IDLE;
5547}
5548
5549static void hpsa_preinitialize_commands(struct ctlr_info *h)
5550{
5551 int i;
5552
5553 for (i = 0; i < h->nr_cmds; i++) {
5554 struct CommandList *c = h->cmd_pool + i;
5555
5556 hpsa_cmd_init(h, i, c);
5557 atomic_set(&c->refcount, 0);
5558 }
5559}
5560
5561static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5562 struct CommandList *c)
5563{
5564 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5565
5566 BUG_ON(c->cmdindex != index);
5567
5568 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5569 memset(c->err_info, 0, sizeof(*c->err_info));
5570 c->busaddr = (u32) cmd_dma_handle;
5571}
5572
5573static int hpsa_ioaccel_submit(struct ctlr_info *h,
5574 struct CommandList *c, struct scsi_cmnd *cmd,
5575 bool retry)
5576{
5577 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5578 int rc = IO_ACCEL_INELIGIBLE;
5579
5580 if (!dev)
5581 return SCSI_MLQUEUE_HOST_BUSY;
5582
5583 if (dev->in_reset)
5584 return SCSI_MLQUEUE_HOST_BUSY;
5585
5586 if (hpsa_simple_mode)
5587 return IO_ACCEL_INELIGIBLE;
5588
5589 cmd->host_scribble = (unsigned char *) c;
5590
5591 if (dev->offload_enabled) {
5592 hpsa_cmd_init(h, c->cmdindex, c);
5593 c->cmd_type = CMD_SCSI;
5594 c->scsi_cmd = cmd;
5595 c->device = dev;
5596 if (retry)
5597 c->retry_pending = true;
5598 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5599 if (rc < 0)
5600 rc = SCSI_MLQUEUE_HOST_BUSY;
5601 } else if (dev->hba_ioaccel_enabled) {
5602 hpsa_cmd_init(h, c->cmdindex, c);
5603 c->cmd_type = CMD_SCSI;
5604 c->scsi_cmd = cmd;
5605 c->device = dev;
5606 if (retry)
5607 c->retry_pending = true;
5608 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5609 if (rc < 0)
5610 rc = SCSI_MLQUEUE_HOST_BUSY;
5611 }
5612 return rc;
5613}
5614
5615static void hpsa_command_resubmit_worker(struct work_struct *work)
5616{
5617 struct scsi_cmnd *cmd;
5618 struct hpsa_scsi_dev_t *dev;
5619 struct CommandList *c = container_of(work, struct CommandList, work);
5620
5621 cmd = c->scsi_cmd;
5622 dev = cmd->device->hostdata;
5623 if (!dev) {
5624 cmd->result = DID_NO_CONNECT << 16;
5625 return hpsa_cmd_free_and_done(c->h, c, cmd);
5626 }
5627
5628 if (dev->in_reset) {
5629 cmd->result = DID_RESET << 16;
5630 return hpsa_cmd_free_and_done(c->h, c, cmd);
5631 }
5632
5633 if (c->cmd_type == CMD_IOACCEL2) {
5634 struct ctlr_info *h = c->h;
5635 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5636 int rc;
5637
5638 if (c2->error_data.serv_response ==
5639 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5640
5641 rc = hpsa_ioaccel_submit(h, c, cmd, true);
5642 if (rc == 0)
5643 return;
5644 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5645
5646
5647
5648
5649
5650 cmd->result = DID_IMM_RETRY << 16;
5651 return hpsa_cmd_free_and_done(h, c, cmd);
5652 }
5653
5654 }
5655 }
5656 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5657
5658
5659
5660
5661
5662
5663
5664
5665 c->retry_pending = true;
5666 if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5667
5668
5669
5670
5671
5672
5673
5674
5675 cmd->result = DID_IMM_RETRY << 16;
5676 scsi_done(cmd);
5677 }
5678}
5679
5680
5681static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5682{
5683 struct ctlr_info *h;
5684 struct hpsa_scsi_dev_t *dev;
5685 struct CommandList *c;
5686 int rc = 0;
5687
5688
5689 h = sdev_to_hba(cmd->device);
5690
5691 BUG_ON(scsi_cmd_to_rq(cmd)->tag < 0);
5692
5693 dev = cmd->device->hostdata;
5694 if (!dev) {
5695 cmd->result = DID_NO_CONNECT << 16;
5696 scsi_done(cmd);
5697 return 0;
5698 }
5699
5700 if (dev->removed) {
5701 cmd->result = DID_NO_CONNECT << 16;
5702 scsi_done(cmd);
5703 return 0;
5704 }
5705
5706 if (unlikely(lockup_detected(h))) {
5707 cmd->result = DID_NO_CONNECT << 16;
5708 scsi_done(cmd);
5709 return 0;
5710 }
5711
5712 if (dev->in_reset)
5713 return SCSI_MLQUEUE_DEVICE_BUSY;
5714
5715 c = cmd_tagged_alloc(h, cmd);
5716 if (c == NULL)
5717 return SCSI_MLQUEUE_DEVICE_BUSY;
5718
5719
5720
5721
5722
5723 cmd->result = 0;
5724
5725
5726
5727
5728
5729
5730
5731
5732
5733 if (likely(cmd->retries == 0 &&
5734 !blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)) &&
5735 h->acciopath_status)) {
5736
5737 rc = hpsa_ioaccel_submit(h, c, cmd, false);
5738 if (rc == 0)
5739 return 0;
5740 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5741 hpsa_cmd_resolve_and_free(h, c);
5742 return SCSI_MLQUEUE_HOST_BUSY;
5743 }
5744 }
5745 return hpsa_ciss_submit(h, c, cmd, dev);
5746}
5747
5748static void hpsa_scan_complete(struct ctlr_info *h)
5749{
5750 unsigned long flags;
5751
5752 spin_lock_irqsave(&h->scan_lock, flags);
5753 h->scan_finished = 1;
5754 wake_up(&h->scan_wait_queue);
5755 spin_unlock_irqrestore(&h->scan_lock, flags);
5756}
5757
5758static void hpsa_scan_start(struct Scsi_Host *sh)
5759{
5760 struct ctlr_info *h = shost_to_hba(sh);
5761 unsigned long flags;
5762
5763
5764
5765
5766
5767
5768
5769 if (unlikely(lockup_detected(h)))
5770 return hpsa_scan_complete(h);
5771
5772
5773
5774
5775 spin_lock_irqsave(&h->scan_lock, flags);
5776 if (h->scan_waiting) {
5777 spin_unlock_irqrestore(&h->scan_lock, flags);
5778 return;
5779 }
5780
5781 spin_unlock_irqrestore(&h->scan_lock, flags);
5782
5783
5784 while (1) {
5785 spin_lock_irqsave(&h->scan_lock, flags);
5786 if (h->scan_finished)
5787 break;
5788 h->scan_waiting = 1;
5789 spin_unlock_irqrestore(&h->scan_lock, flags);
5790 wait_event(h->scan_wait_queue, h->scan_finished);
5791
5792
5793
5794
5795
5796 }
5797 h->scan_finished = 0;
5798 h->scan_waiting = 0;
5799 spin_unlock_irqrestore(&h->scan_lock, flags);
5800
5801 if (unlikely(lockup_detected(h)))
5802 return hpsa_scan_complete(h);
5803
5804
5805
5806
5807 spin_lock_irqsave(&h->reset_lock, flags);
5808 if (h->reset_in_progress) {
5809 h->drv_req_rescan = 1;
5810 spin_unlock_irqrestore(&h->reset_lock, flags);
5811 hpsa_scan_complete(h);
5812 return;
5813 }
5814 spin_unlock_irqrestore(&h->reset_lock, flags);
5815
5816 hpsa_update_scsi_devices(h);
5817
5818 hpsa_scan_complete(h);
5819}
5820
5821static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5822{
5823 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5824
5825 if (!logical_drive)
5826 return -ENODEV;
5827
5828 if (qdepth < 1)
5829 qdepth = 1;
5830 else if (qdepth > logical_drive->queue_depth)
5831 qdepth = logical_drive->queue_depth;
5832
5833 return scsi_change_queue_depth(sdev, qdepth);
5834}
5835
5836static int hpsa_scan_finished(struct Scsi_Host *sh,
5837 unsigned long elapsed_time)
5838{
5839 struct ctlr_info *h = shost_to_hba(sh);
5840 unsigned long flags;
5841 int finished;
5842
5843 spin_lock_irqsave(&h->scan_lock, flags);
5844 finished = h->scan_finished;
5845 spin_unlock_irqrestore(&h->scan_lock, flags);
5846 return finished;
5847}
5848
5849static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5850{
5851 struct Scsi_Host *sh;
5852
5853 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5854 if (sh == NULL) {
5855 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5856 return -ENOMEM;
5857 }
5858
5859 sh->io_port = 0;
5860 sh->n_io_port = 0;
5861 sh->this_id = -1;
5862 sh->max_channel = 3;
5863 sh->max_cmd_len = MAX_COMMAND_SIZE;
5864 sh->max_lun = HPSA_MAX_LUN;
5865 sh->max_id = HPSA_MAX_LUN;
5866 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5867 sh->cmd_per_lun = sh->can_queue;
5868 sh->sg_tablesize = h->maxsgentries;
5869 sh->transportt = hpsa_sas_transport_template;
5870 sh->hostdata[0] = (unsigned long) h;
5871 sh->irq = pci_irq_vector(h->pdev, 0);
5872 sh->unique_id = sh->irq;
5873
5874 h->scsi_host = sh;
5875 return 0;
5876}
5877
5878static int hpsa_scsi_add_host(struct ctlr_info *h)
5879{
5880 int rv;
5881
5882 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5883 if (rv) {
5884 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5885 return rv;
5886 }
5887 scsi_scan_host(h->scsi_host);
5888 return 0;
5889}
5890
5891
5892
5893
5894
5895
5896
5897static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5898{
5899 int idx = scsi_cmd_to_rq(scmd)->tag;
5900
5901 if (idx < 0)
5902 return idx;
5903
5904
5905 return idx += HPSA_NRESERVED_CMDS;
5906}
5907
5908
5909
5910
5911
5912static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5913 struct CommandList *c, unsigned char lunaddr[],
5914 int reply_queue)
5915{
5916 int rc;
5917
5918
5919 (void) fill_cmd(c, TEST_UNIT_READY, h,
5920 NULL, 0, 0, lunaddr, TYPE_CMD);
5921 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5922 if (rc)
5923 return rc;
5924
5925
5926
5927 if (c->err_info->CommandStatus == CMD_SUCCESS)
5928 return 0;
5929
5930
5931
5932
5933
5934
5935 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5936 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5937 (c->err_info->SenseInfo[2] == NO_SENSE ||
5938 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5939 return 0;
5940
5941 return 1;
5942}
5943
5944
5945
5946
5947
5948static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5949 struct CommandList *c,
5950 unsigned char lunaddr[], int reply_queue)
5951{
5952 int rc;
5953 int count = 0;
5954 int waittime = 1;
5955
5956
5957 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5958
5959
5960
5961
5962
5963 msleep(1000 * waittime);
5964
5965 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5966 if (!rc)
5967 break;
5968
5969
5970 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5971 waittime *= 2;
5972
5973 dev_warn(&h->pdev->dev,
5974 "waiting %d secs for device to become ready.\n",
5975 waittime);
5976 }
5977
5978 return rc;
5979}
5980
5981static int wait_for_device_to_become_ready(struct ctlr_info *h,
5982 unsigned char lunaddr[],
5983 int reply_queue)
5984{
5985 int first_queue;
5986 int last_queue;
5987 int rq;
5988 int rc = 0;
5989 struct CommandList *c;
5990
5991 c = cmd_alloc(h);
5992
5993
5994
5995
5996
5997
5998 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5999 first_queue = 0;
6000 last_queue = h->nreply_queues - 1;
6001 } else {
6002 first_queue = reply_queue;
6003 last_queue = reply_queue;
6004 }
6005
6006 for (rq = first_queue; rq <= last_queue; rq++) {
6007 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
6008 if (rc)
6009 break;
6010 }
6011
6012 if (rc)
6013 dev_warn(&h->pdev->dev, "giving up on device.\n");
6014 else
6015 dev_warn(&h->pdev->dev, "device is ready.\n");
6016
6017 cmd_free(h, c);
6018 return rc;
6019}
6020
6021
6022
6023
6024static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6025{
6026 int rc = SUCCESS;
6027 int i;
6028 struct ctlr_info *h;
6029 struct hpsa_scsi_dev_t *dev = NULL;
6030 u8 reset_type;
6031 char msg[48];
6032 unsigned long flags;
6033
6034
6035 h = sdev_to_hba(scsicmd->device);
6036 if (h == NULL)
6037 return FAILED;
6038
6039 spin_lock_irqsave(&h->reset_lock, flags);
6040 h->reset_in_progress = 1;
6041 spin_unlock_irqrestore(&h->reset_lock, flags);
6042
6043 if (lockup_detected(h)) {
6044 rc = FAILED;
6045 goto return_reset_status;
6046 }
6047
6048 dev = scsicmd->device->hostdata;
6049 if (!dev) {
6050 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6051 rc = FAILED;
6052 goto return_reset_status;
6053 }
6054
6055 if (dev->devtype == TYPE_ENCLOSURE) {
6056 rc = SUCCESS;
6057 goto return_reset_status;
6058 }
6059
6060
6061 if (lockup_detected(h)) {
6062 snprintf(msg, sizeof(msg),
6063 "cmd %d RESET FAILED, lockup detected",
6064 hpsa_get_cmd_index(scsicmd));
6065 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6066 rc = FAILED;
6067 goto return_reset_status;
6068 }
6069
6070
6071 if (detect_controller_lockup(h)) {
6072 snprintf(msg, sizeof(msg),
6073 "cmd %d RESET FAILED, new lockup detected",
6074 hpsa_get_cmd_index(scsicmd));
6075 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6076 rc = FAILED;
6077 goto return_reset_status;
6078 }
6079
6080
6081 if (is_hba_lunid(dev->scsi3addr)) {
6082 rc = SUCCESS;
6083 goto return_reset_status;
6084 }
6085
6086 if (is_logical_dev_addr_mode(dev->scsi3addr))
6087 reset_type = HPSA_DEVICE_RESET_MSG;
6088 else
6089 reset_type = HPSA_PHYS_TARGET_RESET;
6090
6091 sprintf(msg, "resetting %s",
6092 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6093 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6094
6095
6096
6097
6098 dev->in_reset = true;
6099 for (i = 0; i < 10; i++) {
6100 if (atomic_read(&dev->commands_outstanding) > 0)
6101 msleep(1000);
6102 else
6103 break;
6104 }
6105
6106
6107 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6108 if (rc == 0)
6109 rc = SUCCESS;
6110 else
6111 rc = FAILED;
6112
6113 sprintf(msg, "reset %s %s",
6114 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6115 rc == SUCCESS ? "completed successfully" : "failed");
6116 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6117
6118return_reset_status:
6119 spin_lock_irqsave(&h->reset_lock, flags);
6120 h->reset_in_progress = 0;
6121 if (dev)
6122 dev->in_reset = false;
6123 spin_unlock_irqrestore(&h->reset_lock, flags);
6124 return rc;
6125}
6126
6127
6128
6129
6130
6131
6132
6133
6134static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6135 struct scsi_cmnd *scmd)
6136{
6137 int idx = hpsa_get_cmd_index(scmd);
6138 struct CommandList *c = h->cmd_pool + idx;
6139
6140 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6141 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6142 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6143
6144
6145
6146 BUG();
6147 }
6148
6149 if (unlikely(!hpsa_is_cmd_idle(c))) {
6150
6151
6152
6153
6154
6155
6156 if (idx != h->last_collision_tag) {
6157 dev_warn(&h->pdev->dev,
6158 "%s: tag collision (tag=%d)\n", __func__, idx);
6159 if (scmd)
6160 scsi_print_command(scmd);
6161 h->last_collision_tag = idx;
6162 }
6163 return NULL;
6164 }
6165
6166 atomic_inc(&c->refcount);
6167 hpsa_cmd_partial_init(h, idx, c);
6168
6169
6170
6171
6172
6173 c->retry_pending = false;
6174
6175 return c;
6176}
6177
6178static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6179{
6180
6181
6182
6183
6184 (void)atomic_dec(&c->refcount);
6185}
6186
6187
6188
6189
6190
6191
6192
6193
6194
6195
6196static struct CommandList *cmd_alloc(struct ctlr_info *h)
6197{
6198 struct CommandList *c;
6199 int refcount, i;
6200 int offset = 0;
6201
6202
6203
6204
6205
6206
6207
6208
6209
6210
6211
6212
6213
6214
6215
6216
6217
6218
6219
6220
6221 for (;;) {
6222 i = find_next_zero_bit(h->cmd_pool_bits,
6223 HPSA_NRESERVED_CMDS,
6224 offset);
6225 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6226 offset = 0;
6227 continue;
6228 }
6229 c = h->cmd_pool + i;
6230 refcount = atomic_inc_return(&c->refcount);
6231 if (unlikely(refcount > 1)) {
6232 cmd_free(h, c);
6233 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6234 continue;
6235 }
6236 set_bit(i & (BITS_PER_LONG - 1),
6237 h->cmd_pool_bits + (i / BITS_PER_LONG));
6238 break;
6239 }
6240 hpsa_cmd_partial_init(h, i, c);
6241 c->device = NULL;
6242
6243
6244
6245
6246
6247 c->retry_pending = false;
6248
6249 return c;
6250}
6251
6252
6253
6254
6255
6256
6257
6258static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6259{
6260 if (atomic_dec_and_test(&c->refcount)) {
6261 int i;
6262
6263 i = c - h->cmd_pool;
6264 clear_bit(i & (BITS_PER_LONG - 1),
6265 h->cmd_pool_bits + (i / BITS_PER_LONG));
6266 }
6267}
6268
6269#ifdef CONFIG_COMPAT
6270
6271static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6272 void __user *arg)
6273{
6274 struct ctlr_info *h = sdev_to_hba(dev);
6275 IOCTL32_Command_struct __user *arg32 = arg;
6276 IOCTL_Command_struct arg64;
6277 int err;
6278 u32 cp;
6279
6280 if (!arg)
6281 return -EINVAL;
6282
6283 memset(&arg64, 0, sizeof(arg64));
6284 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6285 return -EFAULT;
6286 if (get_user(cp, &arg32->buf))
6287 return -EFAULT;
6288 arg64.buf = compat_ptr(cp);
6289
6290 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6291 return -EAGAIN;
6292 err = hpsa_passthru_ioctl(h, &arg64);
6293 atomic_inc(&h->passthru_cmds_avail);
6294 if (err)
6295 return err;
6296 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6297 sizeof(arg32->error_info)))
6298 return -EFAULT;
6299 return 0;
6300}
6301
6302static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6303 unsigned int cmd, void __user *arg)
6304{
6305 struct ctlr_info *h = sdev_to_hba(dev);
6306 BIG_IOCTL32_Command_struct __user *arg32 = arg;
6307 BIG_IOCTL_Command_struct arg64;
6308 int err;
6309 u32 cp;
6310
6311 if (!arg)
6312 return -EINVAL;
6313 memset(&arg64, 0, sizeof(arg64));
6314 if (copy_from_user(&arg64, arg32,
6315 offsetof(BIG_IOCTL32_Command_struct, buf)))
6316 return -EFAULT;
6317 if (get_user(cp, &arg32->buf))
6318 return -EFAULT;
6319 arg64.buf = compat_ptr(cp);
6320
6321 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6322 return -EAGAIN;
6323 err = hpsa_big_passthru_ioctl(h, &arg64);
6324 atomic_inc(&h->passthru_cmds_avail);
6325 if (err)
6326 return err;
6327 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6328 sizeof(arg32->error_info)))
6329 return -EFAULT;
6330 return 0;
6331}
6332
6333static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6334 void __user *arg)
6335{
6336 switch (cmd) {
6337 case CCISS_GETPCIINFO:
6338 case CCISS_GETINTINFO:
6339 case CCISS_SETINTINFO:
6340 case CCISS_GETNODENAME:
6341 case CCISS_SETNODENAME:
6342 case CCISS_GETHEARTBEAT:
6343 case CCISS_GETBUSTYPES:
6344 case CCISS_GETFIRMVER:
6345 case CCISS_GETDRIVVER:
6346 case CCISS_REVALIDVOLS:
6347 case CCISS_DEREGDISK:
6348 case CCISS_REGNEWDISK:
6349 case CCISS_REGNEWD:
6350 case CCISS_RESCANDISK:
6351 case CCISS_GETLUNINFO:
6352 return hpsa_ioctl(dev, cmd, arg);
6353
6354 case CCISS_PASSTHRU32:
6355 return hpsa_ioctl32_passthru(dev, cmd, arg);
6356 case CCISS_BIG_PASSTHRU32:
6357 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6358
6359 default:
6360 return -ENOIOCTLCMD;
6361 }
6362}
6363#endif
6364
6365static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6366{
6367 struct hpsa_pci_info pciinfo;
6368
6369 if (!argp)
6370 return -EINVAL;
6371 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6372 pciinfo.bus = h->pdev->bus->number;
6373 pciinfo.dev_fn = h->pdev->devfn;
6374 pciinfo.board_id = h->board_id;
6375 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6376 return -EFAULT;
6377 return 0;
6378}
6379
6380static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6381{
6382 DriverVer_type DriverVer;
6383 unsigned char vmaj, vmin, vsubmin;
6384 int rc;
6385
6386 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6387 &vmaj, &vmin, &vsubmin);
6388 if (rc != 3) {
6389 dev_info(&h->pdev->dev, "driver version string '%s' "
6390 "unrecognized.", HPSA_DRIVER_VERSION);
6391 vmaj = 0;
6392 vmin = 0;
6393 vsubmin = 0;
6394 }
6395 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6396 if (!argp)
6397 return -EINVAL;
6398 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6399 return -EFAULT;
6400 return 0;
6401}
6402
6403static int hpsa_passthru_ioctl(struct ctlr_info *h,
6404 IOCTL_Command_struct *iocommand)
6405{
6406 struct CommandList *c;
6407 char *buff = NULL;
6408 u64 temp64;
6409 int rc = 0;
6410
6411 if (!capable(CAP_SYS_RAWIO))
6412 return -EPERM;
6413 if ((iocommand->buf_size < 1) &&
6414 (iocommand->Request.Type.Direction != XFER_NONE)) {
6415 return -EINVAL;
6416 }
6417 if (iocommand->buf_size > 0) {
6418 buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6419 if (buff == NULL)
6420 return -ENOMEM;
6421 if (iocommand->Request.Type.Direction & XFER_WRITE) {
6422
6423 if (copy_from_user(buff, iocommand->buf,
6424 iocommand->buf_size)) {
6425 rc = -EFAULT;
6426 goto out_kfree;
6427 }
6428 } else {
6429 memset(buff, 0, iocommand->buf_size);
6430 }
6431 }
6432 c = cmd_alloc(h);
6433
6434
6435 c->cmd_type = CMD_IOCTL_PEND;
6436 c->scsi_cmd = SCSI_CMD_BUSY;
6437
6438 c->Header.ReplyQueue = 0;
6439 if (iocommand->buf_size > 0) {
6440 c->Header.SGList = 1;
6441 c->Header.SGTotal = cpu_to_le16(1);
6442 } else {
6443 c->Header.SGList = 0;
6444 c->Header.SGTotal = cpu_to_le16(0);
6445 }
6446 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6447
6448
6449 memcpy(&c->Request, &iocommand->Request,
6450 sizeof(c->Request));
6451
6452
6453 if (iocommand->buf_size > 0) {
6454 temp64 = dma_map_single(&h->pdev->dev, buff,
6455 iocommand->buf_size, DMA_BIDIRECTIONAL);
6456 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6457 c->SG[0].Addr = cpu_to_le64(0);
6458 c->SG[0].Len = cpu_to_le32(0);
6459 rc = -ENOMEM;
6460 goto out;
6461 }
6462 c->SG[0].Addr = cpu_to_le64(temp64);
6463 c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6464 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST);
6465 }
6466 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6467 NO_TIMEOUT);
6468 if (iocommand->buf_size > 0)
6469 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6470 check_ioctl_unit_attention(h, c);
6471 if (rc) {
6472 rc = -EIO;
6473 goto out;
6474 }
6475
6476
6477 memcpy(&iocommand->error_info, c->err_info,
6478 sizeof(iocommand->error_info));
6479 if ((iocommand->Request.Type.Direction & XFER_READ) &&
6480 iocommand->buf_size > 0) {
6481
6482 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6483 rc = -EFAULT;
6484 goto out;
6485 }
6486 }
6487out:
6488 cmd_free(h, c);
6489out_kfree:
6490 kfree(buff);
6491 return rc;
6492}
6493
6494static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6495 BIG_IOCTL_Command_struct *ioc)
6496{
6497 struct CommandList *c;
6498 unsigned char **buff = NULL;
6499 int *buff_size = NULL;
6500 u64 temp64;
6501 BYTE sg_used = 0;
6502 int status = 0;
6503 u32 left;
6504 u32 sz;
6505 BYTE __user *data_ptr;
6506
6507 if (!capable(CAP_SYS_RAWIO))
6508 return -EPERM;
6509
6510 if ((ioc->buf_size < 1) &&
6511 (ioc->Request.Type.Direction != XFER_NONE))
6512 return -EINVAL;
6513
6514 if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6515 return -EINVAL;
6516 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6517 return -EINVAL;
6518 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6519 if (!buff) {
6520 status = -ENOMEM;
6521 goto cleanup1;
6522 }
6523 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6524 if (!buff_size) {
6525 status = -ENOMEM;
6526 goto cleanup1;
6527 }
6528 left = ioc->buf_size;
6529 data_ptr = ioc->buf;
6530 while (left) {
6531 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6532 buff_size[sg_used] = sz;
6533 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6534 if (buff[sg_used] == NULL) {
6535 status = -ENOMEM;
6536 goto cleanup1;
6537 }
6538 if (ioc->Request.Type.Direction & XFER_WRITE) {
6539 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6540 status = -EFAULT;
6541 goto cleanup1;
6542 }
6543 } else
6544 memset(buff[sg_used], 0, sz);
6545 left -= sz;
6546 data_ptr += sz;
6547 sg_used++;
6548 }
6549 c = cmd_alloc(h);
6550
6551 c->cmd_type = CMD_IOCTL_PEND;
6552 c->scsi_cmd = SCSI_CMD_BUSY;
6553 c->Header.ReplyQueue = 0;
6554 c->Header.SGList = (u8) sg_used;
6555 c->Header.SGTotal = cpu_to_le16(sg_used);
6556 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6557 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6558 if (ioc->buf_size > 0) {
6559 int i;
6560 for (i = 0; i < sg_used; i++) {
6561 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6562 buff_size[i], DMA_BIDIRECTIONAL);
6563 if (dma_mapping_error(&h->pdev->dev,
6564 (dma_addr_t) temp64)) {
6565 c->SG[i].Addr = cpu_to_le64(0);
6566 c->SG[i].Len = cpu_to_le32(0);
6567 hpsa_pci_unmap(h->pdev, c, i,
6568 DMA_BIDIRECTIONAL);
6569 status = -ENOMEM;
6570 goto cleanup0;
6571 }
6572 c->SG[i].Addr = cpu_to_le64(temp64);
6573 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6574 c->SG[i].Ext = cpu_to_le32(0);
6575 }
6576 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6577 }
6578 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6579 NO_TIMEOUT);
6580 if (sg_used)
6581 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6582 check_ioctl_unit_attention(h, c);
6583 if (status) {
6584 status = -EIO;
6585 goto cleanup0;
6586 }
6587
6588
6589 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6590 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6591 int i;
6592
6593
6594 BYTE __user *ptr = ioc->buf;
6595 for (i = 0; i < sg_used; i++) {
6596 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6597 status = -EFAULT;
6598 goto cleanup0;
6599 }
6600 ptr += buff_size[i];
6601 }
6602 }
6603 status = 0;
6604cleanup0:
6605 cmd_free(h, c);
6606cleanup1:
6607 if (buff) {
6608 int i;
6609
6610 for (i = 0; i < sg_used; i++)
6611 kfree(buff[i]);
6612 kfree(buff);
6613 }
6614 kfree(buff_size);
6615 return status;
6616}
6617
6618static void check_ioctl_unit_attention(struct ctlr_info *h,
6619 struct CommandList *c)
6620{
6621 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6622 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6623 (void) check_for_unit_attention(h, c);
6624}
6625
6626
6627
6628
6629static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6630 void __user *argp)
6631{
6632 struct ctlr_info *h = sdev_to_hba(dev);
6633 int rc;
6634
6635 switch (cmd) {
6636 case CCISS_DEREGDISK:
6637 case CCISS_REGNEWDISK:
6638 case CCISS_REGNEWD:
6639 hpsa_scan_start(h->scsi_host);
6640 return 0;
6641 case CCISS_GETPCIINFO:
6642 return hpsa_getpciinfo_ioctl(h, argp);
6643 case CCISS_GETDRIVVER:
6644 return hpsa_getdrivver_ioctl(h, argp);
6645 case CCISS_PASSTHRU: {
6646 IOCTL_Command_struct iocommand;
6647
6648 if (!argp)
6649 return -EINVAL;
6650 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6651 return -EFAULT;
6652 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6653 return -EAGAIN;
6654 rc = hpsa_passthru_ioctl(h, &iocommand);
6655 atomic_inc(&h->passthru_cmds_avail);
6656 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6657 rc = -EFAULT;
6658 return rc;
6659 }
6660 case CCISS_BIG_PASSTHRU: {
6661 BIG_IOCTL_Command_struct ioc;
6662 if (!argp)
6663 return -EINVAL;
6664 if (copy_from_user(&ioc, argp, sizeof(ioc)))
6665 return -EFAULT;
6666 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6667 return -EAGAIN;
6668 rc = hpsa_big_passthru_ioctl(h, &ioc);
6669 atomic_inc(&h->passthru_cmds_avail);
6670 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6671 rc = -EFAULT;
6672 return rc;
6673 }
6674 default:
6675 return -ENOTTY;
6676 }
6677}
6678
6679static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6680{
6681 struct CommandList *c;
6682
6683 c = cmd_alloc(h);
6684
6685
6686 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6687 RAID_CTLR_LUNID, TYPE_MSG);
6688 c->Request.CDB[1] = reset_type;
6689 c->waiting = NULL;
6690 enqueue_cmd_and_start_io(h, c);
6691
6692
6693
6694
6695 return;
6696}
6697
6698static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6699 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6700 int cmd_type)
6701{
6702 enum dma_data_direction dir = DMA_NONE;
6703
6704 c->cmd_type = CMD_IOCTL_PEND;
6705 c->scsi_cmd = SCSI_CMD_BUSY;
6706 c->Header.ReplyQueue = 0;
6707 if (buff != NULL && size > 0) {
6708 c->Header.SGList = 1;
6709 c->Header.SGTotal = cpu_to_le16(1);
6710 } else {
6711 c->Header.SGList = 0;
6712 c->Header.SGTotal = cpu_to_le16(0);
6713 }
6714 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6715
6716 if (cmd_type == TYPE_CMD) {
6717 switch (cmd) {
6718 case HPSA_INQUIRY:
6719
6720 if (page_code & VPD_PAGE) {
6721 c->Request.CDB[1] = 0x01;
6722 c->Request.CDB[2] = (page_code & 0xff);
6723 }
6724 c->Request.CDBLen = 6;
6725 c->Request.type_attr_dir =
6726 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6727 c->Request.Timeout = 0;
6728 c->Request.CDB[0] = HPSA_INQUIRY;
6729 c->Request.CDB[4] = size & 0xFF;
6730 break;
6731 case RECEIVE_DIAGNOSTIC:
6732 c->Request.CDBLen = 6;
6733 c->Request.type_attr_dir =
6734 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6735 c->Request.Timeout = 0;
6736 c->Request.CDB[0] = cmd;
6737 c->Request.CDB[1] = 1;
6738 c->Request.CDB[2] = 1;
6739 c->Request.CDB[3] = (size >> 8) & 0xFF;
6740 c->Request.CDB[4] = size & 0xFF;
6741 break;
6742 case HPSA_REPORT_LOG:
6743 case HPSA_REPORT_PHYS:
6744
6745
6746
6747 c->Request.CDBLen = 12;
6748 c->Request.type_attr_dir =
6749 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6750 c->Request.Timeout = 0;
6751 c->Request.CDB[0] = cmd;
6752 c->Request.CDB[6] = (size >> 24) & 0xFF;
6753 c->Request.CDB[7] = (size >> 16) & 0xFF;
6754 c->Request.CDB[8] = (size >> 8) & 0xFF;
6755 c->Request.CDB[9] = size & 0xFF;
6756 break;
6757 case BMIC_SENSE_DIAG_OPTIONS:
6758 c->Request.CDBLen = 16;
6759 c->Request.type_attr_dir =
6760 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6761 c->Request.Timeout = 0;
6762
6763 c->Request.CDB[0] = BMIC_READ;
6764 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6765 break;
6766 case BMIC_SET_DIAG_OPTIONS:
6767 c->Request.CDBLen = 16;
6768 c->Request.type_attr_dir =
6769 TYPE_ATTR_DIR(cmd_type,
6770 ATTR_SIMPLE, XFER_WRITE);
6771 c->Request.Timeout = 0;
6772 c->Request.CDB[0] = BMIC_WRITE;
6773 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6774 break;
6775 case HPSA_CACHE_FLUSH:
6776 c->Request.CDBLen = 12;
6777 c->Request.type_attr_dir =
6778 TYPE_ATTR_DIR(cmd_type,
6779 ATTR_SIMPLE, XFER_WRITE);
6780 c->Request.Timeout = 0;
6781 c->Request.CDB[0] = BMIC_WRITE;
6782 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6783 c->Request.CDB[7] = (size >> 8) & 0xFF;
6784 c->Request.CDB[8] = size & 0xFF;
6785 break;
6786 case TEST_UNIT_READY:
6787 c->Request.CDBLen = 6;
6788 c->Request.type_attr_dir =
6789 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6790 c->Request.Timeout = 0;
6791 break;
6792 case HPSA_GET_RAID_MAP:
6793 c->Request.CDBLen = 12;
6794 c->Request.type_attr_dir =
6795 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6796 c->Request.Timeout = 0;
6797 c->Request.CDB[0] = HPSA_CISS_READ;
6798 c->Request.CDB[1] = cmd;
6799 c->Request.CDB[6] = (size >> 24) & 0xFF;
6800 c->Request.CDB[7] = (size >> 16) & 0xFF;
6801 c->Request.CDB[8] = (size >> 8) & 0xFF;
6802 c->Request.CDB[9] = size & 0xFF;
6803 break;
6804 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6805 c->Request.CDBLen = 10;
6806 c->Request.type_attr_dir =
6807 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6808 c->Request.Timeout = 0;
6809 c->Request.CDB[0] = BMIC_READ;
6810 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6811 c->Request.CDB[7] = (size >> 16) & 0xFF;
6812 c->Request.CDB[8] = (size >> 8) & 0xFF;
6813 break;
6814 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6815 c->Request.CDBLen = 10;
6816 c->Request.type_attr_dir =
6817 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6818 c->Request.Timeout = 0;
6819 c->Request.CDB[0] = BMIC_READ;
6820 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6821 c->Request.CDB[7] = (size >> 16) & 0xFF;
6822 c->Request.CDB[8] = (size >> 8) & 0XFF;
6823 break;
6824 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6825 c->Request.CDBLen = 10;
6826 c->Request.type_attr_dir =
6827 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6828 c->Request.Timeout = 0;
6829 c->Request.CDB[0] = BMIC_READ;
6830 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6831 c->Request.CDB[7] = (size >> 16) & 0xFF;
6832 c->Request.CDB[8] = (size >> 8) & 0XFF;
6833 break;
6834 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6835 c->Request.CDBLen = 10;
6836 c->Request.type_attr_dir =
6837 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6838 c->Request.Timeout = 0;
6839 c->Request.CDB[0] = BMIC_READ;
6840 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6841 c->Request.CDB[7] = (size >> 16) & 0xFF;
6842 c->Request.CDB[8] = (size >> 8) & 0XFF;
6843 break;
6844 case BMIC_IDENTIFY_CONTROLLER:
6845 c->Request.CDBLen = 10;
6846 c->Request.type_attr_dir =
6847 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6848 c->Request.Timeout = 0;
6849 c->Request.CDB[0] = BMIC_READ;
6850 c->Request.CDB[1] = 0;
6851 c->Request.CDB[2] = 0;
6852 c->Request.CDB[3] = 0;
6853 c->Request.CDB[4] = 0;
6854 c->Request.CDB[5] = 0;
6855 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6856 c->Request.CDB[7] = (size >> 16) & 0xFF;
6857 c->Request.CDB[8] = (size >> 8) & 0XFF;
6858 c->Request.CDB[9] = 0;
6859 break;
6860 default:
6861 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6862 BUG();
6863 }
6864 } else if (cmd_type == TYPE_MSG) {
6865 switch (cmd) {
6866
6867 case HPSA_PHYS_TARGET_RESET:
6868 c->Request.CDBLen = 16;
6869 c->Request.type_attr_dir =
6870 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6871 c->Request.Timeout = 0;
6872 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6873 c->Request.CDB[0] = HPSA_RESET;
6874 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6875
6876 c->Request.CDB[4] = 0x00;
6877 c->Request.CDB[5] = 0x00;
6878 c->Request.CDB[6] = 0x00;
6879 c->Request.CDB[7] = 0x00;
6880 break;
6881 case HPSA_DEVICE_RESET_MSG:
6882 c->Request.CDBLen = 16;
6883 c->Request.type_attr_dir =
6884 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6885 c->Request.Timeout = 0;
6886 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6887 c->Request.CDB[0] = cmd;
6888 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6889
6890
6891 c->Request.CDB[4] = 0x00;
6892 c->Request.CDB[5] = 0x00;
6893 c->Request.CDB[6] = 0x00;
6894 c->Request.CDB[7] = 0x00;
6895 break;
6896 default:
6897 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6898 cmd);
6899 BUG();
6900 }
6901 } else {
6902 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6903 BUG();
6904 }
6905
6906 switch (GET_DIR(c->Request.type_attr_dir)) {
6907 case XFER_READ:
6908 dir = DMA_FROM_DEVICE;
6909 break;
6910 case XFER_WRITE:
6911 dir = DMA_TO_DEVICE;
6912 break;
6913 case XFER_NONE:
6914 dir = DMA_NONE;
6915 break;
6916 default:
6917 dir = DMA_BIDIRECTIONAL;
6918 }
6919 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6920 return -1;
6921 return 0;
6922}
6923
6924
6925
6926
6927static void __iomem *remap_pci_mem(ulong base, ulong size)
6928{
6929 ulong page_base = ((ulong) base) & PAGE_MASK;
6930 ulong page_offs = ((ulong) base) - page_base;
6931 void __iomem *page_remapped = ioremap(page_base,
6932 page_offs + size);
6933
6934 return page_remapped ? (page_remapped + page_offs) : NULL;
6935}
6936
6937static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6938{
6939 return h->access.command_completed(h, q);
6940}
6941
6942static inline bool interrupt_pending(struct ctlr_info *h)
6943{
6944 return h->access.intr_pending(h);
6945}
6946
6947static inline long interrupt_not_for_us(struct ctlr_info *h)
6948{
6949 return (h->access.intr_pending(h) == 0) ||
6950 (h->interrupts_enabled == 0);
6951}
6952
6953static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6954 u32 raw_tag)
6955{
6956 if (unlikely(tag_index >= h->nr_cmds)) {
6957 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6958 return 1;
6959 }
6960 return 0;
6961}
6962
6963static inline void finish_cmd(struct CommandList *c)
6964{
6965 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6966 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6967 || c->cmd_type == CMD_IOACCEL2))
6968 complete_scsi_command(c);
6969 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6970 complete(c->waiting);
6971}
6972
6973
6974static inline void process_indexed_cmd(struct ctlr_info *h,
6975 u32 raw_tag)
6976{
6977 u32 tag_index;
6978 struct CommandList *c;
6979
6980 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6981 if (!bad_tag(h, tag_index, raw_tag)) {
6982 c = h->cmd_pool + tag_index;
6983 finish_cmd(c);
6984 }
6985}
6986
6987
6988
6989
6990
6991
6992static int ignore_bogus_interrupt(struct ctlr_info *h)
6993{
6994 if (likely(!reset_devices))
6995 return 0;
6996
6997 if (likely(h->interrupts_enabled))
6998 return 0;
6999
7000 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
7001 "(known firmware bug.) Ignoring.\n");
7002
7003 return 1;
7004}
7005
7006
7007
7008
7009
7010
7011static struct ctlr_info *queue_to_hba(u8 *queue)
7012{
7013 return container_of((queue - *queue), struct ctlr_info, q[0]);
7014}
7015
7016static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7017{
7018 struct ctlr_info *h = queue_to_hba(queue);
7019 u8 q = *(u8 *) queue;
7020 u32 raw_tag;
7021
7022 if (ignore_bogus_interrupt(h))
7023 return IRQ_NONE;
7024
7025 if (interrupt_not_for_us(h))
7026 return IRQ_NONE;
7027 h->last_intr_timestamp = get_jiffies_64();
7028 while (interrupt_pending(h)) {
7029 raw_tag = get_next_completion(h, q);
7030 while (raw_tag != FIFO_EMPTY)
7031 raw_tag = next_command(h, q);
7032 }
7033 return IRQ_HANDLED;
7034}
7035
7036static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7037{
7038 struct ctlr_info *h = queue_to_hba(queue);
7039 u32 raw_tag;
7040 u8 q = *(u8 *) queue;
7041
7042 if (ignore_bogus_interrupt(h))
7043 return IRQ_NONE;
7044
7045 h->last_intr_timestamp = get_jiffies_64();
7046 raw_tag = get_next_completion(h, q);
7047 while (raw_tag != FIFO_EMPTY)
7048 raw_tag = next_command(h, q);
7049 return IRQ_HANDLED;
7050}
7051
7052static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7053{
7054 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7055 u32 raw_tag;
7056 u8 q = *(u8 *) queue;
7057
7058 if (interrupt_not_for_us(h))
7059 return IRQ_NONE;
7060 h->last_intr_timestamp = get_jiffies_64();
7061 while (interrupt_pending(h)) {
7062 raw_tag = get_next_completion(h, q);
7063 while (raw_tag != FIFO_EMPTY) {
7064 process_indexed_cmd(h, raw_tag);
7065 raw_tag = next_command(h, q);
7066 }
7067 }
7068 return IRQ_HANDLED;
7069}
7070
7071static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7072{
7073 struct ctlr_info *h = queue_to_hba(queue);
7074 u32 raw_tag;
7075 u8 q = *(u8 *) queue;
7076
7077 h->last_intr_timestamp = get_jiffies_64();
7078 raw_tag = get_next_completion(h, q);
7079 while (raw_tag != FIFO_EMPTY) {
7080 process_indexed_cmd(h, raw_tag);
7081 raw_tag = next_command(h, q);
7082 }
7083 return IRQ_HANDLED;
7084}
7085
7086
7087
7088
7089
7090static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7091 unsigned char type)
7092{
7093 struct Command {
7094 struct CommandListHeader CommandHeader;
7095 struct RequestBlock Request;
7096 struct ErrDescriptor ErrorDescriptor;
7097 };
7098 struct Command *cmd;
7099 static const size_t cmd_sz = sizeof(*cmd) +
7100 sizeof(cmd->ErrorDescriptor);
7101 dma_addr_t paddr64;
7102 __le32 paddr32;
7103 u32 tag;
7104 void __iomem *vaddr;
7105 int i, err;
7106
7107 vaddr = pci_ioremap_bar(pdev, 0);
7108 if (vaddr == NULL)
7109 return -ENOMEM;
7110
7111
7112
7113
7114
7115 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7116 if (err) {
7117 iounmap(vaddr);
7118 return err;
7119 }
7120
7121 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7122 if (cmd == NULL) {
7123 iounmap(vaddr);
7124 return -ENOMEM;
7125 }
7126
7127
7128
7129
7130
7131 paddr32 = cpu_to_le32(paddr64);
7132
7133 cmd->CommandHeader.ReplyQueue = 0;
7134 cmd->CommandHeader.SGList = 0;
7135 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7136 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7137 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7138
7139 cmd->Request.CDBLen = 16;
7140 cmd->Request.type_attr_dir =
7141 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7142 cmd->Request.Timeout = 0;
7143 cmd->Request.CDB[0] = opcode;
7144 cmd->Request.CDB[1] = type;
7145 memset(&cmd->Request.CDB[2], 0, 14);
7146 cmd->ErrorDescriptor.Addr =
7147 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7148 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7149
7150 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7151
7152 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7153 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7154 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7155 break;
7156 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7157 }
7158
7159 iounmap(vaddr);
7160
7161
7162
7163
7164 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7165 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7166 opcode, type);
7167 return -ETIMEDOUT;
7168 }
7169
7170 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7171
7172 if (tag & HPSA_ERROR_BIT) {
7173 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7174 opcode, type);
7175 return -EIO;
7176 }
7177
7178 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7179 opcode, type);
7180 return 0;
7181}
7182
7183#define hpsa_noop(p) hpsa_message(p, 3, 0)
7184
7185static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7186 void __iomem *vaddr, u32 use_doorbell)
7187{
7188
7189 if (use_doorbell) {
7190
7191
7192
7193
7194 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7195 writel(use_doorbell, vaddr + SA5_DOORBELL);
7196
7197
7198
7199
7200
7201
7202 msleep(10000);
7203 } else {
7204
7205
7206
7207
7208
7209
7210
7211
7212
7213 int rc = 0;
7214
7215 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7216
7217
7218 rc = pci_set_power_state(pdev, PCI_D3hot);
7219 if (rc)
7220 return rc;
7221
7222 msleep(500);
7223
7224
7225 rc = pci_set_power_state(pdev, PCI_D0);
7226 if (rc)
7227 return rc;
7228
7229
7230
7231
7232
7233
7234 msleep(500);
7235 }
7236 return 0;
7237}
7238
7239static void init_driver_version(char *driver_version, int len)
7240{
7241 memset(driver_version, 0, len);
7242 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7243}
7244
7245static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7246{
7247 char *driver_version;
7248 int i, size = sizeof(cfgtable->driver_version);
7249
7250 driver_version = kmalloc(size, GFP_KERNEL);
7251 if (!driver_version)
7252 return -ENOMEM;
7253
7254 init_driver_version(driver_version, size);
7255 for (i = 0; i < size; i++)
7256 writeb(driver_version[i], &cfgtable->driver_version[i]);
7257 kfree(driver_version);
7258 return 0;
7259}
7260
7261static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7262 unsigned char *driver_ver)
7263{
7264 int i;
7265
7266 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7267 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7268}
7269
7270static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7271{
7272
7273 char *driver_ver, *old_driver_ver;
7274 int rc, size = sizeof(cfgtable->driver_version);
7275
7276 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7277 if (!old_driver_ver)
7278 return -ENOMEM;
7279 driver_ver = old_driver_ver + size;
7280
7281
7282
7283
7284 init_driver_version(old_driver_ver, size);
7285 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7286 rc = !memcmp(driver_ver, old_driver_ver, size);
7287 kfree(old_driver_ver);
7288 return rc;
7289}
7290
7291
7292
7293static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7294{
7295 u64 cfg_offset;
7296 u32 cfg_base_addr;
7297 u64 cfg_base_addr_index;
7298 void __iomem *vaddr;
7299 unsigned long paddr;
7300 u32 misc_fw_support;
7301 int rc;
7302 struct CfgTable __iomem *cfgtable;
7303 u32 use_doorbell;
7304 u16 command_register;
7305
7306
7307
7308
7309
7310
7311
7312
7313
7314
7315
7316
7317
7318
7319 if (!ctlr_is_resettable(board_id)) {
7320 dev_warn(&pdev->dev, "Controller not resettable\n");
7321 return -ENODEV;
7322 }
7323
7324
7325 if (!ctlr_is_hard_resettable(board_id))
7326 return -ENOTSUPP;
7327
7328
7329 pci_read_config_word(pdev, 4, &command_register);
7330 pci_save_state(pdev);
7331
7332
7333 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7334 if (rc)
7335 return rc;
7336 vaddr = remap_pci_mem(paddr, 0x250);
7337 if (!vaddr)
7338 return -ENOMEM;
7339
7340
7341 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7342 &cfg_base_addr_index, &cfg_offset);
7343 if (rc)
7344 goto unmap_vaddr;
7345 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7346 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7347 if (!cfgtable) {
7348 rc = -ENOMEM;
7349 goto unmap_vaddr;
7350 }
7351 rc = write_driver_ver_to_cfgtable(cfgtable);
7352 if (rc)
7353 goto unmap_cfgtable;
7354
7355
7356
7357
7358 misc_fw_support = readl(&cfgtable->misc_fw_support);
7359 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7360 if (use_doorbell) {
7361 use_doorbell = DOORBELL_CTLR_RESET2;
7362 } else {
7363 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7364 if (use_doorbell) {
7365 dev_warn(&pdev->dev,
7366 "Soft reset not supported. Firmware update is required.\n");
7367 rc = -ENOTSUPP;
7368 goto unmap_cfgtable;
7369 }
7370 }
7371
7372 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7373 if (rc)
7374 goto unmap_cfgtable;
7375
7376 pci_restore_state(pdev);
7377 pci_write_config_word(pdev, 4, command_register);
7378
7379
7380
7381 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7382
7383 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7384 if (rc) {
7385 dev_warn(&pdev->dev,
7386 "Failed waiting for board to become ready after hard reset\n");
7387 goto unmap_cfgtable;
7388 }
7389
7390 rc = controller_reset_failed(vaddr);
7391 if (rc < 0)
7392 goto unmap_cfgtable;
7393 if (rc) {
7394 dev_warn(&pdev->dev, "Unable to successfully reset "
7395 "controller. Will try soft reset.\n");
7396 rc = -ENOTSUPP;
7397 } else {
7398 dev_info(&pdev->dev, "board ready after hard reset.\n");
7399 }
7400
7401unmap_cfgtable:
7402 iounmap(cfgtable);
7403
7404unmap_vaddr:
7405 iounmap(vaddr);
7406 return rc;
7407}
7408
7409
7410
7411
7412
7413
7414static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7415{
7416#ifdef HPSA_DEBUG
7417 int i;
7418 char temp_name[17];
7419
7420 dev_info(dev, "Controller Configuration information\n");
7421 dev_info(dev, "------------------------------------\n");
7422 for (i = 0; i < 4; i++)
7423 temp_name[i] = readb(&(tb->Signature[i]));
7424 temp_name[4] = '\0';
7425 dev_info(dev, " Signature = %s\n", temp_name);
7426 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7427 dev_info(dev, " Transport methods supported = 0x%x\n",
7428 readl(&(tb->TransportSupport)));
7429 dev_info(dev, " Transport methods active = 0x%x\n",
7430 readl(&(tb->TransportActive)));
7431 dev_info(dev, " Requested transport Method = 0x%x\n",
7432 readl(&(tb->HostWrite.TransportRequest)));
7433 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7434 readl(&(tb->HostWrite.CoalIntDelay)));
7435 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7436 readl(&(tb->HostWrite.CoalIntCount)));
7437 dev_info(dev, " Max outstanding commands = %d\n",
7438 readl(&(tb->CmdsOutMax)));
7439 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7440 for (i = 0; i < 16; i++)
7441 temp_name[i] = readb(&(tb->ServerName[i]));
7442 temp_name[16] = '\0';
7443 dev_info(dev, " Server Name = %s\n", temp_name);
7444 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7445 readl(&(tb->HeartBeat)));
7446#endif
7447}
7448
7449static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7450{
7451 int i, offset, mem_type, bar_type;
7452
7453 if (pci_bar_addr == PCI_BASE_ADDRESS_0)
7454 return 0;
7455 offset = 0;
7456 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7457 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7458 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7459 offset += 4;
7460 else {
7461 mem_type = pci_resource_flags(pdev, i) &
7462 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7463 switch (mem_type) {
7464 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7465 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7466 offset += 4;
7467 break;
7468 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7469 offset += 8;
7470 break;
7471 default:
7472 dev_warn(&pdev->dev,
7473 "base address is invalid\n");
7474 return -1;
7475 }
7476 }
7477 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7478 return i + 1;
7479 }
7480 return -1;
7481}
7482
7483static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7484{
7485 pci_free_irq_vectors(h->pdev);
7486 h->msix_vectors = 0;
7487}
7488
7489static void hpsa_setup_reply_map(struct ctlr_info *h)
7490{
7491 const struct cpumask *mask;
7492 unsigned int queue, cpu;
7493
7494 for (queue = 0; queue < h->msix_vectors; queue++) {
7495 mask = pci_irq_get_affinity(h->pdev, queue);
7496 if (!mask)
7497 goto fallback;
7498
7499 for_each_cpu(cpu, mask)
7500 h->reply_map[cpu] = queue;
7501 }
7502 return;
7503
7504fallback:
7505 for_each_possible_cpu(cpu)
7506 h->reply_map[cpu] = 0;
7507}
7508
7509
7510
7511
7512static int hpsa_interrupt_mode(struct ctlr_info *h)
7513{
7514 unsigned int flags = PCI_IRQ_LEGACY;
7515 int ret;
7516
7517
7518 switch (h->board_id) {
7519 case 0x40700E11:
7520 case 0x40800E11:
7521 case 0x40820E11:
7522 case 0x40830E11:
7523 break;
7524 default:
7525 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7526 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7527 if (ret > 0) {
7528 h->msix_vectors = ret;
7529 return 0;
7530 }
7531
7532 flags |= PCI_IRQ_MSI;
7533 break;
7534 }
7535
7536 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7537 if (ret < 0)
7538 return ret;
7539 return 0;
7540}
7541
7542static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7543 bool *legacy_board)
7544{
7545 int i;
7546 u32 subsystem_vendor_id, subsystem_device_id;
7547
7548 subsystem_vendor_id = pdev->subsystem_vendor;
7549 subsystem_device_id = pdev->subsystem_device;
7550 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7551 subsystem_vendor_id;
7552
7553 if (legacy_board)
7554 *legacy_board = false;
7555 for (i = 0; i < ARRAY_SIZE(products); i++)
7556 if (*board_id == products[i].board_id) {
7557 if (products[i].access != &SA5A_access &&
7558 products[i].access != &SA5B_access)
7559 return i;
7560 dev_warn(&pdev->dev,
7561 "legacy board ID: 0x%08x\n",
7562 *board_id);
7563 if (legacy_board)
7564 *legacy_board = true;
7565 return i;
7566 }
7567
7568 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7569 if (legacy_board)
7570 *legacy_board = true;
7571 return ARRAY_SIZE(products) - 1;
7572}
7573
7574static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7575 unsigned long *memory_bar)
7576{
7577 int i;
7578
7579 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7580 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7581
7582 *memory_bar = pci_resource_start(pdev, i);
7583 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7584 *memory_bar);
7585 return 0;
7586 }
7587 dev_warn(&pdev->dev, "no memory BAR found\n");
7588 return -ENODEV;
7589}
7590
7591static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7592 int wait_for_ready)
7593{
7594 int i, iterations;
7595 u32 scratchpad;
7596 if (wait_for_ready)
7597 iterations = HPSA_BOARD_READY_ITERATIONS;
7598 else
7599 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7600
7601 for (i = 0; i < iterations; i++) {
7602 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7603 if (wait_for_ready) {
7604 if (scratchpad == HPSA_FIRMWARE_READY)
7605 return 0;
7606 } else {
7607 if (scratchpad != HPSA_FIRMWARE_READY)
7608 return 0;
7609 }
7610 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7611 }
7612 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7613 return -ENODEV;
7614}
7615
7616static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7617 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7618 u64 *cfg_offset)
7619{
7620 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7621 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7622 *cfg_base_addr &= (u32) 0x0000ffff;
7623 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7624 if (*cfg_base_addr_index == -1) {
7625 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7626 return -ENODEV;
7627 }
7628 return 0;
7629}
7630
7631static void hpsa_free_cfgtables(struct ctlr_info *h)
7632{
7633 if (h->transtable) {
7634 iounmap(h->transtable);
7635 h->transtable = NULL;
7636 }
7637 if (h->cfgtable) {
7638 iounmap(h->cfgtable);
7639 h->cfgtable = NULL;
7640 }
7641}
7642
7643
7644
7645
7646static int hpsa_find_cfgtables(struct ctlr_info *h)
7647{
7648 u64 cfg_offset;
7649 u32 cfg_base_addr;
7650 u64 cfg_base_addr_index;
7651 u32 trans_offset;
7652 int rc;
7653
7654 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7655 &cfg_base_addr_index, &cfg_offset);
7656 if (rc)
7657 return rc;
7658 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7659 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7660 if (!h->cfgtable) {
7661 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7662 return -ENOMEM;
7663 }
7664 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7665 if (rc)
7666 return rc;
7667
7668 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7669 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7670 cfg_base_addr_index)+cfg_offset+trans_offset,
7671 sizeof(*h->transtable));
7672 if (!h->transtable) {
7673 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7674 hpsa_free_cfgtables(h);
7675 return -ENOMEM;
7676 }
7677 return 0;
7678}
7679
7680static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7681{
7682#define MIN_MAX_COMMANDS 16
7683 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7684
7685 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7686
7687
7688 if (reset_devices && h->max_commands > 32)
7689 h->max_commands = 32;
7690
7691 if (h->max_commands < MIN_MAX_COMMANDS) {
7692 dev_warn(&h->pdev->dev,
7693 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7694 h->max_commands,
7695 MIN_MAX_COMMANDS);
7696 h->max_commands = MIN_MAX_COMMANDS;
7697 }
7698}
7699
7700
7701
7702
7703
7704static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7705{
7706 return h->maxsgentries > 512;
7707}
7708
7709
7710
7711
7712
7713static void hpsa_find_board_params(struct ctlr_info *h)
7714{
7715 hpsa_get_max_perf_mode_cmds(h);
7716 h->nr_cmds = h->max_commands;
7717 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7718 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7719 if (hpsa_supports_chained_sg_blocks(h)) {
7720
7721 h->max_cmd_sg_entries = 32;
7722 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7723 h->maxsgentries--;
7724 } else {
7725
7726
7727
7728
7729
7730 h->max_cmd_sg_entries = 31;
7731 h->maxsgentries = 31;
7732 h->chainsize = 0;
7733 }
7734
7735
7736 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7737 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7738 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7739 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7740 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7741 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7742 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7743}
7744
7745static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7746{
7747 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7748 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7749 return false;
7750 }
7751 return true;
7752}
7753
7754static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7755{
7756 u32 driver_support;
7757
7758 driver_support = readl(&(h->cfgtable->driver_support));
7759
7760#ifdef CONFIG_X86
7761 driver_support |= ENABLE_SCSI_PREFETCH;
7762#endif
7763 driver_support |= ENABLE_UNIT_ATTN;
7764 writel(driver_support, &(h->cfgtable->driver_support));
7765}
7766
7767
7768
7769
7770static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7771{
7772 u32 dma_prefetch;
7773
7774 if (h->board_id != 0x3225103C)
7775 return;
7776 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7777 dma_prefetch |= 0x8000;
7778 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7779}
7780
7781static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7782{
7783 int i;
7784 u32 doorbell_value;
7785 unsigned long flags;
7786
7787 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7788 spin_lock_irqsave(&h->lock, flags);
7789 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7790 spin_unlock_irqrestore(&h->lock, flags);
7791 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7792 goto done;
7793
7794 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7795 }
7796 return -ENODEV;
7797done:
7798 return 0;
7799}
7800
7801static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7802{
7803 int i;
7804 u32 doorbell_value;
7805 unsigned long flags;
7806
7807
7808
7809
7810
7811 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7812 if (h->remove_in_progress)
7813 goto done;
7814 spin_lock_irqsave(&h->lock, flags);
7815 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7816 spin_unlock_irqrestore(&h->lock, flags);
7817 if (!(doorbell_value & CFGTBL_ChangeReq))
7818 goto done;
7819
7820 msleep(MODE_CHANGE_WAIT_INTERVAL);
7821 }
7822 return -ENODEV;
7823done:
7824 return 0;
7825}
7826
7827
7828static int hpsa_enter_simple_mode(struct ctlr_info *h)
7829{
7830 u32 trans_support;
7831
7832 trans_support = readl(&(h->cfgtable->TransportSupport));
7833 if (!(trans_support & SIMPLE_MODE))
7834 return -ENOTSUPP;
7835
7836 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7837
7838
7839 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7840 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7841 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7842 if (hpsa_wait_for_mode_change_ack(h))
7843 goto error;
7844 print_cfg_table(&h->pdev->dev, h->cfgtable);
7845 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7846 goto error;
7847 h->transMethod = CFGTBL_Trans_Simple;
7848 return 0;
7849error:
7850 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7851 return -ENODEV;
7852}
7853
7854
7855static void hpsa_free_pci_init(struct ctlr_info *h)
7856{
7857 hpsa_free_cfgtables(h);
7858 iounmap(h->vaddr);
7859 h->vaddr = NULL;
7860 hpsa_disable_interrupt_mode(h);
7861
7862
7863
7864
7865 pci_disable_device(h->pdev);
7866 pci_release_regions(h->pdev);
7867}
7868
7869
7870static int hpsa_pci_init(struct ctlr_info *h)
7871{
7872 int prod_index, err;
7873 bool legacy_board;
7874
7875 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7876 if (prod_index < 0)
7877 return prod_index;
7878 h->product_name = products[prod_index].product_name;
7879 h->access = *(products[prod_index].access);
7880 h->legacy_board = legacy_board;
7881 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7882 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7883
7884 err = pci_enable_device(h->pdev);
7885 if (err) {
7886 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7887 pci_disable_device(h->pdev);
7888 return err;
7889 }
7890
7891 err = pci_request_regions(h->pdev, HPSA);
7892 if (err) {
7893 dev_err(&h->pdev->dev,
7894 "failed to obtain PCI resources\n");
7895 pci_disable_device(h->pdev);
7896 return err;
7897 }
7898
7899 pci_set_master(h->pdev);
7900
7901 err = hpsa_interrupt_mode(h);
7902 if (err)
7903 goto clean1;
7904
7905
7906 hpsa_setup_reply_map(h);
7907
7908 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7909 if (err)
7910 goto clean2;
7911 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7912 if (!h->vaddr) {
7913 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7914 err = -ENOMEM;
7915 goto clean2;
7916 }
7917 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7918 if (err)
7919 goto clean3;
7920 err = hpsa_find_cfgtables(h);
7921 if (err)
7922 goto clean3;
7923 hpsa_find_board_params(h);
7924
7925 if (!hpsa_CISS_signature_present(h)) {
7926 err = -ENODEV;
7927 goto clean4;
7928 }
7929 hpsa_set_driver_support_bits(h);
7930 hpsa_p600_dma_prefetch_quirk(h);
7931 err = hpsa_enter_simple_mode(h);
7932 if (err)
7933 goto clean4;
7934 return 0;
7935
7936clean4:
7937 hpsa_free_cfgtables(h);
7938clean3:
7939 iounmap(h->vaddr);
7940 h->vaddr = NULL;
7941clean2:
7942 hpsa_disable_interrupt_mode(h);
7943clean1:
7944
7945
7946
7947
7948 pci_disable_device(h->pdev);
7949 pci_release_regions(h->pdev);
7950 return err;
7951}
7952
7953static void hpsa_hba_inquiry(struct ctlr_info *h)
7954{
7955 int rc;
7956
7957#define HBA_INQUIRY_BYTE_COUNT 64
7958 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7959 if (!h->hba_inquiry_data)
7960 return;
7961 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7962 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7963 if (rc != 0) {
7964 kfree(h->hba_inquiry_data);
7965 h->hba_inquiry_data = NULL;
7966 }
7967}
7968
7969static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7970{
7971 int rc, i;
7972 void __iomem *vaddr;
7973
7974 if (!reset_devices)
7975 return 0;
7976
7977
7978
7979
7980
7981 rc = pci_enable_device(pdev);
7982 if (rc) {
7983 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7984 return -ENODEV;
7985 }
7986 pci_disable_device(pdev);
7987 msleep(260);
7988 rc = pci_enable_device(pdev);
7989 if (rc) {
7990 dev_warn(&pdev->dev, "failed to enable device.\n");
7991 return -ENODEV;
7992 }
7993
7994 pci_set_master(pdev);
7995
7996 vaddr = pci_ioremap_bar(pdev, 0);
7997 if (vaddr == NULL) {
7998 rc = -ENOMEM;
7999 goto out_disable;
8000 }
8001 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
8002 iounmap(vaddr);
8003
8004
8005 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8006
8007
8008
8009
8010
8011
8012 if (rc)
8013 goto out_disable;
8014
8015
8016 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8017 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8018 if (hpsa_noop(pdev) == 0)
8019 break;
8020 else
8021 dev_warn(&pdev->dev, "no-op failed%s\n",
8022 (i < 11 ? "; re-trying" : ""));
8023 }
8024
8025out_disable:
8026
8027 pci_disable_device(pdev);
8028 return rc;
8029}
8030
8031static void hpsa_free_cmd_pool(struct ctlr_info *h)
8032{
8033 kfree(h->cmd_pool_bits);
8034 h->cmd_pool_bits = NULL;
8035 if (h->cmd_pool) {
8036 dma_free_coherent(&h->pdev->dev,
8037 h->nr_cmds * sizeof(struct CommandList),
8038 h->cmd_pool,
8039 h->cmd_pool_dhandle);
8040 h->cmd_pool = NULL;
8041 h->cmd_pool_dhandle = 0;
8042 }
8043 if (h->errinfo_pool) {
8044 dma_free_coherent(&h->pdev->dev,
8045 h->nr_cmds * sizeof(struct ErrorInfo),
8046 h->errinfo_pool,
8047 h->errinfo_pool_dhandle);
8048 h->errinfo_pool = NULL;
8049 h->errinfo_pool_dhandle = 0;
8050 }
8051}
8052
8053static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8054{
8055 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
8056 sizeof(unsigned long),
8057 GFP_KERNEL);
8058 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8059 h->nr_cmds * sizeof(*h->cmd_pool),
8060 &h->cmd_pool_dhandle, GFP_KERNEL);
8061 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8062 h->nr_cmds * sizeof(*h->errinfo_pool),
8063 &h->errinfo_pool_dhandle, GFP_KERNEL);
8064 if ((h->cmd_pool_bits == NULL)
8065 || (h->cmd_pool == NULL)
8066 || (h->errinfo_pool == NULL)) {
8067 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8068 goto clean_up;
8069 }
8070 hpsa_preinitialize_commands(h);
8071 return 0;
8072clean_up:
8073 hpsa_free_cmd_pool(h);
8074 return -ENOMEM;
8075}
8076
8077
8078static void hpsa_free_irqs(struct ctlr_info *h)
8079{
8080 int i;
8081 int irq_vector = 0;
8082
8083 if (hpsa_simple_mode)
8084 irq_vector = h->intr_mode;
8085
8086 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8087
8088 free_irq(pci_irq_vector(h->pdev, irq_vector),
8089 &h->q[h->intr_mode]);
8090 h->q[h->intr_mode] = 0;
8091 return;
8092 }
8093
8094 for (i = 0; i < h->msix_vectors; i++) {
8095 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8096 h->q[i] = 0;
8097 }
8098 for (; i < MAX_REPLY_QUEUES; i++)
8099 h->q[i] = 0;
8100}
8101
8102
8103static int hpsa_request_irqs(struct ctlr_info *h,
8104 irqreturn_t (*msixhandler)(int, void *),
8105 irqreturn_t (*intxhandler)(int, void *))
8106{
8107 int rc, i;
8108 int irq_vector = 0;
8109
8110 if (hpsa_simple_mode)
8111 irq_vector = h->intr_mode;
8112
8113
8114
8115
8116
8117 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8118 h->q[i] = (u8) i;
8119
8120 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8121
8122 for (i = 0; i < h->msix_vectors; i++) {
8123 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8124 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8125 0, h->intrname[i],
8126 &h->q[i]);
8127 if (rc) {
8128 int j;
8129
8130 dev_err(&h->pdev->dev,
8131 "failed to get irq %d for %s\n",
8132 pci_irq_vector(h->pdev, i), h->devname);
8133 for (j = 0; j < i; j++) {
8134 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8135 h->q[j] = 0;
8136 }
8137 for (; j < MAX_REPLY_QUEUES; j++)
8138 h->q[j] = 0;
8139 return rc;
8140 }
8141 }
8142 } else {
8143
8144 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8145 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8146 h->msix_vectors ? "x" : "");
8147 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8148 msixhandler, 0,
8149 h->intrname[0],
8150 &h->q[h->intr_mode]);
8151 } else {
8152 sprintf(h->intrname[h->intr_mode],
8153 "%s-intx", h->devname);
8154 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8155 intxhandler, IRQF_SHARED,
8156 h->intrname[0],
8157 &h->q[h->intr_mode]);
8158 }
8159 }
8160 if (rc) {
8161 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8162 pci_irq_vector(h->pdev, irq_vector), h->devname);
8163 hpsa_free_irqs(h);
8164 return -ENODEV;
8165 }
8166 return 0;
8167}
8168
8169static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8170{
8171 int rc;
8172 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8173
8174 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8175 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8176 if (rc) {
8177 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8178 return rc;
8179 }
8180
8181 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8182 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8183 if (rc) {
8184 dev_warn(&h->pdev->dev, "Board failed to become ready "
8185 "after soft reset.\n");
8186 return rc;
8187 }
8188
8189 return 0;
8190}
8191
8192static void hpsa_free_reply_queues(struct ctlr_info *h)
8193{
8194 int i;
8195
8196 for (i = 0; i < h->nreply_queues; i++) {
8197 if (!h->reply_queue[i].head)
8198 continue;
8199 dma_free_coherent(&h->pdev->dev,
8200 h->reply_queue_size,
8201 h->reply_queue[i].head,
8202 h->reply_queue[i].busaddr);
8203 h->reply_queue[i].head = NULL;
8204 h->reply_queue[i].busaddr = 0;
8205 }
8206 h->reply_queue_size = 0;
8207}
8208
8209static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8210{
8211 hpsa_free_performant_mode(h);
8212 hpsa_free_sg_chain_blocks(h);
8213 hpsa_free_cmd_pool(h);
8214 hpsa_free_irqs(h);
8215 scsi_host_put(h->scsi_host);
8216 h->scsi_host = NULL;
8217 hpsa_free_pci_init(h);
8218 free_percpu(h->lockup_detected);
8219 h->lockup_detected = NULL;
8220 if (h->resubmit_wq) {
8221 destroy_workqueue(h->resubmit_wq);
8222 h->resubmit_wq = NULL;
8223 }
8224 if (h->rescan_ctlr_wq) {
8225 destroy_workqueue(h->rescan_ctlr_wq);
8226 h->rescan_ctlr_wq = NULL;
8227 }
8228 if (h->monitor_ctlr_wq) {
8229 destroy_workqueue(h->monitor_ctlr_wq);
8230 h->monitor_ctlr_wq = NULL;
8231 }
8232
8233 kfree(h);
8234}
8235
8236
8237static void fail_all_outstanding_cmds(struct ctlr_info *h)
8238{
8239 int i, refcount;
8240 struct CommandList *c;
8241 int failcount = 0;
8242
8243 flush_workqueue(h->resubmit_wq);
8244 for (i = 0; i < h->nr_cmds; i++) {
8245 c = h->cmd_pool + i;
8246 refcount = atomic_inc_return(&c->refcount);
8247 if (refcount > 1) {
8248 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8249 finish_cmd(c);
8250 atomic_dec(&h->commands_outstanding);
8251 failcount++;
8252 }
8253 cmd_free(h, c);
8254 }
8255 dev_warn(&h->pdev->dev,
8256 "failed %d commands in fail_all\n", failcount);
8257}
8258
8259static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8260{
8261 int cpu;
8262
8263 for_each_online_cpu(cpu) {
8264 u32 *lockup_detected;
8265 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8266 *lockup_detected = value;
8267 }
8268 wmb();
8269}
8270
8271static void controller_lockup_detected(struct ctlr_info *h)
8272{
8273 unsigned long flags;
8274 u32 lockup_detected;
8275
8276 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8277 spin_lock_irqsave(&h->lock, flags);
8278 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8279 if (!lockup_detected) {
8280
8281 dev_warn(&h->pdev->dev,
8282 "lockup detected after %d but scratchpad register is zero\n",
8283 h->heartbeat_sample_interval / HZ);
8284 lockup_detected = 0xffffffff;
8285 }
8286 set_lockup_detected_for_all_cpus(h, lockup_detected);
8287 spin_unlock_irqrestore(&h->lock, flags);
8288 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8289 lockup_detected, h->heartbeat_sample_interval / HZ);
8290 if (lockup_detected == 0xffff0000) {
8291 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8292 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8293 }
8294 pci_disable_device(h->pdev);
8295 fail_all_outstanding_cmds(h);
8296}
8297
8298static int detect_controller_lockup(struct ctlr_info *h)
8299{
8300 u64 now;
8301 u32 heartbeat;
8302 unsigned long flags;
8303
8304 now = get_jiffies_64();
8305
8306 if (time_after64(h->last_intr_timestamp +
8307 (h->heartbeat_sample_interval), now))
8308 return false;
8309
8310
8311
8312
8313
8314
8315 if (time_after64(h->last_heartbeat_timestamp +
8316 (h->heartbeat_sample_interval), now))
8317 return false;
8318
8319
8320 spin_lock_irqsave(&h->lock, flags);
8321 heartbeat = readl(&h->cfgtable->HeartBeat);
8322 spin_unlock_irqrestore(&h->lock, flags);
8323 if (h->last_heartbeat == heartbeat) {
8324 controller_lockup_detected(h);
8325 return true;
8326 }
8327
8328
8329 h->last_heartbeat = heartbeat;
8330 h->last_heartbeat_timestamp = now;
8331 return false;
8332}
8333
8334
8335
8336
8337
8338
8339
8340
8341
8342
8343static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8344{
8345 int rc;
8346 int i;
8347 u8 ioaccel_status;
8348 unsigned char *buf;
8349 struct hpsa_scsi_dev_t *device;
8350
8351 if (!h)
8352 return;
8353
8354 buf = kmalloc(64, GFP_KERNEL);
8355 if (!buf)
8356 return;
8357
8358
8359
8360
8361 for (i = 0; i < h->ndevices; i++) {
8362 int offload_to_be_enabled = 0;
8363 int offload_config = 0;
8364
8365 device = h->dev[i];
8366
8367 if (!device)
8368 continue;
8369 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8370 HPSA_VPD_LV_IOACCEL_STATUS))
8371 continue;
8372
8373 memset(buf, 0, 64);
8374
8375 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8376 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8377 buf, 64);
8378 if (rc != 0)
8379 continue;
8380
8381 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8382
8383
8384
8385
8386 offload_config =
8387 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8388
8389
8390
8391
8392 if (offload_config)
8393 offload_to_be_enabled =
8394 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8395
8396
8397
8398
8399
8400
8401 if (offload_to_be_enabled)
8402 continue;
8403
8404
8405
8406
8407
8408
8409
8410 hpsa_turn_off_ioaccel_for_device(device);
8411 }
8412
8413 kfree(buf);
8414}
8415
8416static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8417{
8418 char *event_type;
8419
8420 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8421 return;
8422
8423
8424 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8425 | CFGTBL_Trans_io_accel2)) &&
8426 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8427 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8428
8429 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8430 event_type = "state change";
8431 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8432 event_type = "configuration change";
8433
8434 scsi_block_requests(h->scsi_host);
8435 hpsa_set_ioaccel_status(h);
8436 hpsa_drain_accel_commands(h);
8437
8438 dev_warn(&h->pdev->dev,
8439 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8440 h->events, event_type);
8441 writel(h->events, &(h->cfgtable->clear_event_notify));
8442
8443 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8444
8445 hpsa_wait_for_clear_event_notify_ack(h);
8446 scsi_unblock_requests(h->scsi_host);
8447 } else {
8448
8449 writel(h->events, &(h->cfgtable->clear_event_notify));
8450 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8451 hpsa_wait_for_clear_event_notify_ack(h);
8452 }
8453 return;
8454}
8455
8456
8457
8458
8459
8460
8461static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8462{
8463 if (h->drv_req_rescan) {
8464 h->drv_req_rescan = 0;
8465 return 1;
8466 }
8467
8468 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8469 return 0;
8470
8471 h->events = readl(&(h->cfgtable->event_notify));
8472 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8473}
8474
8475
8476
8477
8478static int hpsa_offline_devices_ready(struct ctlr_info *h)
8479{
8480 unsigned long flags;
8481 struct offline_device_entry *d;
8482 struct list_head *this, *tmp;
8483
8484 spin_lock_irqsave(&h->offline_device_lock, flags);
8485 list_for_each_safe(this, tmp, &h->offline_device_list) {
8486 d = list_entry(this, struct offline_device_entry,
8487 offline_list);
8488 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8489 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8490 spin_lock_irqsave(&h->offline_device_lock, flags);
8491 list_del(&d->offline_list);
8492 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8493 return 1;
8494 }
8495 spin_lock_irqsave(&h->offline_device_lock, flags);
8496 }
8497 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8498 return 0;
8499}
8500
8501static int hpsa_luns_changed(struct ctlr_info *h)
8502{
8503 int rc = 1;
8504 struct ReportLUNdata *logdev = NULL;
8505
8506
8507
8508
8509
8510 if (!h->lastlogicals)
8511 return rc;
8512
8513 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8514 if (!logdev)
8515 return rc;
8516
8517 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8518 dev_warn(&h->pdev->dev,
8519 "report luns failed, can't track lun changes.\n");
8520 goto out;
8521 }
8522 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8523 dev_info(&h->pdev->dev,
8524 "Lun changes detected.\n");
8525 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8526 goto out;
8527 } else
8528 rc = 0;
8529out:
8530 kfree(logdev);
8531 return rc;
8532}
8533
8534static void hpsa_perform_rescan(struct ctlr_info *h)
8535{
8536 struct Scsi_Host *sh = NULL;
8537 unsigned long flags;
8538
8539
8540
8541
8542 spin_lock_irqsave(&h->reset_lock, flags);
8543 if (h->reset_in_progress) {
8544 h->drv_req_rescan = 1;
8545 spin_unlock_irqrestore(&h->reset_lock, flags);
8546 return;
8547 }
8548 spin_unlock_irqrestore(&h->reset_lock, flags);
8549
8550 sh = scsi_host_get(h->scsi_host);
8551 if (sh != NULL) {
8552 hpsa_scan_start(sh);
8553 scsi_host_put(sh);
8554 h->drv_req_rescan = 0;
8555 }
8556}
8557
8558
8559
8560
8561static void hpsa_event_monitor_worker(struct work_struct *work)
8562{
8563 struct ctlr_info *h = container_of(to_delayed_work(work),
8564 struct ctlr_info, event_monitor_work);
8565 unsigned long flags;
8566
8567 spin_lock_irqsave(&h->lock, flags);
8568 if (h->remove_in_progress) {
8569 spin_unlock_irqrestore(&h->lock, flags);
8570 return;
8571 }
8572 spin_unlock_irqrestore(&h->lock, flags);
8573
8574 if (hpsa_ctlr_needs_rescan(h)) {
8575 hpsa_ack_ctlr_events(h);
8576 hpsa_perform_rescan(h);
8577 }
8578
8579 spin_lock_irqsave(&h->lock, flags);
8580 if (!h->remove_in_progress)
8581 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8582 HPSA_EVENT_MONITOR_INTERVAL);
8583 spin_unlock_irqrestore(&h->lock, flags);
8584}
8585
8586static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8587{
8588 unsigned long flags;
8589 struct ctlr_info *h = container_of(to_delayed_work(work),
8590 struct ctlr_info, rescan_ctlr_work);
8591
8592 spin_lock_irqsave(&h->lock, flags);
8593 if (h->remove_in_progress) {
8594 spin_unlock_irqrestore(&h->lock, flags);
8595 return;
8596 }
8597 spin_unlock_irqrestore(&h->lock, flags);
8598
8599 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8600 hpsa_perform_rescan(h);
8601 } else if (h->discovery_polling) {
8602 if (hpsa_luns_changed(h)) {
8603 dev_info(&h->pdev->dev,
8604 "driver discovery polling rescan.\n");
8605 hpsa_perform_rescan(h);
8606 }
8607 }
8608 spin_lock_irqsave(&h->lock, flags);
8609 if (!h->remove_in_progress)
8610 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8611 h->heartbeat_sample_interval);
8612 spin_unlock_irqrestore(&h->lock, flags);
8613}
8614
8615static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8616{
8617 unsigned long flags;
8618 struct ctlr_info *h = container_of(to_delayed_work(work),
8619 struct ctlr_info, monitor_ctlr_work);
8620
8621 detect_controller_lockup(h);
8622 if (lockup_detected(h))
8623 return;
8624
8625 spin_lock_irqsave(&h->lock, flags);
8626 if (!h->remove_in_progress)
8627 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8628 h->heartbeat_sample_interval);
8629 spin_unlock_irqrestore(&h->lock, flags);
8630}
8631
8632static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8633 char *name)
8634{
8635 struct workqueue_struct *wq = NULL;
8636
8637 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8638 if (!wq)
8639 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8640
8641 return wq;
8642}
8643
8644static void hpda_free_ctlr_info(struct ctlr_info *h)
8645{
8646 kfree(h->reply_map);
8647 kfree(h);
8648}
8649
8650static struct ctlr_info *hpda_alloc_ctlr_info(void)
8651{
8652 struct ctlr_info *h;
8653
8654 h = kzalloc(sizeof(*h), GFP_KERNEL);
8655 if (!h)
8656 return NULL;
8657
8658 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8659 if (!h->reply_map) {
8660 kfree(h);
8661 return NULL;
8662 }
8663 return h;
8664}
8665
8666static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8667{
8668 int rc;
8669 struct ctlr_info *h;
8670 int try_soft_reset = 0;
8671 unsigned long flags;
8672 u32 board_id;
8673
8674 if (number_of_controllers == 0)
8675 printk(KERN_INFO DRIVER_NAME "\n");
8676
8677 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8678 if (rc < 0) {
8679 dev_warn(&pdev->dev, "Board ID not found\n");
8680 return rc;
8681 }
8682
8683 rc = hpsa_init_reset_devices(pdev, board_id);
8684 if (rc) {
8685 if (rc != -ENOTSUPP)
8686 return rc;
8687
8688
8689
8690
8691
8692 try_soft_reset = 1;
8693 rc = 0;
8694 }
8695
8696reinit_after_soft_reset:
8697
8698
8699
8700
8701
8702 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8703 h = hpda_alloc_ctlr_info();
8704 if (!h) {
8705 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8706 return -ENOMEM;
8707 }
8708
8709 h->pdev = pdev;
8710
8711 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8712 INIT_LIST_HEAD(&h->offline_device_list);
8713 spin_lock_init(&h->lock);
8714 spin_lock_init(&h->offline_device_lock);
8715 spin_lock_init(&h->scan_lock);
8716 spin_lock_init(&h->reset_lock);
8717 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8718
8719
8720 h->lockup_detected = alloc_percpu(u32);
8721 if (!h->lockup_detected) {
8722 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8723 rc = -ENOMEM;
8724 goto clean1;
8725 }
8726 set_lockup_detected_for_all_cpus(h, 0);
8727
8728 rc = hpsa_pci_init(h);
8729 if (rc)
8730 goto clean2;
8731
8732
8733
8734 rc = hpsa_scsi_host_alloc(h);
8735 if (rc)
8736 goto clean2_5;
8737
8738 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8739 h->ctlr = number_of_controllers;
8740 number_of_controllers++;
8741
8742
8743 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8744 if (rc != 0) {
8745 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8746 if (rc != 0) {
8747 dev_err(&pdev->dev, "no suitable DMA available\n");
8748 goto clean3;
8749 }
8750 }
8751
8752
8753 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8754
8755 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8756 if (rc)
8757 goto clean3;
8758 rc = hpsa_alloc_cmd_pool(h);
8759 if (rc)
8760 goto clean4;
8761 rc = hpsa_alloc_sg_chain_blocks(h);
8762 if (rc)
8763 goto clean5;
8764 init_waitqueue_head(&h->scan_wait_queue);
8765 init_waitqueue_head(&h->event_sync_wait_queue);
8766 mutex_init(&h->reset_mutex);
8767 h->scan_finished = 1;
8768 h->scan_waiting = 0;
8769
8770 pci_set_drvdata(pdev, h);
8771 h->ndevices = 0;
8772
8773 spin_lock_init(&h->devlock);
8774 rc = hpsa_put_ctlr_into_performant_mode(h);
8775 if (rc)
8776 goto clean6;
8777
8778
8779 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8780 if (!h->rescan_ctlr_wq) {
8781 rc = -ENOMEM;
8782 goto clean7;
8783 }
8784
8785 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8786 if (!h->resubmit_wq) {
8787 rc = -ENOMEM;
8788 goto clean7;
8789 }
8790
8791 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8792 if (!h->monitor_ctlr_wq) {
8793 rc = -ENOMEM;
8794 goto clean7;
8795 }
8796
8797
8798
8799
8800
8801
8802 if (try_soft_reset) {
8803
8804
8805
8806
8807
8808
8809
8810
8811 spin_lock_irqsave(&h->lock, flags);
8812 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8813 spin_unlock_irqrestore(&h->lock, flags);
8814 hpsa_free_irqs(h);
8815 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8816 hpsa_intx_discard_completions);
8817 if (rc) {
8818 dev_warn(&h->pdev->dev,
8819 "Failed to request_irq after soft reset.\n");
8820
8821
8822
8823
8824 hpsa_free_performant_mode(h);
8825 hpsa_free_sg_chain_blocks(h);
8826 hpsa_free_cmd_pool(h);
8827
8828
8829
8830
8831 goto clean3;
8832 }
8833
8834 rc = hpsa_kdump_soft_reset(h);
8835 if (rc)
8836
8837 goto clean7;
8838
8839 dev_info(&h->pdev->dev, "Board READY.\n");
8840 dev_info(&h->pdev->dev,
8841 "Waiting for stale completions to drain.\n");
8842 h->access.set_intr_mask(h, HPSA_INTR_ON);
8843 msleep(10000);
8844 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8845
8846 rc = controller_reset_failed(h->cfgtable);
8847 if (rc)
8848 dev_info(&h->pdev->dev,
8849 "Soft reset appears to have failed.\n");
8850
8851
8852
8853
8854
8855 hpsa_undo_allocations_after_kdump_soft_reset(h);
8856 try_soft_reset = 0;
8857 if (rc)
8858
8859 return -ENODEV;
8860
8861 goto reinit_after_soft_reset;
8862 }
8863
8864
8865 h->acciopath_status = 1;
8866
8867 h->discovery_polling = 0;
8868
8869
8870
8871 h->access.set_intr_mask(h, HPSA_INTR_ON);
8872
8873 hpsa_hba_inquiry(h);
8874
8875 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8876 if (!h->lastlogicals)
8877 dev_info(&h->pdev->dev,
8878 "Can't track change to report lun data\n");
8879
8880
8881 rc = hpsa_scsi_add_host(h);
8882 if (rc)
8883 goto clean8;
8884
8885
8886 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8887 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8888 schedule_delayed_work(&h->monitor_ctlr_work,
8889 h->heartbeat_sample_interval);
8890 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8891 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8892 h->heartbeat_sample_interval);
8893 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8894 schedule_delayed_work(&h->event_monitor_work,
8895 HPSA_EVENT_MONITOR_INTERVAL);
8896 return 0;
8897
8898clean8:
8899 kfree(h->lastlogicals);
8900clean7:
8901 hpsa_free_performant_mode(h);
8902 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8903clean6:
8904 hpsa_free_sg_chain_blocks(h);
8905clean5:
8906 hpsa_free_cmd_pool(h);
8907clean4:
8908 hpsa_free_irqs(h);
8909clean3:
8910 scsi_host_put(h->scsi_host);
8911 h->scsi_host = NULL;
8912clean2_5:
8913 hpsa_free_pci_init(h);
8914clean2:
8915 if (h->lockup_detected) {
8916 free_percpu(h->lockup_detected);
8917 h->lockup_detected = NULL;
8918 }
8919clean1:
8920 if (h->resubmit_wq) {
8921 destroy_workqueue(h->resubmit_wq);
8922 h->resubmit_wq = NULL;
8923 }
8924 if (h->rescan_ctlr_wq) {
8925 destroy_workqueue(h->rescan_ctlr_wq);
8926 h->rescan_ctlr_wq = NULL;
8927 }
8928 if (h->monitor_ctlr_wq) {
8929 destroy_workqueue(h->monitor_ctlr_wq);
8930 h->monitor_ctlr_wq = NULL;
8931 }
8932 kfree(h);
8933 return rc;
8934}
8935
8936static void hpsa_flush_cache(struct ctlr_info *h)
8937{
8938 char *flush_buf;
8939 struct CommandList *c;
8940 int rc;
8941
8942 if (unlikely(lockup_detected(h)))
8943 return;
8944 flush_buf = kzalloc(4, GFP_KERNEL);
8945 if (!flush_buf)
8946 return;
8947
8948 c = cmd_alloc(h);
8949
8950 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8951 RAID_CTLR_LUNID, TYPE_CMD)) {
8952 goto out;
8953 }
8954 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8955 DEFAULT_TIMEOUT);
8956 if (rc)
8957 goto out;
8958 if (c->err_info->CommandStatus != 0)
8959out:
8960 dev_warn(&h->pdev->dev,
8961 "error flushing cache on controller\n");
8962 cmd_free(h, c);
8963 kfree(flush_buf);
8964}
8965
8966
8967
8968
8969static void hpsa_disable_rld_caching(struct ctlr_info *h)
8970{
8971 u32 *options;
8972 struct CommandList *c;
8973 int rc;
8974
8975
8976 if (unlikely(h->lockup_detected))
8977 return;
8978
8979 options = kzalloc(sizeof(*options), GFP_KERNEL);
8980 if (!options)
8981 return;
8982
8983 c = cmd_alloc(h);
8984
8985
8986 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8987 RAID_CTLR_LUNID, TYPE_CMD))
8988 goto errout;
8989
8990 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8991 NO_TIMEOUT);
8992 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8993 goto errout;
8994
8995
8996 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8997
8998 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8999 RAID_CTLR_LUNID, TYPE_CMD))
9000 goto errout;
9001
9002 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
9003 NO_TIMEOUT);
9004 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9005 goto errout;
9006
9007
9008 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9009 RAID_CTLR_LUNID, TYPE_CMD))
9010 goto errout;
9011
9012 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
9013 NO_TIMEOUT);
9014 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9015 goto errout;
9016
9017 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9018 goto out;
9019
9020errout:
9021 dev_err(&h->pdev->dev,
9022 "Error: failed to disable report lun data caching.\n");
9023out:
9024 cmd_free(h, c);
9025 kfree(options);
9026}
9027
9028static void __hpsa_shutdown(struct pci_dev *pdev)
9029{
9030 struct ctlr_info *h;
9031
9032 h = pci_get_drvdata(pdev);
9033
9034
9035
9036
9037 hpsa_flush_cache(h);
9038 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9039 hpsa_free_irqs(h);
9040 hpsa_disable_interrupt_mode(h);
9041}
9042
9043static void hpsa_shutdown(struct pci_dev *pdev)
9044{
9045 __hpsa_shutdown(pdev);
9046 pci_disable_device(pdev);
9047}
9048
9049static void hpsa_free_device_info(struct ctlr_info *h)
9050{
9051 int i;
9052
9053 for (i = 0; i < h->ndevices; i++) {
9054 kfree(h->dev[i]);
9055 h->dev[i] = NULL;
9056 }
9057}
9058
9059static void hpsa_remove_one(struct pci_dev *pdev)
9060{
9061 struct ctlr_info *h;
9062 unsigned long flags;
9063
9064 if (pci_get_drvdata(pdev) == NULL) {
9065 dev_err(&pdev->dev, "unable to remove device\n");
9066 return;
9067 }
9068 h = pci_get_drvdata(pdev);
9069
9070
9071 spin_lock_irqsave(&h->lock, flags);
9072 h->remove_in_progress = 1;
9073 spin_unlock_irqrestore(&h->lock, flags);
9074 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9075 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9076 cancel_delayed_work_sync(&h->event_monitor_work);
9077 destroy_workqueue(h->rescan_ctlr_wq);
9078 destroy_workqueue(h->resubmit_wq);
9079 destroy_workqueue(h->monitor_ctlr_wq);
9080
9081 hpsa_delete_sas_host(h);
9082
9083
9084
9085
9086
9087
9088
9089 if (h->scsi_host)
9090 scsi_remove_host(h->scsi_host);
9091
9092
9093 __hpsa_shutdown(pdev);
9094
9095 hpsa_free_device_info(h);
9096
9097 kfree(h->hba_inquiry_data);
9098 h->hba_inquiry_data = NULL;
9099 hpsa_free_ioaccel2_sg_chain_blocks(h);
9100 hpsa_free_performant_mode(h);
9101 hpsa_free_sg_chain_blocks(h);
9102 hpsa_free_cmd_pool(h);
9103 kfree(h->lastlogicals);
9104
9105
9106
9107 scsi_host_put(h->scsi_host);
9108 h->scsi_host = NULL;
9109
9110
9111 hpsa_free_pci_init(h);
9112
9113 free_percpu(h->lockup_detected);
9114 h->lockup_detected = NULL;
9115
9116
9117 hpda_free_ctlr_info(h);
9118}
9119
9120static int __maybe_unused hpsa_suspend(
9121 __attribute__((unused)) struct device *dev)
9122{
9123 return -ENOSYS;
9124}
9125
9126static int __maybe_unused hpsa_resume
9127 (__attribute__((unused)) struct device *dev)
9128{
9129 return -ENOSYS;
9130}
9131
9132static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume);
9133
9134static struct pci_driver hpsa_pci_driver = {
9135 .name = HPSA,
9136 .probe = hpsa_init_one,
9137 .remove = hpsa_remove_one,
9138 .id_table = hpsa_pci_device_id,
9139 .shutdown = hpsa_shutdown,
9140 .driver.pm = &hpsa_pm_ops,
9141};
9142
9143
9144
9145
9146
9147
9148
9149
9150
9151
9152
9153
9154
9155static void calc_bucket_map(int bucket[], int num_buckets,
9156 int nsgs, int min_blocks, u32 *bucket_map)
9157{
9158 int i, j, b, size;
9159
9160
9161 for (i = 0; i <= nsgs; i++) {
9162
9163 size = i + min_blocks;
9164 b = num_buckets;
9165
9166 for (j = 0; j < num_buckets; j++) {
9167 if (bucket[j] >= size) {
9168 b = j;
9169 break;
9170 }
9171 }
9172
9173 bucket_map[i] = b;
9174 }
9175}
9176
9177
9178
9179
9180
9181static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9182{
9183 int i;
9184 unsigned long register_value;
9185 unsigned long transMethod = CFGTBL_Trans_Performant |
9186 (trans_support & CFGTBL_Trans_use_short_tags) |
9187 CFGTBL_Trans_enable_directed_msix |
9188 (trans_support & (CFGTBL_Trans_io_accel1 |
9189 CFGTBL_Trans_io_accel2));
9190 struct access_method access = SA5_performant_access;
9191
9192
9193
9194
9195
9196
9197
9198
9199
9200
9201
9202
9203
9204
9205
9206
9207
9208
9209 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9210#define MIN_IOACCEL2_BFT_ENTRY 5
9211#define HPSA_IOACCEL2_HEADER_SZ 4
9212 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9213 13, 14, 15, 16, 17, 18, 19,
9214 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9215 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9216 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9217 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9218 16 * MIN_IOACCEL2_BFT_ENTRY);
9219 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9220 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9221
9222
9223
9224
9225
9226
9227
9228
9229
9230
9231 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9232 access = SA5_performant_access_no_read;
9233
9234
9235 for (i = 0; i < h->nreply_queues; i++)
9236 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9237
9238 bft[7] = SG_ENTRIES_IN_CMD + 4;
9239 calc_bucket_map(bft, ARRAY_SIZE(bft),
9240 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9241 for (i = 0; i < 8; i++)
9242 writel(bft[i], &h->transtable->BlockFetch[i]);
9243
9244
9245 writel(h->max_commands, &h->transtable->RepQSize);
9246 writel(h->nreply_queues, &h->transtable->RepQCount);
9247 writel(0, &h->transtable->RepQCtrAddrLow32);
9248 writel(0, &h->transtable->RepQCtrAddrHigh32);
9249
9250 for (i = 0; i < h->nreply_queues; i++) {
9251 writel(0, &h->transtable->RepQAddr[i].upper);
9252 writel(h->reply_queue[i].busaddr,
9253 &h->transtable->RepQAddr[i].lower);
9254 }
9255
9256 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9257 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9258
9259
9260
9261 if (trans_support & CFGTBL_Trans_io_accel1) {
9262 access = SA5_ioaccel_mode1_access;
9263 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9264 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9265 } else
9266 if (trans_support & CFGTBL_Trans_io_accel2)
9267 access = SA5_ioaccel_mode2_access;
9268 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9269 if (hpsa_wait_for_mode_change_ack(h)) {
9270 dev_err(&h->pdev->dev,
9271 "performant mode problem - doorbell timeout\n");
9272 return -ENODEV;
9273 }
9274 register_value = readl(&(h->cfgtable->TransportActive));
9275 if (!(register_value & CFGTBL_Trans_Performant)) {
9276 dev_err(&h->pdev->dev,
9277 "performant mode problem - transport not active\n");
9278 return -ENODEV;
9279 }
9280
9281 h->access = access;
9282 h->transMethod = transMethod;
9283
9284 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9285 (trans_support & CFGTBL_Trans_io_accel2)))
9286 return 0;
9287
9288 if (trans_support & CFGTBL_Trans_io_accel1) {
9289
9290 for (i = 0; i < h->nreply_queues; i++) {
9291 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9292 h->reply_queue[i].current_entry =
9293 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9294 }
9295 bft[7] = h->ioaccel_maxsg + 8;
9296 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9297 h->ioaccel1_blockFetchTable);
9298
9299
9300 for (i = 0; i < h->nreply_queues; i++)
9301 memset(h->reply_queue[i].head,
9302 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9303 h->reply_queue_size);
9304
9305
9306
9307
9308 for (i = 0; i < h->nr_cmds; i++) {
9309 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9310
9311 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9312 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9313 (i * sizeof(struct ErrorInfo)));
9314 cp->err_info_len = sizeof(struct ErrorInfo);
9315 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9316 cp->host_context_flags =
9317 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9318 cp->timeout_sec = 0;
9319 cp->ReplyQueue = 0;
9320 cp->tag =
9321 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9322 cp->host_addr =
9323 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9324 (i * sizeof(struct io_accel1_cmd)));
9325 }
9326 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9327 u64 cfg_offset, cfg_base_addr_index;
9328 u32 bft2_offset, cfg_base_addr;
9329
9330 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9331 &cfg_base_addr_index, &cfg_offset);
9332 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9333 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9334 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9335 4, h->ioaccel2_blockFetchTable);
9336 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9337 BUILD_BUG_ON(offsetof(struct CfgTable,
9338 io_accel_request_size_offset) != 0xb8);
9339 h->ioaccel2_bft2_regs =
9340 remap_pci_mem(pci_resource_start(h->pdev,
9341 cfg_base_addr_index) +
9342 cfg_offset + bft2_offset,
9343 ARRAY_SIZE(bft2) *
9344 sizeof(*h->ioaccel2_bft2_regs));
9345 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9346 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9347 }
9348 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9349 if (hpsa_wait_for_mode_change_ack(h)) {
9350 dev_err(&h->pdev->dev,
9351 "performant mode problem - enabling ioaccel mode\n");
9352 return -ENODEV;
9353 }
9354 return 0;
9355}
9356
9357
9358static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9359{
9360 if (h->ioaccel_cmd_pool) {
9361 dma_free_coherent(&h->pdev->dev,
9362 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9363 h->ioaccel_cmd_pool,
9364 h->ioaccel_cmd_pool_dhandle);
9365 h->ioaccel_cmd_pool = NULL;
9366 h->ioaccel_cmd_pool_dhandle = 0;
9367 }
9368 kfree(h->ioaccel1_blockFetchTable);
9369 h->ioaccel1_blockFetchTable = NULL;
9370}
9371
9372
9373static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9374{
9375 h->ioaccel_maxsg =
9376 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9377 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9378 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9379
9380
9381
9382
9383
9384 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9385 IOACCEL1_COMMANDLIST_ALIGNMENT);
9386 h->ioaccel_cmd_pool =
9387 dma_alloc_coherent(&h->pdev->dev,
9388 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9389 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9390
9391 h->ioaccel1_blockFetchTable =
9392 kmalloc(((h->ioaccel_maxsg + 1) *
9393 sizeof(u32)), GFP_KERNEL);
9394
9395 if ((h->ioaccel_cmd_pool == NULL) ||
9396 (h->ioaccel1_blockFetchTable == NULL))
9397 goto clean_up;
9398
9399 memset(h->ioaccel_cmd_pool, 0,
9400 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9401 return 0;
9402
9403clean_up:
9404 hpsa_free_ioaccel1_cmd_and_bft(h);
9405 return -ENOMEM;
9406}
9407
9408
9409static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9410{
9411 hpsa_free_ioaccel2_sg_chain_blocks(h);
9412
9413 if (h->ioaccel2_cmd_pool) {
9414 dma_free_coherent(&h->pdev->dev,
9415 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9416 h->ioaccel2_cmd_pool,
9417 h->ioaccel2_cmd_pool_dhandle);
9418 h->ioaccel2_cmd_pool = NULL;
9419 h->ioaccel2_cmd_pool_dhandle = 0;
9420 }
9421 kfree(h->ioaccel2_blockFetchTable);
9422 h->ioaccel2_blockFetchTable = NULL;
9423}
9424
9425
9426static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9427{
9428 int rc;
9429
9430
9431
9432 h->ioaccel_maxsg =
9433 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9434 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9435 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9436
9437 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9438 IOACCEL2_COMMANDLIST_ALIGNMENT);
9439 h->ioaccel2_cmd_pool =
9440 dma_alloc_coherent(&h->pdev->dev,
9441 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9442 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9443
9444 h->ioaccel2_blockFetchTable =
9445 kmalloc(((h->ioaccel_maxsg + 1) *
9446 sizeof(u32)), GFP_KERNEL);
9447
9448 if ((h->ioaccel2_cmd_pool == NULL) ||
9449 (h->ioaccel2_blockFetchTable == NULL)) {
9450 rc = -ENOMEM;
9451 goto clean_up;
9452 }
9453
9454 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9455 if (rc)
9456 goto clean_up;
9457
9458 memset(h->ioaccel2_cmd_pool, 0,
9459 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9460 return 0;
9461
9462clean_up:
9463 hpsa_free_ioaccel2_cmd_and_bft(h);
9464 return rc;
9465}
9466
9467
9468static void hpsa_free_performant_mode(struct ctlr_info *h)
9469{
9470 kfree(h->blockFetchTable);
9471 h->blockFetchTable = NULL;
9472 hpsa_free_reply_queues(h);
9473 hpsa_free_ioaccel1_cmd_and_bft(h);
9474 hpsa_free_ioaccel2_cmd_and_bft(h);
9475}
9476
9477
9478
9479
9480static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9481{
9482 u32 trans_support;
9483 unsigned long transMethod = CFGTBL_Trans_Performant |
9484 CFGTBL_Trans_use_short_tags;
9485 int i, rc;
9486
9487 if (hpsa_simple_mode)
9488 return 0;
9489
9490 trans_support = readl(&(h->cfgtable->TransportSupport));
9491 if (!(trans_support & PERFORMANT_MODE))
9492 return 0;
9493
9494
9495 if (trans_support & CFGTBL_Trans_io_accel1) {
9496 transMethod |= CFGTBL_Trans_io_accel1 |
9497 CFGTBL_Trans_enable_directed_msix;
9498 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9499 if (rc)
9500 return rc;
9501 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9502 transMethod |= CFGTBL_Trans_io_accel2 |
9503 CFGTBL_Trans_enable_directed_msix;
9504 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9505 if (rc)
9506 return rc;
9507 }
9508
9509 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9510 hpsa_get_max_perf_mode_cmds(h);
9511
9512 h->reply_queue_size = h->max_commands * sizeof(u64);
9513
9514 for (i = 0; i < h->nreply_queues; i++) {
9515 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9516 h->reply_queue_size,
9517 &h->reply_queue[i].busaddr,
9518 GFP_KERNEL);
9519 if (!h->reply_queue[i].head) {
9520 rc = -ENOMEM;
9521 goto clean1;
9522 }
9523 h->reply_queue[i].size = h->max_commands;
9524 h->reply_queue[i].wraparound = 1;
9525 h->reply_queue[i].current_entry = 0;
9526 }
9527
9528
9529 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9530 sizeof(u32)), GFP_KERNEL);
9531 if (!h->blockFetchTable) {
9532 rc = -ENOMEM;
9533 goto clean1;
9534 }
9535
9536 rc = hpsa_enter_performant_mode(h, trans_support);
9537 if (rc)
9538 goto clean2;
9539 return 0;
9540
9541clean2:
9542 kfree(h->blockFetchTable);
9543 h->blockFetchTable = NULL;
9544clean1:
9545 hpsa_free_reply_queues(h);
9546 hpsa_free_ioaccel1_cmd_and_bft(h);
9547 hpsa_free_ioaccel2_cmd_and_bft(h);
9548 return rc;
9549}
9550
9551static int is_accelerated_cmd(struct CommandList *c)
9552{
9553 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9554}
9555
9556static void hpsa_drain_accel_commands(struct ctlr_info *h)
9557{
9558 struct CommandList *c = NULL;
9559 int i, accel_cmds_out;
9560 int refcount;
9561
9562 do {
9563 accel_cmds_out = 0;
9564 for (i = 0; i < h->nr_cmds; i++) {
9565 c = h->cmd_pool + i;
9566 refcount = atomic_inc_return(&c->refcount);
9567 if (refcount > 1)
9568 accel_cmds_out += is_accelerated_cmd(c);
9569 cmd_free(h, c);
9570 }
9571 if (accel_cmds_out <= 0)
9572 break;
9573 msleep(100);
9574 } while (1);
9575}
9576
9577static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9578 struct hpsa_sas_port *hpsa_sas_port)
9579{
9580 struct hpsa_sas_phy *hpsa_sas_phy;
9581 struct sas_phy *phy;
9582
9583 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9584 if (!hpsa_sas_phy)
9585 return NULL;
9586
9587 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9588 hpsa_sas_port->next_phy_index);
9589 if (!phy) {
9590 kfree(hpsa_sas_phy);
9591 return NULL;
9592 }
9593
9594 hpsa_sas_port->next_phy_index++;
9595 hpsa_sas_phy->phy = phy;
9596 hpsa_sas_phy->parent_port = hpsa_sas_port;
9597
9598 return hpsa_sas_phy;
9599}
9600
9601static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9602{
9603 struct sas_phy *phy = hpsa_sas_phy->phy;
9604
9605 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9606 if (hpsa_sas_phy->added_to_port)
9607 list_del(&hpsa_sas_phy->phy_list_entry);
9608 sas_phy_delete(phy);
9609 kfree(hpsa_sas_phy);
9610}
9611
9612static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9613{
9614 int rc;
9615 struct hpsa_sas_port *hpsa_sas_port;
9616 struct sas_phy *phy;
9617 struct sas_identify *identify;
9618
9619 hpsa_sas_port = hpsa_sas_phy->parent_port;
9620 phy = hpsa_sas_phy->phy;
9621
9622 identify = &phy->identify;
9623 memset(identify, 0, sizeof(*identify));
9624 identify->sas_address = hpsa_sas_port->sas_address;
9625 identify->device_type = SAS_END_DEVICE;
9626 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9627 identify->target_port_protocols = SAS_PROTOCOL_STP;
9628 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9629 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9630 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9631 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9632 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9633
9634 rc = sas_phy_add(hpsa_sas_phy->phy);
9635 if (rc)
9636 return rc;
9637
9638 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9639 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9640 &hpsa_sas_port->phy_list_head);
9641 hpsa_sas_phy->added_to_port = true;
9642
9643 return 0;
9644}
9645
9646static int
9647 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9648 struct sas_rphy *rphy)
9649{
9650 struct sas_identify *identify;
9651
9652 identify = &rphy->identify;
9653 identify->sas_address = hpsa_sas_port->sas_address;
9654 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9655 identify->target_port_protocols = SAS_PROTOCOL_STP;
9656
9657 return sas_rphy_add(rphy);
9658}
9659
9660static struct hpsa_sas_port
9661 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9662 u64 sas_address)
9663{
9664 int rc;
9665 struct hpsa_sas_port *hpsa_sas_port;
9666 struct sas_port *port;
9667
9668 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9669 if (!hpsa_sas_port)
9670 return NULL;
9671
9672 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9673 hpsa_sas_port->parent_node = hpsa_sas_node;
9674
9675 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9676 if (!port)
9677 goto free_hpsa_port;
9678
9679 rc = sas_port_add(port);
9680 if (rc)
9681 goto free_sas_port;
9682
9683 hpsa_sas_port->port = port;
9684 hpsa_sas_port->sas_address = sas_address;
9685 list_add_tail(&hpsa_sas_port->port_list_entry,
9686 &hpsa_sas_node->port_list_head);
9687
9688 return hpsa_sas_port;
9689
9690free_sas_port:
9691 sas_port_free(port);
9692free_hpsa_port:
9693 kfree(hpsa_sas_port);
9694
9695 return NULL;
9696}
9697
9698static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9699{
9700 struct hpsa_sas_phy *hpsa_sas_phy;
9701 struct hpsa_sas_phy *next;
9702
9703 list_for_each_entry_safe(hpsa_sas_phy, next,
9704 &hpsa_sas_port->phy_list_head, phy_list_entry)
9705 hpsa_free_sas_phy(hpsa_sas_phy);
9706
9707 sas_port_delete(hpsa_sas_port->port);
9708 list_del(&hpsa_sas_port->port_list_entry);
9709 kfree(hpsa_sas_port);
9710}
9711
9712static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9713{
9714 struct hpsa_sas_node *hpsa_sas_node;
9715
9716 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9717 if (hpsa_sas_node) {
9718 hpsa_sas_node->parent_dev = parent_dev;
9719 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9720 }
9721
9722 return hpsa_sas_node;
9723}
9724
9725static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9726{
9727 struct hpsa_sas_port *hpsa_sas_port;
9728 struct hpsa_sas_port *next;
9729
9730 if (!hpsa_sas_node)
9731 return;
9732
9733 list_for_each_entry_safe(hpsa_sas_port, next,
9734 &hpsa_sas_node->port_list_head, port_list_entry)
9735 hpsa_free_sas_port(hpsa_sas_port);
9736
9737 kfree(hpsa_sas_node);
9738}
9739
9740static struct hpsa_scsi_dev_t
9741 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9742 struct sas_rphy *rphy)
9743{
9744 int i;
9745 struct hpsa_scsi_dev_t *device;
9746
9747 for (i = 0; i < h->ndevices; i++) {
9748 device = h->dev[i];
9749 if (!device->sas_port)
9750 continue;
9751 if (device->sas_port->rphy == rphy)
9752 return device;
9753 }
9754
9755 return NULL;
9756}
9757
9758static int hpsa_add_sas_host(struct ctlr_info *h)
9759{
9760 int rc;
9761 struct device *parent_dev;
9762 struct hpsa_sas_node *hpsa_sas_node;
9763 struct hpsa_sas_port *hpsa_sas_port;
9764 struct hpsa_sas_phy *hpsa_sas_phy;
9765
9766 parent_dev = &h->scsi_host->shost_dev;
9767
9768 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9769 if (!hpsa_sas_node)
9770 return -ENOMEM;
9771
9772 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9773 if (!hpsa_sas_port) {
9774 rc = -ENODEV;
9775 goto free_sas_node;
9776 }
9777
9778 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9779 if (!hpsa_sas_phy) {
9780 rc = -ENODEV;
9781 goto free_sas_port;
9782 }
9783
9784 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9785 if (rc)
9786 goto free_sas_phy;
9787
9788 h->sas_host = hpsa_sas_node;
9789
9790 return 0;
9791
9792free_sas_phy:
9793 hpsa_free_sas_phy(hpsa_sas_phy);
9794free_sas_port:
9795 hpsa_free_sas_port(hpsa_sas_port);
9796free_sas_node:
9797 hpsa_free_sas_node(hpsa_sas_node);
9798
9799 return rc;
9800}
9801
9802static void hpsa_delete_sas_host(struct ctlr_info *h)
9803{
9804 hpsa_free_sas_node(h->sas_host);
9805}
9806
9807static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9808 struct hpsa_scsi_dev_t *device)
9809{
9810 int rc;
9811 struct hpsa_sas_port *hpsa_sas_port;
9812 struct sas_rphy *rphy;
9813
9814 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9815 if (!hpsa_sas_port)
9816 return -ENOMEM;
9817
9818 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9819 if (!rphy) {
9820 rc = -ENODEV;
9821 goto free_sas_port;
9822 }
9823
9824 hpsa_sas_port->rphy = rphy;
9825 device->sas_port = hpsa_sas_port;
9826
9827 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9828 if (rc)
9829 goto free_sas_port;
9830
9831 return 0;
9832
9833free_sas_port:
9834 hpsa_free_sas_port(hpsa_sas_port);
9835 device->sas_port = NULL;
9836
9837 return rc;
9838}
9839
9840static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9841{
9842 if (device->sas_port) {
9843 hpsa_free_sas_port(device->sas_port);
9844 device->sas_port = NULL;
9845 }
9846}
9847
9848static int
9849hpsa_sas_get_linkerrors(struct sas_phy *phy)
9850{
9851 return 0;
9852}
9853
9854static int
9855hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9856{
9857 struct Scsi_Host *shost = phy_to_shost(rphy);
9858 struct ctlr_info *h;
9859 struct hpsa_scsi_dev_t *sd;
9860
9861 if (!shost)
9862 return -ENXIO;
9863
9864 h = shost_to_hba(shost);
9865
9866 if (!h)
9867 return -ENXIO;
9868
9869 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9870 if (!sd)
9871 return -ENXIO;
9872
9873 *identifier = sd->eli;
9874
9875 return 0;
9876}
9877
9878static int
9879hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9880{
9881 return -ENXIO;
9882}
9883
9884static int
9885hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9886{
9887 return 0;
9888}
9889
9890static int
9891hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9892{
9893 return 0;
9894}
9895
9896static int
9897hpsa_sas_phy_setup(struct sas_phy *phy)
9898{
9899 return 0;
9900}
9901
9902static void
9903hpsa_sas_phy_release(struct sas_phy *phy)
9904{
9905}
9906
9907static int
9908hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9909{
9910 return -EINVAL;
9911}
9912
9913static struct sas_function_template hpsa_sas_transport_functions = {
9914 .get_linkerrors = hpsa_sas_get_linkerrors,
9915 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9916 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9917 .phy_reset = hpsa_sas_phy_reset,
9918 .phy_enable = hpsa_sas_phy_enable,
9919 .phy_setup = hpsa_sas_phy_setup,
9920 .phy_release = hpsa_sas_phy_release,
9921 .set_phy_speed = hpsa_sas_phy_speed,
9922};
9923
9924
9925
9926
9927
9928static int __init hpsa_init(void)
9929{
9930 int rc;
9931
9932 hpsa_sas_transport_template =
9933 sas_attach_transport(&hpsa_sas_transport_functions);
9934 if (!hpsa_sas_transport_template)
9935 return -ENODEV;
9936
9937 rc = pci_register_driver(&hpsa_pci_driver);
9938
9939 if (rc)
9940 sas_release_transport(hpsa_sas_transport_template);
9941
9942 return rc;
9943}
9944
9945static void __exit hpsa_cleanup(void)
9946{
9947 pci_unregister_driver(&hpsa_pci_driver);
9948 sas_release_transport(hpsa_sas_transport_template);
9949}
9950
9951static void __attribute__((unused)) verify_offsets(void)
9952{
9953#define VERIFY_OFFSET(member, offset) \
9954 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9955
9956 VERIFY_OFFSET(structure_size, 0);
9957 VERIFY_OFFSET(volume_blk_size, 4);
9958 VERIFY_OFFSET(volume_blk_cnt, 8);
9959 VERIFY_OFFSET(phys_blk_shift, 16);
9960 VERIFY_OFFSET(parity_rotation_shift, 17);
9961 VERIFY_OFFSET(strip_size, 18);
9962 VERIFY_OFFSET(disk_starting_blk, 20);
9963 VERIFY_OFFSET(disk_blk_cnt, 28);
9964 VERIFY_OFFSET(data_disks_per_row, 36);
9965 VERIFY_OFFSET(metadata_disks_per_row, 38);
9966 VERIFY_OFFSET(row_cnt, 40);
9967 VERIFY_OFFSET(layout_map_count, 42);
9968 VERIFY_OFFSET(flags, 44);
9969 VERIFY_OFFSET(dekindex, 46);
9970
9971 VERIFY_OFFSET(data, 64);
9972
9973#undef VERIFY_OFFSET
9974
9975#define VERIFY_OFFSET(member, offset) \
9976 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9977
9978 VERIFY_OFFSET(IU_type, 0);
9979 VERIFY_OFFSET(direction, 1);
9980 VERIFY_OFFSET(reply_queue, 2);
9981
9982 VERIFY_OFFSET(scsi_nexus, 4);
9983 VERIFY_OFFSET(Tag, 8);
9984 VERIFY_OFFSET(cdb, 16);
9985 VERIFY_OFFSET(cciss_lun, 32);
9986 VERIFY_OFFSET(data_len, 40);
9987 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9988 VERIFY_OFFSET(sg_count, 45);
9989
9990 VERIFY_OFFSET(err_ptr, 48);
9991 VERIFY_OFFSET(err_len, 56);
9992
9993 VERIFY_OFFSET(sg, 64);
9994
9995#undef VERIFY_OFFSET
9996
9997#define VERIFY_OFFSET(member, offset) \
9998 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9999
10000 VERIFY_OFFSET(dev_handle, 0x00);
10001 VERIFY_OFFSET(reserved1, 0x02);
10002 VERIFY_OFFSET(function, 0x03);
10003 VERIFY_OFFSET(reserved2, 0x04);
10004 VERIFY_OFFSET(err_info, 0x0C);
10005 VERIFY_OFFSET(reserved3, 0x10);
10006 VERIFY_OFFSET(err_info_len, 0x12);
10007 VERIFY_OFFSET(reserved4, 0x13);
10008 VERIFY_OFFSET(sgl_offset, 0x14);
10009 VERIFY_OFFSET(reserved5, 0x15);
10010 VERIFY_OFFSET(transfer_len, 0x1C);
10011 VERIFY_OFFSET(reserved6, 0x20);
10012 VERIFY_OFFSET(io_flags, 0x24);
10013 VERIFY_OFFSET(reserved7, 0x26);
10014 VERIFY_OFFSET(LUN, 0x34);
10015 VERIFY_OFFSET(control, 0x3C);
10016 VERIFY_OFFSET(CDB, 0x40);
10017 VERIFY_OFFSET(reserved8, 0x50);
10018 VERIFY_OFFSET(host_context_flags, 0x60);
10019 VERIFY_OFFSET(timeout_sec, 0x62);
10020 VERIFY_OFFSET(ReplyQueue, 0x64);
10021 VERIFY_OFFSET(reserved9, 0x65);
10022 VERIFY_OFFSET(tag, 0x68);
10023 VERIFY_OFFSET(host_addr, 0x70);
10024 VERIFY_OFFSET(CISS_LUN, 0x78);
10025 VERIFY_OFFSET(SG, 0x78 + 8);
10026#undef VERIFY_OFFSET
10027}
10028
10029module_init(hpsa_init);
10030module_exit(hpsa_cleanup);
10031