linux/drivers/tty/serial/8250/8250_mtk.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Mediatek 8250 driver.
   4 *
   5 * Copyright (c) 2014 MundoReader S.L.
   6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
   7 */
   8#include <linux/clk.h>
   9#include <linux/io.h>
  10#include <linux/module.h>
  11#include <linux/of_irq.h>
  12#include <linux/of_platform.h>
  13#include <linux/pinctrl/consumer.h>
  14#include <linux/platform_device.h>
  15#include <linux/pm_runtime.h>
  16#include <linux/serial_8250.h>
  17#include <linux/serial_reg.h>
  18#include <linux/console.h>
  19#include <linux/dma-mapping.h>
  20#include <linux/tty.h>
  21#include <linux/tty_flip.h>
  22
  23#include "8250.h"
  24
  25#define MTK_UART_HIGHS          0x09    /* Highspeed register */
  26#define MTK_UART_SAMPLE_COUNT   0x0a    /* Sample count register */
  27#define MTK_UART_SAMPLE_POINT   0x0b    /* Sample point register */
  28#define MTK_UART_RATE_FIX       0x0d    /* UART Rate Fix Register */
  29#define MTK_UART_ESCAPE_DAT     0x10    /* Escape Character register */
  30#define MTK_UART_ESCAPE_EN      0x11    /* Escape Enable register */
  31#define MTK_UART_DMA_EN         0x13    /* DMA Enable register */
  32#define MTK_UART_RXTRI_AD       0x14    /* RX Trigger address */
  33#define MTK_UART_FRACDIV_L      0x15    /* Fractional divider LSB address */
  34#define MTK_UART_FRACDIV_M      0x16    /* Fractional divider MSB address */
  35#define MTK_UART_DEBUG0 0x18
  36#define MTK_UART_IER_XOFFI      0x20    /* Enable XOFF character interrupt */
  37#define MTK_UART_IER_RTSI       0x40    /* Enable RTS Modem status interrupt */
  38#define MTK_UART_IER_CTSI       0x80    /* Enable CTS Modem status interrupt */
  39
  40#define MTK_UART_EFR            38      /* I/O: Extended Features Register */
  41#define MTK_UART_EFR_EN         0x10    /* Enable enhancement feature */
  42#define MTK_UART_EFR_RTS        0x40    /* Enable hardware rx flow control */
  43#define MTK_UART_EFR_CTS        0x80    /* Enable hardware tx flow control */
  44#define MTK_UART_EFR_NO_SW_FC   0x0     /* no sw flow control */
  45#define MTK_UART_EFR_XON1_XOFF1 0xa     /* XON1/XOFF1 as sw flow control */
  46#define MTK_UART_EFR_XON2_XOFF2 0x5     /* XON2/XOFF2 as sw flow control */
  47#define MTK_UART_EFR_SW_FC_MASK 0xf     /* Enable CTS Modem status interrupt */
  48#define MTK_UART_EFR_HW_FC      (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
  49#define MTK_UART_DMA_EN_TX      0x2
  50#define MTK_UART_DMA_EN_RX      0x5
  51
  52#define MTK_UART_ESCAPE_CHAR    0x77    /* Escape char added under sw fc */
  53#define MTK_UART_RX_SIZE        0x8000
  54#define MTK_UART_TX_TRIGGER     1
  55#define MTK_UART_RX_TRIGGER     MTK_UART_RX_SIZE
  56
  57#define MTK_UART_FEATURE_SEL    39      /* Feature Selection register */
  58#define MTK_UART_FEAT_NEWRMAP   BIT(0)  /* Use new register map */
  59
  60#define MTK_UART_XON1           40      /* I/O: Xon character 1 */
  61#define MTK_UART_XOFF1          42      /* I/O: Xoff character 1 */
  62
  63#ifdef CONFIG_SERIAL_8250_DMA
  64enum dma_rx_status {
  65        DMA_RX_START = 0,
  66        DMA_RX_RUNNING = 1,
  67        DMA_RX_SHUTDOWN = 2,
  68};
  69#endif
  70
  71struct mtk8250_data {
  72        int                     line;
  73        unsigned int            rx_pos;
  74        unsigned int            clk_count;
  75        struct clk              *uart_clk;
  76        struct clk              *bus_clk;
  77        struct uart_8250_dma    *dma;
  78#ifdef CONFIG_SERIAL_8250_DMA
  79        enum dma_rx_status      rx_status;
  80#endif
  81        int                     rx_wakeup_irq;
  82};
  83
  84/* flow control mode */
  85enum {
  86        MTK_UART_FC_NONE,
  87        MTK_UART_FC_SW,
  88        MTK_UART_FC_HW,
  89};
  90
  91#ifdef CONFIG_SERIAL_8250_DMA
  92static void mtk8250_rx_dma(struct uart_8250_port *up);
  93
  94static void mtk8250_dma_rx_complete(void *param)
  95{
  96        struct uart_8250_port *up = param;
  97        struct uart_8250_dma *dma = up->dma;
  98        struct mtk8250_data *data = up->port.private_data;
  99        struct tty_port *tty_port = &up->port.state->port;
 100        struct dma_tx_state state;
 101        int copied, total, cnt;
 102        unsigned char *ptr;
 103        unsigned long flags;
 104
 105        if (data->rx_status == DMA_RX_SHUTDOWN)
 106                return;
 107
 108        spin_lock_irqsave(&up->port.lock, flags);
 109
 110        dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
 111        total = dma->rx_size - state.residue;
 112        cnt = total;
 113
 114        if ((data->rx_pos + cnt) > dma->rx_size)
 115                cnt = dma->rx_size - data->rx_pos;
 116
 117        ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
 118        copied = tty_insert_flip_string(tty_port, ptr, cnt);
 119        data->rx_pos += cnt;
 120
 121        if (total > cnt) {
 122                ptr = (unsigned char *)(dma->rx_buf);
 123                cnt = total - cnt;
 124                copied += tty_insert_flip_string(tty_port, ptr, cnt);
 125                data->rx_pos = cnt;
 126        }
 127
 128        up->port.icount.rx += copied;
 129
 130        tty_flip_buffer_push(tty_port);
 131
 132        mtk8250_rx_dma(up);
 133
 134        spin_unlock_irqrestore(&up->port.lock, flags);
 135}
 136
 137static void mtk8250_rx_dma(struct uart_8250_port *up)
 138{
 139        struct uart_8250_dma *dma = up->dma;
 140        struct dma_async_tx_descriptor  *desc;
 141
 142        desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
 143                                           dma->rx_size, DMA_DEV_TO_MEM,
 144                                           DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 145        if (!desc) {
 146                pr_err("failed to prepare rx slave single\n");
 147                return;
 148        }
 149
 150        desc->callback = mtk8250_dma_rx_complete;
 151        desc->callback_param = up;
 152
 153        dma->rx_cookie = dmaengine_submit(desc);
 154
 155        dma_async_issue_pending(dma->rxchan);
 156}
 157
 158static void mtk8250_dma_enable(struct uart_8250_port *up)
 159{
 160        struct uart_8250_dma *dma = up->dma;
 161        struct mtk8250_data *data = up->port.private_data;
 162        int lcr = serial_in(up, UART_LCR);
 163
 164        if (data->rx_status != DMA_RX_START)
 165                return;
 166
 167        dma->rxconf.src_port_window_size        = dma->rx_size;
 168        dma->rxconf.src_addr                            = dma->rx_addr;
 169
 170        dma->txconf.dst_port_window_size        = UART_XMIT_SIZE;
 171        dma->txconf.dst_addr                            = dma->tx_addr;
 172
 173        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
 174                UART_FCR_CLEAR_XMIT);
 175        serial_out(up, MTK_UART_DMA_EN,
 176                   MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
 177
 178        serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 179        serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
 180        serial_out(up, UART_LCR, lcr);
 181
 182        if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
 183                pr_err("failed to configure rx dma channel\n");
 184        if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
 185                pr_err("failed to configure tx dma channel\n");
 186
 187        data->rx_status = DMA_RX_RUNNING;
 188        data->rx_pos = 0;
 189        mtk8250_rx_dma(up);
 190}
 191#endif
 192
 193static int mtk8250_startup(struct uart_port *port)
 194{
 195#ifdef CONFIG_SERIAL_8250_DMA
 196        struct uart_8250_port *up = up_to_u8250p(port);
 197        struct mtk8250_data *data = port->private_data;
 198
 199        /* disable DMA for console */
 200        if (uart_console(port))
 201                up->dma = NULL;
 202
 203        if (up->dma) {
 204                data->rx_status = DMA_RX_START;
 205                uart_circ_clear(&port->state->xmit);
 206        }
 207#endif
 208        memset(&port->icount, 0, sizeof(port->icount));
 209
 210        return serial8250_do_startup(port);
 211}
 212
 213static void mtk8250_shutdown(struct uart_port *port)
 214{
 215#ifdef CONFIG_SERIAL_8250_DMA
 216        struct uart_8250_port *up = up_to_u8250p(port);
 217        struct mtk8250_data *data = port->private_data;
 218
 219        if (up->dma)
 220                data->rx_status = DMA_RX_SHUTDOWN;
 221#endif
 222
 223        return serial8250_do_shutdown(port);
 224}
 225
 226static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
 227{
 228        serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
 229}
 230
 231static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
 232{
 233        serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
 234}
 235
 236static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
 237{
 238        struct uart_port *port = &up->port;
 239        int lcr = serial_in(up, UART_LCR);
 240
 241        serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 242        serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
 243        serial_out(up, UART_LCR, lcr);
 244        lcr = serial_in(up, UART_LCR);
 245
 246        switch (mode) {
 247        case MTK_UART_FC_NONE:
 248                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 249                serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
 250                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 251                serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &
 252                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
 253                serial_out(up, UART_LCR, lcr);
 254                mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
 255                        MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
 256                break;
 257
 258        case MTK_UART_FC_HW:
 259                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 260                serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
 261                serial_out(up, UART_MCR, UART_MCR_RTS);
 262                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 263
 264                /*enable hw flow control*/
 265                serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |
 266                        (serial_in(up, MTK_UART_EFR) &
 267                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
 268
 269                serial_out(up, UART_LCR, lcr);
 270                mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
 271                mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
 272                break;
 273
 274        case MTK_UART_FC_SW:    /*MTK software flow control */
 275                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 276                serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
 277                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 278
 279                /*enable sw flow control */
 280                serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
 281                        (serial_in(up, MTK_UART_EFR) &
 282                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
 283
 284                serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));
 285                serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));
 286                serial_out(up, UART_LCR, lcr);
 287                mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
 288                mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
 289                break;
 290        default:
 291                break;
 292        }
 293}
 294
 295static void
 296mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
 297                        struct ktermios *old)
 298{
 299        static const unsigned short fraction_L_mapping[] = {
 300                0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
 301        };
 302        static const unsigned short fraction_M_mapping[] = {
 303                0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
 304        };
 305        struct uart_8250_port *up = up_to_u8250p(port);
 306        unsigned int baud, quot, fraction;
 307        unsigned long flags;
 308        int mode;
 309
 310#ifdef CONFIG_SERIAL_8250_DMA
 311        if (up->dma) {
 312                if (uart_console(port)) {
 313                        devm_kfree(up->port.dev, up->dma);
 314                        up->dma = NULL;
 315                } else {
 316                        mtk8250_dma_enable(up);
 317                }
 318        }
 319#endif
 320
 321        /*
 322         * Store the requested baud rate before calling the generic 8250
 323         * set_termios method. Standard 8250 port expects bauds to be
 324         * no higher than (uartclk / 16) so the baud will be clamped if it
 325         * gets out of that bound. Mediatek 8250 port supports speed
 326         * higher than that, therefore we'll get original baud rate back
 327         * after calling the generic set_termios method and recalculate
 328         * the speed later in this method.
 329         */
 330        baud = tty_termios_baud_rate(termios);
 331
 332        serial8250_do_set_termios(port, termios, NULL);
 333
 334        tty_termios_encode_baud_rate(termios, baud, baud);
 335
 336        /*
 337         * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
 338         *
 339         * We need to recalcualte the quot register, as the claculation depends
 340         * on the vaule in the highspeed register.
 341         *
 342         * Some baudrates are not supported by the chip, so we use the next
 343         * lower rate supported and update termios c_flag.
 344         *
 345         * If highspeed register is set to 3, we need to specify sample count
 346         * and sample point to increase accuracy. If not, we reset the
 347         * registers to their default values.
 348         */
 349        baud = uart_get_baud_rate(port, termios, old,
 350                                  port->uartclk / 16 / UART_DIV_MAX,
 351                                  port->uartclk);
 352
 353        if (baud < 115200) {
 354                serial_port_out(port, MTK_UART_HIGHS, 0x0);
 355                quot = uart_get_divisor(port, baud);
 356        } else {
 357                serial_port_out(port, MTK_UART_HIGHS, 0x3);
 358                quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
 359        }
 360
 361        /*
 362         * Ok, we're now changing the port state.  Do it with
 363         * interrupts disabled.
 364         */
 365        spin_lock_irqsave(&port->lock, flags);
 366
 367        /*
 368         * Update the per-port timeout.
 369         */
 370        uart_update_timeout(port, termios->c_cflag, baud);
 371
 372        /* set DLAB we have cval saved in up->lcr from the call to the core */
 373        serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
 374        serial_dl_write(up, quot);
 375
 376        /* reset DLAB */
 377        serial_port_out(port, UART_LCR, up->lcr);
 378
 379        if (baud >= 115200) {
 380                unsigned int tmp;
 381
 382                tmp = (port->uartclk / (baud *  quot)) - 1;
 383                serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
 384                serial_port_out(port, MTK_UART_SAMPLE_POINT,
 385                                        (tmp >> 1) - 1);
 386
 387                /*count fraction to set fractoin register */
 388                fraction = ((port->uartclk  * 100) / baud / quot) % 100;
 389                fraction = DIV_ROUND_CLOSEST(fraction, 10);
 390                serial_port_out(port, MTK_UART_FRACDIV_L,
 391                                                fraction_L_mapping[fraction]);
 392                serial_port_out(port, MTK_UART_FRACDIV_M,
 393                                                fraction_M_mapping[fraction]);
 394        } else {
 395                serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
 396                serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
 397                serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
 398                serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
 399        }
 400
 401        if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
 402                mode = MTK_UART_FC_HW;
 403        else if (termios->c_iflag & CRTSCTS)
 404                mode = MTK_UART_FC_SW;
 405        else
 406                mode = MTK_UART_FC_NONE;
 407
 408        mtk8250_set_flow_ctrl(up, mode);
 409
 410        if (uart_console(port))
 411                up->port.cons->cflag = termios->c_cflag;
 412
 413        spin_unlock_irqrestore(&port->lock, flags);
 414        /* Don't rewrite B0 */
 415        if (tty_termios_baud_rate(termios))
 416                tty_termios_encode_baud_rate(termios, baud, baud);
 417}
 418
 419static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
 420{
 421        struct mtk8250_data *data = dev_get_drvdata(dev);
 422        struct uart_8250_port *up = serial8250_get_port(data->line);
 423
 424        /* wait until UART in idle status */
 425        while
 426                (serial_in(up, MTK_UART_DEBUG0));
 427
 428        if (data->clk_count == 0U) {
 429                dev_dbg(dev, "%s clock count is 0\n", __func__);
 430        } else {
 431                clk_disable_unprepare(data->bus_clk);
 432                data->clk_count--;
 433        }
 434
 435        return 0;
 436}
 437
 438static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
 439{
 440        struct mtk8250_data *data = dev_get_drvdata(dev);
 441        int err;
 442
 443        if (data->clk_count > 0U) {
 444                dev_dbg(dev, "%s clock count is %d\n", __func__,
 445                        data->clk_count);
 446        } else {
 447                err = clk_prepare_enable(data->bus_clk);
 448                if (err) {
 449                        dev_warn(dev, "Can't enable bus clock\n");
 450                        return err;
 451                }
 452                data->clk_count++;
 453        }
 454
 455        return 0;
 456}
 457
 458static void
 459mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
 460{
 461        if (!state)
 462                if (!mtk8250_runtime_resume(port->dev))
 463                        pm_runtime_get_sync(port->dev);
 464
 465        serial8250_do_pm(port, state, old);
 466
 467        if (state)
 468                if (!pm_runtime_put_sync_suspend(port->dev))
 469                        mtk8250_runtime_suspend(port->dev);
 470}
 471
 472#ifdef CONFIG_SERIAL_8250_DMA
 473static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
 474{
 475        return false;
 476}
 477#endif
 478
 479static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
 480                           struct mtk8250_data *data)
 481{
 482#ifdef CONFIG_SERIAL_8250_DMA
 483        int dmacnt;
 484#endif
 485
 486        data->uart_clk = devm_clk_get(&pdev->dev, "baud");
 487        if (IS_ERR(data->uart_clk)) {
 488                /*
 489                 * For compatibility with older device trees try unnamed
 490                 * clk when no baud clk can be found.
 491                 */
 492                data->uart_clk = devm_clk_get(&pdev->dev, NULL);
 493                if (IS_ERR(data->uart_clk)) {
 494                        dev_warn(&pdev->dev, "Can't get uart clock\n");
 495                        return PTR_ERR(data->uart_clk);
 496                }
 497
 498                return 0;
 499        }
 500
 501        data->bus_clk = devm_clk_get(&pdev->dev, "bus");
 502        if (IS_ERR(data->bus_clk))
 503                return PTR_ERR(data->bus_clk);
 504
 505        data->dma = NULL;
 506#ifdef CONFIG_SERIAL_8250_DMA
 507        dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
 508        if (dmacnt == 2) {
 509                data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
 510                                         GFP_KERNEL);
 511                if (!data->dma)
 512                        return -ENOMEM;
 513
 514                data->dma->fn = mtk8250_dma_filter;
 515                data->dma->rx_size = MTK_UART_RX_SIZE;
 516                data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
 517                data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
 518        }
 519#endif
 520
 521        return 0;
 522}
 523
 524static int mtk8250_probe(struct platform_device *pdev)
 525{
 526        struct uart_8250_port uart = {};
 527        struct mtk8250_data *data;
 528        struct resource *regs;
 529        int irq, err;
 530
 531        irq = platform_get_irq(pdev, 0);
 532        if (irq < 0)
 533                return irq;
 534
 535        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 536        if (!regs) {
 537                dev_err(&pdev->dev, "no registers defined\n");
 538                return -EINVAL;
 539        }
 540
 541        uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
 542                                         resource_size(regs));
 543        if (!uart.port.membase)
 544                return -ENOMEM;
 545
 546        data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 547        if (!data)
 548                return -ENOMEM;
 549
 550        data->clk_count = 0;
 551
 552        if (pdev->dev.of_node) {
 553                err = mtk8250_probe_of(pdev, &uart.port, data);
 554                if (err)
 555                        return err;
 556        } else
 557                return -ENODEV;
 558
 559        spin_lock_init(&uart.port.lock);
 560        uart.port.mapbase = regs->start;
 561        uart.port.irq = irq;
 562        uart.port.pm = mtk8250_do_pm;
 563        uart.port.type = PORT_16550;
 564        uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
 565        uart.port.dev = &pdev->dev;
 566        uart.port.iotype = UPIO_MEM32;
 567        uart.port.regshift = 2;
 568        uart.port.private_data = data;
 569        uart.port.shutdown = mtk8250_shutdown;
 570        uart.port.startup = mtk8250_startup;
 571        uart.port.set_termios = mtk8250_set_termios;
 572        uart.port.uartclk = clk_get_rate(data->uart_clk);
 573#ifdef CONFIG_SERIAL_8250_DMA
 574        if (data->dma)
 575                uart.dma = data->dma;
 576#endif
 577
 578        /* Set AP UART new register map */
 579        writel(MTK_UART_FEAT_NEWRMAP, uart.port.membase +
 580               (MTK_UART_FEATURE_SEL << uart.port.regshift));
 581
 582        /* Disable Rate Fix function */
 583        writel(0x0, uart.port.membase +
 584                        (MTK_UART_RATE_FIX << uart.port.regshift));
 585
 586        platform_set_drvdata(pdev, data);
 587
 588        pm_runtime_enable(&pdev->dev);
 589        err = mtk8250_runtime_resume(&pdev->dev);
 590        if (err)
 591                goto err_pm_disable;
 592
 593        data->line = serial8250_register_8250_port(&uart);
 594        if (data->line < 0) {
 595                err = data->line;
 596                goto err_pm_disable;
 597        }
 598
 599        data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
 600
 601        return 0;
 602
 603err_pm_disable:
 604        pm_runtime_disable(&pdev->dev);
 605
 606        return err;
 607}
 608
 609static int mtk8250_remove(struct platform_device *pdev)
 610{
 611        struct mtk8250_data *data = platform_get_drvdata(pdev);
 612
 613        pm_runtime_get_sync(&pdev->dev);
 614
 615        serial8250_unregister_port(data->line);
 616
 617        pm_runtime_disable(&pdev->dev);
 618        pm_runtime_put_noidle(&pdev->dev);
 619
 620        if (!pm_runtime_status_suspended(&pdev->dev))
 621                mtk8250_runtime_suspend(&pdev->dev);
 622
 623        return 0;
 624}
 625
 626static int __maybe_unused mtk8250_suspend(struct device *dev)
 627{
 628        struct mtk8250_data *data = dev_get_drvdata(dev);
 629        int irq = data->rx_wakeup_irq;
 630        int err;
 631
 632        serial8250_suspend_port(data->line);
 633
 634        pinctrl_pm_select_sleep_state(dev);
 635        if (irq >= 0) {
 636                err = enable_irq_wake(irq);
 637                if (err) {
 638                        dev_err(dev,
 639                                "failed to enable irq wake on IRQ %d: %d\n",
 640                                irq, err);
 641                        pinctrl_pm_select_default_state(dev);
 642                        serial8250_resume_port(data->line);
 643                        return err;
 644                }
 645        }
 646
 647        return 0;
 648}
 649
 650static int __maybe_unused mtk8250_resume(struct device *dev)
 651{
 652        struct mtk8250_data *data = dev_get_drvdata(dev);
 653        int irq = data->rx_wakeup_irq;
 654
 655        if (irq >= 0)
 656                disable_irq_wake(irq);
 657        pinctrl_pm_select_default_state(dev);
 658
 659        serial8250_resume_port(data->line);
 660
 661        return 0;
 662}
 663
 664static const struct dev_pm_ops mtk8250_pm_ops = {
 665        SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
 666        SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
 667                                NULL)
 668};
 669
 670static const struct of_device_id mtk8250_of_match[] = {
 671        { .compatible = "mediatek,mt6577-uart" },
 672        { /* Sentinel */ }
 673};
 674MODULE_DEVICE_TABLE(of, mtk8250_of_match);
 675
 676static struct platform_driver mtk8250_platform_driver = {
 677        .driver = {
 678                .name           = "mt6577-uart",
 679                .pm             = &mtk8250_pm_ops,
 680                .of_match_table = mtk8250_of_match,
 681        },
 682        .probe                  = mtk8250_probe,
 683        .remove                 = mtk8250_remove,
 684};
 685module_platform_driver(mtk8250_platform_driver);
 686
 687#ifdef CONFIG_SERIAL_8250_CONSOLE
 688static int __init early_mtk8250_setup(struct earlycon_device *device,
 689                                        const char *options)
 690{
 691        if (!device->port.membase)
 692                return -ENODEV;
 693
 694        device->port.iotype = UPIO_MEM32;
 695        device->port.regshift = 2;
 696
 697        return early_serial8250_setup(device, NULL);
 698}
 699
 700OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
 701#endif
 702
 703MODULE_AUTHOR("Matthias Brugger");
 704MODULE_LICENSE("GPL");
 705MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
 706