linux/drivers/usb/host/ohci-hcd.c
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   1// SPDX-License-Identifier: GPL-1.0+
   2/*
   3 * Open Host Controller Interface (OHCI) driver for USB.
   4 *
   5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6 *
   7 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   9 *
  10 * [ Initialisation is based on Linus'  ]
  11 * [ uhci code and gregs ohci fragments ]
  12 * [ (C) Copyright 1999 Linus Torvalds  ]
  13 * [ (C) Copyright 1999 Gregory P. Smith]
  14 *
  15 *
  16 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  17 * interfaces (though some non-x86 Intel chips use it).  It supports
  18 * smarter hardware than UHCI.  A download link for the spec available
  19 * through the https://www.usb.org website.
  20 *
  21 * This file is licenced under the GPL.
  22 */
  23
  24#include <linux/module.h>
  25#include <linux/moduleparam.h>
  26#include <linux/pci.h>
  27#include <linux/kernel.h>
  28#include <linux/delay.h>
  29#include <linux/ioport.h>
  30#include <linux/sched.h>
  31#include <linux/slab.h>
  32#include <linux/errno.h>
  33#include <linux/init.h>
  34#include <linux/timer.h>
  35#include <linux/list.h>
  36#include <linux/usb.h>
  37#include <linux/usb/otg.h>
  38#include <linux/usb/hcd.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/dmapool.h>
  41#include <linux/workqueue.h>
  42#include <linux/debugfs.h>
  43#include <linux/genalloc.h>
  44
  45#include <asm/io.h>
  46#include <asm/irq.h>
  47#include <asm/unaligned.h>
  48#include <asm/byteorder.h>
  49
  50
  51#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  52#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  53
  54/*-------------------------------------------------------------------------*/
  55
  56/* For initializing controller (mask in an HCFS mode too) */
  57#define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58#define OHCI_INTR_INIT \
  59                (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  60                | OHCI_INTR_RD | OHCI_INTR_WDH)
  61
  62#ifdef __hppa__
  63/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  64#define IR_DISABLE
  65#endif
  66
  67#ifdef CONFIG_ARCH_OMAP
  68/* OMAP doesn't support IR (no SMM; not needed) */
  69#define IR_DISABLE
  70#endif
  71
  72/*-------------------------------------------------------------------------*/
  73
  74static const char       hcd_name [] = "ohci_hcd";
  75
  76#define STATECHANGE_DELAY       msecs_to_jiffies(300)
  77#define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  78#define IO_WATCHDOG_OFF         0xffffff00
  79
  80#include "ohci.h"
  81#include "pci-quirks.h"
  82
  83static void ohci_dump(struct ohci_hcd *ohci);
  84static void ohci_stop(struct usb_hcd *hcd);
  85static void io_watchdog_func(struct timer_list *t);
  86
  87#include "ohci-hub.c"
  88#include "ohci-dbg.c"
  89#include "ohci-mem.c"
  90#include "ohci-q.c"
  91
  92
  93/*
  94 * On architectures with edge-triggered interrupts we must never return
  95 * IRQ_NONE.
  96 */
  97#if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  98#define IRQ_NOTMINE     IRQ_HANDLED
  99#else
 100#define IRQ_NOTMINE     IRQ_NONE
 101#endif
 102
 103
 104/* Some boards misreport power switching/overcurrent */
 105static bool distrust_firmware;
 106module_param (distrust_firmware, bool, 0);
 107MODULE_PARM_DESC (distrust_firmware,
 108        "true to distrust firmware power/overcurrent setup");
 109
 110/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 111static bool no_handshake;
 112module_param (no_handshake, bool, 0);
 113MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 114
 115/*-------------------------------------------------------------------------*/
 116
 117static int number_of_tds(struct urb *urb)
 118{
 119        int                     len, i, num, this_sg_len;
 120        struct scatterlist      *sg;
 121
 122        len = urb->transfer_buffer_length;
 123        i = urb->num_mapped_sgs;
 124
 125        if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 126                num = 0;
 127                sg = urb->sg;
 128                for (;;) {
 129                        this_sg_len = min_t(int, sg_dma_len(sg), len);
 130                        num += DIV_ROUND_UP(this_sg_len, 4096);
 131                        len -= this_sg_len;
 132                        if (--i <= 0 || len <= 0)
 133                                break;
 134                        sg = sg_next(sg);
 135                }
 136
 137        } else {                        /* Non-SG transfer */
 138                /* one TD for every 4096 Bytes (could be up to 8K) */
 139                num = DIV_ROUND_UP(len, 4096);
 140        }
 141        return num;
 142}
 143
 144/*
 145 * queue up an urb for anything except the root hub
 146 */
 147static int ohci_urb_enqueue (
 148        struct usb_hcd  *hcd,
 149        struct urb      *urb,
 150        gfp_t           mem_flags
 151) {
 152        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 153        struct ed       *ed;
 154        urb_priv_t      *urb_priv;
 155        unsigned int    pipe = urb->pipe;
 156        int             i, size = 0;
 157        unsigned long   flags;
 158        int             retval = 0;
 159
 160        /* every endpoint has a ed, locate and maybe (re)initialize it */
 161        ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 162        if (! ed)
 163                return -ENOMEM;
 164
 165        /* for the private part of the URB we need the number of TDs (size) */
 166        switch (ed->type) {
 167                case PIPE_CONTROL:
 168                        /* td_submit_urb() doesn't yet handle these */
 169                        if (urb->transfer_buffer_length > 4096)
 170                                return -EMSGSIZE;
 171
 172                        /* 1 TD for setup, 1 for ACK, plus ... */
 173                        size = 2;
 174                        fallthrough;
 175                // case PIPE_INTERRUPT:
 176                // case PIPE_BULK:
 177                default:
 178                        size += number_of_tds(urb);
 179                        /* maybe a zero-length packet to wrap it up */
 180                        if (size == 0)
 181                                size++;
 182                        else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 183                                && (urb->transfer_buffer_length
 184                                        % usb_maxpacket (urb->dev, pipe,
 185                                                usb_pipeout (pipe))) == 0)
 186                                size++;
 187                        break;
 188                case PIPE_ISOCHRONOUS: /* number of packets from URB */
 189                        size = urb->number_of_packets;
 190                        break;
 191        }
 192
 193        /* allocate the private part of the URB */
 194        urb_priv = kzalloc(struct_size(urb_priv, td, size), mem_flags);
 195        if (!urb_priv)
 196                return -ENOMEM;
 197        INIT_LIST_HEAD (&urb_priv->pending);
 198        urb_priv->length = size;
 199        urb_priv->ed = ed;
 200
 201        /* allocate the TDs (deferring hash chain updates) */
 202        for (i = 0; i < size; i++) {
 203                urb_priv->td [i] = td_alloc (ohci, mem_flags);
 204                if (!urb_priv->td [i]) {
 205                        urb_priv->length = i;
 206                        urb_free_priv (ohci, urb_priv);
 207                        return -ENOMEM;
 208                }
 209        }
 210
 211        spin_lock_irqsave (&ohci->lock, flags);
 212
 213        /* don't submit to a dead HC */
 214        if (!HCD_HW_ACCESSIBLE(hcd)) {
 215                retval = -ENODEV;
 216                goto fail;
 217        }
 218        if (ohci->rh_state != OHCI_RH_RUNNING) {
 219                retval = -ENODEV;
 220                goto fail;
 221        }
 222        retval = usb_hcd_link_urb_to_ep(hcd, urb);
 223        if (retval)
 224                goto fail;
 225
 226        /* schedule the ed if needed */
 227        if (ed->state == ED_IDLE) {
 228                retval = ed_schedule (ohci, ed);
 229                if (retval < 0) {
 230                        usb_hcd_unlink_urb_from_ep(hcd, urb);
 231                        goto fail;
 232                }
 233
 234                /* Start up the I/O watchdog timer, if it's not running */
 235                if (ohci->prev_frame_no == IO_WATCHDOG_OFF &&
 236                                list_empty(&ohci->eds_in_use) &&
 237                                !(ohci->flags & OHCI_QUIRK_QEMU)) {
 238                        ohci->prev_frame_no = ohci_frame_no(ohci);
 239                        mod_timer(&ohci->io_watchdog,
 240                                        jiffies + IO_WATCHDOG_DELAY);
 241                }
 242                list_add(&ed->in_use_list, &ohci->eds_in_use);
 243
 244                if (ed->type == PIPE_ISOCHRONOUS) {
 245                        u16     frame = ohci_frame_no(ohci);
 246
 247                        /* delay a few frames before the first TD */
 248                        frame += max_t (u16, 8, ed->interval);
 249                        frame &= ~(ed->interval - 1);
 250                        frame |= ed->branch;
 251                        urb->start_frame = frame;
 252                        ed->last_iso = frame + ed->interval * (size - 1);
 253                }
 254        } else if (ed->type == PIPE_ISOCHRONOUS) {
 255                u16     next = ohci_frame_no(ohci) + 1;
 256                u16     frame = ed->last_iso + ed->interval;
 257                u16     length = ed->interval * (size - 1);
 258
 259                /* Behind the scheduling threshold? */
 260                if (unlikely(tick_before(frame, next))) {
 261
 262                        /* URB_ISO_ASAP: Round up to the first available slot */
 263                        if (urb->transfer_flags & URB_ISO_ASAP) {
 264                                frame += (next - frame + ed->interval - 1) &
 265                                                -ed->interval;
 266
 267                        /*
 268                         * Not ASAP: Use the next slot in the stream,
 269                         * no matter what.
 270                         */
 271                        } else {
 272                                /*
 273                                 * Some OHCI hardware doesn't handle late TDs
 274                                 * correctly.  After retiring them it proceeds
 275                                 * to the next ED instead of the next TD.
 276                                 * Therefore we have to omit the late TDs
 277                                 * entirely.
 278                                 */
 279                                urb_priv->td_cnt = DIV_ROUND_UP(
 280                                                (u16) (next - frame),
 281                                                ed->interval);
 282                                if (urb_priv->td_cnt >= urb_priv->length) {
 283                                        ++urb_priv->td_cnt;     /* Mark it */
 284                                        ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 285                                                        urb, frame, length,
 286                                                        next);
 287                                }
 288                        }
 289                }
 290                urb->start_frame = frame;
 291                ed->last_iso = frame + length;
 292        }
 293
 294        /* fill the TDs and link them to the ed; and
 295         * enable that part of the schedule, if needed
 296         * and update count of queued periodic urbs
 297         */
 298        urb->hcpriv = urb_priv;
 299        td_submit_urb (ohci, urb);
 300
 301fail:
 302        if (retval)
 303                urb_free_priv (ohci, urb_priv);
 304        spin_unlock_irqrestore (&ohci->lock, flags);
 305        return retval;
 306}
 307
 308/*
 309 * decouple the URB from the HC queues (TDs, urb_priv).
 310 * reporting is always done
 311 * asynchronously, and we might be dealing with an urb that's
 312 * partially transferred, or an ED with other urbs being unlinked.
 313 */
 314static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 315{
 316        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 317        unsigned long           flags;
 318        int                     rc;
 319        urb_priv_t              *urb_priv;
 320
 321        spin_lock_irqsave (&ohci->lock, flags);
 322        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 323        if (rc == 0) {
 324
 325                /* Unless an IRQ completed the unlink while it was being
 326                 * handed to us, flag it for unlink and giveback, and force
 327                 * some upcoming INTR_SF to call finish_unlinks()
 328                 */
 329                urb_priv = urb->hcpriv;
 330                if (urb_priv->ed->state == ED_OPER)
 331                        start_ed_unlink(ohci, urb_priv->ed);
 332
 333                if (ohci->rh_state != OHCI_RH_RUNNING) {
 334                        /* With HC dead, we can clean up right away */
 335                        ohci_work(ohci);
 336                }
 337        }
 338        spin_unlock_irqrestore (&ohci->lock, flags);
 339        return rc;
 340}
 341
 342/*-------------------------------------------------------------------------*/
 343
 344/* frees config/altsetting state for endpoints,
 345 * including ED memory, dummy TD, and bulk/intr data toggle
 346 */
 347
 348static void
 349ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 350{
 351        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 352        unsigned long           flags;
 353        struct ed               *ed = ep->hcpriv;
 354        unsigned                limit = 1000;
 355
 356        /* ASSERT:  any requests/urbs are being unlinked */
 357        /* ASSERT:  nobody can be submitting urbs for this any more */
 358
 359        if (!ed)
 360                return;
 361
 362rescan:
 363        spin_lock_irqsave (&ohci->lock, flags);
 364
 365        if (ohci->rh_state != OHCI_RH_RUNNING) {
 366sanitize:
 367                ed->state = ED_IDLE;
 368                ohci_work(ohci);
 369        }
 370
 371        switch (ed->state) {
 372        case ED_UNLINK:         /* wait for hw to finish? */
 373                /* major IRQ delivery trouble loses INTR_SF too... */
 374                if (limit-- == 0) {
 375                        ohci_warn(ohci, "ED unlink timeout\n");
 376                        goto sanitize;
 377                }
 378                spin_unlock_irqrestore (&ohci->lock, flags);
 379                schedule_timeout_uninterruptible(1);
 380                goto rescan;
 381        case ED_IDLE:           /* fully unlinked */
 382                if (list_empty (&ed->td_list)) {
 383                        td_free (ohci, ed->dummy);
 384                        ed_free (ohci, ed);
 385                        break;
 386                }
 387                fallthrough;
 388        default:
 389                /* caller was supposed to have unlinked any requests;
 390                 * that's not our job.  can't recover; must leak ed.
 391                 */
 392                ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 393                        ed, ep->desc.bEndpointAddress, ed->state,
 394                        list_empty (&ed->td_list) ? "" : " (has tds)");
 395                td_free (ohci, ed->dummy);
 396                break;
 397        }
 398        ep->hcpriv = NULL;
 399        spin_unlock_irqrestore (&ohci->lock, flags);
 400}
 401
 402static int ohci_get_frame (struct usb_hcd *hcd)
 403{
 404        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 405
 406        return ohci_frame_no(ohci);
 407}
 408
 409static void ohci_usb_reset (struct ohci_hcd *ohci)
 410{
 411        ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 412        ohci->hc_control &= OHCI_CTRL_RWC;
 413        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 414        ohci->rh_state = OHCI_RH_HALTED;
 415}
 416
 417/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 418 * other cases where the next software may expect clean state from the
 419 * "firmware".  this is bus-neutral, unlike shutdown() methods.
 420 */
 421static void _ohci_shutdown(struct usb_hcd *hcd)
 422{
 423        struct ohci_hcd *ohci;
 424
 425        ohci = hcd_to_ohci (hcd);
 426        ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 427
 428        /* Software reset, after which the controller goes into SUSPEND */
 429        ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 430        ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 431        udelay(10);
 432
 433        ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 434        ohci->rh_state = OHCI_RH_HALTED;
 435}
 436
 437static void ohci_shutdown(struct usb_hcd *hcd)
 438{
 439        struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 440        unsigned long flags;
 441
 442        spin_lock_irqsave(&ohci->lock, flags);
 443        _ohci_shutdown(hcd);
 444        spin_unlock_irqrestore(&ohci->lock, flags);
 445}
 446
 447/*-------------------------------------------------------------------------*
 448 * HC functions
 449 *-------------------------------------------------------------------------*/
 450
 451/* init memory, and kick BIOS/SMM off */
 452
 453static int ohci_init (struct ohci_hcd *ohci)
 454{
 455        int ret;
 456        struct usb_hcd *hcd = ohci_to_hcd(ohci);
 457
 458        /* Accept arbitrarily long scatter-gather lists */
 459        if (!hcd->localmem_pool)
 460                hcd->self.sg_tablesize = ~0;
 461
 462        if (distrust_firmware)
 463                ohci->flags |= OHCI_QUIRK_HUB_POWER;
 464
 465        ohci->rh_state = OHCI_RH_HALTED;
 466        ohci->regs = hcd->regs;
 467
 468        /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 469         * was never needed for most non-PCI systems ... remove the code?
 470         */
 471
 472#ifndef IR_DISABLE
 473        /* SMM owns the HC?  not for long! */
 474        if (!no_handshake && ohci_readl (ohci,
 475                                        &ohci->regs->control) & OHCI_CTRL_IR) {
 476                u32 temp;
 477
 478                ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 479
 480                /* this timeout is arbitrary.  we make it long, so systems
 481                 * depending on usb keyboards may be usable even if the
 482                 * BIOS/SMM code seems pretty broken.
 483                 */
 484                temp = 500;     /* arbitrary: five seconds */
 485
 486                ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 487                ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 488                while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 489                        msleep (10);
 490                        if (--temp == 0) {
 491                                ohci_err (ohci, "USB HC takeover failed!"
 492                                        "  (BIOS/SMM bug)\n");
 493                                return -EBUSY;
 494                        }
 495                }
 496                ohci_usb_reset (ohci);
 497        }
 498#endif
 499
 500        /* Disable HC interrupts */
 501        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 502
 503        /* flush the writes, and save key bits like RWC */
 504        if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 505                ohci->hc_control |= OHCI_CTRL_RWC;
 506
 507        /* Read the number of ports unless overridden */
 508        if (ohci->num_ports == 0)
 509                ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 510
 511        if (ohci->hcca)
 512                return 0;
 513
 514        timer_setup(&ohci->io_watchdog, io_watchdog_func, 0);
 515        ohci->prev_frame_no = IO_WATCHDOG_OFF;
 516
 517        if (hcd->localmem_pool)
 518                ohci->hcca = gen_pool_dma_alloc_align(hcd->localmem_pool,
 519                                                sizeof(*ohci->hcca),
 520                                                &ohci->hcca_dma, 256);
 521        else
 522                ohci->hcca = dma_alloc_coherent(hcd->self.controller,
 523                                                sizeof(*ohci->hcca),
 524                                                &ohci->hcca_dma,
 525                                                GFP_KERNEL);
 526        if (!ohci->hcca)
 527                return -ENOMEM;
 528
 529        if ((ret = ohci_mem_init (ohci)) < 0)
 530                ohci_stop (hcd);
 531        else {
 532                create_debug_files (ohci);
 533        }
 534
 535        return ret;
 536}
 537
 538/*-------------------------------------------------------------------------*/
 539
 540/* Start an OHCI controller, set the BUS operational
 541 * resets USB and controller
 542 * enable interrupts
 543 */
 544static int ohci_run (struct ohci_hcd *ohci)
 545{
 546        u32                     mask, val;
 547        int                     first = ohci->fminterval == 0;
 548        struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 549
 550        ohci->rh_state = OHCI_RH_HALTED;
 551
 552        /* boot firmware should have set this up (5.1.1.3.1) */
 553        if (first) {
 554
 555                val = ohci_readl (ohci, &ohci->regs->fminterval);
 556                ohci->fminterval = val & 0x3fff;
 557                if (ohci->fminterval != FI)
 558                        ohci_dbg (ohci, "fminterval delta %d\n",
 559                                ohci->fminterval - FI);
 560                ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 561                /* also: power/overcurrent flags in roothub.a */
 562        }
 563
 564        /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 565         * to be checked in case boot firmware (BIOS/SMM/...) has set up
 566         * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 567         * If the bus glue detected wakeup capability then it should
 568         * already be enabled; if so we'll just enable it again.
 569         */
 570        if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 571                device_set_wakeup_capable(hcd->self.controller, 1);
 572
 573        switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 574        case OHCI_USB_OPER:
 575                val = 0;
 576                break;
 577        case OHCI_USB_SUSPEND:
 578        case OHCI_USB_RESUME:
 579                ohci->hc_control &= OHCI_CTRL_RWC;
 580                ohci->hc_control |= OHCI_USB_RESUME;
 581                val = 10 /* msec wait */;
 582                break;
 583        // case OHCI_USB_RESET:
 584        default:
 585                ohci->hc_control &= OHCI_CTRL_RWC;
 586                ohci->hc_control |= OHCI_USB_RESET;
 587                val = 50 /* msec wait */;
 588                break;
 589        }
 590        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 591        // flush the writes
 592        (void) ohci_readl (ohci, &ohci->regs->control);
 593        msleep(val);
 594
 595        memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 596
 597        /* 2msec timelimit here means no irqs/preempt */
 598        spin_lock_irq (&ohci->lock);
 599
 600retry:
 601        /* HC Reset requires max 10 us delay */
 602        ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 603        val = 30;       /* ... allow extra time */
 604        while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 605                if (--val == 0) {
 606                        spin_unlock_irq (&ohci->lock);
 607                        ohci_err (ohci, "USB HC reset timed out!\n");
 608                        return -1;
 609                }
 610                udelay (1);
 611        }
 612
 613        /* now we're in the SUSPEND state ... must go OPERATIONAL
 614         * within 2msec else HC enters RESUME
 615         *
 616         * ... but some hardware won't init fmInterval "by the book"
 617         * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 618         * this if we write fmInterval after we're OPERATIONAL.
 619         * Unclear about ALi, ServerWorks, and others ... this could
 620         * easily be a longstanding bug in chip init on Linux.
 621         */
 622        if (ohci->flags & OHCI_QUIRK_INITRESET) {
 623                ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 624                // flush those writes
 625                (void) ohci_readl (ohci, &ohci->regs->control);
 626        }
 627
 628        /* Tell the controller where the control and bulk lists are
 629         * The lists are empty now. */
 630        ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 631        ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 632
 633        /* a reset clears this */
 634        ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 635
 636        periodic_reinit (ohci);
 637
 638        /* some OHCI implementations are finicky about how they init.
 639         * bogus values here mean not even enumeration could work.
 640         */
 641        if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 642                        || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 643                if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 644                        ohci->flags |= OHCI_QUIRK_INITRESET;
 645                        ohci_dbg (ohci, "enabling initreset quirk\n");
 646                        goto retry;
 647                }
 648                spin_unlock_irq (&ohci->lock);
 649                ohci_err (ohci, "init err (%08x %04x)\n",
 650                        ohci_readl (ohci, &ohci->regs->fminterval),
 651                        ohci_readl (ohci, &ohci->regs->periodicstart));
 652                return -EOVERFLOW;
 653        }
 654
 655        /* use rhsc irqs after hub_wq is allocated */
 656        set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 657        hcd->uses_new_polling = 1;
 658
 659        /* start controller operations */
 660        ohci->hc_control &= OHCI_CTRL_RWC;
 661        ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 662        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 663        ohci->rh_state = OHCI_RH_RUNNING;
 664
 665        /* wake on ConnectStatusChange, matching external hubs */
 666        ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 667
 668        /* Choose the interrupts we care about now, others later on demand */
 669        mask = OHCI_INTR_INIT;
 670        ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 671        ohci_writel (ohci, mask, &ohci->regs->intrenable);
 672
 673        /* handle root hub init quirks ... */
 674        val = roothub_a (ohci);
 675        /* Configure for per-port over-current protection by default */
 676        val &= ~RH_A_NOCP;
 677        val |= RH_A_OCPM;
 678        if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 679                /* NSC 87560 and maybe others.
 680                 * Ganged power switching, no over-current protection.
 681                 */
 682                val |= RH_A_NOCP;
 683                val &= ~(RH_A_POTPGT | RH_A_NPS | RH_A_PSM | RH_A_OCPM);
 684        } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 685                        (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 686                /* hub power always on; required for AMD-756 and some
 687                 * Mac platforms.
 688                 */
 689                val |= RH_A_NPS;
 690        }
 691        ohci_writel(ohci, val, &ohci->regs->roothub.a);
 692
 693        ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 694        ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 695                                                &ohci->regs->roothub.b);
 696        // flush those writes
 697        (void) ohci_readl (ohci, &ohci->regs->control);
 698
 699        ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 700        spin_unlock_irq (&ohci->lock);
 701
 702        // POTPGT delay is bits 24-31, in 2 ms units.
 703        mdelay ((val >> 23) & 0x1fe);
 704
 705        ohci_dump(ohci);
 706
 707        return 0;
 708}
 709
 710/* ohci_setup routine for generic controller initialization */
 711
 712int ohci_setup(struct usb_hcd *hcd)
 713{
 714        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 715
 716        ohci_hcd_init(ohci);
 717        
 718        return ohci_init(ohci);
 719}
 720EXPORT_SYMBOL_GPL(ohci_setup);
 721
 722/* ohci_start routine for generic controller start of all OHCI bus glue */
 723static int ohci_start(struct usb_hcd *hcd)
 724{
 725        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 726        int     ret;
 727
 728        ret = ohci_run(ohci);
 729        if (ret < 0) {
 730                ohci_err(ohci, "can't start\n");
 731                ohci_stop(hcd);
 732        }
 733        return ret;
 734}
 735
 736/*-------------------------------------------------------------------------*/
 737
 738/*
 739 * Some OHCI controllers are known to lose track of completed TDs.  They
 740 * don't add the TDs to the hardware done queue, which means we never see
 741 * them as being completed.
 742 *
 743 * This watchdog routine checks for such problems.  Without some way to
 744 * tell when those TDs have completed, we would never take their EDs off
 745 * the unlink list.  As a result, URBs could never be dequeued and
 746 * endpoints could never be released.
 747 */
 748static void io_watchdog_func(struct timer_list *t)
 749{
 750        struct ohci_hcd *ohci = from_timer(ohci, t, io_watchdog);
 751        bool            takeback_all_pending = false;
 752        u32             status;
 753        u32             head;
 754        struct ed       *ed;
 755        struct td       *td, *td_start, *td_next;
 756        unsigned        frame_no, prev_frame_no = IO_WATCHDOG_OFF;
 757        unsigned long   flags;
 758
 759        spin_lock_irqsave(&ohci->lock, flags);
 760
 761        /*
 762         * One way to lose track of completed TDs is if the controller
 763         * never writes back the done queue head.  If it hasn't been
 764         * written back since the last time this function ran and if it
 765         * was non-empty at that time, something is badly wrong with the
 766         * hardware.
 767         */
 768        status = ohci_readl(ohci, &ohci->regs->intrstatus);
 769        if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 770                if (ohci->prev_donehead) {
 771                        ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 772 died:
 773                        usb_hc_died(ohci_to_hcd(ohci));
 774                        ohci_dump(ohci);
 775                        _ohci_shutdown(ohci_to_hcd(ohci));
 776                        goto done;
 777                } else {
 778                        /* No write back because the done queue was empty */
 779                        takeback_all_pending = true;
 780                }
 781        }
 782
 783        /* Check every ED which might have pending TDs */
 784        list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 785                if (ed->pending_td) {
 786                        if (takeback_all_pending ||
 787                                        OKAY_TO_TAKEBACK(ohci, ed)) {
 788                                unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 789
 790                                ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 791                                                0x007f & tmp,
 792                                                (0x000f & (tmp >> 7)) +
 793                                                        ((tmp & ED_IN) >> 5));
 794                                add_to_done_list(ohci, ed->pending_td);
 795                        }
 796                }
 797
 798                /* Starting from the latest pending TD, */
 799                td = ed->pending_td;
 800
 801                /* or the last TD on the done list, */
 802                if (!td) {
 803                        list_for_each_entry(td_next, &ed->td_list, td_list) {
 804                                if (!td_next->next_dl_td)
 805                                        break;
 806                                td = td_next;
 807                        }
 808                }
 809
 810                /* find the last TD processed by the controller. */
 811                head = hc32_to_cpu(ohci, READ_ONCE(ed->hwHeadP)) & TD_MASK;
 812                td_start = td;
 813                td_next = list_prepare_entry(td, &ed->td_list, td_list);
 814                list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 815                        if (head == (u32) td_next->td_dma)
 816                                break;
 817                        td = td_next;   /* head pointer has passed this TD */
 818                }
 819                if (td != td_start) {
 820                        /*
 821                         * In case a WDH cycle is in progress, we will wait
 822                         * for the next two cycles to complete before assuming
 823                         * this TD will never get on the done queue.
 824                         */
 825                        ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 826                        ed->pending_td = td;
 827                }
 828        }
 829
 830        ohci_work(ohci);
 831
 832        if (ohci->rh_state == OHCI_RH_RUNNING) {
 833
 834                /*
 835                 * Sometimes a controller just stops working.  We can tell
 836                 * by checking that the frame counter has advanced since
 837                 * the last time we ran.
 838                 *
 839                 * But be careful: Some controllers violate the spec by
 840                 * stopping their frame counter when no ports are active.
 841                 */
 842                frame_no = ohci_frame_no(ohci);
 843                if (frame_no == ohci->prev_frame_no) {
 844                        int             active_cnt = 0;
 845                        int             i;
 846                        unsigned        tmp;
 847
 848                        for (i = 0; i < ohci->num_ports; ++i) {
 849                                tmp = roothub_portstatus(ohci, i);
 850                                /* Enabled and not suspended? */
 851                                if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 852                                        ++active_cnt;
 853                        }
 854
 855                        if (active_cnt > 0) {
 856                                ohci_err(ohci, "frame counter not updating; disabled\n");
 857                                goto died;
 858                        }
 859                }
 860                if (!list_empty(&ohci->eds_in_use)) {
 861                        prev_frame_no = frame_no;
 862                        ohci->prev_wdh_cnt = ohci->wdh_cnt;
 863                        ohci->prev_donehead = ohci_readl(ohci,
 864                                        &ohci->regs->donehead);
 865                        mod_timer(&ohci->io_watchdog,
 866                                        jiffies + IO_WATCHDOG_DELAY);
 867                }
 868        }
 869
 870 done:
 871        ohci->prev_frame_no = prev_frame_no;
 872        spin_unlock_irqrestore(&ohci->lock, flags);
 873}
 874
 875/* an interrupt happens */
 876
 877static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 878{
 879        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 880        struct ohci_regs __iomem *regs = ohci->regs;
 881        int                     ints;
 882
 883        /* Read interrupt status (and flush pending writes).  We ignore the
 884         * optimization of checking the LSB of hcca->done_head; it doesn't
 885         * work on all systems (edge triggering for OHCI can be a factor).
 886         */
 887        ints = ohci_readl(ohci, &regs->intrstatus);
 888
 889        /* Check for an all 1's result which is a typical consequence
 890         * of dead, unclocked, or unplugged (CardBus...) devices
 891         */
 892        if (ints == ~(u32)0) {
 893                ohci->rh_state = OHCI_RH_HALTED;
 894                ohci_dbg (ohci, "device removed!\n");
 895                usb_hc_died(hcd);
 896                return IRQ_HANDLED;
 897        }
 898
 899        /* We only care about interrupts that are enabled */
 900        ints &= ohci_readl(ohci, &regs->intrenable);
 901
 902        /* interrupt for some other device? */
 903        if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 904                return IRQ_NOTMINE;
 905
 906        if (ints & OHCI_INTR_UE) {
 907                // e.g. due to PCI Master/Target Abort
 908                if (quirk_nec(ohci)) {
 909                        /* Workaround for a silicon bug in some NEC chips used
 910                         * in Apple's PowerBooks. Adapted from Darwin code.
 911                         */
 912                        ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 913
 914                        ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 915
 916                        schedule_work (&ohci->nec_work);
 917                } else {
 918                        ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 919                        ohci->rh_state = OHCI_RH_HALTED;
 920                        usb_hc_died(hcd);
 921                }
 922
 923                ohci_dump(ohci);
 924                ohci_usb_reset (ohci);
 925        }
 926
 927        if (ints & OHCI_INTR_RHSC) {
 928                ohci_dbg(ohci, "rhsc\n");
 929                ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 930                ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 931                                &regs->intrstatus);
 932
 933                /* NOTE: Vendors didn't always make the same implementation
 934                 * choices for RHSC.  Many followed the spec; RHSC triggers
 935                 * on an edge, like setting and maybe clearing a port status
 936                 * change bit.  With others it's level-triggered, active
 937                 * until hub_wq clears all the port status change bits.  We'll
 938                 * always disable it here and rely on polling until hub_wq
 939                 * re-enables it.
 940                 */
 941                ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 942                usb_hcd_poll_rh_status(hcd);
 943        }
 944
 945        /* For connect and disconnect events, we expect the controller
 946         * to turn on RHSC along with RD.  But for remote wakeup events
 947         * this might not happen.
 948         */
 949        else if (ints & OHCI_INTR_RD) {
 950                ohci_dbg(ohci, "resume detect\n");
 951                ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 952                set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 953                if (ohci->autostop) {
 954                        spin_lock (&ohci->lock);
 955                        ohci_rh_resume (ohci);
 956                        spin_unlock (&ohci->lock);
 957                } else
 958                        usb_hcd_resume_root_hub(hcd);
 959        }
 960
 961        spin_lock(&ohci->lock);
 962        if (ints & OHCI_INTR_WDH)
 963                update_done_list(ohci);
 964
 965        /* could track INTR_SO to reduce available PCI/... bandwidth */
 966
 967        /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 968         * when there's still unlinking to be done (next frame).
 969         */
 970        ohci_work(ohci);
 971        if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 972                        && ohci->rh_state == OHCI_RH_RUNNING)
 973                ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 974
 975        if (ohci->rh_state == OHCI_RH_RUNNING) {
 976                ohci_writel (ohci, ints, &regs->intrstatus);
 977                if (ints & OHCI_INTR_WDH)
 978                        ++ohci->wdh_cnt;
 979
 980                ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 981                // flush those writes
 982                (void) ohci_readl (ohci, &ohci->regs->control);
 983        }
 984        spin_unlock(&ohci->lock);
 985
 986        return IRQ_HANDLED;
 987}
 988
 989/*-------------------------------------------------------------------------*/
 990
 991static void ohci_stop (struct usb_hcd *hcd)
 992{
 993        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 994
 995        ohci_dump(ohci);
 996
 997        if (quirk_nec(ohci))
 998                flush_work(&ohci->nec_work);
 999        del_timer_sync(&ohci->io_watchdog);
1000        ohci->prev_frame_no = IO_WATCHDOG_OFF;
1001
1002        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1003        ohci_usb_reset(ohci);
1004        free_irq(hcd->irq, hcd);
1005        hcd->irq = 0;
1006
1007        if (quirk_amdiso(ohci))
1008                usb_amd_dev_put();
1009
1010        remove_debug_files (ohci);
1011        ohci_mem_cleanup (ohci);
1012        if (ohci->hcca) {
1013                if (hcd->localmem_pool)
1014                        gen_pool_free(hcd->localmem_pool,
1015                                      (unsigned long)ohci->hcca,
1016                                      sizeof(*ohci->hcca));
1017                else
1018                        dma_free_coherent(hcd->self.controller,
1019                                          sizeof(*ohci->hcca),
1020                                          ohci->hcca, ohci->hcca_dma);
1021                ohci->hcca = NULL;
1022                ohci->hcca_dma = 0;
1023        }
1024}
1025
1026/*-------------------------------------------------------------------------*/
1027
1028#if defined(CONFIG_PM) || defined(CONFIG_USB_PCI)
1029
1030/* must not be called from interrupt context */
1031int ohci_restart(struct ohci_hcd *ohci)
1032{
1033        int temp;
1034        int i;
1035        struct urb_priv *priv;
1036
1037        ohci_init(ohci);
1038        spin_lock_irq(&ohci->lock);
1039        ohci->rh_state = OHCI_RH_HALTED;
1040
1041        /* Recycle any "live" eds/tds (and urbs). */
1042        if (!list_empty (&ohci->pending))
1043                ohci_dbg(ohci, "abort schedule...\n");
1044        list_for_each_entry (priv, &ohci->pending, pending) {
1045                struct urb      *urb = priv->td[0]->urb;
1046                struct ed       *ed = priv->ed;
1047
1048                switch (ed->state) {
1049                case ED_OPER:
1050                        ed->state = ED_UNLINK;
1051                        ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1052                        ed_deschedule (ohci, ed);
1053
1054                        ed->ed_next = ohci->ed_rm_list;
1055                        ed->ed_prev = NULL;
1056                        ohci->ed_rm_list = ed;
1057                        fallthrough;
1058                case ED_UNLINK:
1059                        break;
1060                default:
1061                        ohci_dbg(ohci, "bogus ed %p state %d\n",
1062                                        ed, ed->state);
1063                }
1064
1065                if (!urb->unlinked)
1066                        urb->unlinked = -ESHUTDOWN;
1067        }
1068        ohci_work(ohci);
1069        spin_unlock_irq(&ohci->lock);
1070
1071        /* paranoia, in case that didn't work: */
1072
1073        /* empty the interrupt branches */
1074        for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1075        for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1076
1077        /* no EDs to remove */
1078        ohci->ed_rm_list = NULL;
1079
1080        /* empty control and bulk lists */
1081        ohci->ed_controltail = NULL;
1082        ohci->ed_bulktail    = NULL;
1083
1084        if ((temp = ohci_run (ohci)) < 0) {
1085                ohci_err (ohci, "can't restart, %d\n", temp);
1086                return temp;
1087        }
1088        ohci_dbg(ohci, "restart complete\n");
1089        return 0;
1090}
1091EXPORT_SYMBOL_GPL(ohci_restart);
1092
1093#endif
1094
1095#ifdef CONFIG_PM
1096
1097int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1098{
1099        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1100        unsigned long   flags;
1101        int             rc = 0;
1102
1103        /* Disable irq emission and mark HW unaccessible. Use
1104         * the spinlock to properly synchronize with possible pending
1105         * RH suspend or resume activity.
1106         */
1107        spin_lock_irqsave (&ohci->lock, flags);
1108        ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1109        (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1110
1111        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1112        spin_unlock_irqrestore (&ohci->lock, flags);
1113
1114        synchronize_irq(hcd->irq);
1115
1116        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1117                ohci_resume(hcd, false);
1118                rc = -EBUSY;
1119        }
1120        return rc;
1121}
1122EXPORT_SYMBOL_GPL(ohci_suspend);
1123
1124
1125int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1126{
1127        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1128        int                     port;
1129        bool                    need_reinit = false;
1130
1131        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1132
1133        /* Make sure resume from hibernation re-enumerates everything */
1134        if (hibernated)
1135                ohci_usb_reset(ohci);
1136
1137        /* See if the controller is already running or has been reset */
1138        ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1139        if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1140                need_reinit = true;
1141        } else {
1142                switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1143                case OHCI_USB_OPER:
1144                case OHCI_USB_RESET:
1145                        need_reinit = true;
1146                }
1147        }
1148
1149        /* If needed, reinitialize and suspend the root hub */
1150        if (need_reinit) {
1151                spin_lock_irq(&ohci->lock);
1152                ohci_rh_resume(ohci);
1153                ohci_rh_suspend(ohci, 0);
1154                spin_unlock_irq(&ohci->lock);
1155        }
1156
1157        /* Normally just turn on port power and enable interrupts */
1158        else {
1159                ohci_dbg(ohci, "powerup ports\n");
1160                for (port = 0; port < ohci->num_ports; port++)
1161                        ohci_writel(ohci, RH_PS_PPS,
1162                                        &ohci->regs->roothub.portstatus[port]);
1163
1164                ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1165                ohci_readl(ohci, &ohci->regs->intrenable);
1166                msleep(20);
1167        }
1168
1169        usb_hcd_resume_root_hub(hcd);
1170
1171        return 0;
1172}
1173EXPORT_SYMBOL_GPL(ohci_resume);
1174
1175#endif
1176
1177/*-------------------------------------------------------------------------*/
1178
1179/*
1180 * Generic structure: This gets copied for platform drivers so that
1181 * individual entries can be overridden as needed.
1182 */
1183
1184static const struct hc_driver ohci_hc_driver = {
1185        .description =          hcd_name,
1186        .product_desc =         "OHCI Host Controller",
1187        .hcd_priv_size =        sizeof(struct ohci_hcd),
1188
1189        /*
1190         * generic hardware linkage
1191        */
1192        .irq =                  ohci_irq,
1193        .flags =                HCD_MEMORY | HCD_DMA | HCD_USB11,
1194
1195        /*
1196        * basic lifecycle operations
1197        */
1198        .reset =                ohci_setup,
1199        .start =                ohci_start,
1200        .stop =                 ohci_stop,
1201        .shutdown =             ohci_shutdown,
1202
1203        /*
1204         * managing i/o requests and associated device resources
1205        */
1206        .urb_enqueue =          ohci_urb_enqueue,
1207        .urb_dequeue =          ohci_urb_dequeue,
1208        .endpoint_disable =     ohci_endpoint_disable,
1209
1210        /*
1211        * scheduling support
1212        */
1213        .get_frame_number =     ohci_get_frame,
1214
1215        /*
1216        * root hub support
1217        */
1218        .hub_status_data =      ohci_hub_status_data,
1219        .hub_control =          ohci_hub_control,
1220#ifdef CONFIG_PM
1221        .bus_suspend =          ohci_bus_suspend,
1222        .bus_resume =           ohci_bus_resume,
1223#endif
1224        .start_port_reset =     ohci_start_port_reset,
1225};
1226
1227void ohci_init_driver(struct hc_driver *drv,
1228                const struct ohci_driver_overrides *over)
1229{
1230        /* Copy the generic table to drv and then apply the overrides */
1231        *drv = ohci_hc_driver;
1232
1233        if (over) {
1234                drv->product_desc = over->product_desc;
1235                drv->hcd_priv_size += over->extra_priv_size;
1236                if (over->reset)
1237                        drv->reset = over->reset;
1238        }
1239}
1240EXPORT_SYMBOL_GPL(ohci_init_driver);
1241
1242/*-------------------------------------------------------------------------*/
1243
1244MODULE_AUTHOR (DRIVER_AUTHOR);
1245MODULE_DESCRIPTION(DRIVER_DESC);
1246MODULE_LICENSE ("GPL");
1247
1248#if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1249#include "ohci-sa1111.c"
1250#define SA1111_DRIVER           ohci_hcd_sa1111_driver
1251#endif
1252
1253#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1254#include "ohci-ppc-of.c"
1255#define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1256#endif
1257
1258#ifdef CONFIG_PPC_PS3
1259#include "ohci-ps3.c"
1260#define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1261#endif
1262
1263#ifdef CONFIG_MFD_SM501
1264#include "ohci-sm501.c"
1265#define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1266#endif
1267
1268#ifdef CONFIG_MFD_TC6393XB
1269#include "ohci-tmio.c"
1270#define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1271#endif
1272
1273static int __init ohci_hcd_mod_init(void)
1274{
1275        int retval = 0;
1276
1277        if (usb_disabled())
1278                return -ENODEV;
1279
1280        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1281        pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1282                sizeof (struct ed), sizeof (struct td));
1283        set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1284
1285        ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1286
1287#ifdef PS3_SYSTEM_BUS_DRIVER
1288        retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1289        if (retval < 0)
1290                goto error_ps3;
1291#endif
1292
1293#ifdef OF_PLATFORM_DRIVER
1294        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1295        if (retval < 0)
1296                goto error_of_platform;
1297#endif
1298
1299#ifdef SA1111_DRIVER
1300        retval = sa1111_driver_register(&SA1111_DRIVER);
1301        if (retval < 0)
1302                goto error_sa1111;
1303#endif
1304
1305#ifdef SM501_OHCI_DRIVER
1306        retval = platform_driver_register(&SM501_OHCI_DRIVER);
1307        if (retval < 0)
1308                goto error_sm501;
1309#endif
1310
1311#ifdef TMIO_OHCI_DRIVER
1312        retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1313        if (retval < 0)
1314                goto error_tmio;
1315#endif
1316
1317        return retval;
1318
1319        /* Error path */
1320#ifdef TMIO_OHCI_DRIVER
1321        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1322 error_tmio:
1323#endif
1324#ifdef SM501_OHCI_DRIVER
1325        platform_driver_unregister(&SM501_OHCI_DRIVER);
1326 error_sm501:
1327#endif
1328#ifdef SA1111_DRIVER
1329        sa1111_driver_unregister(&SA1111_DRIVER);
1330 error_sa1111:
1331#endif
1332#ifdef OF_PLATFORM_DRIVER
1333        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1334 error_of_platform:
1335#endif
1336#ifdef PS3_SYSTEM_BUS_DRIVER
1337        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1338 error_ps3:
1339#endif
1340        debugfs_remove(ohci_debug_root);
1341        ohci_debug_root = NULL;
1342
1343        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1344        return retval;
1345}
1346module_init(ohci_hcd_mod_init);
1347
1348static void __exit ohci_hcd_mod_exit(void)
1349{
1350#ifdef TMIO_OHCI_DRIVER
1351        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1352#endif
1353#ifdef SM501_OHCI_DRIVER
1354        platform_driver_unregister(&SM501_OHCI_DRIVER);
1355#endif
1356#ifdef SA1111_DRIVER
1357        sa1111_driver_unregister(&SA1111_DRIVER);
1358#endif
1359#ifdef OF_PLATFORM_DRIVER
1360        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1361#endif
1362#ifdef PS3_SYSTEM_BUS_DRIVER
1363        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1364#endif
1365        debugfs_remove(ohci_debug_root);
1366        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1367}
1368module_exit(ohci_hcd_mod_exit);
1369
1370