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11#include <linux/pci.h>
12#include <linux/slab.h>
13#include <linux/module.h>
14#include <linux/acpi.h>
15#include <linux/reset.h>
16
17#include "xhci.h"
18#include "xhci-trace.h"
19#include "xhci-pci.h"
20
21#define SSIC_PORT_NUM 2
22#define SSIC_PORT_CFG2 0x880c
23#define SSIC_PORT_CFG2_OFFSET 0x30
24#define PROG_DONE (1 << 30)
25#define SSIC_PORT_UNUSED (1 << 31)
26#define SPARSE_DISABLE_BIT 17
27#define SPARSE_CNTL_ENABLE 0xC12C
28
29
30#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009 0x1009
33#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 0x1100
34#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
35
36#define PCI_VENDOR_ID_ETRON 0x1b6f
37#define PCI_DEVICE_ID_EJ168 0x7023
38
39#define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
40#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
41#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI 0x9cb1
42#define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
43#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
44#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
45#define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8
46#define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8
47#define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8
48#define PCI_DEVICE_ID_INTEL_DNV_XHCI 0x19d0
49#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI 0x15b5
50#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI 0x15b6
51#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI 0x15c1
52#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI 0x15db
53#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI 0x15d4
54#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9
55#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec
56#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0
57#define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13
58#define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
59#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
60#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
61#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
62#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed
63
64#define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639
65#define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
66#define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
67#define PCI_DEVICE_ID_AMD_PROMONTORYA_2 0x43bb
68#define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc
69#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 0x161a
70#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 0x161b
71#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 0x161d
72#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 0x161e
73#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 0x15d6
74#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 0x15d7
75#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 0x161c
76#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8 0x161f
77
78#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
79#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
80#define PCI_DEVICE_ID_ASMEDIA_1142_XHCI 0x1242
81#define PCI_DEVICE_ID_ASMEDIA_2142_XHCI 0x2142
82#define PCI_DEVICE_ID_ASMEDIA_3242_XHCI 0x3242
83
84static const char hcd_name[] = "xhci_hcd";
85
86static struct hc_driver __read_mostly xhci_pci_hc_driver;
87
88static int xhci_pci_setup(struct usb_hcd *hcd);
89
90static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
91 .reset = xhci_pci_setup,
92};
93
94
95static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
96{
97
98
99
100
101
102
103
104 if (!pci_set_mwi(pdev))
105 xhci_dbg(xhci, "MWI active\n");
106
107 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
108 return 0;
109}
110
111static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
112{
113 struct pci_dev *pdev = to_pci_dev(dev);
114 struct xhci_driver_data *driver_data;
115 const struct pci_device_id *id;
116
117 id = pci_match_id(to_pci_driver(pdev->dev.driver)->id_table, pdev);
118
119 if (id && id->driver_data) {
120 driver_data = (struct xhci_driver_data *)id->driver_data;
121 xhci->quirks |= driver_data->quirks;
122 }
123
124
125 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
126 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
127 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
128 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
129 pdev->revision == 0x0) {
130 xhci->quirks |= XHCI_RESET_EP_QUIRK;
131 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
132 "QUIRK: Fresco Logic xHC needs configure"
133 " endpoint cmd after reset endpoint");
134 }
135 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
136 pdev->revision == 0x4) {
137 xhci->quirks |= XHCI_SLOW_SUSPEND;
138 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
139 "QUIRK: Fresco Logic xHC revision %u"
140 "must be suspended extra slowly",
141 pdev->revision);
142 }
143 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
144 xhci->quirks |= XHCI_BROKEN_STREAMS;
145
146
147
148
149 xhci->quirks |= XHCI_BROKEN_MSI;
150 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
151 "QUIRK: Fresco Logic revision %u "
152 "has broken MSI implementation",
153 pdev->revision);
154 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
155 }
156
157 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
158 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
159 xhci->quirks |= XHCI_BROKEN_STREAMS;
160
161 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
162 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1100)
163 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
164
165 if (pdev->vendor == PCI_VENDOR_ID_NEC)
166 xhci->quirks |= XHCI_NEC_HOST;
167
168 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
169 xhci->quirks |= XHCI_AMD_0x96_HOST;
170
171
172 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_quirk_pll_check())
173 xhci->quirks |= XHCI_AMD_PLL_FIX;
174
175 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
176 (pdev->device == 0x145c ||
177 pdev->device == 0x15e0 ||
178 pdev->device == 0x15e1 ||
179 pdev->device == 0x43bb))
180 xhci->quirks |= XHCI_SUSPEND_DELAY;
181
182 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
183 (pdev->device == 0x15e0 || pdev->device == 0x15e1))
184 xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND;
185
186 if (pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x15e5) {
187 xhci->quirks |= XHCI_DISABLE_SPARSE;
188 xhci->quirks |= XHCI_RESET_ON_RESUME;
189 }
190
191 if (pdev->vendor == PCI_VENDOR_ID_AMD)
192 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
193
194 if ((pdev->vendor == PCI_VENDOR_ID_AMD) &&
195 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) ||
196 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_3) ||
197 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_2) ||
198 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_1)))
199 xhci->quirks |= XHCI_U2_DISABLE_WAKE;
200
201 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
202 pdev->device == PCI_DEVICE_ID_AMD_RENOIR_XHCI)
203 xhci->quirks |= XHCI_BROKEN_D3COLD;
204
205 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
206 xhci->quirks |= XHCI_LPM_SUPPORT;
207 xhci->quirks |= XHCI_INTEL_HOST;
208 xhci->quirks |= XHCI_AVOID_BEI;
209 }
210 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
211 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
212 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
213 xhci->limit_active_eps = 64;
214 xhci->quirks |= XHCI_SW_BW_CHECKING;
215
216
217
218
219
220
221
222
223 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
224 }
225 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
226 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI ||
227 pdev->device == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI)) {
228 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
229 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
230 }
231 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
232 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
233 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
234 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
235 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
236 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI ||
237 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
238 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI ||
239 pdev->device == PCI_DEVICE_ID_INTEL_CML_XHCI)) {
240 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
241 }
242 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
243 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)
244 xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
245 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
246 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
247 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
248 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI))
249 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW;
250 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
251 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
252 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
253 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
254 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
255 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
256 xhci->quirks |= XHCI_MISSING_CAS;
257
258 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
259 (pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI ||
260 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI ||
261 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI ||
262 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI ||
263 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI ||
264 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI ||
265 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI ||
266 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
267 pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
268 pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
269 pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
270 pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI ||
271 pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI))
272 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
273
274 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
275 pdev->device == PCI_DEVICE_ID_EJ168) {
276 xhci->quirks |= XHCI_RESET_ON_RESUME;
277 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
278 xhci->quirks |= XHCI_BROKEN_STREAMS;
279 }
280 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
281 pdev->device == 0x0014) {
282 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
283 xhci->quirks |= XHCI_ZERO_64B_REGS;
284 }
285 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
286 pdev->device == 0x0015) {
287 xhci->quirks |= XHCI_RESET_ON_RESUME;
288 xhci->quirks |= XHCI_ZERO_64B_REGS;
289 }
290 if (pdev->vendor == PCI_VENDOR_ID_VIA)
291 xhci->quirks |= XHCI_RESET_ON_RESUME;
292
293
294 if (pdev->vendor == PCI_VENDOR_ID_VIA &&
295 pdev->device == 0x3432)
296 xhci->quirks |= XHCI_BROKEN_STREAMS;
297
298 if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
299 xhci->quirks |= XHCI_LPM_SUPPORT;
300 xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
301 }
302
303 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
304 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI)
305 xhci->quirks |= XHCI_BROKEN_STREAMS;
306 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
307 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI) {
308 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
309 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
310 }
311 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
312 (pdev->device == PCI_DEVICE_ID_ASMEDIA_1142_XHCI ||
313 pdev->device == PCI_DEVICE_ID_ASMEDIA_2142_XHCI ||
314 pdev->device == PCI_DEVICE_ID_ASMEDIA_3242_XHCI))
315 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
316
317 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
318 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI)
319 xhci->quirks |= XHCI_ASMEDIA_MODIFY_FLOWCONTROL;
320
321 if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
322 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
323
324 if ((pdev->vendor == PCI_VENDOR_ID_BROADCOM ||
325 pdev->vendor == PCI_VENDOR_ID_CAVIUM) &&
326 pdev->device == 0x9026)
327 xhci->quirks |= XHCI_RESET_PLL_ON_DISCONNECT;
328
329 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
330 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_2 ||
331 pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4))
332 xhci->quirks |= XHCI_NO_SOFT_RETRY;
333
334 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
335 (pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 ||
336 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 ||
337 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 ||
338 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 ||
339 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 ||
340 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 ||
341 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 ||
342 pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8))
343 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
344
345 if (xhci->quirks & XHCI_RESET_ON_RESUME)
346 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
347 "QUIRK: Resetting on resume");
348}
349
350#ifdef CONFIG_ACPI
351static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
352{
353 static const guid_t intel_dsm_guid =
354 GUID_INIT(0xac340cb7, 0xe901, 0x45bf,
355 0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23);
356 union acpi_object *obj;
357
358 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), &intel_dsm_guid, 3, 1,
359 NULL);
360 ACPI_FREE(obj);
361}
362#else
363static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
364#endif
365
366
367static int xhci_pci_setup(struct usb_hcd *hcd)
368{
369 struct xhci_hcd *xhci;
370 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
371 int retval;
372
373 xhci = hcd_to_xhci(hcd);
374 if (!xhci->sbrn)
375 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
376
377
378 xhci->imod_interval = 40000;
379
380 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
381 if (retval)
382 return retval;
383
384 if (!usb_hcd_is_primary_hcd(hcd))
385 return 0;
386
387 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
388 xhci_pme_acpi_rtd3_enable(pdev);
389
390 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
391
392
393 return xhci_pci_reinit(xhci, pdev);
394}
395
396
397
398
399
400static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
401{
402 int retval;
403 struct xhci_hcd *xhci;
404 struct usb_hcd *hcd;
405 struct xhci_driver_data *driver_data;
406 struct reset_control *reset;
407
408 driver_data = (struct xhci_driver_data *)id->driver_data;
409 if (driver_data && driver_data->quirks & XHCI_RENESAS_FW_QUIRK) {
410 retval = renesas_xhci_check_request_fw(dev, id);
411 if (retval)
412 return retval;
413 }
414
415 reset = devm_reset_control_get_optional_exclusive(&dev->dev, NULL);
416 if (IS_ERR(reset))
417 return PTR_ERR(reset);
418 reset_control_reset(reset);
419
420
421 pm_runtime_get_noresume(&dev->dev);
422
423
424
425
426
427
428
429 retval = usb_hcd_pci_probe(dev, id, &xhci_pci_hc_driver);
430
431 if (retval)
432 goto put_runtime_pm;
433
434
435 hcd = dev_get_drvdata(&dev->dev);
436 xhci = hcd_to_xhci(hcd);
437 xhci->reset = reset;
438 xhci->shared_hcd = usb_create_shared_hcd(&xhci_pci_hc_driver, &dev->dev,
439 pci_name(dev), hcd);
440 if (!xhci->shared_hcd) {
441 retval = -ENOMEM;
442 goto dealloc_usb2_hcd;
443 }
444
445 retval = xhci_ext_cap_init(xhci);
446 if (retval)
447 goto put_usb3_hcd;
448
449 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
450 IRQF_SHARED);
451 if (retval)
452 goto put_usb3_hcd;
453
454
455 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
456 HCC_MAX_PSA(xhci->hcc_params) >= 4)
457 xhci->shared_hcd->can_do_streams = 1;
458
459
460 pm_runtime_put_noidle(&dev->dev);
461
462 if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
463 pm_runtime_allow(&dev->dev);
464
465 return 0;
466
467put_usb3_hcd:
468 usb_put_hcd(xhci->shared_hcd);
469dealloc_usb2_hcd:
470 usb_hcd_pci_remove(dev);
471put_runtime_pm:
472 pm_runtime_put_noidle(&dev->dev);
473 return retval;
474}
475
476static void xhci_pci_remove(struct pci_dev *dev)
477{
478 struct xhci_hcd *xhci;
479
480 xhci = hcd_to_xhci(pci_get_drvdata(dev));
481
482 xhci->xhc_state |= XHCI_STATE_REMOVING;
483
484 if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
485 pm_runtime_forbid(&dev->dev);
486
487 if (xhci->shared_hcd) {
488 usb_remove_hcd(xhci->shared_hcd);
489 usb_put_hcd(xhci->shared_hcd);
490 xhci->shared_hcd = NULL;
491 }
492
493
494 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
495 pci_set_power_state(dev, PCI_D3hot);
496
497 usb_hcd_pci_remove(dev);
498}
499
500#ifdef CONFIG_PM
501
502
503
504
505
506
507
508static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
509{
510 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
511 u32 val;
512 void __iomem *reg;
513 int i;
514
515 for (i = 0; i < SSIC_PORT_NUM; i++) {
516 reg = (void __iomem *) xhci->cap_regs +
517 SSIC_PORT_CFG2 +
518 i * SSIC_PORT_CFG2_OFFSET;
519
520
521 val = readl(reg) & ~PROG_DONE;
522 writel(val, reg);
523
524
525 val = readl(reg);
526 if (suspend)
527 val |= SSIC_PORT_UNUSED;
528 else
529 val &= ~SSIC_PORT_UNUSED;
530 writel(val, reg);
531
532
533 val = readl(reg) | PROG_DONE;
534 writel(val, reg);
535 readl(reg);
536 }
537}
538
539
540
541
542
543static void xhci_pme_quirk(struct usb_hcd *hcd)
544{
545 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
546 void __iomem *reg;
547 u32 val;
548
549 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
550 val = readl(reg);
551 writel(val | BIT(28), reg);
552 readl(reg);
553}
554
555static void xhci_sparse_control_quirk(struct usb_hcd *hcd)
556{
557 u32 reg;
558
559 reg = readl(hcd->regs + SPARSE_CNTL_ENABLE);
560 reg &= ~BIT(SPARSE_DISABLE_BIT);
561 writel(reg, hcd->regs + SPARSE_CNTL_ENABLE);
562}
563
564static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
565{
566 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
567 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
568 int ret;
569
570
571
572
573
574 if (xhci->quirks & (XHCI_COMP_MODE_QUIRK | XHCI_BROKEN_D3COLD))
575 pci_d3cold_disable(pdev);
576
577 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
578 xhci_pme_quirk(hcd);
579
580 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
581 xhci_ssic_port_unused_quirk(hcd, true);
582
583 if (xhci->quirks & XHCI_DISABLE_SPARSE)
584 xhci_sparse_control_quirk(hcd);
585
586 ret = xhci_suspend(xhci, do_wakeup);
587 if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
588 xhci_ssic_port_unused_quirk(hcd, false);
589
590 return ret;
591}
592
593static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
594{
595 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
596 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
597 int retval = 0;
598
599 reset_control_reset(xhci->reset);
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
620 usb_enable_intel_xhci_ports(pdev);
621
622 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
623 xhci_ssic_port_unused_quirk(hcd, false);
624
625 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
626 xhci_pme_quirk(hcd);
627
628 retval = xhci_resume(xhci, hibernated);
629 return retval;
630}
631
632static void xhci_pci_shutdown(struct usb_hcd *hcd)
633{
634 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
635 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
636
637 xhci_shutdown(hcd);
638
639
640 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
641 pci_set_power_state(pdev, PCI_D3hot);
642}
643#endif
644
645
646
647static const struct xhci_driver_data reneses_data = {
648 .quirks = XHCI_RENESAS_FW_QUIRK,
649 .firmware = "renesas_usb_fw.mem",
650};
651
652
653static const struct pci_device_id pci_ids[] = {
654 { PCI_DEVICE(0x1912, 0x0014),
655 .driver_data = (unsigned long)&reneses_data,
656 },
657 { PCI_DEVICE(0x1912, 0x0015),
658 .driver_data = (unsigned long)&reneses_data,
659 },
660
661 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
662 },
663 { }
664};
665MODULE_DEVICE_TABLE(pci, pci_ids);
666
667
668
669
670
671#if IS_ENABLED(CONFIG_USB_XHCI_PCI_RENESAS)
672MODULE_FIRMWARE("renesas_usb_fw.mem");
673#endif
674
675
676static struct pci_driver xhci_pci_driver = {
677 .name = hcd_name,
678 .id_table = pci_ids,
679
680 .probe = xhci_pci_probe,
681 .remove = xhci_pci_remove,
682
683
684 .shutdown = usb_hcd_pci_shutdown,
685#ifdef CONFIG_PM
686 .driver = {
687 .pm = &usb_hcd_pci_pm_ops
688 },
689#endif
690};
691
692static int __init xhci_pci_init(void)
693{
694 xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
695#ifdef CONFIG_PM
696 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
697 xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
698 xhci_pci_hc_driver.shutdown = xhci_pci_shutdown;
699#endif
700 return pci_register_driver(&xhci_pci_driver);
701}
702module_init(xhci_pci_init);
703
704static void __exit xhci_pci_exit(void)
705{
706 pci_unregister_driver(&xhci_pci_driver);
707}
708module_exit(xhci_pci_exit);
709
710MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
711MODULE_LICENSE("GPL");
712