1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2/* 3 * Performance events: 4 * 5 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> 6 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 7 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 8 * 9 * Data type definitions, declarations, prototypes. 10 * 11 * Started by: Thomas Gleixner and Ingo Molnar 12 * 13 * For licencing details see kernel-base/COPYING 14 */ 15#ifndef _UAPI_LINUX_PERF_EVENT_H 16#define _UAPI_LINUX_PERF_EVENT_H 17 18#include <linux/types.h> 19#include <linux/ioctl.h> 20#include <asm/byteorder.h> 21 22/* 23 * User-space ABI bits: 24 */ 25 26/* 27 * attr.type 28 */ 29enum perf_type_id { 30 PERF_TYPE_HARDWARE = 0, 31 PERF_TYPE_SOFTWARE = 1, 32 PERF_TYPE_TRACEPOINT = 2, 33 PERF_TYPE_HW_CACHE = 3, 34 PERF_TYPE_RAW = 4, 35 PERF_TYPE_BREAKPOINT = 5, 36 37 PERF_TYPE_MAX, /* non-ABI */ 38}; 39 40/* 41 * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE 42 * PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA 43 * AA: hardware event ID 44 * EEEEEEEE: PMU type ID 45 * PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB 46 * BB: hardware cache ID 47 * CC: hardware cache op ID 48 * DD: hardware cache op result ID 49 * EEEEEEEE: PMU type ID 50 * If the PMU type ID is 0, the PERF_TYPE_RAW will be applied. 51 */ 52#define PERF_PMU_TYPE_SHIFT 32 53#define PERF_HW_EVENT_MASK 0xffffffff 54 55/* 56 * Generalized performance event event_id types, used by the 57 * attr.event_id parameter of the sys_perf_event_open() 58 * syscall: 59 */ 60enum perf_hw_id { 61 /* 62 * Common hardware events, generalized by the kernel: 63 */ 64 PERF_COUNT_HW_CPU_CYCLES = 0, 65 PERF_COUNT_HW_INSTRUCTIONS = 1, 66 PERF_COUNT_HW_CACHE_REFERENCES = 2, 67 PERF_COUNT_HW_CACHE_MISSES = 3, 68 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 69 PERF_COUNT_HW_BRANCH_MISSES = 5, 70 PERF_COUNT_HW_BUS_CYCLES = 6, 71 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 72 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 73 PERF_COUNT_HW_REF_CPU_CYCLES = 9, 74 75 PERF_COUNT_HW_MAX, /* non-ABI */ 76}; 77 78/* 79 * Generalized hardware cache events: 80 * 81 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 82 * { read, write, prefetch } x 83 * { accesses, misses } 84 */ 85enum perf_hw_cache_id { 86 PERF_COUNT_HW_CACHE_L1D = 0, 87 PERF_COUNT_HW_CACHE_L1I = 1, 88 PERF_COUNT_HW_CACHE_LL = 2, 89 PERF_COUNT_HW_CACHE_DTLB = 3, 90 PERF_COUNT_HW_CACHE_ITLB = 4, 91 PERF_COUNT_HW_CACHE_BPU = 5, 92 PERF_COUNT_HW_CACHE_NODE = 6, 93 94 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 95}; 96 97enum perf_hw_cache_op_id { 98 PERF_COUNT_HW_CACHE_OP_READ = 0, 99 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 100 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 101 102 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 103}; 104 105enum perf_hw_cache_op_result_id { 106 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 107 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 108 109 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 110}; 111 112/* 113 * Special "software" events provided by the kernel, even if the hardware 114 * does not support performance events. These events measure various 115 * physical and sw events of the kernel (and allow the profiling of them as 116 * well): 117 */ 118enum perf_sw_ids { 119 PERF_COUNT_SW_CPU_CLOCK = 0, 120 PERF_COUNT_SW_TASK_CLOCK = 1, 121 PERF_COUNT_SW_PAGE_FAULTS = 2, 122 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 123 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 124 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 125 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 126 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 127 PERF_COUNT_SW_EMULATION_FAULTS = 8, 128 PERF_COUNT_SW_DUMMY = 9, 129 PERF_COUNT_SW_BPF_OUTPUT = 10, 130 PERF_COUNT_SW_CGROUP_SWITCHES = 11, 131 132 PERF_COUNT_SW_MAX, /* non-ABI */ 133}; 134 135/* 136 * Bits that can be set in attr.sample_type to request information 137 * in the overflow packets. 138 */ 139enum perf_event_sample_format { 140 PERF_SAMPLE_IP = 1U << 0, 141 PERF_SAMPLE_TID = 1U << 1, 142 PERF_SAMPLE_TIME = 1U << 2, 143 PERF_SAMPLE_ADDR = 1U << 3, 144 PERF_SAMPLE_READ = 1U << 4, 145 PERF_SAMPLE_CALLCHAIN = 1U << 5, 146 PERF_SAMPLE_ID = 1U << 6, 147 PERF_SAMPLE_CPU = 1U << 7, 148 PERF_SAMPLE_PERIOD = 1U << 8, 149 PERF_SAMPLE_STREAM_ID = 1U << 9, 150 PERF_SAMPLE_RAW = 1U << 10, 151 PERF_SAMPLE_BRANCH_STACK = 1U << 11, 152 PERF_SAMPLE_REGS_USER = 1U << 12, 153 PERF_SAMPLE_STACK_USER = 1U << 13, 154 PERF_SAMPLE_WEIGHT = 1U << 14, 155 PERF_SAMPLE_DATA_SRC = 1U << 15, 156 PERF_SAMPLE_IDENTIFIER = 1U << 16, 157 PERF_SAMPLE_TRANSACTION = 1U << 17, 158 PERF_SAMPLE_REGS_INTR = 1U << 18, 159 PERF_SAMPLE_PHYS_ADDR = 1U << 19, 160 PERF_SAMPLE_AUX = 1U << 20, 161 PERF_SAMPLE_CGROUP = 1U << 21, 162 PERF_SAMPLE_DATA_PAGE_SIZE = 1U << 22, 163 PERF_SAMPLE_CODE_PAGE_SIZE = 1U << 23, 164 PERF_SAMPLE_WEIGHT_STRUCT = 1U << 24, 165 166 PERF_SAMPLE_MAX = 1U << 25, /* non-ABI */ 167 168 __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, /* non-ABI; internal use */ 169}; 170 171#define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT | PERF_SAMPLE_WEIGHT_STRUCT) 172/* 173 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 174 * 175 * If the user does not pass priv level information via branch_sample_type, 176 * the kernel uses the event's priv level. Branch and event priv levels do 177 * not have to match. Branch priv level is checked for permissions. 178 * 179 * The branch types can be combined, however BRANCH_ANY covers all types 180 * of branches and therefore it supersedes all the other types. 181 */ 182enum perf_branch_sample_type_shift { 183 PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */ 184 PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */ 185 PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */ 186 187 PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */ 188 PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */ 189 PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */ 190 PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */ 191 PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */ 192 PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */ 193 PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */ 194 PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */ 195 196 PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */ 197 PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */ 198 PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */ 199 200 PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT = 14, /* no flags */ 201 PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT = 15, /* no cycles */ 202 203 PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT = 16, /* save branch type */ 204 205 PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT = 17, /* save low level index of raw branch records */ 206 207 PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ 208}; 209 210enum perf_branch_sample_type { 211 PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT, 212 PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT, 213 PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT, 214 215 PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT, 216 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT, 217 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT, 218 PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT, 219 PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT, 220 PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT, 221 PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT, 222 PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT, 223 224 PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT, 225 PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT, 226 PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT, 227 228 PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT, 229 PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT, 230 231 PERF_SAMPLE_BRANCH_TYPE_SAVE = 232 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT, 233 234 PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, 235 236 PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, 237}; 238 239/* 240 * Common flow change classification 241 */ 242enum { 243 PERF_BR_UNKNOWN = 0, /* unknown */ 244 PERF_BR_COND = 1, /* conditional */ 245 PERF_BR_UNCOND = 2, /* unconditional */ 246 PERF_BR_IND = 3, /* indirect */ 247 PERF_BR_CALL = 4, /* function call */ 248 PERF_BR_IND_CALL = 5, /* indirect function call */ 249 PERF_BR_RET = 6, /* function return */ 250 PERF_BR_SYSCALL = 7, /* syscall */ 251 PERF_BR_SYSRET = 8, /* syscall return */ 252 PERF_BR_COND_CALL = 9, /* conditional function call */ 253 PERF_BR_COND_RET = 10, /* conditional function return */ 254 PERF_BR_ERET = 11, /* exception return */ 255 PERF_BR_IRQ = 12, /* irq */ 256 PERF_BR_MAX, 257}; 258 259#define PERF_SAMPLE_BRANCH_PLM_ALL \ 260 (PERF_SAMPLE_BRANCH_USER|\ 261 PERF_SAMPLE_BRANCH_KERNEL|\ 262 PERF_SAMPLE_BRANCH_HV) 263 264/* 265 * Values to determine ABI of the registers dump. 266 */ 267enum perf_sample_regs_abi { 268 PERF_SAMPLE_REGS_ABI_NONE = 0, 269 PERF_SAMPLE_REGS_ABI_32 = 1, 270 PERF_SAMPLE_REGS_ABI_64 = 2, 271}; 272 273/* 274 * Values for the memory transaction event qualifier, mostly for 275 * abort events. Multiple bits can be set. 276 */ 277enum { 278 PERF_TXN_ELISION = (1 << 0), /* From elision */ 279 PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ 280 PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ 281 PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ 282 PERF_TXN_RETRY = (1 << 4), /* Retry possible */ 283 PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ 284 PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ 285 PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ 286 287 PERF_TXN_MAX = (1 << 8), /* non-ABI */ 288 289 /* bits 32..63 are reserved for the abort code */ 290 291 PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), 292 PERF_TXN_ABORT_SHIFT = 32, 293}; 294 295/* 296 * The format of the data returned by read() on a perf event fd, 297 * as specified by attr.read_format: 298 * 299 * struct read_format { 300 * { u64 value; 301 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 302 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 303 * { u64 id; } && PERF_FORMAT_ID 304 * } && !PERF_FORMAT_GROUP 305 * 306 * { u64 nr; 307 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 308 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 309 * { u64 value; 310 * { u64 id; } && PERF_FORMAT_ID 311 * } cntr[nr]; 312 * } && PERF_FORMAT_GROUP 313 * }; 314 */ 315enum perf_event_read_format { 316 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 317 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 318 PERF_FORMAT_ID = 1U << 2, 319 PERF_FORMAT_GROUP = 1U << 3, 320 321 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 322}; 323 324#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 325#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 326#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 327#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 328 /* add: sample_stack_user */ 329#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */ 330#define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ 331#define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ 332#define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ 333 334/* 335 * Hardware event_id to monitor via a performance monitoring event: 336 * 337 * @sample_max_stack: Max number of frame pointers in a callchain, 338 * should be < /proc/sys/kernel/perf_event_max_stack 339 */ 340struct perf_event_attr { 341 342 /* 343 * Major type: hardware/software/tracepoint/etc. 344 */ 345 __u32 type; 346 347 /* 348 * Size of the attr structure, for fwd/bwd compat. 349 */ 350 __u32 size; 351 352 /* 353 * Type specific configuration information. 354 */ 355 __u64 config; 356 357 union { 358 __u64 sample_period; 359 __u64 sample_freq; 360 }; 361 362 __u64 sample_type; 363 __u64 read_format; 364 365 __u64 disabled : 1, /* off by default */ 366 inherit : 1, /* children inherit it */ 367 pinned : 1, /* must always be on PMU */ 368 exclusive : 1, /* only group on PMU */ 369 exclude_user : 1, /* don't count user */ 370 exclude_kernel : 1, /* ditto kernel */ 371 exclude_hv : 1, /* ditto hypervisor */ 372 exclude_idle : 1, /* don't count when idle */ 373 mmap : 1, /* include mmap data */ 374 comm : 1, /* include comm data */ 375 freq : 1, /* use freq, not period */ 376 inherit_stat : 1, /* per task counts */ 377 enable_on_exec : 1, /* next exec enables */ 378 task : 1, /* trace fork/exit */ 379 watermark : 1, /* wakeup_watermark */ 380 /* 381 * precise_ip: 382 * 383 * 0 - SAMPLE_IP can have arbitrary skid 384 * 1 - SAMPLE_IP must have constant skid 385 * 2 - SAMPLE_IP requested to have 0 skid 386 * 3 - SAMPLE_IP must have 0 skid 387 * 388 * See also PERF_RECORD_MISC_EXACT_IP 389 */ 390 precise_ip : 2, /* skid constraint */ 391 mmap_data : 1, /* non-exec mmap data */ 392 sample_id_all : 1, /* sample_type all events */ 393 394 exclude_host : 1, /* don't count in host */ 395 exclude_guest : 1, /* don't count in guest */ 396 397 exclude_callchain_kernel : 1, /* exclude kernel callchains */ 398 exclude_callchain_user : 1, /* exclude user callchains */ 399 mmap2 : 1, /* include mmap with inode data */ 400 comm_exec : 1, /* flag comm events that are due to an exec */ 401 use_clockid : 1, /* use @clockid for time fields */ 402 context_switch : 1, /* context switch data */ 403 write_backward : 1, /* Write ring buffer from end to beginning */ 404 namespaces : 1, /* include namespaces data */ 405 ksymbol : 1, /* include ksymbol events */ 406 bpf_event : 1, /* include bpf events */ 407 aux_output : 1, /* generate AUX records instead of events */ 408 cgroup : 1, /* include cgroup events */ 409 text_poke : 1, /* include text poke events */ 410 build_id : 1, /* use build id in mmap2 events */ 411 inherit_thread : 1, /* children only inherit if cloned with CLONE_THREAD */ 412 remove_on_exec : 1, /* event is removed from task on exec */ 413 sigtrap : 1, /* send synchronous SIGTRAP on event */ 414 __reserved_1 : 26; 415 416 union { 417 __u32 wakeup_events; /* wakeup every n events */ 418 __u32 wakeup_watermark; /* bytes before wakeup */ 419 }; 420 421 __u32 bp_type; 422 union { 423 __u64 bp_addr; 424 __u64 kprobe_func; /* for perf_kprobe */ 425 __u64 uprobe_path; /* for perf_uprobe */ 426 __u64 config1; /* extension of config */ 427 }; 428 union { 429 __u64 bp_len; 430 __u64 kprobe_addr; /* when kprobe_func == NULL */ 431 __u64 probe_offset; /* for perf_[k,u]probe */ 432 __u64 config2; /* extension of config1 */ 433 }; 434 __u64 branch_sample_type; /* enum perf_branch_sample_type */ 435 436 /* 437 * Defines set of user regs to dump on samples. 438 * See asm/perf_regs.h for details. 439 */ 440 __u64 sample_regs_user; 441 442 /* 443 * Defines size of the user stack to dump on samples. 444 */ 445 __u32 sample_stack_user; 446 447 __s32 clockid; 448 /* 449 * Defines set of regs to dump for each sample 450 * state captured on: 451 * - precise = 0: PMU interrupt 452 * - precise > 0: sampled instruction 453 * 454 * See asm/perf_regs.h for details. 455 */ 456 __u64 sample_regs_intr; 457 458 /* 459 * Wakeup watermark for AUX area 460 */ 461 __u32 aux_watermark; 462 __u16 sample_max_stack; 463 __u16 __reserved_2; 464 __u32 aux_sample_size; 465 __u32 __reserved_3; 466 467 /* 468 * User provided data if sigtrap=1, passed back to user via 469 * siginfo_t::si_perf_data, e.g. to permit user to identify the event. 470 * Note, siginfo_t::si_perf_data is long-sized, and sig_data will be 471 * truncated accordingly on 32 bit architectures. 472 */ 473 __u64 sig_data; 474}; 475 476/* 477 * Structure used by below PERF_EVENT_IOC_QUERY_BPF command 478 * to query bpf programs attached to the same perf tracepoint 479 * as the given perf event. 480 */ 481struct perf_event_query_bpf { 482 /* 483 * The below ids array length 484 */ 485 __u32 ids_len; 486 /* 487 * Set by the kernel to indicate the number of 488 * available programs 489 */ 490 __u32 prog_cnt; 491 /* 492 * User provided buffer to store program ids 493 */ 494 __u32 ids[0]; 495}; 496 497/* 498 * Ioctls that can be done on a perf event fd: 499 */ 500#define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 501#define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 502#define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 503#define PERF_EVENT_IOC_RESET _IO ('$', 3) 504#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 505#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 506#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 507#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) 508#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) 509#define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32) 510#define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *) 511#define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW('$', 11, struct perf_event_attr *) 512 513enum perf_event_ioc_flags { 514 PERF_IOC_FLAG_GROUP = 1U << 0, 515}; 516 517/* 518 * Structure of the page that can be mapped via mmap 519 */ 520struct perf_event_mmap_page { 521 __u32 version; /* version number of this structure */ 522 __u32 compat_version; /* lowest version this is compat with */ 523 524 /* 525 * Bits needed to read the hw events in user-space. 526 * 527 * u32 seq, time_mult, time_shift, index, width; 528 * u64 count, enabled, running; 529 * u64 cyc, time_offset; 530 * s64 pmc = 0; 531 * 532 * do { 533 * seq = pc->lock; 534 * barrier() 535 * 536 * enabled = pc->time_enabled; 537 * running = pc->time_running; 538 * 539 * if (pc->cap_usr_time && enabled != running) { 540 * cyc = rdtsc(); 541 * time_offset = pc->time_offset; 542 * time_mult = pc->time_mult; 543 * time_shift = pc->time_shift; 544 * } 545 * 546 * index = pc->index; 547 * count = pc->offset; 548 * if (pc->cap_user_rdpmc && index) { 549 * width = pc->pmc_width; 550 * pmc = rdpmc(index - 1); 551 * } 552 * 553 * barrier(); 554 * } while (pc->lock != seq); 555 * 556 * NOTE: for obvious reason this only works on self-monitoring 557 * processes. 558 */ 559 __u32 lock; /* seqlock for synchronization */ 560 __u32 index; /* hardware event identifier */ 561 __s64 offset; /* add to hardware event value */ 562 __u64 time_enabled; /* time event active */ 563 __u64 time_running; /* time event on cpu */ 564 union { 565 __u64 capabilities; 566 struct { 567 __u64 cap_bit0 : 1, /* Always 0, deprecated, see commit 860f085b74e9 */ 568 cap_bit0_is_deprecated : 1, /* Always 1, signals that bit 0 is zero */ 569 570 cap_user_rdpmc : 1, /* The RDPMC instruction can be used to read counts */ 571 cap_user_time : 1, /* The time_{shift,mult,offset} fields are used */ 572 cap_user_time_zero : 1, /* The time_zero field is used */ 573 cap_user_time_short : 1, /* the time_{cycle,mask} fields are used */ 574 cap_____res : 58; 575 }; 576 }; 577 578 /* 579 * If cap_user_rdpmc this field provides the bit-width of the value 580 * read using the rdpmc() or equivalent instruction. This can be used 581 * to sign extend the result like: 582 * 583 * pmc <<= 64 - width; 584 * pmc >>= 64 - width; // signed shift right 585 * count += pmc; 586 */ 587 __u16 pmc_width; 588 589 /* 590 * If cap_usr_time the below fields can be used to compute the time 591 * delta since time_enabled (in ns) using rdtsc or similar. 592 * 593 * u64 quot, rem; 594 * u64 delta; 595 * 596 * quot = (cyc >> time_shift); 597 * rem = cyc & (((u64)1 << time_shift) - 1); 598 * delta = time_offset + quot * time_mult + 599 * ((rem * time_mult) >> time_shift); 600 * 601 * Where time_offset,time_mult,time_shift and cyc are read in the 602 * seqcount loop described above. This delta can then be added to 603 * enabled and possible running (if index), improving the scaling: 604 * 605 * enabled += delta; 606 * if (index) 607 * running += delta; 608 * 609 * quot = count / running; 610 * rem = count % running; 611 * count = quot * enabled + (rem * enabled) / running; 612 */ 613 __u16 time_shift; 614 __u32 time_mult; 615 __u64 time_offset; 616 /* 617 * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated 618 * from sample timestamps. 619 * 620 * time = timestamp - time_zero; 621 * quot = time / time_mult; 622 * rem = time % time_mult; 623 * cyc = (quot << time_shift) + (rem << time_shift) / time_mult; 624 * 625 * And vice versa: 626 * 627 * quot = cyc >> time_shift; 628 * rem = cyc & (((u64)1 << time_shift) - 1); 629 * timestamp = time_zero + quot * time_mult + 630 * ((rem * time_mult) >> time_shift); 631 */ 632 __u64 time_zero; 633 634 __u32 size; /* Header size up to __reserved[] fields. */ 635 __u32 __reserved_1; 636 637 /* 638 * If cap_usr_time_short, the hardware clock is less than 64bit wide 639 * and we must compute the 'cyc' value, as used by cap_usr_time, as: 640 * 641 * cyc = time_cycles + ((cyc - time_cycles) & time_mask) 642 * 643 * NOTE: this form is explicitly chosen such that cap_usr_time_short 644 * is a correction on top of cap_usr_time, and code that doesn't 645 * know about cap_usr_time_short still works under the assumption 646 * the counter doesn't wrap. 647 */ 648 __u64 time_cycles; 649 __u64 time_mask; 650 651 /* 652 * Hole for extension of the self monitor capabilities 653 */ 654 655 __u8 __reserved[116*8]; /* align to 1k. */ 656 657 /* 658 * Control data for the mmap() data buffer. 659 * 660 * User-space reading the @data_head value should issue an smp_rmb(), 661 * after reading this value. 662 * 663 * When the mapping is PROT_WRITE the @data_tail value should be 664 * written by userspace to reflect the last read data, after issueing 665 * an smp_mb() to separate the data read from the ->data_tail store. 666 * In this case the kernel will not over-write unread data. 667 * 668 * See perf_output_put_handle() for the data ordering. 669 * 670 * data_{offset,size} indicate the location and size of the perf record 671 * buffer within the mmapped area. 672 */ 673 __u64 data_head; /* head in the data section */ 674 __u64 data_tail; /* user-space written tail */ 675 __u64 data_offset; /* where the buffer starts */ 676 __u64 data_size; /* data buffer size */ 677 678 /* 679 * AUX area is defined by aux_{offset,size} fields that should be set 680 * by the userspace, so that 681 * 682 * aux_offset >= data_offset + data_size 683 * 684 * prior to mmap()ing it. Size of the mmap()ed area should be aux_size. 685 * 686 * Ring buffer pointers aux_{head,tail} have the same semantics as 687 * data_{head,tail} and same ordering rules apply. 688 */ 689 __u64 aux_head; 690 __u64 aux_tail; 691 __u64 aux_offset; 692 __u64 aux_size; 693}; 694 695/* 696 * The current state of perf_event_header::misc bits usage: 697 * ('|' used bit, '-' unused bit) 698 * 699 * 012 CDEF 700 * |||---------|||| 701 * 702 * Where: 703 * 0-2 CPUMODE_MASK 704 * 705 * C PROC_MAP_PARSE_TIMEOUT 706 * D MMAP_DATA / COMM_EXEC / FORK_EXEC / SWITCH_OUT 707 * E MMAP_BUILD_ID / EXACT_IP / SCHED_OUT_PREEMPT 708 * F (reserved) 709 */ 710 711#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 712#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 713#define PERF_RECORD_MISC_KERNEL (1 << 0) 714#define PERF_RECORD_MISC_USER (2 << 0) 715#define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 716#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 717#define PERF_RECORD_MISC_GUEST_USER (5 << 0) 718 719/* 720 * Indicates that /proc/PID/maps parsing are truncated by time out. 721 */ 722#define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12) 723/* 724 * Following PERF_RECORD_MISC_* are used on different 725 * events, so can reuse the same bit position: 726 * 727 * PERF_RECORD_MISC_MMAP_DATA - PERF_RECORD_MMAP* events 728 * PERF_RECORD_MISC_COMM_EXEC - PERF_RECORD_COMM event 729 * PERF_RECORD_MISC_FORK_EXEC - PERF_RECORD_FORK event (perf internal) 730 * PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events 731 */ 732#define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 733#define PERF_RECORD_MISC_COMM_EXEC (1 << 13) 734#define PERF_RECORD_MISC_FORK_EXEC (1 << 13) 735#define PERF_RECORD_MISC_SWITCH_OUT (1 << 13) 736/* 737 * These PERF_RECORD_MISC_* flags below are safely reused 738 * for the following events: 739 * 740 * PERF_RECORD_MISC_EXACT_IP - PERF_RECORD_SAMPLE of precise events 741 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events 742 * PERF_RECORD_MISC_MMAP_BUILD_ID - PERF_RECORD_MMAP2 event 743 * 744 * 745 * PERF_RECORD_MISC_EXACT_IP: 746 * Indicates that the content of PERF_SAMPLE_IP points to 747 * the actual instruction that triggered the event. See also 748 * perf_event_attr::precise_ip. 749 * 750 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT: 751 * Indicates that thread was preempted in TASK_RUNNING state. 752 * 753 * PERF_RECORD_MISC_MMAP_BUILD_ID: 754 * Indicates that mmap2 event carries build id data. 755 */ 756#define PERF_RECORD_MISC_EXACT_IP (1 << 14) 757#define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14) 758#define PERF_RECORD_MISC_MMAP_BUILD_ID (1 << 14) 759/* 760 * Reserve the last bit to indicate some extended misc field 761 */ 762#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 763 764struct perf_event_header { 765 __u32 type; 766 __u16 misc; 767 __u16 size; 768}; 769 770struct perf_ns_link_info { 771 __u64 dev; 772 __u64 ino; 773}; 774 775enum { 776 NET_NS_INDEX = 0, 777 UTS_NS_INDEX = 1, 778 IPC_NS_INDEX = 2, 779 PID_NS_INDEX = 3, 780 USER_NS_INDEX = 4, 781 MNT_NS_INDEX = 5, 782 CGROUP_NS_INDEX = 6, 783 784 NR_NAMESPACES, /* number of available namespaces */ 785}; 786 787enum perf_event_type { 788 789 /* 790 * If perf_event_attr.sample_id_all is set then all event types will 791 * have the sample_type selected fields related to where/when 792 * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU, 793 * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed 794 * just after the perf_event_header and the fields already present for 795 * the existing fields, i.e. at the end of the payload. That way a newer 796 * perf.data file will be supported by older perf tools, with these new 797 * optional fields being ignored. 798 * 799 * struct sample_id { 800 * { u32 pid, tid; } && PERF_SAMPLE_TID 801 * { u64 time; } && PERF_SAMPLE_TIME 802 * { u64 id; } && PERF_SAMPLE_ID 803 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 804 * { u32 cpu, res; } && PERF_SAMPLE_CPU 805 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 806 * } && perf_event_attr::sample_id_all 807 * 808 * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. The 809 * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed 810 * relative to header.size. 811 */ 812 813 /* 814 * The MMAP events record the PROT_EXEC mappings so that we can 815 * correlate userspace IPs to code. They have the following structure: 816 * 817 * struct { 818 * struct perf_event_header header; 819 * 820 * u32 pid, tid; 821 * u64 addr; 822 * u64 len; 823 * u64 pgoff; 824 * char filename[]; 825 * struct sample_id sample_id; 826 * }; 827 */ 828 PERF_RECORD_MMAP = 1, 829 830 /* 831 * struct { 832 * struct perf_event_header header; 833 * u64 id; 834 * u64 lost; 835 * struct sample_id sample_id; 836 * }; 837 */ 838 PERF_RECORD_LOST = 2, 839 840 /* 841 * struct { 842 * struct perf_event_header header; 843 * 844 * u32 pid, tid; 845 * char comm[]; 846 * struct sample_id sample_id; 847 * }; 848 */ 849 PERF_RECORD_COMM = 3, 850 851 /* 852 * struct { 853 * struct perf_event_header header; 854 * u32 pid, ppid; 855 * u32 tid, ptid; 856 * u64 time; 857 * struct sample_id sample_id; 858 * }; 859 */ 860 PERF_RECORD_EXIT = 4, 861 862 /* 863 * struct { 864 * struct perf_event_header header; 865 * u64 time; 866 * u64 id; 867 * u64 stream_id; 868 * struct sample_id sample_id; 869 * }; 870 */ 871 PERF_RECORD_THROTTLE = 5, 872 PERF_RECORD_UNTHROTTLE = 6, 873 874 /* 875 * struct { 876 * struct perf_event_header header; 877 * u32 pid, ppid; 878 * u32 tid, ptid; 879 * u64 time; 880 * struct sample_id sample_id; 881 * }; 882 */ 883 PERF_RECORD_FORK = 7, 884 885 /* 886 * struct { 887 * struct perf_event_header header; 888 * u32 pid, tid; 889 * 890 * struct read_format values; 891 * struct sample_id sample_id; 892 * }; 893 */ 894 PERF_RECORD_READ = 8, 895 896 /* 897 * struct { 898 * struct perf_event_header header; 899 * 900 * # 901 * # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. 902 * # The advantage of PERF_SAMPLE_IDENTIFIER is that its position 903 * # is fixed relative to header. 904 * # 905 * 906 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 907 * { u64 ip; } && PERF_SAMPLE_IP 908 * { u32 pid, tid; } && PERF_SAMPLE_TID 909 * { u64 time; } && PERF_SAMPLE_TIME 910 * { u64 addr; } && PERF_SAMPLE_ADDR 911 * { u64 id; } && PERF_SAMPLE_ID 912 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 913 * { u32 cpu, res; } && PERF_SAMPLE_CPU 914 * { u64 period; } && PERF_SAMPLE_PERIOD 915 * 916 * { struct read_format values; } && PERF_SAMPLE_READ 917 * 918 * { u64 nr, 919 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 920 * 921 * # 922 * # The RAW record below is opaque data wrt the ABI 923 * # 924 * # That is, the ABI doesn't make any promises wrt to 925 * # the stability of its content, it may vary depending 926 * # on event, hardware, kernel version and phase of 927 * # the moon. 928 * # 929 * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 930 * # 931 * 932 * { u32 size; 933 * char data[size];}&& PERF_SAMPLE_RAW 934 * 935 * { u64 nr; 936 * { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX 937 * { u64 from, to, flags } lbr[nr]; 938 * } && PERF_SAMPLE_BRANCH_STACK 939 * 940 * { u64 abi; # enum perf_sample_regs_abi 941 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 942 * 943 * { u64 size; 944 * char data[size]; 945 * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 946 * 947 * { union perf_sample_weight 948 * { 949 * u64 full; && PERF_SAMPLE_WEIGHT 950 * #if defined(__LITTLE_ENDIAN_BITFIELD) 951 * struct { 952 * u32 var1_dw; 953 * u16 var2_w; 954 * u16 var3_w; 955 * } && PERF_SAMPLE_WEIGHT_STRUCT 956 * #elif defined(__BIG_ENDIAN_BITFIELD) 957 * struct { 958 * u16 var3_w; 959 * u16 var2_w; 960 * u32 var1_dw; 961 * } && PERF_SAMPLE_WEIGHT_STRUCT 962 * #endif 963 * } 964 * } 965 * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 966 * { u64 transaction; } && PERF_SAMPLE_TRANSACTION 967 * { u64 abi; # enum perf_sample_regs_abi 968 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR 969 * { u64 phys_addr;} && PERF_SAMPLE_PHYS_ADDR 970 * { u64 size; 971 * char data[size]; } && PERF_SAMPLE_AUX 972 * { u64 data_page_size;} && PERF_SAMPLE_DATA_PAGE_SIZE 973 * { u64 code_page_size;} && PERF_SAMPLE_CODE_PAGE_SIZE 974 * }; 975 */ 976 PERF_RECORD_SAMPLE = 9, 977 978 /* 979 * The MMAP2 records are an augmented version of MMAP, they add 980 * maj, min, ino numbers to be used to uniquely identify each mapping 981 * 982 * struct { 983 * struct perf_event_header header; 984 * 985 * u32 pid, tid; 986 * u64 addr; 987 * u64 len; 988 * u64 pgoff; 989 * union { 990 * struct { 991 * u32 maj; 992 * u32 min; 993 * u64 ino; 994 * u64 ino_generation; 995 * }; 996 * struct { 997 * u8 build_id_size; 998 * u8 __reserved_1; 999 * u16 __reserved_2; 1000 * u8 build_id[20];
1001 * }; 1002 * }; 1003 * u32 prot, flags; 1004 * char filename[]; 1005 * struct sample_id sample_id; 1006 * }; 1007 */ 1008 PERF_RECORD_MMAP2 = 10, 1009 1010 /* 1011 * Records that new data landed in the AUX buffer part. 1012 * 1013 * struct { 1014 * struct perf_event_header header; 1015 * 1016 * u64 aux_offset; 1017 * u64 aux_size; 1018 * u64 flags; 1019 * struct sample_id sample_id; 1020 * }; 1021 */ 1022 PERF_RECORD_AUX = 11, 1023 1024 /* 1025 * Indicates that instruction trace has started 1026 * 1027 * struct { 1028 * struct perf_event_header header; 1029 * u32 pid; 1030 * u32 tid; 1031 * struct sample_id sample_id; 1032 * }; 1033 */ 1034 PERF_RECORD_ITRACE_START = 12, 1035 1036 /* 1037 * Records the dropped/lost sample number. 1038 * 1039 * struct { 1040 * struct perf_event_header header; 1041 * 1042 * u64 lost; 1043 * struct sample_id sample_id; 1044 * }; 1045 */ 1046 PERF_RECORD_LOST_SAMPLES = 13, 1047 1048 /* 1049 * Records a context switch in or out (flagged by 1050 * PERF_RECORD_MISC_SWITCH_OUT). See also 1051 * PERF_RECORD_SWITCH_CPU_WIDE. 1052 * 1053 * struct { 1054 * struct perf_event_header header; 1055 * struct sample_id sample_id; 1056 * }; 1057 */ 1058 PERF_RECORD_SWITCH = 14, 1059 1060 /* 1061 * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and 1062 * next_prev_tid that are the next (switching out) or previous 1063 * (switching in) pid/tid. 1064 * 1065 * struct { 1066 * struct perf_event_header header; 1067 * u32 next_prev_pid; 1068 * u32 next_prev_tid; 1069 * struct sample_id sample_id; 1070 * }; 1071 */ 1072 PERF_RECORD_SWITCH_CPU_WIDE = 15, 1073 1074 /* 1075 * struct { 1076 * struct perf_event_header header; 1077 * u32 pid; 1078 * u32 tid; 1079 * u64 nr_namespaces; 1080 * { u64 dev, inode; } [nr_namespaces]; 1081 * struct sample_id sample_id; 1082 * }; 1083 */ 1084 PERF_RECORD_NAMESPACES = 16, 1085 1086 /* 1087 * Record ksymbol register/unregister events: 1088 * 1089 * struct { 1090 * struct perf_event_header header; 1091 * u64 addr; 1092 * u32 len; 1093 * u16 ksym_type; 1094 * u16 flags; 1095 * char name[]; 1096 * struct sample_id sample_id; 1097 * }; 1098 */ 1099 PERF_RECORD_KSYMBOL = 17, 1100 1101 /* 1102 * Record bpf events: 1103 * enum perf_bpf_event_type { 1104 * PERF_BPF_EVENT_UNKNOWN = 0, 1105 * PERF_BPF_EVENT_PROG_LOAD = 1, 1106 * PERF_BPF_EVENT_PROG_UNLOAD = 2, 1107 * }; 1108 * 1109 * struct { 1110 * struct perf_event_header header; 1111 * u16 type; 1112 * u16 flags; 1113 * u32 id; 1114 * u8 tag[BPF_TAG_SIZE]; 1115 * struct sample_id sample_id; 1116 * }; 1117 */ 1118 PERF_RECORD_BPF_EVENT = 18, 1119 1120 /* 1121 * struct { 1122 * struct perf_event_header header; 1123 * u64 id; 1124 * char path[]; 1125 * struct sample_id sample_id; 1126 * }; 1127 */ 1128 PERF_RECORD_CGROUP = 19, 1129 1130 /* 1131 * Records changes to kernel text i.e. self-modified code. 'old_len' is 1132 * the number of old bytes, 'new_len' is the number of new bytes. Either 1133 * 'old_len' or 'new_len' may be zero to indicate, for example, the 1134 * addition or removal of a trampoline. 'bytes' contains the old bytes 1135 * followed immediately by the new bytes. 1136 * 1137 * struct { 1138 * struct perf_event_header header; 1139 * u64 addr; 1140 * u16 old_len; 1141 * u16 new_len; 1142 * u8 bytes[]; 1143 * struct sample_id sample_id; 1144 * }; 1145 */ 1146 PERF_RECORD_TEXT_POKE = 20, 1147 1148 /* 1149 * Data written to the AUX area by hardware due to aux_output, may need 1150 * to be matched to the event by an architecture-specific hardware ID. 1151 * This records the hardware ID, but requires sample_id to provide the 1152 * event ID. e.g. Intel PT uses this record to disambiguate PEBS-via-PT 1153 * records from multiple events. 1154 * 1155 * struct { 1156 * struct perf_event_header header; 1157 * u64 hw_id; 1158 * struct sample_id sample_id; 1159 * }; 1160 */ 1161 PERF_RECORD_AUX_OUTPUT_HW_ID = 21, 1162 1163 PERF_RECORD_MAX, /* non-ABI */ 1164}; 1165 1166enum perf_record_ksymbol_type { 1167 PERF_RECORD_KSYMBOL_TYPE_UNKNOWN = 0, 1168 PERF_RECORD_KSYMBOL_TYPE_BPF = 1, 1169 /* 1170 * Out of line code such as kprobe-replaced instructions or optimized 1171 * kprobes or ftrace trampolines. 1172 */ 1173 PERF_RECORD_KSYMBOL_TYPE_OOL = 2, 1174 PERF_RECORD_KSYMBOL_TYPE_MAX /* non-ABI */ 1175}; 1176 1177#define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER (1 << 0) 1178 1179enum perf_bpf_event_type { 1180 PERF_BPF_EVENT_UNKNOWN = 0, 1181 PERF_BPF_EVENT_PROG_LOAD = 1, 1182 PERF_BPF_EVENT_PROG_UNLOAD = 2, 1183 PERF_BPF_EVENT_MAX, /* non-ABI */ 1184}; 1185 1186#define PERF_MAX_STACK_DEPTH 127 1187#define PERF_MAX_CONTEXTS_PER_STACK 8 1188 1189enum perf_callchain_context { 1190 PERF_CONTEXT_HV = (__u64)-32, 1191 PERF_CONTEXT_KERNEL = (__u64)-128, 1192 PERF_CONTEXT_USER = (__u64)-512, 1193 1194 PERF_CONTEXT_GUEST = (__u64)-2048, 1195 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 1196 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 1197 1198 PERF_CONTEXT_MAX = (__u64)-4095, 1199}; 1200 1201/** 1202 * PERF_RECORD_AUX::flags bits 1203 */ 1204#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */ 1205#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */ 1206#define PERF_AUX_FLAG_PARTIAL 0x04 /* record contains gaps */ 1207#define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ 1208#define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */ 1209 1210/* CoreSight PMU AUX buffer formats */ 1211#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */ 1212#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */ 1213 1214#define PERF_FLAG_FD_NO_GROUP (1UL << 0) 1215#define PERF_FLAG_FD_OUTPUT (1UL << 1) 1216#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ 1217#define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */ 1218 1219#if defined(__LITTLE_ENDIAN_BITFIELD) 1220union perf_mem_data_src { 1221 __u64 val; 1222 struct { 1223 __u64 mem_op:5, /* type of opcode */ 1224 mem_lvl:14, /* memory hierarchy level */ 1225 mem_snoop:5, /* snoop mode */ 1226 mem_lock:2, /* lock instr */ 1227 mem_dtlb:7, /* tlb access */ 1228 mem_lvl_num:4, /* memory hierarchy level number */ 1229 mem_remote:1, /* remote */ 1230 mem_snoopx:2, /* snoop mode, ext */ 1231 mem_blk:3, /* access blocked */ 1232 mem_hops:3, /* hop level */ 1233 mem_rsvd:18; 1234 }; 1235}; 1236#elif defined(__BIG_ENDIAN_BITFIELD) 1237union perf_mem_data_src { 1238 __u64 val; 1239 struct { 1240 __u64 mem_rsvd:18, 1241 mem_hops:3, /* hop level */ 1242 mem_blk:3, /* access blocked */ 1243 mem_snoopx:2, /* snoop mode, ext */ 1244 mem_remote:1, /* remote */ 1245 mem_lvl_num:4, /* memory hierarchy level number */ 1246 mem_dtlb:7, /* tlb access */ 1247 mem_lock:2, /* lock instr */ 1248 mem_snoop:5, /* snoop mode */ 1249 mem_lvl:14, /* memory hierarchy level */ 1250 mem_op:5; /* type of opcode */ 1251 }; 1252}; 1253#else 1254#error "Unknown endianness" 1255#endif 1256 1257/* type of opcode (load/store/prefetch,code) */ 1258#define PERF_MEM_OP_NA 0x01 /* not available */ 1259#define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 1260#define PERF_MEM_OP_STORE 0x04 /* store instruction */ 1261#define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 1262#define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 1263#define PERF_MEM_OP_SHIFT 0 1264 1265/* 1266 * PERF_MEM_LVL_* namespace being depricated to some extent in the 1267 * favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_} fields. 1268 * Supporting this namespace inorder to not break defined ABIs. 1269 * 1270 * memory hierarchy (memory level, hit or miss) 1271 */ 1272#define PERF_MEM_LVL_NA 0x01 /* not available */ 1273#define PERF_MEM_LVL_HIT 0x02 /* hit level */ 1274#define PERF_MEM_LVL_MISS 0x04 /* miss level */ 1275#define PERF_MEM_LVL_L1 0x08 /* L1 */ 1276#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 1277#define PERF_MEM_LVL_L2 0x20 /* L2 */ 1278#define PERF_MEM_LVL_L3 0x40 /* L3 */ 1279#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 1280#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 1281#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 1282#define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 1283#define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 1284#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 1285#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 1286#define PERF_MEM_LVL_SHIFT 5 1287 1288#define PERF_MEM_REMOTE_REMOTE 0x01 /* Remote */ 1289#define PERF_MEM_REMOTE_SHIFT 37 1290 1291#define PERF_MEM_LVLNUM_L1 0x01 /* L1 */ 1292#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */ 1293#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ 1294#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ 1295/* 5-0xa available */ 1296#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ 1297#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */ 1298#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */ 1299#define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */ 1300#define PERF_MEM_LVLNUM_NA 0x0f /* N/A */ 1301 1302#define PERF_MEM_LVLNUM_SHIFT 33 1303 1304/* snoop mode */ 1305#define PERF_MEM_SNOOP_NA 0x01 /* not available */ 1306#define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 1307#define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 1308#define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 1309#define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 1310#define PERF_MEM_SNOOP_SHIFT 19 1311 1312#define PERF_MEM_SNOOPX_FWD 0x01 /* forward */ 1313/* 1 free */ 1314#define PERF_MEM_SNOOPX_SHIFT 38 1315 1316/* locked instruction */ 1317#define PERF_MEM_LOCK_NA 0x01 /* not available */ 1318#define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 1319#define PERF_MEM_LOCK_SHIFT 24 1320 1321/* TLB access */ 1322#define PERF_MEM_TLB_NA 0x01 /* not available */ 1323#define PERF_MEM_TLB_HIT 0x02 /* hit level */ 1324#define PERF_MEM_TLB_MISS 0x04 /* miss level */ 1325#define PERF_MEM_TLB_L1 0x08 /* L1 */ 1326#define PERF_MEM_TLB_L2 0x10 /* L2 */ 1327#define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 1328#define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 1329#define PERF_MEM_TLB_SHIFT 26 1330 1331/* Access blocked */ 1332#define PERF_MEM_BLK_NA 0x01 /* not available */ 1333#define PERF_MEM_BLK_DATA 0x02 /* data could not be forwarded */ 1334#define PERF_MEM_BLK_ADDR 0x04 /* address conflict */ 1335#define PERF_MEM_BLK_SHIFT 40 1336 1337/* hop level */ 1338#define PERF_MEM_HOPS_0 0x01 /* remote core, same node */ 1339#define PERF_MEM_HOPS_1 0x02 /* remote node, same socket */ 1340#define PERF_MEM_HOPS_2 0x03 /* remote socket, same board */ 1341#define PERF_MEM_HOPS_3 0x04 /* remote board */ 1342/* 5-7 available */ 1343#define PERF_MEM_HOPS_SHIFT 43 1344 1345#define PERF_MEM_S(a, s) \ 1346 (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 1347 1348/* 1349 * single taken branch record layout: 1350 * 1351 * from: source instruction (may not always be a branch insn) 1352 * to: branch target 1353 * mispred: branch target was mispredicted 1354 * predicted: branch target was predicted 1355 * 1356 * support for mispred, predicted is optional. In case it 1357 * is not supported mispred = predicted = 0. 1358 * 1359 * in_tx: running in a hardware transaction 1360 * abort: aborting a hardware transaction 1361 * cycles: cycles from last branch (or 0 if not supported) 1362 * type: branch type 1363 */ 1364struct perf_branch_entry { 1365 __u64 from; 1366 __u64 to; 1367 __u64 mispred:1, /* target mispredicted */ 1368 predicted:1,/* target predicted */ 1369 in_tx:1, /* in transaction */ 1370 abort:1, /* transaction abort */ 1371 cycles:16, /* cycle count to last branch */ 1372 type:4, /* branch type */ 1373 reserved:40; 1374}; 1375 1376union perf_sample_weight { 1377 __u64 full; 1378#if defined(__LITTLE_ENDIAN_BITFIELD) 1379 struct { 1380 __u32 var1_dw; 1381 __u16 var2_w; 1382 __u16 var3_w; 1383 }; 1384#elif defined(__BIG_ENDIAN_BITFIELD) 1385 struct { 1386 __u16 var3_w; 1387 __u16 var2_w; 1388 __u32 var1_dw; 1389 }; 1390#else 1391#error "Unknown endianness" 1392#endif 1393}; 1394 1395#endif /* _UAPI_LINUX_PERF_EVENT_H */ 1396