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7#ifndef __ASM_LOONGSON_H
8#define __ASM_LOONGSON_H
9
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/irq.h>
13#include <linux/pci.h>
14#include <asm/addrspace.h>
15#include <asm/bootinfo.h>
16
17extern const struct plat_smp_ops loongson3_smp_ops;
18
19#define LOONGSON_REG(x) \
20 (*(volatile u32 *)((char *)TO_UNCACHE(LOONGSON_REG_BASE) + (x)))
21
22#define LOONGSON_LIO_BASE 0x18000000
23#define LOONGSON_LIO_SIZE 0x00100000
24#define LOONGSON_LIO_TOP (LOONGSON_LIO_BASE+LOONGSON_LIO_SIZE-1)
25
26#define LOONGSON_BOOT_BASE 0x1c000000
27#define LOONGSON_BOOT_SIZE 0x02000000
28#define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
29
30#define LOONGSON_REG_BASE 0x1fe00000
31#define LOONGSON_REG_SIZE 0x00100000
32#define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
33
34
35
36#define LOONGSON_GPIODATA LOONGSON_REG(0x11c)
37#define LOONGSON_GPIOIE LOONGSON_REG(0x120)
38#define LOONGSON_REG_GPIO_BASE (LOONGSON_REG_BASE + 0x11c)
39
40#define MAX_PACKAGES 16
41
42#define xconf_readl(addr) readl(addr)
43#define xconf_readq(addr) readq(addr)
44
45static inline void xconf_writel(u32 val, volatile void __iomem *addr)
46{
47 asm volatile (
48 " st.w %[v], %[hw], 0 \n"
49 " ld.b $zero, %[hw], 0 \n"
50 :
51 : [hw] "r" (addr), [v] "r" (val)
52 );
53}
54
55static inline void xconf_writeq(u64 val64, volatile void __iomem *addr)
56{
57 asm volatile (
58 " st.d %[v], %[hw], 0 \n"
59 " ld.b $zero, %[hw], 0 \n"
60 :
61 : [hw] "r" (addr), [v] "r" (val64)
62 );
63}
64
65
66#define LS7A_PCH_REG_BASE 0x10000000UL
67
68#define LS7A_LPC_REG_BASE (LS7A_PCH_REG_BASE + 0x00002000)
69
70#define LS7A_CHIPCFG_REG_BASE (LS7A_PCH_REG_BASE + 0x00010000)
71
72#define LS7A_MISC_REG_BASE (LS7A_PCH_REG_BASE + 0x00080000)
73
74#define LS7A_ACPI_REG_BASE (LS7A_MISC_REG_BASE + 0x00050000)
75
76#define LS7A_RTC_REG_BASE (LS7A_MISC_REG_BASE + 0x00050100)
77
78#define LS7A_DMA_CFG (volatile void *)TO_UNCACHE(LS7A_CHIPCFG_REG_BASE + 0x041c)
79#define LS7A_DMA_NODE_SHF 8
80#define LS7A_DMA_NODE_MASK 0x1F00
81
82#define LS7A_INT_MASK_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x020)
83#define LS7A_INT_EDGE_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x060)
84#define LS7A_INT_CLEAR_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x080)
85#define LS7A_INT_HTMSI_EN_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x040)
86#define LS7A_INT_ROUTE_ENTRY_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x100)
87#define LS7A_INT_HTMSI_VEC_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x200)
88#define LS7A_INT_STATUS_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x3a0)
89#define LS7A_INT_POL_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x3e0)
90#define LS7A_LPC_INT_CTL (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x2000)
91#define LS7A_LPC_INT_ENA (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x2004)
92#define LS7A_LPC_INT_STS (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x2008)
93#define LS7A_LPC_INT_CLR (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x200c)
94#define LS7A_LPC_INT_POL (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x2010)
95
96#define LS7A_PMCON_SOC_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x000)
97#define LS7A_PMCON_RESUME_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x004)
98#define LS7A_PMCON_RTC_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x008)
99#define LS7A_PM1_EVT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x00c)
100#define LS7A_PM1_ENA_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x010)
101#define LS7A_PM1_CNT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x014)
102#define LS7A_PM1_TMR_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x018)
103#define LS7A_P_CNT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x01c)
104#define LS7A_GPE0_STS_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x028)
105#define LS7A_GPE0_ENA_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x02c)
106#define LS7A_RST_CNT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x030)
107#define LS7A_WD_SET_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x034)
108#define LS7A_WD_TIMER_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x038)
109#define LS7A_THSENS_CNT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x04c)
110#define LS7A_GEN_RTC_1_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x050)
111#define LS7A_GEN_RTC_2_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x054)
112#define LS7A_DPM_CFG_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x400)
113#define LS7A_DPM_STS_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x404)
114#define LS7A_DPM_CNT_REG (volatile void *)TO_UNCACHE(LS7A_ACPI_REG_BASE + 0x408)
115
116typedef enum {
117 ACPI_PCI_HOTPLUG_STATUS = 1 << 1,
118 ACPI_CPU_HOTPLUG_STATUS = 1 << 2,
119 ACPI_MEM_HOTPLUG_STATUS = 1 << 3,
120 ACPI_POWERBUTTON_STATUS = 1 << 8,
121 ACPI_RTC_WAKE_STATUS = 1 << 10,
122 ACPI_PCI_WAKE_STATUS = 1 << 14,
123 ACPI_ANY_WAKE_STATUS = 1 << 15,
124} AcpiEventStatusBits;
125
126#define HT1LO_OFFSET 0xe0000000000UL
127
128
129#define MCFG_EXT_PCICFG_BASE 0xefe00000000UL
130
131
132#define ls7a_readb(addr) (*(volatile unsigned char *)TO_UNCACHE(addr))
133#define ls7a_readw(addr) (*(volatile unsigned short *)TO_UNCACHE(addr))
134#define ls7a_readl(addr) (*(volatile unsigned int *)TO_UNCACHE(addr))
135#define ls7a_readq(addr) (*(volatile unsigned long *)TO_UNCACHE(addr))
136#define ls7a_writeb(val, addr) *(volatile unsigned char *)TO_UNCACHE(addr) = (val)
137#define ls7a_writew(val, addr) *(volatile unsigned short *)TO_UNCACHE(addr) = (val)
138#define ls7a_writel(val, addr) *(volatile unsigned int *)TO_UNCACHE(addr) = (val)
139#define ls7a_writeq(val, addr) *(volatile unsigned long *)TO_UNCACHE(addr) = (val)
140
141#endif
142
