linux/arch/mips/pci/pci.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *
   4 * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
   5 * Copyright (C) 2011 Wind River Systems,
   6 *   written by Ralf Baechle (ralf@linux-mips.org)
   7 */
   8#include <linux/bug.h>
   9#include <linux/kernel.h>
  10#include <linux/mm.h>
  11#include <linux/memblock.h>
  12#include <linux/export.h>
  13#include <linux/init.h>
  14#include <linux/types.h>
  15#include <linux/pci.h>
  16#include <linux/of_address.h>
  17
  18#include <asm/cpu-info.h>
  19
  20unsigned long PCIBIOS_MIN_IO;
  21EXPORT_SYMBOL(PCIBIOS_MIN_IO);
  22
  23unsigned long PCIBIOS_MIN_MEM;
  24EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
  25
  26static int __init pcibios_set_cache_line_size(void)
  27{
  28        unsigned int lsize;
  29
  30        /*
  31         * Set PCI cacheline size to that of the highest level in the
  32         * cache hierarchy.
  33         */
  34        lsize = cpu_dcache_line_size();
  35        lsize = cpu_scache_line_size() ? : lsize;
  36        lsize = cpu_tcache_line_size() ? : lsize;
  37
  38        BUG_ON(!lsize);
  39
  40        pci_dfl_cache_line_size = lsize >> 2;
  41
  42        pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
  43        return 0;
  44}
  45arch_initcall(pcibios_set_cache_line_size);
  46
  47void pci_resource_to_user(const struct pci_dev *dev, int bar,
  48                          const struct resource *rsrc, resource_size_t *start,
  49                          resource_size_t *end)
  50{
  51        phys_addr_t size = resource_size(rsrc);
  52
  53        *start = fixup_bigphys_addr(rsrc->start, size);
  54        *end = rsrc->start + size - 1;
  55}
  56