1
2
3
4
5
6
7
8#ifndef __DPU_KMS_H__
9#define __DPU_KMS_H__
10
11#include <linux/interconnect.h>
12
13#include <drm/drm_drv.h>
14
15#include "msm_drv.h"
16#include "msm_kms.h"
17#include "msm_mmu.h"
18#include "msm_gem.h"
19#include "dpu_hw_catalog.h"
20#include "dpu_hw_ctl.h"
21#include "dpu_hw_lm.h"
22#include "dpu_hw_interrupts.h"
23#include "dpu_hw_top.h"
24#include "dpu_rm.h"
25#include "dpu_core_perf.h"
26
27#define DRMID(x) ((x) ? (x)->base.id : -1)
28
29
30
31
32
33#define DPU_DEBUG(fmt, ...) \
34 do { \
35 if (drm_debug_enabled(DRM_UT_KMS)) \
36 DRM_DEBUG(fmt, ##__VA_ARGS__); \
37 else \
38 pr_debug(fmt, ##__VA_ARGS__); \
39 } while (0)
40
41
42
43
44
45#define DPU_DEBUG_DRIVER(fmt, ...) \
46 do { \
47 if (drm_debug_enabled(DRM_UT_DRIVER)) \
48 DRM_ERROR(fmt, ##__VA_ARGS__); \
49 else \
50 pr_debug(fmt, ##__VA_ARGS__); \
51 } while (0)
52
53#define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__)
54
55
56
57
58
59
60
61
62
63#define ktime_compare_safe(A, B) \
64 ktime_compare(ktime_sub((A), (B)), ktime_set(0, 0))
65
66#define DPU_NAME_SIZE 12
67
68struct dpu_kms {
69 struct msm_kms base;
70 struct drm_device *dev;
71 int core_rev;
72 struct dpu_mdss_cfg *catalog;
73
74
75 void __iomem *mmio, *vbif[VBIF_MAX], *reg_dma;
76
77 struct regulator *vdd;
78 struct regulator *mmagic;
79 struct regulator *venus;
80
81 struct dpu_hw_intr *hw_intr;
82
83 struct dpu_core_perf perf;
84
85
86
87
88
89 struct drm_modeset_lock global_state_lock;
90 struct drm_private_obj global_state;
91
92 struct dpu_rm rm;
93 bool rm_init;
94
95 struct dpu_hw_vbif *hw_vbif[VBIF_MAX];
96 struct dpu_hw_mdp *hw_mdp;
97
98 bool has_danger_ctrl;
99
100 struct platform_device *pdev;
101 bool rpm_enabled;
102
103 struct clk_bulk_data *clocks;
104 size_t num_clocks;
105
106
107
108
109
110
111
112 atomic_t bandwidth_ref;
113 struct icc_path *path[2];
114 u32 num_paths;
115};
116
117struct vsync_info {
118 u32 frame_count;
119 u32 line_count;
120};
121
122#define to_dpu_kms(x) container_of(x, struct dpu_kms, base)
123
124#define to_dpu_global_state(x) container_of(x, struct dpu_global_state, base)
125
126
127
128
129struct dpu_global_state {
130 struct drm_private_state base;
131
132 uint32_t pingpong_to_enc_id[PINGPONG_MAX - PINGPONG_0];
133 uint32_t mixer_to_enc_id[LM_MAX - LM_0];
134 uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
135 uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0];
136 uint32_t dsc_to_enc_id[DSC_MAX - DSC_0];
137};
138
139struct dpu_global_state
140 *dpu_kms_get_existing_global_state(struct dpu_kms *dpu_kms);
141struct dpu_global_state
142 *__must_check dpu_kms_get_global_state(struct drm_atomic_state *s);
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169void dpu_debugfs_create_regset32(const char *name, umode_t mode,
170 void *parent,
171 uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms);
172
173
174
175
176
177
178
179
180
181
182
183void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
184
185
186
187
188
189
190#define DPU_KMS_INFO_MAX_SIZE 4096
191
192
193
194
195int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
196void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
197
198
199
200
201
202
203
204
205u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms, char *clock_name);
206
207#endif
208