linux/drivers/gpu/drm/msm/dp/dp_parser.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
   4 */
   5
   6#ifndef _DP_PARSER_H_
   7#define _DP_PARSER_H_
   8
   9#include <linux/platform_device.h>
  10#include <linux/phy/phy.h>
  11#include <linux/phy/phy-dp.h>
  12
  13#include "dp_clk_util.h"
  14#include "msm_drv.h"
  15
  16#define DP_LABEL "MDSS DP DISPLAY"
  17#define DP_MAX_PIXEL_CLK_KHZ    675000
  18#define DP_MAX_NUM_DP_LANES     4
  19
  20enum dp_pm_type {
  21        DP_CORE_PM,
  22        DP_CTRL_PM,
  23        DP_STREAM_PM,
  24        DP_PHY_PM,
  25        DP_MAX_PM
  26};
  27
  28struct dss_io_region {
  29        size_t len;
  30        void __iomem *base;
  31};
  32
  33struct dss_io_data {
  34        struct dss_io_region ahb;
  35        struct dss_io_region aux;
  36        struct dss_io_region link;
  37        struct dss_io_region p0;
  38};
  39
  40static inline const char *dp_parser_pm_name(enum dp_pm_type module)
  41{
  42        switch (module) {
  43        case DP_CORE_PM:        return "DP_CORE_PM";
  44        case DP_CTRL_PM:        return "DP_CTRL_PM";
  45        case DP_STREAM_PM:      return "DP_STREAM_PM";
  46        case DP_PHY_PM:         return "DP_PHY_PM";
  47        default:                return "???";
  48        }
  49}
  50
  51/**
  52 * struct dp_display_data  - display related device tree data.
  53 *
  54 * @ctrl_node: referece to controller device
  55 * @phy_node:  reference to phy device
  56 * @is_active: is the controller currently active
  57 * @name: name of the display
  58 * @display_type: type of the display
  59 */
  60struct dp_display_data {
  61        struct device_node *ctrl_node;
  62        struct device_node *phy_node;
  63        bool is_active;
  64        const char *name;
  65        const char *display_type;
  66};
  67
  68/**
  69 * struct dp_ctrl_resource - controller's IO related data
  70 *
  71 * @dp_controller: Display Port controller mapped memory address
  72 * @phy_io: phy's mapped memory address
  73 */
  74struct dp_io {
  75        struct dss_io_data dp_controller;
  76        struct phy *phy;
  77        union phy_configure_opts phy_opts;
  78};
  79
  80/**
  81 * struct dp_pinctrl - DP's pin control
  82 *
  83 * @pin: pin-controller's instance
  84 * @state_active: active state pin control
  85 * @state_hpd_active: hpd active state pin control
  86 * @state_suspend: suspend state pin control
  87 */
  88struct dp_pinctrl {
  89        struct pinctrl *pin;
  90        struct pinctrl_state *state_active;
  91        struct pinctrl_state *state_hpd_active;
  92        struct pinctrl_state *state_suspend;
  93};
  94
  95#define DP_DEV_REGULATOR_MAX    4
  96
  97/* Regulators for DP devices */
  98struct dp_reg_entry {
  99        char name[32];
 100        int enable_load;
 101        int disable_load;
 102};
 103
 104struct dp_regulator_cfg {
 105        int num;
 106        struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX];
 107};
 108
 109/**
 110 * struct dp_parser - DP parser's data exposed to clients
 111 *
 112 * @pdev: platform data of the client
 113 * @mp: gpio, regulator and clock related data
 114 * @pinctrl: pin-control related data
 115 * @disp_data: controller's display related data
 116 * @parse: function to be called by client to parse device tree.
 117 */
 118struct dp_parser {
 119        struct platform_device *pdev;
 120        struct dss_module_power mp[DP_MAX_PM];
 121        struct dp_pinctrl pinctrl;
 122        struct dp_io io;
 123        struct dp_display_data disp_data;
 124        const struct dp_regulator_cfg *regulator_cfg;
 125        u32 max_dp_lanes;
 126        struct drm_bridge *next_bridge;
 127
 128        int (*parse)(struct dp_parser *parser);
 129};
 130
 131/**
 132 * dp_parser_get() - get the DP's device tree parser module
 133 *
 134 * @pdev: platform data of the client
 135 * return: pointer to dp_parser structure.
 136 *
 137 * This function provides client capability to parse the
 138 * device tree and populate the data structures. The data
 139 * related to clock, regulators, pin-control and other
 140 * can be parsed using this module.
 141 */
 142struct dp_parser *dp_parser_get(struct platform_device *pdev);
 143
 144/**
 145 * dp_parser_find_next_bridge() - find an additional bridge to DP
 146 *
 147 * @parser: dp_parser data from client
 148 *
 149 * This function is used to find any additional bridge attached to
 150 * the DP controller. The eDP interface requires a panel bridge.
 151 *
 152 * Return: 0 if able to get the bridge, otherwise negative errno for failure.
 153 */
 154int dp_parser_find_next_bridge(struct dp_parser *parser);
 155
 156#endif
 157