LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "hdmi.h"
  25
  26void
  27gt215_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
  28                u8 rekey, u8 *avi, u8 avi_size, u8 *vendor, u8 vendor_size)
  29{
  30        struct nvkm_device *device = ior->disp->engine.subdev.device;
  31        const u32 ctrl = 0x40000000 * enable |
  32                         0x1f000000 /* ??? */ |
  33                         max_ac_packet << 16 |
  34                         rekey;
  35        const u32 soff = nv50_ior_base(ior);
  36        struct packed_hdmi_infoframe avi_infoframe;
  37        struct packed_hdmi_infoframe vendor_infoframe;
  38
  39        pack_hdmi_infoframe(&avi_infoframe, avi, avi_size);
  40        pack_hdmi_infoframe(&vendor_infoframe, vendor, vendor_size);
  41
  42        if (!(ctrl & 0x40000000)) {
  43                nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
  44                nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);
  45                nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
  46                nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
  47                return;
  48        }
  49
  50        /* AVI InfoFrame */
  51        nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
  52        if (avi_size) {
  53                nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header);
  54                nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low);
  55                nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high);
  56                nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low);
  57                nvkm_wr32(device, 0x61c538 + soff, avi_infoframe.subpack1_high);
  58                nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
  59        }
  60
  61        /* Audio InfoFrame */
  62        nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
  63        nvkm_wr32(device, 0x61c508 + soff, 0x000a0184);
  64        nvkm_wr32(device, 0x61c50c + soff, 0x00000071);
  65        nvkm_wr32(device, 0x61c510 + soff, 0x00000000);
  66        nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
  67
  68        /* Vendor InfoFrame */
  69        nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
  70        if (vendor_size) {
  71                nvkm_wr32(device, 0x61c544 + soff, vendor_infoframe.header);
  72                nvkm_wr32(device, 0x61c548 + soff, vendor_infoframe.subpack0_low);
  73                nvkm_wr32(device, 0x61c54c + soff, vendor_infoframe.subpack0_high);
  74                /* Is there a second (or up to fourth?) set of subpack registers here? */
  75                /* nvkm_wr32(device, 0x61c550 + soff, vendor_infoframe.subpack1_low); */
  76                /* nvkm_wr32(device, 0x61c554 + soff, vendor_infoframe.subpack1_high); */
  77                nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001);
  78        }
  79
  80        nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
  81        nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
  82        nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
  83
  84        /* ??? */
  85        nvkm_mask(device, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
  86        nvkm_mask(device, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
  87        nvkm_mask(device, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
  88
  89        /* HDMI_CTRL */
  90        nvkm_mask(device, 0x61c5a4 + soff, 0x5f1f007f, ctrl);
  91}
  92