1
2
3#include <linux/pci.h>
4
5#include <drm/drm_aperture.h>
6#include <drm/drm_atomic_helper.h>
7#include <drm/drm_drv.h>
8#include <drm/drm_fb_helper.h>
9#include <drm/drm_fourcc.h>
10#include <drm/drm_gem_framebuffer_helper.h>
11#include <drm/drm_gem_vram_helper.h>
12#include <drm/drm_managed.h>
13#include <drm/drm_module.h>
14#include <drm/drm_probe_helper.h>
15#include <drm/drm_simple_kms_helper.h>
16
17#include <video/vga.h>
18
19
20
21#define VBE_DISPI_IOPORT_INDEX 0x01CE
22#define VBE_DISPI_IOPORT_DATA 0x01CF
23
24#define VBE_DISPI_INDEX_ID 0x0
25#define VBE_DISPI_INDEX_XRES 0x1
26#define VBE_DISPI_INDEX_YRES 0x2
27#define VBE_DISPI_INDEX_BPP 0x3
28#define VBE_DISPI_INDEX_ENABLE 0x4
29#define VBE_DISPI_INDEX_BANK 0x5
30#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
31#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
32#define VBE_DISPI_INDEX_X_OFFSET 0x8
33#define VBE_DISPI_INDEX_Y_OFFSET 0x9
34#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
35
36#define VBE_DISPI_ID0 0xB0C0
37#define VBE_DISPI_ID1 0xB0C1
38#define VBE_DISPI_ID2 0xB0C2
39#define VBE_DISPI_ID3 0xB0C3
40#define VBE_DISPI_ID4 0xB0C4
41#define VBE_DISPI_ID5 0xB0C5
42
43#define VBE_DISPI_DISABLED 0x00
44#define VBE_DISPI_ENABLED 0x01
45#define VBE_DISPI_GETCAPS 0x02
46#define VBE_DISPI_8BIT_DAC 0x20
47#define VBE_DISPI_LFB_ENABLED 0x40
48#define VBE_DISPI_NOCLEARMEM 0x80
49
50static int bochs_modeset = -1;
51static int defx = 1024;
52static int defy = 768;
53
54module_param_named(modeset, bochs_modeset, int, 0444);
55MODULE_PARM_DESC(modeset, "enable/disable kernel modesetting");
56
57module_param(defx, int, 0444);
58module_param(defy, int, 0444);
59MODULE_PARM_DESC(defx, "default x resolution");
60MODULE_PARM_DESC(defy, "default y resolution");
61
62
63
64enum bochs_types {
65 BOCHS_QEMU_STDVGA,
66 BOCHS_SIMICS,
67 BOCHS_UNKNOWN,
68};
69
70struct bochs_device {
71
72 void __iomem *mmio;
73 int ioports;
74 void __iomem *fb_map;
75 unsigned long fb_base;
76 unsigned long fb_size;
77 unsigned long qext_size;
78
79
80 u16 xres;
81 u16 yres;
82 u16 yres_virtual;
83 u32 stride;
84 u32 bpp;
85 struct edid *edid;
86
87
88 struct drm_device *dev;
89 struct drm_simple_display_pipe pipe;
90 struct drm_connector connector;
91};
92
93
94
95static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
96{
97 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
98 return;
99
100 if (bochs->mmio) {
101 int offset = ioport - 0x3c0 + 0x400;
102
103 writeb(val, bochs->mmio + offset);
104 } else {
105 outb(val, ioport);
106 }
107}
108
109static u8 bochs_vga_readb(struct bochs_device *bochs, u16 ioport)
110{
111 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
112 return 0xff;
113
114 if (bochs->mmio) {
115 int offset = ioport - 0x3c0 + 0x400;
116
117 return readb(bochs->mmio + offset);
118 } else {
119 return inb(ioport);
120 }
121}
122
123static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
124{
125 u16 ret = 0;
126
127 if (bochs->mmio) {
128 int offset = 0x500 + (reg << 1);
129
130 ret = readw(bochs->mmio + offset);
131 } else {
132 outw(reg, VBE_DISPI_IOPORT_INDEX);
133 ret = inw(VBE_DISPI_IOPORT_DATA);
134 }
135 return ret;
136}
137
138static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
139{
140 if (bochs->mmio) {
141 int offset = 0x500 + (reg << 1);
142
143 writew(val, bochs->mmio + offset);
144 } else {
145 outw(reg, VBE_DISPI_IOPORT_INDEX);
146 outw(val, VBE_DISPI_IOPORT_DATA);
147 }
148}
149
150static void bochs_hw_set_big_endian(struct bochs_device *bochs)
151{
152 if (bochs->qext_size < 8)
153 return;
154
155 writel(0xbebebebe, bochs->mmio + 0x604);
156}
157
158static void bochs_hw_set_little_endian(struct bochs_device *bochs)
159{
160 if (bochs->qext_size < 8)
161 return;
162
163 writel(0x1e1e1e1e, bochs->mmio + 0x604);
164}
165
166#ifdef __BIG_ENDIAN
167#define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b)
168#else
169#define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b)
170#endif
171
172static int bochs_get_edid_block(void *data, u8 *buf,
173 unsigned int block, size_t len)
174{
175 struct bochs_device *bochs = data;
176 size_t i, start = block * EDID_LENGTH;
177
178 if (start + len > 0x400 )
179 return -1;
180
181 for (i = 0; i < len; i++)
182 buf[i] = readb(bochs->mmio + start + i);
183
184 return 0;
185}
186
187static int bochs_hw_load_edid(struct bochs_device *bochs)
188{
189 u8 header[8];
190
191 if (!bochs->mmio)
192 return -1;
193
194
195 bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
196 if (drm_edid_header_is_valid(header) != 8)
197 return -1;
198
199 kfree(bochs->edid);
200 bochs->edid = drm_do_get_edid(&bochs->connector,
201 bochs_get_edid_block, bochs);
202 if (bochs->edid == NULL)
203 return -1;
204
205 return 0;
206}
207
208static int bochs_hw_init(struct drm_device *dev)
209{
210 struct bochs_device *bochs = dev->dev_private;
211 struct pci_dev *pdev = to_pci_dev(dev->dev);
212 unsigned long addr, size, mem, ioaddr, iosize;
213 u16 id;
214
215 if (pdev->resource[2].flags & IORESOURCE_MEM) {
216
217 if (pci_request_region(pdev, 2, "bochs-drm") != 0) {
218 DRM_ERROR("Cannot request mmio region\n");
219 return -EBUSY;
220 }
221 ioaddr = pci_resource_start(pdev, 2);
222 iosize = pci_resource_len(pdev, 2);
223 bochs->mmio = ioremap(ioaddr, iosize);
224 if (bochs->mmio == NULL) {
225 DRM_ERROR("Cannot map mmio region\n");
226 return -ENOMEM;
227 }
228 } else {
229 ioaddr = VBE_DISPI_IOPORT_INDEX;
230 iosize = 2;
231 if (!request_region(ioaddr, iosize, "bochs-drm")) {
232 DRM_ERROR("Cannot request ioports\n");
233 return -EBUSY;
234 }
235 bochs->ioports = 1;
236 }
237
238 id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
239 mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
240 * 64 * 1024;
241 if ((id & 0xfff0) != VBE_DISPI_ID0) {
242 DRM_ERROR("ID mismatch\n");
243 return -ENODEV;
244 }
245
246 if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0)
247 return -ENODEV;
248 addr = pci_resource_start(pdev, 0);
249 size = pci_resource_len(pdev, 0);
250 if (addr == 0)
251 return -ENODEV;
252 if (size != mem) {
253 DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n",
254 size, mem);
255 size = min(size, mem);
256 }
257
258 if (pci_request_region(pdev, 0, "bochs-drm") != 0)
259 DRM_WARN("Cannot request framebuffer, boot fb still active?\n");
260
261 bochs->fb_map = ioremap(addr, size);
262 if (bochs->fb_map == NULL) {
263 DRM_ERROR("Cannot map framebuffer\n");
264 return -ENOMEM;
265 }
266 bochs->fb_base = addr;
267 bochs->fb_size = size;
268
269 DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);
270 DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n",
271 size / 1024, addr,
272 bochs->ioports ? "ioports" : "mmio",
273 ioaddr);
274
275 if (bochs->mmio && pdev->revision >= 2) {
276 bochs->qext_size = readl(bochs->mmio + 0x600);
277 if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
278 bochs->qext_size = 0;
279 goto noext;
280 }
281 DRM_DEBUG("Found qemu ext regs, size %ld\n",
282 bochs->qext_size);
283 bochs_hw_set_native_endian(bochs);
284 }
285
286noext:
287 return 0;
288}
289
290static void bochs_hw_fini(struct drm_device *dev)
291{
292 struct bochs_device *bochs = dev->dev_private;
293
294
295
296 if (bochs->mmio)
297 iounmap(bochs->mmio);
298 if (bochs->ioports)
299 release_region(VBE_DISPI_IOPORT_INDEX, 2);
300 if (bochs->fb_map)
301 iounmap(bochs->fb_map);
302 pci_release_regions(to_pci_dev(dev->dev));
303 kfree(bochs->edid);
304}
305
306static void bochs_hw_blank(struct bochs_device *bochs, bool blank)
307{
308 DRM_DEBUG_DRIVER("hw_blank %d\n", blank);
309
310 (void)bochs_vga_readb(bochs, VGA_IS1_RC);
311
312 bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20);
313}
314
315static void bochs_hw_setmode(struct bochs_device *bochs, struct drm_display_mode *mode)
316{
317 int idx;
318
319 if (!drm_dev_enter(bochs->dev, &idx))
320 return;
321
322 bochs->xres = mode->hdisplay;
323 bochs->yres = mode->vdisplay;
324 bochs->bpp = 32;
325 bochs->stride = mode->hdisplay * (bochs->bpp / 8);
326 bochs->yres_virtual = bochs->fb_size / bochs->stride;
327
328 DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n",
329 bochs->xres, bochs->yres, bochs->bpp,
330 bochs->yres_virtual);
331
332 bochs_hw_blank(bochs, false);
333
334 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 0);
335 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp);
336 bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES, bochs->xres);
337 bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES, bochs->yres);
338 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK, 0);
339 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, bochs->xres);
340 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
341 bochs->yres_virtual);
342 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, 0);
343 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, 0);
344
345 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
346 VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
347
348 drm_dev_exit(idx);
349}
350
351static void bochs_hw_setformat(struct bochs_device *bochs, const struct drm_format_info *format)
352{
353 int idx;
354
355 if (!drm_dev_enter(bochs->dev, &idx))
356 return;
357
358 DRM_DEBUG_DRIVER("format %c%c%c%c\n",
359 (format->format >> 0) & 0xff,
360 (format->format >> 8) & 0xff,
361 (format->format >> 16) & 0xff,
362 (format->format >> 24) & 0xff);
363
364 switch (format->format) {
365 case DRM_FORMAT_XRGB8888:
366 bochs_hw_set_little_endian(bochs);
367 break;
368 case DRM_FORMAT_BGRX8888:
369 bochs_hw_set_big_endian(bochs);
370 break;
371 default:
372
373 DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",
374 __func__, format->format);
375 break;
376 }
377
378 drm_dev_exit(idx);
379}
380
381static void bochs_hw_setbase(struct bochs_device *bochs, int x, int y, int stride, u64 addr)
382{
383 unsigned long offset;
384 unsigned int vx, vy, vwidth, idx;
385
386 if (!drm_dev_enter(bochs->dev, &idx))
387 return;
388
389 bochs->stride = stride;
390 offset = (unsigned long)addr +
391 y * bochs->stride +
392 x * (bochs->bpp / 8);
393 vy = offset / bochs->stride;
394 vx = (offset % bochs->stride) * 8 / bochs->bpp;
395 vwidth = stride * 8 / bochs->bpp;
396
397 DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n",
398 x, y, addr, offset, vx, vy);
399 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
400 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
401 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
402
403 drm_dev_exit(idx);
404}
405
406
407
408static const uint32_t bochs_formats[] = {
409 DRM_FORMAT_XRGB8888,
410 DRM_FORMAT_BGRX8888,
411};
412
413static void bochs_plane_update(struct bochs_device *bochs, struct drm_plane_state *state)
414{
415 struct drm_gem_vram_object *gbo;
416 s64 gpu_addr;
417
418 if (!state->fb || !bochs->stride)
419 return;
420
421 gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
422 gpu_addr = drm_gem_vram_offset(gbo);
423 if (WARN_ON_ONCE(gpu_addr < 0))
424 return;
425
426 bochs_hw_setbase(bochs,
427 state->crtc_x,
428 state->crtc_y,
429 state->fb->pitches[0],
430 state->fb->offsets[0] + gpu_addr);
431 bochs_hw_setformat(bochs, state->fb->format);
432}
433
434static void bochs_pipe_enable(struct drm_simple_display_pipe *pipe,
435 struct drm_crtc_state *crtc_state,
436 struct drm_plane_state *plane_state)
437{
438 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
439
440 bochs_hw_setmode(bochs, &crtc_state->mode);
441 bochs_plane_update(bochs, plane_state);
442}
443
444static void bochs_pipe_disable(struct drm_simple_display_pipe *pipe)
445{
446 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
447
448 bochs_hw_blank(bochs, true);
449}
450
451static void bochs_pipe_update(struct drm_simple_display_pipe *pipe,
452 struct drm_plane_state *old_state)
453{
454 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
455
456 bochs_plane_update(bochs, pipe->plane.state);
457}
458
459static const struct drm_simple_display_pipe_funcs bochs_pipe_funcs = {
460 .enable = bochs_pipe_enable,
461 .disable = bochs_pipe_disable,
462 .update = bochs_pipe_update,
463 .prepare_fb = drm_gem_vram_simple_display_pipe_prepare_fb,
464 .cleanup_fb = drm_gem_vram_simple_display_pipe_cleanup_fb,
465};
466
467static int bochs_connector_get_modes(struct drm_connector *connector)
468{
469 struct bochs_device *bochs =
470 container_of(connector, struct bochs_device, connector);
471 int count = 0;
472
473 if (bochs->edid)
474 count = drm_add_edid_modes(connector, bochs->edid);
475
476 if (!count) {
477 count = drm_add_modes_noedid(connector, 8192, 8192);
478 drm_set_preferred_mode(connector, defx, defy);
479 }
480 return count;
481}
482
483static const struct drm_connector_helper_funcs bochs_connector_connector_helper_funcs = {
484 .get_modes = bochs_connector_get_modes,
485};
486
487static const struct drm_connector_funcs bochs_connector_connector_funcs = {
488 .fill_modes = drm_helper_probe_single_connector_modes,
489 .destroy = drm_connector_cleanup,
490 .reset = drm_atomic_helper_connector_reset,
491 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
492 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
493};
494
495static void bochs_connector_init(struct drm_device *dev)
496{
497 struct bochs_device *bochs = dev->dev_private;
498 struct drm_connector *connector = &bochs->connector;
499
500 drm_connector_init(dev, connector, &bochs_connector_connector_funcs,
501 DRM_MODE_CONNECTOR_VIRTUAL);
502 drm_connector_helper_add(connector, &bochs_connector_connector_helper_funcs);
503
504 bochs_hw_load_edid(bochs);
505 if (bochs->edid) {
506 DRM_INFO("Found EDID data blob.\n");
507 drm_connector_attach_edid_property(connector);
508 drm_connector_update_edid_property(connector, bochs->edid);
509 }
510}
511
512static struct drm_framebuffer *
513bochs_gem_fb_create(struct drm_device *dev, struct drm_file *file,
514 const struct drm_mode_fb_cmd2 *mode_cmd)
515{
516 if (mode_cmd->pixel_format != DRM_FORMAT_XRGB8888 &&
517 mode_cmd->pixel_format != DRM_FORMAT_BGRX8888)
518 return ERR_PTR(-EINVAL);
519
520 return drm_gem_fb_create(dev, file, mode_cmd);
521}
522
523static const struct drm_mode_config_funcs bochs_mode_funcs = {
524 .fb_create = bochs_gem_fb_create,
525 .mode_valid = drm_vram_helper_mode_valid,
526 .atomic_check = drm_atomic_helper_check,
527 .atomic_commit = drm_atomic_helper_commit,
528};
529
530static int bochs_kms_init(struct bochs_device *bochs)
531{
532 int ret;
533
534 ret = drmm_mode_config_init(bochs->dev);
535 if (ret)
536 return ret;
537
538 bochs->dev->mode_config.max_width = 8192;
539 bochs->dev->mode_config.max_height = 8192;
540
541 bochs->dev->mode_config.fb_base = bochs->fb_base;
542 bochs->dev->mode_config.preferred_depth = 24;
543 bochs->dev->mode_config.prefer_shadow = 0;
544 bochs->dev->mode_config.prefer_shadow_fbdev = 1;
545 bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
546
547 bochs->dev->mode_config.funcs = &bochs_mode_funcs;
548
549 bochs_connector_init(bochs->dev);
550 drm_simple_display_pipe_init(bochs->dev,
551 &bochs->pipe,
552 &bochs_pipe_funcs,
553 bochs_formats,
554 ARRAY_SIZE(bochs_formats),
555 NULL,
556 &bochs->connector);
557
558 drm_mode_config_reset(bochs->dev);
559
560 return 0;
561}
562
563
564
565
566static int bochs_load(struct drm_device *dev)
567{
568 struct bochs_device *bochs;
569 int ret;
570
571 bochs = drmm_kzalloc(dev, sizeof(*bochs), GFP_KERNEL);
572 if (bochs == NULL)
573 return -ENOMEM;
574 dev->dev_private = bochs;
575 bochs->dev = dev;
576
577 ret = bochs_hw_init(dev);
578 if (ret)
579 return ret;
580
581 ret = drmm_vram_helper_init(dev, bochs->fb_base, bochs->fb_size);
582 if (ret)
583 return ret;
584
585 ret = bochs_kms_init(bochs);
586 if (ret)
587 return ret;
588
589 return 0;
590}
591
592DEFINE_DRM_GEM_FOPS(bochs_fops);
593
594static const struct drm_driver bochs_driver = {
595 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
596 .fops = &bochs_fops,
597 .name = "bochs-drm",
598 .desc = "bochs dispi vga interface (qemu stdvga)",
599 .date = "20130925",
600 .major = 1,
601 .minor = 0,
602 DRM_GEM_VRAM_DRIVER,
603};
604
605
606
607
608#ifdef CONFIG_PM_SLEEP
609static int bochs_pm_suspend(struct device *dev)
610{
611 struct drm_device *drm_dev = dev_get_drvdata(dev);
612
613 return drm_mode_config_helper_suspend(drm_dev);
614}
615
616static int bochs_pm_resume(struct device *dev)
617{
618 struct drm_device *drm_dev = dev_get_drvdata(dev);
619
620 return drm_mode_config_helper_resume(drm_dev);
621}
622#endif
623
624static const struct dev_pm_ops bochs_pm_ops = {
625 SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
626 bochs_pm_resume)
627};
628
629
630
631
632static int bochs_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
633{
634 struct drm_device *dev;
635 unsigned long fbsize;
636 int ret;
637
638 fbsize = pci_resource_len(pdev, 0);
639 if (fbsize < 4 * 1024 * 1024) {
640 DRM_ERROR("less than 4 MB video memory, ignoring device\n");
641 return -ENOMEM;
642 }
643
644 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &bochs_driver);
645 if (ret)
646 return ret;
647
648 dev = drm_dev_alloc(&bochs_driver, &pdev->dev);
649 if (IS_ERR(dev))
650 return PTR_ERR(dev);
651
652 ret = pcim_enable_device(pdev);
653 if (ret)
654 goto err_free_dev;
655
656 pci_set_drvdata(pdev, dev);
657
658 ret = bochs_load(dev);
659 if (ret)
660 goto err_free_dev;
661
662 ret = drm_dev_register(dev, 0);
663 if (ret)
664 goto err_free_dev;
665
666 drm_fbdev_generic_setup(dev, 32);
667 return ret;
668
669err_free_dev:
670 drm_dev_put(dev);
671 return ret;
672}
673
674static void bochs_pci_remove(struct pci_dev *pdev)
675{
676 struct drm_device *dev = pci_get_drvdata(pdev);
677
678 drm_dev_unplug(dev);
679 drm_atomic_helper_shutdown(dev);
680 bochs_hw_fini(dev);
681 drm_dev_put(dev);
682}
683
684static const struct pci_device_id bochs_pci_tbl[] = {
685 {
686 .vendor = 0x1234,
687 .device = 0x1111,
688 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
689 .subdevice = PCI_SUBDEVICE_ID_QEMU,
690 .driver_data = BOCHS_QEMU_STDVGA,
691 },
692 {
693 .vendor = 0x1234,
694 .device = 0x1111,
695 .subvendor = PCI_ANY_ID,
696 .subdevice = PCI_ANY_ID,
697 .driver_data = BOCHS_UNKNOWN,
698 },
699 {
700 .vendor = 0x4321,
701 .device = 0x1111,
702 .subvendor = PCI_ANY_ID,
703 .subdevice = PCI_ANY_ID,
704 .driver_data = BOCHS_SIMICS,
705 },
706 { }
707};
708
709static struct pci_driver bochs_pci_driver = {
710 .name = "bochs-drm",
711 .id_table = bochs_pci_tbl,
712 .probe = bochs_pci_probe,
713 .remove = bochs_pci_remove,
714 .driver.pm = &bochs_pm_ops,
715};
716
717
718
719
720drm_module_pci_driver_if_modeset(bochs_pci_driver, bochs_modeset);
721
722MODULE_DEVICE_TABLE(pci, bochs_pci_tbl);
723MODULE_AUTHOR("Gerd Hoffmann <kraxel@redhat.com>");
724MODULE_LICENSE("GPL");
725
