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21#include <linux/stdarg.h>
22#include <linux/mutex.h>
23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
27#include <linux/sched/signal.h>
28#include <linux/miscdevice.h>
29#include <linux/blkdev.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/poll.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/cuda.h>
36#include <linux/module.h>
37#include <linux/spinlock.h>
38#include <linux/pm.h>
39#include <linux/proc_fs.h>
40#include <linux/seq_file.h>
41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/device.h>
44#include <linux/syscore_ops.h>
45#include <linux/freezer.h>
46#include <linux/syscalls.h>
47#include <linux/suspend.h>
48#include <linux/cpu.h>
49#include <linux/compat.h>
50#include <linux/of_address.h>
51#include <linux/of_irq.h>
52#include <linux/uaccess.h>
53#include <linux/pgtable.h>
54#include <asm/machdep.h>
55#include <asm/io.h>
56#include <asm/sections.h>
57#include <asm/irq.h>
58#ifdef CONFIG_PPC_PMAC
59#include <asm/pmac_feature.h>
60#include <asm/pmac_pfunc.h>
61#include <asm/pmac_low_i2c.h>
62#include <asm/mmu_context.h>
63#include <asm/cputable.h>
64#include <asm/time.h>
65#include <asm/backlight.h>
66#else
67#include <asm/macintosh.h>
68#include <asm/macints.h>
69#include <asm/mac_via.h>
70#endif
71
72#include "via-pmu-event.h"
73
74
75#undef DEBUG_SLEEP
76
77
78#define BATTERY_POLLING_COUNT 2
79
80static DEFINE_MUTEX(pmu_info_proc_mutex);
81
82
83#define RS 0x200
84#define B 0
85#define A RS
86#define DIRB (2*RS)
87#define DIRA (3*RS)
88#define T1CL (4*RS)
89#define T1CH (5*RS)
90#define T1LL (6*RS)
91#define T1LH (7*RS)
92#define T2CL (8*RS)
93#define T2CH (9*RS)
94#define SR (10*RS)
95#define ACR (11*RS)
96#define PCR (12*RS)
97#define IFR (13*RS)
98#define IER (14*RS)
99#define ANH (15*RS)
100
101
102#ifdef CONFIG_PPC_PMAC
103#define TACK 0x08
104#define TREQ 0x10
105#else
106#define TACK 0x02
107#define TREQ 0x04
108#endif
109
110
111#define SR_CTRL 0x1c
112#define SR_EXT 0x0c
113#define SR_OUT 0x10
114
115
116#define IER_SET 0x80
117#define IER_CLR 0
118#define SR_INT 0x04
119#define CB2_INT 0x08
120#define CB1_INT 0x10
121
122static volatile enum pmu_state {
123 uninitialized = 0,
124 idle,
125 sending,
126 intack,
127 reading,
128 reading_intr,
129 locked,
130} pmu_state;
131
132static volatile enum int_data_state {
133 int_data_empty,
134 int_data_fill,
135 int_data_ready,
136 int_data_flush
137} int_data_state[2] = { int_data_empty, int_data_empty };
138
139static struct adb_request *current_req;
140static struct adb_request *last_req;
141static struct adb_request *req_awaiting_reply;
142static unsigned char interrupt_data[2][32];
143static int interrupt_data_len[2];
144static int int_data_last;
145static unsigned char *reply_ptr;
146static int data_index;
147static int data_len;
148static volatile int adb_int_pending;
149static volatile int disable_poll;
150static int pmu_kind = PMU_UNKNOWN;
151static int pmu_fully_inited;
152static int pmu_has_adb;
153#ifdef CONFIG_PPC_PMAC
154static volatile unsigned char __iomem *via1;
155static volatile unsigned char __iomem *via2;
156static struct device_node *vias;
157static struct device_node *gpio_node;
158#endif
159static unsigned char __iomem *gpio_reg;
160static int gpio_irq = 0;
161static int gpio_irq_enabled = -1;
162static volatile int pmu_suspended;
163static DEFINE_SPINLOCK(pmu_lock);
164static u8 pmu_intr_mask;
165static int pmu_version;
166static int drop_interrupts;
167#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
168static int option_lid_wakeup = 1;
169#endif
170static unsigned long async_req_locks;
171
172#define NUM_IRQ_STATS 13
173static unsigned int pmu_irq_stats[NUM_IRQ_STATS];
174
175static struct proc_dir_entry *proc_pmu_root;
176static struct proc_dir_entry *proc_pmu_info;
177static struct proc_dir_entry *proc_pmu_irqstats;
178static struct proc_dir_entry *proc_pmu_options;
179static int option_server_mode;
180
181int pmu_battery_count;
182static int pmu_cur_battery;
183unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
184struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
185static int query_batt_timer = BATTERY_POLLING_COUNT;
186static struct adb_request batt_req;
187static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
188
189int asleep;
190
191#ifdef CONFIG_ADB
192static int adb_dev_map;
193static int pmu_adb_flags;
194
195static int pmu_probe(void);
196static int pmu_init(void);
197static int pmu_send_request(struct adb_request *req, int sync);
198static int pmu_adb_autopoll(int devs);
199static int pmu_adb_reset_bus(void);
200#endif
201
202static int init_pmu(void);
203static void pmu_start(void);
204static irqreturn_t via_pmu_interrupt(int irq, void *arg);
205static irqreturn_t gpio1_interrupt(int irq, void *arg);
206static int pmu_info_proc_show(struct seq_file *m, void *v);
207static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
208static int pmu_battery_proc_show(struct seq_file *m, void *v);
209static void pmu_pass_intr(unsigned char *data, int len);
210static const struct proc_ops pmu_options_proc_ops;
211
212#ifdef CONFIG_ADB
213const struct adb_driver via_pmu_driver = {
214 .name = "PMU",
215 .probe = pmu_probe,
216 .init = pmu_init,
217 .send_request = pmu_send_request,
218 .autopoll = pmu_adb_autopoll,
219 .poll = pmu_poll_adb,
220 .reset_bus = pmu_adb_reset_bus,
221};
222#endif
223
224extern void low_sleep_handler(void);
225extern void enable_kernel_altivec(void);
226extern void enable_kernel_fp(void);
227
228#ifdef DEBUG_SLEEP
229int pmu_polled_request(struct adb_request *req);
230void pmu_blink(int n);
231#endif
232
233
234
235
236
237
238
239
240static const s8 pmu_data_len[256][2] = {
241
242 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
244 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
246 {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
247 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
248 { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249 { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
250 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251 { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
252 { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
253 { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
254 { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
255 { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
256 { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
258 { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
259 { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
260 { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262 { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
263 { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
264 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
265 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
266 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
267 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
268 { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
269 { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
270 {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
271 { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
272 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
273 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
274};
275
276static char *pbook_type[] = {
277 "Unknown PowerBook",
278 "PowerBook 2400/3400/3500(G3)",
279 "PowerBook G3 Series",
280 "1999 PowerBook G3",
281 "Core99"
282};
283
284int __init find_via_pmu(void)
285{
286#ifdef CONFIG_PPC_PMAC
287 u64 taddr;
288 const u32 *reg;
289
290 if (pmu_state != uninitialized)
291 return 1;
292 vias = of_find_node_by_name(NULL, "via-pmu");
293 if (vias == NULL)
294 return 0;
295
296 reg = of_get_property(vias, "reg", NULL);
297 if (reg == NULL) {
298 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
299 goto fail;
300 }
301 taddr = of_translate_address(vias, reg);
302 if (taddr == OF_BAD_ADDR) {
303 printk(KERN_ERR "via-pmu: Can't translate address !\n");
304 goto fail;
305 }
306
307 pmu_has_adb = 1;
308
309 pmu_intr_mask = PMU_INT_PCEJECT |
310 PMU_INT_SNDBRT |
311 PMU_INT_ADB |
312 PMU_INT_TICK;
313
314 if (of_node_name_eq(vias->parent, "ohare") ||
315 of_device_is_compatible(vias->parent, "ohare"))
316 pmu_kind = PMU_OHARE_BASED;
317 else if (of_device_is_compatible(vias->parent, "paddington"))
318 pmu_kind = PMU_PADDINGTON_BASED;
319 else if (of_device_is_compatible(vias->parent, "heathrow"))
320 pmu_kind = PMU_HEATHROW_BASED;
321 else if (of_device_is_compatible(vias->parent, "Keylargo")
322 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
323 struct device_node *gpiop;
324 struct device_node *adbp;
325 u64 gaddr = OF_BAD_ADDR;
326
327 pmu_kind = PMU_KEYLARGO_BASED;
328 adbp = of_find_node_by_type(NULL, "adb");
329 pmu_has_adb = (adbp != NULL);
330 of_node_put(adbp);
331 pmu_intr_mask = PMU_INT_PCEJECT |
332 PMU_INT_SNDBRT |
333 PMU_INT_ADB |
334 PMU_INT_TICK |
335 PMU_INT_ENVIRONMENT;
336
337 gpiop = of_find_node_by_name(NULL, "gpio");
338 if (gpiop) {
339 reg = of_get_property(gpiop, "reg", NULL);
340 if (reg)
341 gaddr = of_translate_address(gpiop, reg);
342 if (gaddr != OF_BAD_ADDR)
343 gpio_reg = ioremap(gaddr, 0x10);
344 of_node_put(gpiop);
345 }
346 if (gpio_reg == NULL) {
347 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
348 goto fail;
349 }
350 } else
351 pmu_kind = PMU_UNKNOWN;
352
353 via1 = via2 = ioremap(taddr, 0x2000);
354 if (via1 == NULL) {
355 printk(KERN_ERR "via-pmu: Can't map address !\n");
356 goto fail_via_remap;
357 }
358
359 out_8(&via1[IER], IER_CLR | 0x7f);
360 out_8(&via1[IFR], 0x7f);
361
362 pmu_state = idle;
363
364 if (!init_pmu())
365 goto fail_init;
366
367 sys_ctrler = SYS_CTRLER_PMU;
368
369 return 1;
370
371 fail_init:
372 iounmap(via1);
373 via1 = via2 = NULL;
374 fail_via_remap:
375 iounmap(gpio_reg);
376 gpio_reg = NULL;
377 fail:
378 of_node_put(vias);
379 vias = NULL;
380 pmu_state = uninitialized;
381 return 0;
382#else
383 if (macintosh_config->adb_type != MAC_ADB_PB2)
384 return 0;
385
386 pmu_kind = PMU_UNKNOWN;
387
388 pmu_has_adb = 1;
389
390 pmu_intr_mask = PMU_INT_PCEJECT |
391 PMU_INT_SNDBRT |
392 PMU_INT_ADB |
393 PMU_INT_TICK;
394
395 pmu_state = idle;
396
397 if (!init_pmu()) {
398 pmu_state = uninitialized;
399 return 0;
400 }
401
402 return 1;
403#endif
404}
405
406#ifdef CONFIG_ADB
407static int pmu_probe(void)
408{
409 return pmu_state == uninitialized ? -ENODEV : 0;
410}
411
412static int pmu_init(void)
413{
414 return pmu_state == uninitialized ? -ENODEV : 0;
415}
416#endif
417
418
419
420
421
422
423
424
425static int __init via_pmu_start(void)
426{
427 unsigned int __maybe_unused irq;
428
429 if (pmu_state == uninitialized)
430 return -ENODEV;
431
432 batt_req.complete = 1;
433
434#ifdef CONFIG_PPC_PMAC
435 irq = irq_of_parse_and_map(vias, 0);
436 if (!irq) {
437 printk(KERN_ERR "via-pmu: can't map interrupt\n");
438 return -ENODEV;
439 }
440
441
442
443
444 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
445 "VIA-PMU", (void *)0)) {
446 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
447 return -ENODEV;
448 }
449
450 if (pmu_kind == PMU_KEYLARGO_BASED) {
451 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
452 if (gpio_node == NULL)
453 gpio_node = of_find_node_by_name(NULL,
454 "pmu-interrupt");
455 if (gpio_node)
456 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
457
458 if (gpio_irq) {
459 if (request_irq(gpio_irq, gpio1_interrupt,
460 IRQF_NO_SUSPEND, "GPIO1 ADB",
461 (void *)0))
462 printk(KERN_ERR "pmu: can't get irq %d"
463 " (GPIO1)\n", gpio_irq);
464 else
465 gpio_irq_enabled = 1;
466 }
467 }
468
469
470 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
471#else
472 if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND,
473 "VIA-PMU-SR", NULL)) {
474 pr_err("%s: couldn't get SR irq\n", __func__);
475 return -ENODEV;
476 }
477 if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND,
478 "VIA-PMU-CL", NULL)) {
479 pr_err("%s: couldn't get CL irq\n", __func__);
480 free_irq(IRQ_MAC_ADB_SR, NULL);
481 return -ENODEV;
482 }
483#endif
484
485 pmu_fully_inited = 1;
486
487
488
489
490
491
492
493
494
495 do {
496 pmu_poll();
497 } while (pmu_state != idle);
498
499 return 0;
500}
501
502arch_initcall(via_pmu_start);
503
504
505
506
507static int __init via_pmu_dev_init(void)
508{
509 if (pmu_state == uninitialized)
510 return -ENODEV;
511
512#ifdef CONFIG_PMAC_BACKLIGHT
513
514 pmu_backlight_init();
515#endif
516
517#ifdef CONFIG_PPC32
518 if (of_machine_is_compatible("AAPL,3400/2400") ||
519 of_machine_is_compatible("AAPL,3500")) {
520 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
521 NULL, PMAC_MB_INFO_MODEL, 0);
522 pmu_battery_count = 1;
523 if (mb == PMAC_TYPE_COMET)
524 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
525 else
526 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
527 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
528 of_machine_is_compatible("PowerBook1,1")) {
529 pmu_battery_count = 2;
530 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
531 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
532 } else {
533 struct device_node* prim =
534 of_find_node_by_name(NULL, "power-mgt");
535 const u32 *prim_info = NULL;
536 if (prim)
537 prim_info = of_get_property(prim, "prim-info", NULL);
538 if (prim_info) {
539
540 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
541 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
542 if (pmu_battery_count > 1)
543 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
544 }
545 of_node_put(prim);
546 }
547#endif
548
549
550 proc_pmu_root = proc_mkdir("pmu", NULL);
551 if (proc_pmu_root) {
552 long i;
553
554 for (i=0; i<pmu_battery_count; i++) {
555 char title[16];
556 sprintf(title, "battery_%ld", i);
557 proc_pmu_batt[i] = proc_create_single_data(title, 0,
558 proc_pmu_root, pmu_battery_proc_show,
559 (void *)i);
560 }
561
562 proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
563 pmu_info_proc_show);
564 proc_pmu_irqstats = proc_create_single("interrupts", 0,
565 proc_pmu_root, pmu_irqstats_proc_show);
566 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
567 &pmu_options_proc_ops);
568 }
569 return 0;
570}
571
572device_initcall(via_pmu_dev_init);
573
574static int
575init_pmu(void)
576{
577 int timeout;
578 struct adb_request req;
579
580
581 out_8(&via2[B], in_8(&via2[B]) | TREQ);
582 out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);
583
584 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
585 timeout = 100000;
586 while (!req.complete) {
587 if (--timeout < 0) {
588 printk(KERN_ERR "init_pmu: no response from PMU\n");
589 return 0;
590 }
591 udelay(10);
592 pmu_poll();
593 }
594
595
596 timeout = 100000;
597 interrupt_data[0][0] = 1;
598 while (interrupt_data[0][0] || pmu_state != idle) {
599 if (--timeout < 0) {
600 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
601 return 0;
602 }
603 if (pmu_state == idle)
604 adb_int_pending = 1;
605 via_pmu_interrupt(0, NULL);
606 udelay(10);
607 }
608
609
610 if (pmu_kind == PMU_KEYLARGO_BASED) {
611 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
612 while (!req.complete)
613 pmu_poll();
614 }
615
616
617 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
618 pmu_wait_complete(&req);
619 if (req.reply_len > 0)
620 pmu_version = req.reply[0];
621
622
623 if (pmu_kind == PMU_KEYLARGO_BASED) {
624 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
625 PMU_PWR_GET_POWERUP_EVENTS);
626 pmu_wait_complete(&req);
627 if (req.reply_len == 2) {
628 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
629 option_server_mode = 1;
630 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
631 option_server_mode ? "enabled" : "disabled");
632 }
633 }
634
635 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
636 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
637
638 return 1;
639}
640
641int
642pmu_get_model(void)
643{
644 return pmu_kind;
645}
646
647static void pmu_set_server_mode(int server_mode)
648{
649 struct adb_request req;
650
651 if (pmu_kind != PMU_KEYLARGO_BASED)
652 return;
653
654 option_server_mode = server_mode;
655 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
656 pmu_wait_complete(&req);
657 if (req.reply_len < 2)
658 return;
659 if (server_mode)
660 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
661 PMU_PWR_SET_POWERUP_EVENTS,
662 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
663 else
664 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
665 PMU_PWR_CLR_POWERUP_EVENTS,
666 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
667 pmu_wait_complete(&req);
668}
669
670
671
672
673static void
674done_battery_state_ohare(struct adb_request* req)
675{
676#ifdef CONFIG_PPC_PMAC
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
696 long pcharge, charge, vb, vmax, lmax;
697 long vmax_charging, vmax_charged;
698 long amperage, voltage, time, max;
699 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
700 NULL, PMAC_MB_INFO_MODEL, 0);
701
702 if (req->reply[0] & 0x01)
703 pmu_power_flags |= PMU_PWR_AC_PRESENT;
704 else
705 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
706
707 if (mb == PMAC_TYPE_COMET) {
708 vmax_charged = 189;
709 vmax_charging = 213;
710 lmax = 6500;
711 } else {
712 vmax_charged = 330;
713 vmax_charging = 330;
714 lmax = 6500;
715 }
716 vmax = vmax_charged;
717
718
719 if (req->reply[0] & 0x04) {
720 bat_flags |= PMU_BATT_PRESENT;
721 if (req->reply[0] & 0x02)
722 bat_flags |= PMU_BATT_CHARGING;
723 vb = (req->reply[1] << 8) | req->reply[2];
724 voltage = (vb * 265 + 72665) / 10;
725 amperage = req->reply[5];
726 if ((req->reply[0] & 0x01) == 0) {
727 if (amperage > 200)
728 vb += ((amperage - 200) * 15)/100;
729 } else if (req->reply[0] & 0x02) {
730 vb = (vb * 97) / 100;
731 vmax = vmax_charging;
732 }
733 charge = (100 * vb) / vmax;
734 if (req->reply[0] & 0x40) {
735 pcharge = (req->reply[6] << 8) + req->reply[7];
736 if (pcharge > lmax)
737 pcharge = lmax;
738 pcharge *= 100;
739 pcharge = 100 - pcharge / lmax;
740 if (pcharge < charge)
741 charge = pcharge;
742 }
743 if (amperage > 0)
744 time = (charge * 16440) / amperage;
745 else
746 time = 0;
747 max = 100;
748 amperage = -amperage;
749 } else
750 charge = max = amperage = voltage = time = 0;
751
752 pmu_batteries[pmu_cur_battery].flags = bat_flags;
753 pmu_batteries[pmu_cur_battery].charge = charge;
754 pmu_batteries[pmu_cur_battery].max_charge = max;
755 pmu_batteries[pmu_cur_battery].amperage = amperage;
756 pmu_batteries[pmu_cur_battery].voltage = voltage;
757 pmu_batteries[pmu_cur_battery].time_remaining = time;
758#endif
759
760 clear_bit(0, &async_req_locks);
761}
762
763static void
764done_battery_state_smart(struct adb_request* req)
765{
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
786 int amperage;
787 unsigned int capa, max, voltage;
788
789 if (req->reply[1] & 0x01)
790 pmu_power_flags |= PMU_PWR_AC_PRESENT;
791 else
792 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
793
794
795 capa = max = amperage = voltage = 0;
796
797 if (req->reply[1] & 0x04) {
798 bat_flags |= PMU_BATT_PRESENT;
799 switch(req->reply[0]) {
800 case 3:
801 case 4: capa = req->reply[2];
802 max = req->reply[3];
803 amperage = *((signed char *)&req->reply[4]);
804 voltage = req->reply[5];
805 break;
806 case 5: capa = (req->reply[2] << 8) | req->reply[3];
807 max = (req->reply[4] << 8) | req->reply[5];
808 amperage = *((signed short *)&req->reply[6]);
809 voltage = (req->reply[8] << 8) | req->reply[9];
810 break;
811 default:
812 pr_warn("pmu.c: unrecognized battery info, "
813 "len: %d, %4ph\n", req->reply_len,
814 req->reply);
815 break;
816 }
817 }
818
819 if ((req->reply[1] & 0x01) && (amperage > 0))
820 bat_flags |= PMU_BATT_CHARGING;
821
822 pmu_batteries[pmu_cur_battery].flags = bat_flags;
823 pmu_batteries[pmu_cur_battery].charge = capa;
824 pmu_batteries[pmu_cur_battery].max_charge = max;
825 pmu_batteries[pmu_cur_battery].amperage = amperage;
826 pmu_batteries[pmu_cur_battery].voltage = voltage;
827 if (amperage) {
828 if ((req->reply[1] & 0x01) && (amperage > 0))
829 pmu_batteries[pmu_cur_battery].time_remaining
830 = ((max-capa) * 3600) / amperage;
831 else
832 pmu_batteries[pmu_cur_battery].time_remaining
833 = (capa * 3600) / (-amperage);
834 } else
835 pmu_batteries[pmu_cur_battery].time_remaining = 0;
836
837 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
838
839 clear_bit(0, &async_req_locks);
840}
841
842static void
843query_battery_state(void)
844{
845 if (test_and_set_bit(0, &async_req_locks))
846 return;
847 if (pmu_kind == PMU_OHARE_BASED)
848 pmu_request(&batt_req, done_battery_state_ohare,
849 1, PMU_BATTERY_STATE);
850 else
851 pmu_request(&batt_req, done_battery_state_smart,
852 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
853}
854
855static int pmu_info_proc_show(struct seq_file *m, void *v)
856{
857 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
858 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
859 seq_printf(m, "AC Power : %d\n",
860 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
861 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
862
863 return 0;
864}
865
866static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
867{
868 int i;
869 static const char *irq_names[NUM_IRQ_STATS] = {
870 "Unknown interrupt (type 0)",
871 "Unknown interrupt (type 1)",
872 "PC-Card eject button",
873 "Sound/Brightness button",
874 "ADB message",
875 "Battery state change",
876 "Environment interrupt",
877 "Tick timer",
878 "Ghost interrupt (zero len)",
879 "Empty interrupt (empty mask)",
880 "Max irqs in a row",
881 "Total CB1 triggered events",
882 "Total GPIO1 triggered events",
883 };
884
885 for (i = 0; i < NUM_IRQ_STATS; i++) {
886 seq_printf(m, " %2u: %10u (%s)\n",
887 i, pmu_irq_stats[i], irq_names[i]);
888 }
889 return 0;
890}
891
892static int pmu_battery_proc_show(struct seq_file *m, void *v)
893{
894 long batnum = (long)m->private;
895
896 seq_putc(m, '\n');
897 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
898 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
899 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
900 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
901 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
902 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
903 return 0;
904}
905
906static int pmu_options_proc_show(struct seq_file *m, void *v)
907{
908#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
909 if (pmu_kind == PMU_KEYLARGO_BASED &&
910 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
911 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
912#endif
913 if (pmu_kind == PMU_KEYLARGO_BASED)
914 seq_printf(m, "server_mode=%d\n", option_server_mode);
915
916 return 0;
917}
918
919static int pmu_options_proc_open(struct inode *inode, struct file *file)
920{
921 return single_open(file, pmu_options_proc_show, NULL);
922}
923
924static ssize_t pmu_options_proc_write(struct file *file,
925 const char __user *buffer, size_t count, loff_t *pos)
926{
927 char tmp[33];
928 char *label, *val;
929 size_t fcount = count;
930
931 if (!count)
932 return -EINVAL;
933 if (count > 32)
934 count = 32;
935 if (copy_from_user(tmp, buffer, count))
936 return -EFAULT;
937 tmp[count] = 0;
938
939 label = tmp;
940 while(*label == ' ')
941 label++;
942 val = label;
943 while(*val && (*val != '=')) {
944 if (*val == ' ')
945 *val = 0;
946 val++;
947 }
948 if ((*val) == 0)
949 return -EINVAL;
950 *(val++) = 0;
951 while(*val == ' ')
952 val++;
953#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
954 if (pmu_kind == PMU_KEYLARGO_BASED &&
955 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
956 if (!strcmp(label, "lid_wakeup"))
957 option_lid_wakeup = ((*val) == '1');
958#endif
959 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
960 int new_value;
961 new_value = ((*val) == '1');
962 if (new_value != option_server_mode)
963 pmu_set_server_mode(new_value);
964 }
965 return fcount;
966}
967
968static const struct proc_ops pmu_options_proc_ops = {
969 .proc_open = pmu_options_proc_open,
970 .proc_read = seq_read,
971 .proc_lseek = seq_lseek,
972 .proc_release = single_release,
973 .proc_write = pmu_options_proc_write,
974};
975
976#ifdef CONFIG_ADB
977
978static int pmu_send_request(struct adb_request *req, int sync)
979{
980 int i, ret;
981
982 if (pmu_state == uninitialized || !pmu_fully_inited) {
983 req->complete = 1;
984 return -ENXIO;
985 }
986
987 ret = -EINVAL;
988
989 switch (req->data[0]) {
990 case PMU_PACKET:
991 for (i = 0; i < req->nbytes - 1; ++i)
992 req->data[i] = req->data[i+1];
993 --req->nbytes;
994 if (pmu_data_len[req->data[0]][1] != 0) {
995 req->reply[0] = ADB_RET_OK;
996 req->reply_len = 1;
997 } else
998 req->reply_len = 0;
999 ret = pmu_queue_request(req);
1000 break;
1001 case CUDA_PACKET:
1002 switch (req->data[1]) {
1003 case CUDA_GET_TIME:
1004 if (req->nbytes != 2)
1005 break;
1006 req->data[0] = PMU_READ_RTC;
1007 req->nbytes = 1;
1008 req->reply_len = 3;
1009 req->reply[0] = CUDA_PACKET;
1010 req->reply[1] = 0;
1011 req->reply[2] = CUDA_GET_TIME;
1012 ret = pmu_queue_request(req);
1013 break;
1014 case CUDA_SET_TIME:
1015 if (req->nbytes != 6)
1016 break;
1017 req->data[0] = PMU_SET_RTC;
1018 req->nbytes = 5;
1019 for (i = 1; i <= 4; ++i)
1020 req->data[i] = req->data[i+1];
1021 req->reply_len = 3;
1022 req->reply[0] = CUDA_PACKET;
1023 req->reply[1] = 0;
1024 req->reply[2] = CUDA_SET_TIME;
1025 ret = pmu_queue_request(req);
1026 break;
1027 }
1028 break;
1029 case ADB_PACKET:
1030 if (!pmu_has_adb)
1031 return -ENXIO;
1032 for (i = req->nbytes - 1; i > 1; --i)
1033 req->data[i+2] = req->data[i];
1034 req->data[3] = req->nbytes - 2;
1035 req->data[2] = pmu_adb_flags;
1036
1037 req->data[0] = PMU_ADB_CMD;
1038 req->nbytes += 2;
1039 req->reply_expected = 1;
1040 req->reply_len = 0;
1041 ret = pmu_queue_request(req);
1042 break;
1043 }
1044 if (ret) {
1045 req->complete = 1;
1046 return ret;
1047 }
1048
1049 if (sync)
1050 while (!req->complete)
1051 pmu_poll();
1052
1053 return 0;
1054}
1055
1056
1057static int __pmu_adb_autopoll(int devs)
1058{
1059 struct adb_request req;
1060
1061 if (devs) {
1062 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1063 adb_dev_map >> 8, adb_dev_map);
1064 pmu_adb_flags = 2;
1065 } else {
1066 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1067 pmu_adb_flags = 0;
1068 }
1069 while (!req.complete)
1070 pmu_poll();
1071 return 0;
1072}
1073
1074static int pmu_adb_autopoll(int devs)
1075{
1076 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1077 return -ENXIO;
1078
1079 adb_dev_map = devs;
1080 return __pmu_adb_autopoll(devs);
1081}
1082
1083
1084static int pmu_adb_reset_bus(void)
1085{
1086 struct adb_request req;
1087 int save_autopoll = adb_dev_map;
1088
1089 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1090 return -ENXIO;
1091
1092
1093 __pmu_adb_autopoll(0);
1094
1095 req.nbytes = 4;
1096 req.done = NULL;
1097 req.data[0] = PMU_ADB_CMD;
1098 req.data[1] = ADB_BUSRESET;
1099 req.data[2] = 0;
1100 req.data[3] = 0;
1101 req.data[4] = 0;
1102 req.reply_len = 0;
1103 req.reply_expected = 1;
1104 if (pmu_queue_request(&req) != 0) {
1105 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1106 return -EIO;
1107 }
1108 pmu_wait_complete(&req);
1109
1110 if (save_autopoll != 0)
1111 __pmu_adb_autopoll(save_autopoll);
1112
1113 return 0;
1114}
1115#endif
1116
1117
1118int
1119pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1120 int nbytes, ...)
1121{
1122 va_list list;
1123 int i;
1124
1125 if (pmu_state == uninitialized)
1126 return -ENXIO;
1127
1128 if (nbytes < 0 || nbytes > 32) {
1129 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1130 req->complete = 1;
1131 return -EINVAL;
1132 }
1133 req->nbytes = nbytes;
1134 req->done = done;
1135 va_start(list, nbytes);
1136 for (i = 0; i < nbytes; ++i)
1137 req->data[i] = va_arg(list, int);
1138 va_end(list);
1139 req->reply_len = 0;
1140 req->reply_expected = 0;
1141 return pmu_queue_request(req);
1142}
1143
1144int
1145pmu_queue_request(struct adb_request *req)
1146{
1147 unsigned long flags;
1148 int nsend;
1149
1150 if (pmu_state == uninitialized) {
1151 req->complete = 1;
1152 return -ENXIO;
1153 }
1154 if (req->nbytes <= 0) {
1155 req->complete = 1;
1156 return 0;
1157 }
1158 nsend = pmu_data_len[req->data[0]][0];
1159 if (nsend >= 0 && req->nbytes != nsend + 1) {
1160 req->complete = 1;
1161 return -EINVAL;
1162 }
1163
1164 req->next = NULL;
1165 req->sent = 0;
1166 req->complete = 0;
1167
1168 spin_lock_irqsave(&pmu_lock, flags);
1169 if (current_req) {
1170 last_req->next = req;
1171 last_req = req;
1172 } else {
1173 current_req = req;
1174 last_req = req;
1175 if (pmu_state == idle)
1176 pmu_start();
1177 }
1178 spin_unlock_irqrestore(&pmu_lock, flags);
1179
1180 return 0;
1181}
1182
1183static inline void
1184wait_for_ack(void)
1185{
1186
1187
1188
1189 int timeout = 4000;
1190 while ((in_8(&via2[B]) & TACK) == 0) {
1191 if (--timeout < 0) {
1192 printk(KERN_ERR "PMU not responding (!ack)\n");
1193 return;
1194 }
1195 udelay(10);
1196 }
1197}
1198
1199
1200
1201static inline void
1202send_byte(int x)
1203{
1204 out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);
1205 out_8(&via1[SR], x);
1206 out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
1207 (void)in_8(&via2[B]);
1208}
1209
1210static inline void
1211recv_byte(void)
1212{
1213 out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);
1214 in_8(&via1[SR]);
1215 out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
1216 (void)in_8(&via2[B]);
1217}
1218
1219static inline void
1220pmu_done(struct adb_request *req)
1221{
1222 void (*done)(struct adb_request *) = req->done;
1223 mb();
1224 req->complete = 1;
1225
1226
1227
1228 if (done)
1229 (*done)(req);
1230}
1231
1232static void
1233pmu_start(void)
1234{
1235 struct adb_request *req;
1236
1237
1238
1239 req = current_req;
1240 if (!req || pmu_state != idle
1241 || (req_awaiting_reply))
1242 return;
1243
1244 pmu_state = sending;
1245 data_index = 1;
1246 data_len = pmu_data_len[req->data[0]][0];
1247
1248
1249
1250
1251 wait_for_ack();
1252
1253 send_byte(req->data[0]);
1254}
1255
1256void
1257pmu_poll(void)
1258{
1259 if (pmu_state == uninitialized)
1260 return;
1261 if (disable_poll)
1262 return;
1263 via_pmu_interrupt(0, NULL);
1264}
1265
1266void
1267pmu_poll_adb(void)
1268{
1269 if (pmu_state == uninitialized)
1270 return;
1271 if (disable_poll)
1272 return;
1273
1274 adb_int_pending = 1;
1275 do {
1276 via_pmu_interrupt(0, NULL);
1277 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1278 || req_awaiting_reply));
1279}
1280
1281void
1282pmu_wait_complete(struct adb_request *req)
1283{
1284 if (pmu_state == uninitialized)
1285 return;
1286 while((pmu_state != idle && pmu_state != locked) || !req->complete)
1287 via_pmu_interrupt(0, NULL);
1288}
1289
1290
1291
1292
1293
1294
1295void
1296pmu_suspend(void)
1297{
1298 unsigned long flags;
1299
1300 if (pmu_state == uninitialized)
1301 return;
1302
1303 spin_lock_irqsave(&pmu_lock, flags);
1304 pmu_suspended++;
1305 if (pmu_suspended > 1) {
1306 spin_unlock_irqrestore(&pmu_lock, flags);
1307 return;
1308 }
1309
1310 do {
1311 spin_unlock_irqrestore(&pmu_lock, flags);
1312 if (req_awaiting_reply)
1313 adb_int_pending = 1;
1314 via_pmu_interrupt(0, NULL);
1315 spin_lock_irqsave(&pmu_lock, flags);
1316 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1317 if (gpio_irq >= 0)
1318 disable_irq_nosync(gpio_irq);
1319 out_8(&via1[IER], CB1_INT | IER_CLR);
1320 spin_unlock_irqrestore(&pmu_lock, flags);
1321 break;
1322 }
1323 } while (1);
1324}
1325
1326void
1327pmu_resume(void)
1328{
1329 unsigned long flags;
1330
1331 if (pmu_state == uninitialized || pmu_suspended < 1)
1332 return;
1333
1334 spin_lock_irqsave(&pmu_lock, flags);
1335 pmu_suspended--;
1336 if (pmu_suspended > 0) {
1337 spin_unlock_irqrestore(&pmu_lock, flags);
1338 return;
1339 }
1340 adb_int_pending = 1;
1341 if (gpio_irq >= 0)
1342 enable_irq(gpio_irq);
1343 out_8(&via1[IER], CB1_INT | IER_SET);
1344 spin_unlock_irqrestore(&pmu_lock, flags);
1345 pmu_poll();
1346}
1347
1348
1349static void
1350pmu_handle_data(unsigned char *data, int len)
1351{
1352 unsigned char ints;
1353 int idx;
1354 int i = 0;
1355
1356 asleep = 0;
1357 if (drop_interrupts || len < 1) {
1358 adb_int_pending = 0;
1359 pmu_irq_stats[8]++;
1360 return;
1361 }
1362
1363
1364 ints = data[0];
1365
1366
1367 if (ints == 0)
1368 pmu_irq_stats[9]++;
1369
1370
1371 if (ints & PMU_INT_ADB)
1372 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1373
1374next:
1375 if (ints == 0) {
1376 if (i > pmu_irq_stats[10])
1377 pmu_irq_stats[10] = i;
1378 return;
1379 }
1380 i++;
1381
1382 idx = ffs(ints) - 1;
1383 ints &= ~BIT(idx);
1384
1385 pmu_irq_stats[idx]++;
1386
1387
1388
1389
1390
1391 switch (BIT(idx)) {
1392 case PMU_INT_ADB:
1393 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1394 struct adb_request *req = req_awaiting_reply;
1395 if (!req) {
1396 printk(KERN_ERR "PMU: extra ADB reply\n");
1397 return;
1398 }
1399 req_awaiting_reply = NULL;
1400 if (len <= 2)
1401 req->reply_len = 0;
1402 else {
1403 memcpy(req->reply, data + 1, len - 1);
1404 req->reply_len = len - 1;
1405 }
1406 pmu_done(req);
1407 } else {
1408#ifdef CONFIG_XMON
1409 if (len == 4 && data[1] == 0x2c) {
1410 extern int xmon_wants_key, xmon_adb_keycode;
1411 if (xmon_wants_key) {
1412 xmon_adb_keycode = data[2];
1413 return;
1414 }
1415 }
1416#endif
1417#ifdef CONFIG_ADB
1418
1419
1420
1421
1422
1423
1424 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1425 && data[1] == 0x2c && data[3] == 0xff
1426 && (data[2] & ~1) == 0xf4))
1427 adb_input(data+1, len-1, 1);
1428#endif
1429 }
1430 break;
1431
1432
1433 case PMU_INT_SNDBRT:
1434#ifdef CONFIG_PMAC_BACKLIGHT
1435 if (len == 3)
1436 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1437#endif
1438 break;
1439
1440
1441 case PMU_INT_TICK:
1442
1443 if (pmu_battery_count) {
1444 if ((--query_batt_timer) == 0) {
1445 query_battery_state();
1446 query_batt_timer = BATTERY_POLLING_COUNT;
1447 }
1448 }
1449 break;
1450
1451 case PMU_INT_ENVIRONMENT:
1452 if (pmu_battery_count)
1453 query_battery_state();
1454 pmu_pass_intr(data, len);
1455
1456
1457 if (IS_ENABLED(CONFIG_ADB_PMU_EVENT) && len == 6) {
1458 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1459 via_pmu_event(PMU_EVT_LID, data[1]&1);
1460 }
1461 break;
1462
1463 default:
1464 pmu_pass_intr(data, len);
1465 }
1466 goto next;
1467}
1468
1469static struct adb_request*
1470pmu_sr_intr(void)
1471{
1472 struct adb_request *req;
1473 int bite = 0;
1474
1475 if (in_8(&via2[B]) & TREQ) {
1476 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));
1477 return NULL;
1478 }
1479
1480 while ((in_8(&via2[B]) & TACK) != 0)
1481 ;
1482
1483
1484 if (pmu_state == reading || pmu_state == reading_intr)
1485 bite = in_8(&via1[SR]);
1486
1487
1488 out_8(&via2[B], in_8(&via2[B]) | TREQ);
1489 wait_for_ack();
1490
1491 switch (pmu_state) {
1492 case sending:
1493 req = current_req;
1494 if (data_len < 0) {
1495 data_len = req->nbytes - 1;
1496 send_byte(data_len);
1497 break;
1498 }
1499 if (data_index <= data_len) {
1500 send_byte(req->data[data_index++]);
1501 break;
1502 }
1503 req->sent = 1;
1504 data_len = pmu_data_len[req->data[0]][1];
1505 if (data_len == 0) {
1506 pmu_state = idle;
1507 current_req = req->next;
1508 if (req->reply_expected)
1509 req_awaiting_reply = req;
1510 else
1511 return req;
1512 } else {
1513 pmu_state = reading;
1514 data_index = 0;
1515 reply_ptr = req->reply + req->reply_len;
1516 recv_byte();
1517 }
1518 break;
1519
1520 case intack:
1521 data_index = 0;
1522 data_len = -1;
1523 pmu_state = reading_intr;
1524 reply_ptr = interrupt_data[int_data_last];
1525 recv_byte();
1526 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1527 enable_irq(gpio_irq);
1528 gpio_irq_enabled = 1;
1529 }
1530 break;
1531
1532 case reading:
1533 case reading_intr:
1534 if (data_len == -1) {
1535 data_len = bite;
1536 if (bite > 32)
1537 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1538 } else if (data_index < 32) {
1539 reply_ptr[data_index++] = bite;
1540 }
1541 if (data_index < data_len) {
1542 recv_byte();
1543 break;
1544 }
1545
1546 if (pmu_state == reading_intr) {
1547 pmu_state = idle;
1548 int_data_state[int_data_last] = int_data_ready;
1549 interrupt_data_len[int_data_last] = data_len;
1550 } else {
1551 req = current_req;
1552
1553
1554
1555
1556
1557 current_req = req->next;
1558 req->reply_len += data_index;
1559 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1560 pmu_state = locked;
1561 else
1562 pmu_state = idle;
1563 return req;
1564 }
1565 break;
1566
1567 default:
1568 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1569 pmu_state);
1570 }
1571 return NULL;
1572}
1573
1574static irqreturn_t
1575via_pmu_interrupt(int irq, void *arg)
1576{
1577 unsigned long flags;
1578 int intr;
1579 int nloop = 0;
1580 int int_data = -1;
1581 struct adb_request *req = NULL;
1582 int handled = 0;
1583
1584
1585 spin_lock_irqsave(&pmu_lock, flags);
1586 ++disable_poll;
1587
1588 for (;;) {
1589
1590
1591
1592
1593 intr = 0;
1594 if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) {
1595 intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
1596 out_8(&via1[IFR], intr);
1597 }
1598#ifndef CONFIG_PPC_PMAC
1599 switch (irq) {
1600 case IRQ_MAC_ADB_CL:
1601 intr = CB1_INT;
1602 break;
1603 case IRQ_MAC_ADB_SR:
1604 intr = SR_INT;
1605 break;
1606 }
1607#endif
1608 if (intr == 0)
1609 break;
1610 handled = 1;
1611 if (++nloop > 1000) {
1612 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1613 "intr=%x, ier=%x pmu_state=%d\n",
1614 intr, in_8(&via1[IER]), pmu_state);
1615 break;
1616 }
1617 if (intr & CB1_INT) {
1618 adb_int_pending = 1;
1619 pmu_irq_stats[11]++;
1620 }
1621 if (intr & SR_INT) {
1622 req = pmu_sr_intr();
1623 if (req)
1624 break;
1625 }
1626#ifndef CONFIG_PPC_PMAC
1627 break;
1628#endif
1629 }
1630
1631recheck:
1632 if (pmu_state == idle) {
1633 if (adb_int_pending) {
1634 if (int_data_state[0] == int_data_empty)
1635 int_data_last = 0;
1636 else if (int_data_state[1] == int_data_empty)
1637 int_data_last = 1;
1638 else
1639 goto no_free_slot;
1640 pmu_state = intack;
1641 int_data_state[int_data_last] = int_data_fill;
1642
1643
1644
1645 wait_for_ack();
1646 send_byte(PMU_INT_ACK);
1647 adb_int_pending = 0;
1648 } else if (current_req)
1649 pmu_start();
1650 }
1651no_free_slot:
1652
1653 if (int_data_state[!int_data_last] == int_data_ready) {
1654 int_data_state[!int_data_last] = int_data_flush;
1655 int_data = !int_data_last;
1656 } else if (int_data_state[int_data_last] == int_data_ready) {
1657 int_data_state[int_data_last] = int_data_flush;
1658 int_data = int_data_last;
1659 }
1660 --disable_poll;
1661 spin_unlock_irqrestore(&pmu_lock, flags);
1662
1663
1664 if (req) {
1665 pmu_done(req);
1666 req = NULL;
1667 }
1668
1669
1670 if (int_data >= 0) {
1671 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1672 spin_lock_irqsave(&pmu_lock, flags);
1673 ++disable_poll;
1674 int_data_state[int_data] = int_data_empty;
1675 int_data = -1;
1676 goto recheck;
1677 }
1678
1679 return IRQ_RETVAL(handled);
1680}
1681
1682void
1683pmu_unlock(void)
1684{
1685 unsigned long flags;
1686
1687 spin_lock_irqsave(&pmu_lock, flags);
1688 if (pmu_state == locked)
1689 pmu_state = idle;
1690 adb_int_pending = 1;
1691 spin_unlock_irqrestore(&pmu_lock, flags);
1692}
1693
1694
1695static __maybe_unused irqreturn_t
1696gpio1_interrupt(int irq, void *arg)
1697{
1698 unsigned long flags;
1699
1700 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1701 spin_lock_irqsave(&pmu_lock, flags);
1702 if (gpio_irq_enabled > 0) {
1703 disable_irq_nosync(gpio_irq);
1704 gpio_irq_enabled = 0;
1705 }
1706 pmu_irq_stats[12]++;
1707 adb_int_pending = 1;
1708 spin_unlock_irqrestore(&pmu_lock, flags);
1709 via_pmu_interrupt(0, NULL);
1710 return IRQ_HANDLED;
1711 }
1712 return IRQ_NONE;
1713}
1714
1715void
1716pmu_enable_irled(int on)
1717{
1718 struct adb_request req;
1719
1720 if (pmu_state == uninitialized)
1721 return ;
1722 if (pmu_kind == PMU_KEYLARGO_BASED)
1723 return ;
1724
1725 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1726 (on ? PMU_POW_ON : PMU_POW_OFF));
1727 pmu_wait_complete(&req);
1728}
1729
1730
1731#define RTC_OFFSET 2082844800
1732
1733time64_t pmu_get_time(void)
1734{
1735 struct adb_request req;
1736 u32 now;
1737
1738 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
1739 return 0;
1740 pmu_wait_complete(&req);
1741 if (req.reply_len != 4)
1742 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1743 now = (req.reply[0] << 24) + (req.reply[1] << 16) +
1744 (req.reply[2] << 8) + req.reply[3];
1745 return (time64_t)now - RTC_OFFSET;
1746}
1747
1748int pmu_set_rtc_time(struct rtc_time *tm)
1749{
1750 u32 now;
1751 struct adb_request req;
1752
1753 now = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
1754 if (pmu_request(&req, NULL, 5, PMU_SET_RTC,
1755 now >> 24, now >> 16, now >> 8, now) < 0)
1756 return -ENXIO;
1757 pmu_wait_complete(&req);
1758 if (req.reply_len != 0)
1759 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1760 return 0;
1761}
1762
1763void
1764pmu_restart(void)
1765{
1766 struct adb_request req;
1767
1768 if (pmu_state == uninitialized)
1769 return;
1770
1771 local_irq_disable();
1772
1773 drop_interrupts = 1;
1774
1775 if (pmu_kind != PMU_KEYLARGO_BASED) {
1776 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1777 PMU_INT_TICK );
1778 while(!req.complete)
1779 pmu_poll();
1780 }
1781
1782 pmu_request(&req, NULL, 1, PMU_RESET);
1783 pmu_wait_complete(&req);
1784 for (;;)
1785 ;
1786}
1787
1788void
1789pmu_shutdown(void)
1790{
1791 struct adb_request req;
1792
1793 if (pmu_state == uninitialized)
1794 return;
1795
1796 local_irq_disable();
1797
1798 drop_interrupts = 1;
1799
1800 if (pmu_kind != PMU_KEYLARGO_BASED) {
1801 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1802 PMU_INT_TICK );
1803 pmu_wait_complete(&req);
1804 } else {
1805
1806
1807
1808 pmu_set_server_mode(0);
1809 }
1810
1811 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1812 'M', 'A', 'T', 'T');
1813 pmu_wait_complete(&req);
1814 for (;;)
1815 ;
1816}
1817
1818int
1819pmu_present(void)
1820{
1821 return pmu_state != uninitialized;
1822}
1823
1824#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1825
1826
1827
1828
1829static u32 save_via[8];
1830static int __fake_sleep;
1831
1832static void
1833save_via_state(void)
1834{
1835 save_via[0] = in_8(&via1[ANH]);
1836 save_via[1] = in_8(&via1[DIRA]);
1837 save_via[2] = in_8(&via1[B]);
1838 save_via[3] = in_8(&via1[DIRB]);
1839 save_via[4] = in_8(&via1[PCR]);
1840 save_via[5] = in_8(&via1[ACR]);
1841 save_via[6] = in_8(&via1[T1CL]);
1842 save_via[7] = in_8(&via1[T1CH]);
1843}
1844static void
1845restore_via_state(void)
1846{
1847 out_8(&via1[ANH], save_via[0]);
1848 out_8(&via1[DIRA], save_via[1]);
1849 out_8(&via1[B], save_via[2]);
1850 out_8(&via1[DIRB], save_via[3]);
1851 out_8(&via1[PCR], save_via[4]);
1852 out_8(&via1[ACR], save_via[5]);
1853 out_8(&via1[T1CL], save_via[6]);
1854 out_8(&via1[T1CH], save_via[7]);
1855 out_8(&via1[IER], IER_CLR | 0x7f);
1856 out_8(&via1[IFR], 0x7f);
1857 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
1858}
1859
1860#define GRACKLE_PM (1<<7)
1861#define GRACKLE_DOZE (1<<5)
1862#define GRACKLE_NAP (1<<4)
1863#define GRACKLE_SLEEP (1<<3)
1864
1865static int powerbook_sleep_grackle(void)
1866{
1867 unsigned long save_l2cr;
1868 unsigned short pmcr1;
1869 struct adb_request req;
1870 struct pci_dev *grackle;
1871
1872 grackle = pci_get_domain_bus_and_slot(0, 0, 0);
1873 if (!grackle)
1874 return -ENODEV;
1875
1876
1877 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1878 pmu_wait_complete(&req);
1879 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1880 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1881 pmu_wait_complete(&req);
1882
1883
1884 save_l2cr = _get_L2CR();
1885
1886 if (!__fake_sleep) {
1887
1888 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1889 pmu_wait_complete(&req);
1890 }
1891
1892
1893 save_via_state();
1894
1895 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1896
1897 pci_read_config_word(grackle, 0x70, &pmcr1);
1898
1899 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1900 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1901 pci_write_config_word(grackle, 0x70, pmcr1);
1902
1903
1904 if (__fake_sleep)
1905 mdelay(5000);
1906 else
1907 low_sleep_handler();
1908
1909
1910 pci_read_config_word(grackle, 0x70, &pmcr1);
1911 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1912 pci_write_config_word(grackle, 0x70, pmcr1);
1913
1914 pci_dev_put(grackle);
1915
1916
1917 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1918 restore_via_state();
1919
1920
1921 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1922 _set_L2CR(save_l2cr);
1923
1924
1925 switch_mmu_context(NULL, current->active_mm, NULL);
1926
1927
1928 pmu_unlock();
1929 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1930 pmu_wait_complete(&req);
1931 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1932 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1933 pmu_wait_complete(&req);
1934 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1935 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1936 pmu_wait_complete(&req);
1937
1938 return 0;
1939}
1940
1941static int
1942powerbook_sleep_Core99(void)
1943{
1944 unsigned long save_l2cr;
1945 unsigned long save_l3cr;
1946 struct adb_request req;
1947
1948 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1949 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1950 return -ENOSYS;
1951 }
1952
1953 if (num_online_cpus() > 1 || cpu_is_offline(0))
1954 return -EAGAIN;
1955
1956
1957 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1958 pmu_wait_complete(&req);
1959
1960
1961 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1962 0xff, 0xff);
1963 pmu_wait_complete(&req);
1964 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1965 0, PMU_PWR_WAKEUP_KEY |
1966 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1967 pmu_wait_complete(&req);
1968
1969
1970 save_l3cr = _get_L3CR();
1971 save_l2cr = _get_L2CR();
1972
1973 if (!__fake_sleep) {
1974
1975 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1976 pmu_wait_complete(&req);
1977 }
1978
1979
1980 save_via_state();
1981
1982
1983
1984
1985
1986 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1987
1988
1989 if (__fake_sleep)
1990 mdelay(5000);
1991 else
1992 low_sleep_handler();
1993
1994
1995 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1996
1997
1998 restore_via_state();
1999
2000
2001 loops_per_jiffy *= 2;
2002
2003
2004 pmac_call_early_video_resume();
2005
2006
2007 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2008 _set_L2CR(save_l2cr);
2009
2010 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2011 _set_L3CR(save_l3cr);
2012
2013
2014 switch_mmu_context(NULL, current->active_mm, NULL);
2015
2016
2017 pmu_unlock();
2018 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2019 pmu_wait_complete(&req);
2020 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2021 pmu_wait_complete(&req);
2022
2023
2024 loops_per_jiffy /= 2;
2025
2026 return 0;
2027}
2028
2029#define PB3400_MEM_CTRL 0xf8000000
2030#define PB3400_MEM_CTRL_SLEEP 0x70
2031
2032static void __iomem *pb3400_mem_ctrl;
2033
2034static void powerbook_sleep_init_3400(void)
2035{
2036
2037 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2038 if (pb3400_mem_ctrl == NULL)
2039 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
2040}
2041
2042static int powerbook_sleep_3400(void)
2043{
2044 int i, x;
2045 unsigned int hid0;
2046 unsigned long msr;
2047 struct adb_request sleep_req;
2048 unsigned int __iomem *mem_ctrl_sleep;
2049
2050 if (pb3400_mem_ctrl == NULL)
2051 return -ENOMEM;
2052 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
2053
2054
2055
2056 for (i = 0x403f; i >= 0x4000; --i) {
2057 out_be32(mem_ctrl_sleep, i);
2058 do {
2059 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2060 } while (x == 0);
2061 if (x >= 0x100)
2062 break;
2063 }
2064
2065
2066 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2067 pmu_wait_complete(&sleep_req);
2068 pmu_unlock();
2069
2070 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
2071
2072 asleep = 1;
2073
2074
2075 hid0 = mfspr(SPRN_HID0);
2076 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
2077 mtspr(SPRN_HID0, hid0);
2078 local_irq_enable();
2079 msr = mfmsr() | MSR_POW;
2080 while (asleep) {
2081 mb();
2082 mtmsr(msr);
2083 isync();
2084 }
2085 local_irq_disable();
2086
2087
2088 out_be32(mem_ctrl_sleep, 0x3f);
2089 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2090
2091 return 0;
2092}
2093
2094#endif
2095
2096
2097
2098
2099#define RB_SIZE 0x10
2100struct pmu_private {
2101 struct list_head list;
2102 int rb_get;
2103 int rb_put;
2104 struct rb_entry {
2105 unsigned short len;
2106 unsigned char data[16];
2107 } rb_buf[RB_SIZE];
2108 wait_queue_head_t wait;
2109 spinlock_t lock;
2110#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2111 int backlight_locker;
2112#endif
2113};
2114
2115static LIST_HEAD(all_pmu_pvt);
2116static DEFINE_SPINLOCK(all_pvt_lock);
2117
2118static void
2119pmu_pass_intr(unsigned char *data, int len)
2120{
2121 struct pmu_private *pp;
2122 struct list_head *list;
2123 int i;
2124 unsigned long flags;
2125
2126 if (len > sizeof(pp->rb_buf[0].data))
2127 len = sizeof(pp->rb_buf[0].data);
2128 spin_lock_irqsave(&all_pvt_lock, flags);
2129 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2130 pp = list_entry(list, struct pmu_private, list);
2131 spin_lock(&pp->lock);
2132 i = pp->rb_put + 1;
2133 if (i >= RB_SIZE)
2134 i = 0;
2135 if (i != pp->rb_get) {
2136 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2137 rp->len = len;
2138 memcpy(rp->data, data, len);
2139 pp->rb_put = i;
2140 wake_up_interruptible(&pp->wait);
2141 }
2142 spin_unlock(&pp->lock);
2143 }
2144 spin_unlock_irqrestore(&all_pvt_lock, flags);
2145}
2146
2147static int
2148pmu_open(struct inode *inode, struct file *file)
2149{
2150 struct pmu_private *pp;
2151 unsigned long flags;
2152
2153 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2154 if (!pp)
2155 return -ENOMEM;
2156 pp->rb_get = pp->rb_put = 0;
2157 spin_lock_init(&pp->lock);
2158 init_waitqueue_head(&pp->wait);
2159 mutex_lock(&pmu_info_proc_mutex);
2160 spin_lock_irqsave(&all_pvt_lock, flags);
2161#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2162 pp->backlight_locker = 0;
2163#endif
2164 list_add(&pp->list, &all_pmu_pvt);
2165 spin_unlock_irqrestore(&all_pvt_lock, flags);
2166 file->private_data = pp;
2167 mutex_unlock(&pmu_info_proc_mutex);
2168 return 0;
2169}
2170
2171static ssize_t
2172pmu_read(struct file *file, char __user *buf,
2173 size_t count, loff_t *ppos)
2174{
2175 struct pmu_private *pp = file->private_data;
2176 DECLARE_WAITQUEUE(wait, current);
2177 unsigned long flags;
2178 int ret = 0;
2179
2180 if (count < 1 || !pp)
2181 return -EINVAL;
2182
2183 spin_lock_irqsave(&pp->lock, flags);
2184 add_wait_queue(&pp->wait, &wait);
2185 set_current_state(TASK_INTERRUPTIBLE);
2186
2187 for (;;) {
2188 ret = -EAGAIN;
2189 if (pp->rb_get != pp->rb_put) {
2190 int i = pp->rb_get;
2191 struct rb_entry *rp = &pp->rb_buf[i];
2192 ret = rp->len;
2193 spin_unlock_irqrestore(&pp->lock, flags);
2194 if (ret > count)
2195 ret = count;
2196 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2197 ret = -EFAULT;
2198 if (++i >= RB_SIZE)
2199 i = 0;
2200 spin_lock_irqsave(&pp->lock, flags);
2201 pp->rb_get = i;
2202 }
2203 if (ret >= 0)
2204 break;
2205 if (file->f_flags & O_NONBLOCK)
2206 break;
2207 ret = -ERESTARTSYS;
2208 if (signal_pending(current))
2209 break;
2210 spin_unlock_irqrestore(&pp->lock, flags);
2211 schedule();
2212 spin_lock_irqsave(&pp->lock, flags);
2213 }
2214 __set_current_state(TASK_RUNNING);
2215 remove_wait_queue(&pp->wait, &wait);
2216 spin_unlock_irqrestore(&pp->lock, flags);
2217
2218 return ret;
2219}
2220
2221static ssize_t
2222pmu_write(struct file *file, const char __user *buf,
2223 size_t count, loff_t *ppos)
2224{
2225 return 0;
2226}
2227
2228static __poll_t
2229pmu_fpoll(struct file *filp, poll_table *wait)
2230{
2231 struct pmu_private *pp = filp->private_data;
2232 __poll_t mask = 0;
2233 unsigned long flags;
2234
2235 if (!pp)
2236 return 0;
2237 poll_wait(filp, &pp->wait, wait);
2238 spin_lock_irqsave(&pp->lock, flags);
2239 if (pp->rb_get != pp->rb_put)
2240 mask |= EPOLLIN;
2241 spin_unlock_irqrestore(&pp->lock, flags);
2242 return mask;
2243}
2244
2245static int
2246pmu_release(struct inode *inode, struct file *file)
2247{
2248 struct pmu_private *pp = file->private_data;
2249 unsigned long flags;
2250
2251 if (pp) {
2252 file->private_data = NULL;
2253 spin_lock_irqsave(&all_pvt_lock, flags);
2254 list_del(&pp->list);
2255 spin_unlock_irqrestore(&all_pvt_lock, flags);
2256
2257#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2258 if (pp->backlight_locker)
2259 pmac_backlight_enable();
2260#endif
2261
2262 kfree(pp);
2263 }
2264 return 0;
2265}
2266
2267#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2268static void pmac_suspend_disable_irqs(void)
2269{
2270
2271 pmac_pfunc_i2c_suspend();
2272 pmac_pfunc_base_suspend();
2273}
2274
2275static int powerbook_sleep(suspend_state_t state)
2276{
2277 int error = 0;
2278
2279
2280 while (!batt_req.complete)
2281 pmu_poll();
2282
2283
2284
2285
2286 enable_kernel_fp();
2287
2288#ifdef CONFIG_ALTIVEC
2289 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2290 enable_kernel_altivec();
2291#endif
2292
2293 switch (pmu_kind) {
2294 case PMU_OHARE_BASED:
2295 error = powerbook_sleep_3400();
2296 break;
2297 case PMU_HEATHROW_BASED:
2298 case PMU_PADDINGTON_BASED:
2299 error = powerbook_sleep_grackle();
2300 break;
2301 case PMU_KEYLARGO_BASED:
2302 error = powerbook_sleep_Core99();
2303 break;
2304 default:
2305 return -ENOSYS;
2306 }
2307
2308 if (error)
2309 return error;
2310
2311 mdelay(100);
2312
2313 return 0;
2314}
2315
2316static void pmac_suspend_enable_irqs(void)
2317{
2318
2319 adb_int_pending = 1;
2320 via_pmu_interrupt(0, NULL);
2321
2322 mdelay(10);
2323
2324
2325 pmac_pfunc_base_resume();
2326 pmac_pfunc_i2c_resume();
2327}
2328
2329static int pmu_sleep_valid(suspend_state_t state)
2330{
2331 return state == PM_SUSPEND_MEM
2332 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2333}
2334
2335static const struct platform_suspend_ops pmu_pm_ops = {
2336 .enter = powerbook_sleep,
2337 .valid = pmu_sleep_valid,
2338};
2339
2340static int register_pmu_pm_ops(void)
2341{
2342 if (pmu_kind == PMU_OHARE_BASED)
2343 powerbook_sleep_init_3400();
2344 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2345 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
2346 suspend_set_ops(&pmu_pm_ops);
2347
2348 return 0;
2349}
2350
2351device_initcall(register_pmu_pm_ops);
2352#endif
2353
2354static int pmu_ioctl(struct file *filp,
2355 u_int cmd, u_long arg)
2356{
2357 __u32 __user *argp = (__u32 __user *)arg;
2358 int error = -EINVAL;
2359
2360 switch (cmd) {
2361#ifdef CONFIG_PPC_PMAC
2362 case PMU_IOC_SLEEP:
2363 if (!capable(CAP_SYS_ADMIN))
2364 return -EACCES;
2365 return pm_suspend(PM_SUSPEND_MEM);
2366 case PMU_IOC_CAN_SLEEP:
2367 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
2368 return put_user(0, argp);
2369 else
2370 return put_user(1, argp);
2371#endif
2372
2373#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2374
2375 case PMU_IOC_GET_BACKLIGHT:
2376 {
2377 int brightness;
2378
2379 brightness = pmac_backlight_get_legacy_brightness();
2380 if (brightness < 0)
2381 return brightness;
2382 else
2383 return put_user(brightness, argp);
2384
2385 }
2386 case PMU_IOC_SET_BACKLIGHT:
2387 {
2388 int brightness;
2389
2390 error = get_user(brightness, argp);
2391 if (error)
2392 return error;
2393
2394 return pmac_backlight_set_legacy_brightness(brightness);
2395 }
2396#ifdef CONFIG_INPUT_ADBHID
2397 case PMU_IOC_GRAB_BACKLIGHT: {
2398 struct pmu_private *pp = filp->private_data;
2399
2400 if (pp->backlight_locker)
2401 return 0;
2402
2403 pp->backlight_locker = 1;
2404 pmac_backlight_disable();
2405
2406 return 0;
2407 }
2408#endif
2409#endif
2410
2411 case PMU_IOC_GET_MODEL:
2412 return put_user(pmu_kind, argp);
2413 case PMU_IOC_HAS_ADB:
2414 return put_user(pmu_has_adb, argp);
2415 }
2416 return error;
2417}
2418
2419static long pmu_unlocked_ioctl(struct file *filp,
2420 u_int cmd, u_long arg)
2421{
2422 int ret;
2423
2424 mutex_lock(&pmu_info_proc_mutex);
2425 ret = pmu_ioctl(filp, cmd, arg);
2426 mutex_unlock(&pmu_info_proc_mutex);
2427
2428 return ret;
2429}
2430
2431#ifdef CONFIG_COMPAT
2432#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2433#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2434#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2435#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2436#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2437#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2438
2439static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2440{
2441 switch (cmd) {
2442 case PMU_IOC_SLEEP:
2443 break;
2444 case PMU_IOC_GET_BACKLIGHT32:
2445 cmd = PMU_IOC_GET_BACKLIGHT;
2446 break;
2447 case PMU_IOC_SET_BACKLIGHT32:
2448 cmd = PMU_IOC_SET_BACKLIGHT;
2449 break;
2450 case PMU_IOC_GET_MODEL32:
2451 cmd = PMU_IOC_GET_MODEL;
2452 break;
2453 case PMU_IOC_HAS_ADB32:
2454 cmd = PMU_IOC_HAS_ADB;
2455 break;
2456 case PMU_IOC_CAN_SLEEP32:
2457 cmd = PMU_IOC_CAN_SLEEP;
2458 break;
2459 case PMU_IOC_GRAB_BACKLIGHT32:
2460 cmd = PMU_IOC_GRAB_BACKLIGHT;
2461 break;
2462 default:
2463 return -ENOIOCTLCMD;
2464 }
2465 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2466}
2467#endif
2468
2469static const struct file_operations pmu_device_fops = {
2470 .read = pmu_read,
2471 .write = pmu_write,
2472 .poll = pmu_fpoll,
2473 .unlocked_ioctl = pmu_unlocked_ioctl,
2474#ifdef CONFIG_COMPAT
2475 .compat_ioctl = compat_pmu_ioctl,
2476#endif
2477 .open = pmu_open,
2478 .release = pmu_release,
2479 .llseek = noop_llseek,
2480};
2481
2482static struct miscdevice pmu_device = {
2483 PMU_MINOR, "pmu", &pmu_device_fops
2484};
2485
2486static int pmu_device_init(void)
2487{
2488 if (pmu_state == uninitialized)
2489 return 0;
2490 if (misc_register(&pmu_device) < 0)
2491 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
2492 return 0;
2493}
2494device_initcall(pmu_device_init);
2495
2496
2497#ifdef DEBUG_SLEEP
2498static inline void
2499polled_handshake(void)
2500{
2501 via2[B] &= ~TREQ; eieio();
2502 while ((via2[B] & TACK) != 0)
2503 ;
2504 via2[B] |= TREQ; eieio();
2505 while ((via2[B] & TACK) == 0)
2506 ;
2507}
2508
2509static inline void
2510polled_send_byte(int x)
2511{
2512 via1[ACR] |= SR_OUT | SR_EXT; eieio();
2513 via1[SR] = x; eieio();
2514 polled_handshake();
2515}
2516
2517static inline int
2518polled_recv_byte(void)
2519{
2520 int x;
2521
2522 via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio();
2523 x = via1[SR]; eieio();
2524 polled_handshake();
2525 x = via1[SR]; eieio();
2526 return x;
2527}
2528
2529int
2530pmu_polled_request(struct adb_request *req)
2531{
2532 unsigned long flags;
2533 int i, l, c;
2534
2535 req->complete = 1;
2536 c = req->data[0];
2537 l = pmu_data_len[c][0];
2538 if (l >= 0 && req->nbytes != l + 1)
2539 return -EINVAL;
2540
2541 local_irq_save(flags);
2542 while (pmu_state != idle)
2543 pmu_poll();
2544
2545 while ((via2[B] & TACK) == 0)
2546 ;
2547 polled_send_byte(c);
2548 if (l < 0) {
2549 l = req->nbytes - 1;
2550 polled_send_byte(l);
2551 }
2552 for (i = 1; i <= l; ++i)
2553 polled_send_byte(req->data[i]);
2554
2555 l = pmu_data_len[c][1];
2556 if (l < 0)
2557 l = polled_recv_byte();
2558 for (i = 0; i < l; ++i)
2559 req->reply[i + req->reply_len] = polled_recv_byte();
2560
2561 if (req->done)
2562 (*req->done)(req);
2563
2564 local_irq_restore(flags);
2565 return 0;
2566}
2567
2568
2569void pmu_blink(int n)
2570{
2571 struct adb_request req;
2572
2573 memset(&req, 0, sizeof(req));
2574
2575 for (; n > 0; --n) {
2576 req.nbytes = 4;
2577 req.done = NULL;
2578 req.data[0] = 0xee;
2579 req.data[1] = 4;
2580 req.data[2] = 0;
2581 req.data[3] = 1;
2582 req.reply[0] = ADB_RET_OK;
2583 req.reply_len = 1;
2584 req.reply_expected = 0;
2585 pmu_polled_request(&req);
2586 mdelay(50);
2587 req.nbytes = 4;
2588 req.done = NULL;
2589 req.data[0] = 0xee;
2590 req.data[1] = 4;
2591 req.data[2] = 0;
2592 req.data[3] = 0;
2593 req.reply[0] = ADB_RET_OK;
2594 req.reply_len = 1;
2595 req.reply_expected = 0;
2596 pmu_polled_request(&req);
2597 mdelay(50);
2598 }
2599 mdelay(50);
2600}
2601#endif
2602
2603#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2604int pmu_sys_suspended;
2605
2606static int pmu_syscore_suspend(void)
2607{
2608
2609 pmu_suspend();
2610 pmu_sys_suspended = 1;
2611
2612#ifdef CONFIG_PMAC_BACKLIGHT
2613
2614 pmu_backlight_set_sleep(1);
2615#endif
2616
2617 return 0;
2618}
2619
2620static void pmu_syscore_resume(void)
2621{
2622 struct adb_request req;
2623
2624 if (!pmu_sys_suspended)
2625 return;
2626
2627
2628 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2629 pmu_wait_complete(&req);
2630
2631#ifdef CONFIG_PMAC_BACKLIGHT
2632
2633 pmu_backlight_set_sleep(0);
2634#endif
2635
2636 pmu_resume();
2637 pmu_sys_suspended = 0;
2638}
2639
2640static struct syscore_ops pmu_syscore_ops = {
2641 .suspend = pmu_syscore_suspend,
2642 .resume = pmu_syscore_resume,
2643};
2644
2645static int pmu_syscore_register(void)
2646{
2647 register_syscore_ops(&pmu_syscore_ops);
2648
2649 return 0;
2650}
2651subsys_initcall(pmu_syscore_register);
2652#endif
2653
2654EXPORT_SYMBOL(pmu_request);
2655EXPORT_SYMBOL(pmu_queue_request);
2656EXPORT_SYMBOL(pmu_poll);
2657EXPORT_SYMBOL(pmu_poll_adb);
2658EXPORT_SYMBOL(pmu_wait_complete);
2659EXPORT_SYMBOL(pmu_suspend);
2660EXPORT_SYMBOL(pmu_resume);
2661EXPORT_SYMBOL(pmu_unlock);
2662#if defined(CONFIG_PPC32)
2663EXPORT_SYMBOL(pmu_enable_irled);
2664EXPORT_SYMBOL(pmu_battery_count);
2665EXPORT_SYMBOL(pmu_batteries);
2666EXPORT_SYMBOL(pmu_power_flags);
2667#endif
2668
2669