1
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5
6
7#include <asm/unaligned.h>
8
9#include <linux/clk.h>
10#include <linux/delay.h>
11#include <linux/i2c.h>
12#include <linux/module.h>
13#include <linux/pm_runtime.h>
14
15#include <media/v4l2-ctrls.h>
16#include <media/v4l2-fwnode.h>
17#include <media/v4l2-subdev.h>
18
19
20#define IMX335_REG_MODE_SELECT 0x3000
21#define IMX335_MODE_STANDBY 0x01
22#define IMX335_MODE_STREAMING 0x00
23
24
25#define IMX335_REG_LPFR 0x3030
26
27
28#define IMX335_REG_ID 0x3912
29#define IMX335_ID 0x00
30
31
32#define IMX335_REG_SHUTTER 0x3058
33#define IMX335_EXPOSURE_MIN 1
34#define IMX335_EXPOSURE_OFFSET 9
35#define IMX335_EXPOSURE_STEP 1
36#define IMX335_EXPOSURE_DEFAULT 0x0648
37
38
39#define IMX335_REG_AGAIN 0x30e8
40#define IMX335_AGAIN_MIN 0
41#define IMX335_AGAIN_MAX 240
42#define IMX335_AGAIN_STEP 1
43#define IMX335_AGAIN_DEFAULT 0
44
45
46#define IMX335_REG_HOLD 0x3001
47
48
49#define IMX335_INCLK_RATE 24000000
50
51
52#define IMX335_LINK_FREQ 594000000
53#define IMX335_NUM_DATA_LANES 4
54
55#define IMX335_REG_MIN 0x00
56#define IMX335_REG_MAX 0xfffff
57
58
59
60
61
62
63struct imx335_reg {
64 u16 address;
65 u8 val;
66};
67
68
69
70
71
72
73struct imx335_reg_list {
74 u32 num_of_regs;
75 const struct imx335_reg *regs;
76};
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91struct imx335_mode {
92 u32 width;
93 u32 height;
94 u32 code;
95 u32 hblank;
96 u32 vblank;
97 u32 vblank_min;
98 u32 vblank_max;
99 u64 pclk;
100 u32 link_freq_idx;
101 struct imx335_reg_list reg_list;
102};
103
104
105
106
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108
109
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114
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119
120
121
122
123
124struct imx335 {
125 struct device *dev;
126 struct i2c_client *client;
127 struct v4l2_subdev sd;
128 struct media_pad pad;
129 struct gpio_desc *reset_gpio;
130 struct clk *inclk;
131 struct v4l2_ctrl_handler ctrl_handler;
132 struct v4l2_ctrl *link_freq_ctrl;
133 struct v4l2_ctrl *pclk_ctrl;
134 struct v4l2_ctrl *hblank_ctrl;
135 struct v4l2_ctrl *vblank_ctrl;
136 struct {
137 struct v4l2_ctrl *exp_ctrl;
138 struct v4l2_ctrl *again_ctrl;
139 };
140 u32 vblank;
141 const struct imx335_mode *cur_mode;
142 struct mutex mutex;
143 bool streaming;
144};
145
146static const s64 link_freq[] = {
147 IMX335_LINK_FREQ,
148};
149
150
151static const struct imx335_reg mode_2592x1940_regs[] = {
152 {0x3000, 0x01},
153 {0x3002, 0x00},
154 {0x300c, 0x3b},
155 {0x300d, 0x2a},
156 {0x3018, 0x04},
157 {0x302c, 0x3c},
158 {0x302e, 0x20},
159 {0x3056, 0x94},
160 {0x3074, 0xc8},
161 {0x3076, 0x28},
162 {0x304c, 0x00},
163 {0x314c, 0xc6},
164 {0x315a, 0x02},
165 {0x3168, 0xa0},
166 {0x316a, 0x7e},
167 {0x31a1, 0x00},
168 {0x3288, 0x21},
169 {0x328a, 0x02},
170 {0x3414, 0x05},
171 {0x3416, 0x18},
172 {0x3648, 0x01},
173 {0x364a, 0x04},
174 {0x364c, 0x04},
175 {0x3678, 0x01},
176 {0x367c, 0x31},
177 {0x367e, 0x31},
178 {0x3706, 0x10},
179 {0x3708, 0x03},
180 {0x3714, 0x02},
181 {0x3715, 0x02},
182 {0x3716, 0x01},
183 {0x3717, 0x03},
184 {0x371c, 0x3d},
185 {0x371d, 0x3f},
186 {0x372c, 0x00},
187 {0x372d, 0x00},
188 {0x372e, 0x46},
189 {0x372f, 0x00},
190 {0x3730, 0x89},
191 {0x3731, 0x00},
192 {0x3732, 0x08},
193 {0x3733, 0x01},
194 {0x3734, 0xfe},
195 {0x3735, 0x05},
196 {0x3740, 0x02},
197 {0x375d, 0x00},
198 {0x375e, 0x00},
199 {0x375f, 0x11},
200 {0x3760, 0x01},
201 {0x3768, 0x1b},
202 {0x3769, 0x1b},
203 {0x376a, 0x1b},
204 {0x376b, 0x1b},
205 {0x376c, 0x1a},
206 {0x376d, 0x17},
207 {0x376e, 0x0f},
208 {0x3776, 0x00},
209 {0x3777, 0x00},
210 {0x3778, 0x46},
211 {0x3779, 0x00},
212 {0x377a, 0x89},
213 {0x377b, 0x00},
214 {0x377c, 0x08},
215 {0x377d, 0x01},
216 {0x377e, 0x23},
217 {0x377f, 0x02},
218 {0x3780, 0xd9},
219 {0x3781, 0x03},
220 {0x3782, 0xf5},
221 {0x3783, 0x06},
222 {0x3784, 0xa5},
223 {0x3788, 0x0f},
224 {0x378a, 0xd9},
225 {0x378b, 0x03},
226 {0x378c, 0xeb},
227 {0x378d, 0x05},
228 {0x378e, 0x87},
229 {0x378f, 0x06},
230 {0x3790, 0xf5},
231 {0x3792, 0x43},
232 {0x3794, 0x7a},
233 {0x3796, 0xa1},
234 {0x37b0, 0x36},
235 {0x3a00, 0x01},
236};
237
238
239static const struct imx335_mode supported_mode = {
240 .width = 2592,
241 .height = 1940,
242 .hblank = 342,
243 .vblank = 2560,
244 .vblank_min = 2560,
245 .vblank_max = 133060,
246 .pclk = 396000000,
247 .link_freq_idx = 0,
248 .code = MEDIA_BUS_FMT_SRGGB12_1X12,
249 .reg_list = {
250 .num_of_regs = ARRAY_SIZE(mode_2592x1940_regs),
251 .regs = mode_2592x1940_regs,
252 },
253};
254
255
256
257
258
259
260
261static inline struct imx335 *to_imx335(struct v4l2_subdev *subdev)
262{
263 return container_of(subdev, struct imx335, sd);
264}
265
266
267
268
269
270
271
272
273
274
275
276
277static int imx335_read_reg(struct imx335 *imx335, u16 reg, u32 len, u32 *val)
278{
279 struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd);
280 struct i2c_msg msgs[2] = {0};
281 u8 addr_buf[2] = {0};
282 u8 data_buf[4] = {0};
283 int ret;
284
285 if (WARN_ON(len > 4))
286 return -EINVAL;
287
288 put_unaligned_be16(reg, addr_buf);
289
290
291 msgs[0].addr = client->addr;
292 msgs[0].flags = 0;
293 msgs[0].len = ARRAY_SIZE(addr_buf);
294 msgs[0].buf = addr_buf;
295
296
297 msgs[1].addr = client->addr;
298 msgs[1].flags = I2C_M_RD;
299 msgs[1].len = len;
300 msgs[1].buf = data_buf;
301
302 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
303 if (ret != ARRAY_SIZE(msgs))
304 return -EIO;
305
306 *val = get_unaligned_le32(data_buf);
307
308 return 0;
309}
310
311
312
313
314
315
316
317
318
319
320
321
322static int imx335_write_reg(struct imx335 *imx335, u16 reg, u32 len, u32 val)
323{
324 struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd);
325 u8 buf[6] = {0};
326
327 if (WARN_ON(len > 4))
328 return -EINVAL;
329
330 put_unaligned_be16(reg, buf);
331 put_unaligned_le32(val, buf + 2);
332 if (i2c_master_send(client, buf, len + 2) != len + 2)
333 return -EIO;
334
335 return 0;
336}
337
338
339
340
341
342
343
344
345
346static int imx335_write_regs(struct imx335 *imx335,
347 const struct imx335_reg *regs, u32 len)
348{
349 unsigned int i;
350 int ret;
351
352 for (i = 0; i < len; i++) {
353 ret = imx335_write_reg(imx335, regs[i].address, 1, regs[i].val);
354 if (ret)
355 return ret;
356 }
357
358 return 0;
359}
360
361
362
363
364
365
366
367
368static int imx335_update_controls(struct imx335 *imx335,
369 const struct imx335_mode *mode)
370{
371 int ret;
372
373 ret = __v4l2_ctrl_s_ctrl(imx335->link_freq_ctrl, mode->link_freq_idx);
374 if (ret)
375 return ret;
376
377 ret = __v4l2_ctrl_s_ctrl(imx335->hblank_ctrl, mode->hblank);
378 if (ret)
379 return ret;
380
381 return __v4l2_ctrl_modify_range(imx335->vblank_ctrl, mode->vblank_min,
382 mode->vblank_max, 1, mode->vblank);
383}
384
385
386
387
388
389
390
391
392
393static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain)
394{
395 u32 lpfr, shutter;
396 int ret;
397
398 lpfr = imx335->vblank + imx335->cur_mode->height;
399 shutter = lpfr - exposure;
400
401 dev_dbg(imx335->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u",
402 exposure, gain, shutter, lpfr);
403
404 ret = imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 1);
405 if (ret)
406 return ret;
407
408 ret = imx335_write_reg(imx335, IMX335_REG_LPFR, 3, lpfr);
409 if (ret)
410 goto error_release_group_hold;
411
412 ret = imx335_write_reg(imx335, IMX335_REG_SHUTTER, 3, shutter);
413 if (ret)
414 goto error_release_group_hold;
415
416 ret = imx335_write_reg(imx335, IMX335_REG_AGAIN, 2, gain);
417
418error_release_group_hold:
419 imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 0);
420
421 return ret;
422}
423
424
425
426
427
428
429
430
431
432
433
434
435
436static int imx335_set_ctrl(struct v4l2_ctrl *ctrl)
437{
438 struct imx335 *imx335 =
439 container_of(ctrl->handler, struct imx335, ctrl_handler);
440 u32 analog_gain;
441 u32 exposure;
442 int ret;
443
444 switch (ctrl->id) {
445 case V4L2_CID_VBLANK:
446 imx335->vblank = imx335->vblank_ctrl->val;
447
448 dev_dbg(imx335->dev, "Received vblank %u, new lpfr %u",
449 imx335->vblank,
450 imx335->vblank + imx335->cur_mode->height);
451
452 ret = __v4l2_ctrl_modify_range(imx335->exp_ctrl,
453 IMX335_EXPOSURE_MIN,
454 imx335->vblank +
455 imx335->cur_mode->height -
456 IMX335_EXPOSURE_OFFSET,
457 1, IMX335_EXPOSURE_DEFAULT);
458 break;
459 case V4L2_CID_EXPOSURE:
460
461 if (!pm_runtime_get_if_in_use(imx335->dev))
462 return 0;
463
464 exposure = ctrl->val;
465 analog_gain = imx335->again_ctrl->val;
466
467 dev_dbg(imx335->dev, "Received exp %u, analog gain %u",
468 exposure, analog_gain);
469
470 ret = imx335_update_exp_gain(imx335, exposure, analog_gain);
471
472 pm_runtime_put(imx335->dev);
473
474 break;
475 default:
476 dev_err(imx335->dev, "Invalid control %d", ctrl->id);
477 ret = -EINVAL;
478 }
479
480 return ret;
481}
482
483
484static const struct v4l2_ctrl_ops imx335_ctrl_ops = {
485 .s_ctrl = imx335_set_ctrl,
486};
487
488
489
490
491
492
493
494
495
496static int imx335_enum_mbus_code(struct v4l2_subdev *sd,
497 struct v4l2_subdev_state *sd_state,
498 struct v4l2_subdev_mbus_code_enum *code)
499{
500 if (code->index > 0)
501 return -EINVAL;
502
503 code->code = supported_mode.code;
504
505 return 0;
506}
507
508
509
510
511
512
513
514
515
516static int imx335_enum_frame_size(struct v4l2_subdev *sd,
517 struct v4l2_subdev_state *sd_state,
518 struct v4l2_subdev_frame_size_enum *fsize)
519{
520 if (fsize->index > 0)
521 return -EINVAL;
522
523 if (fsize->code != supported_mode.code)
524 return -EINVAL;
525
526 fsize->min_width = supported_mode.width;
527 fsize->max_width = fsize->min_width;
528 fsize->min_height = supported_mode.height;
529 fsize->max_height = fsize->min_height;
530
531 return 0;
532}
533
534
535
536
537
538
539
540
541static void imx335_fill_pad_format(struct imx335 *imx335,
542 const struct imx335_mode *mode,
543 struct v4l2_subdev_format *fmt)
544{
545 fmt->format.width = mode->width;
546 fmt->format.height = mode->height;
547 fmt->format.code = mode->code;
548 fmt->format.field = V4L2_FIELD_NONE;
549 fmt->format.colorspace = V4L2_COLORSPACE_RAW;
550 fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
551 fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT;
552 fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
553}
554
555
556
557
558
559
560
561
562
563static int imx335_get_pad_format(struct v4l2_subdev *sd,
564 struct v4l2_subdev_state *sd_state,
565 struct v4l2_subdev_format *fmt)
566{
567 struct imx335 *imx335 = to_imx335(sd);
568
569 mutex_lock(&imx335->mutex);
570
571 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
572 struct v4l2_mbus_framefmt *framefmt;
573
574 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
575 fmt->format = *framefmt;
576 } else {
577 imx335_fill_pad_format(imx335, imx335->cur_mode, fmt);
578 }
579
580 mutex_unlock(&imx335->mutex);
581
582 return 0;
583}
584
585
586
587
588
589
590
591
592
593static int imx335_set_pad_format(struct v4l2_subdev *sd,
594 struct v4l2_subdev_state *sd_state,
595 struct v4l2_subdev_format *fmt)
596{
597 struct imx335 *imx335 = to_imx335(sd);
598 const struct imx335_mode *mode;
599 int ret = 0;
600
601 mutex_lock(&imx335->mutex);
602
603 mode = &supported_mode;
604 imx335_fill_pad_format(imx335, mode, fmt);
605
606 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
607 struct v4l2_mbus_framefmt *framefmt;
608
609 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
610 *framefmt = fmt->format;
611 } else {
612 ret = imx335_update_controls(imx335, mode);
613 if (!ret)
614 imx335->cur_mode = mode;
615 }
616
617 mutex_unlock(&imx335->mutex);
618
619 return ret;
620}
621
622
623
624
625
626
627
628
629static int imx335_init_pad_cfg(struct v4l2_subdev *sd,
630 struct v4l2_subdev_state *sd_state)
631{
632 struct imx335 *imx335 = to_imx335(sd);
633 struct v4l2_subdev_format fmt = { 0 };
634
635 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
636 imx335_fill_pad_format(imx335, &supported_mode, &fmt);
637
638 return imx335_set_pad_format(sd, sd_state, &fmt);
639}
640
641
642
643
644
645
646
647static int imx335_start_streaming(struct imx335 *imx335)
648{
649 const struct imx335_reg_list *reg_list;
650 int ret;
651
652
653 reg_list = &imx335->cur_mode->reg_list;
654 ret = imx335_write_regs(imx335, reg_list->regs,
655 reg_list->num_of_regs);
656 if (ret) {
657 dev_err(imx335->dev, "fail to write initial registers");
658 return ret;
659 }
660
661
662 ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler);
663 if (ret) {
664 dev_err(imx335->dev, "fail to setup handler");
665 return ret;
666 }
667
668
669 ret = imx335_write_reg(imx335, IMX335_REG_MODE_SELECT,
670 1, IMX335_MODE_STREAMING);
671 if (ret) {
672 dev_err(imx335->dev, "fail to start streaming");
673 return ret;
674 }
675
676
677 usleep_range(18000, 20000);
678
679 return 0;
680}
681
682
683
684
685
686
687
688static int imx335_stop_streaming(struct imx335 *imx335)
689{
690 return imx335_write_reg(imx335, IMX335_REG_MODE_SELECT,
691 1, IMX335_MODE_STANDBY);
692}
693
694
695
696
697
698
699
700
701static int imx335_set_stream(struct v4l2_subdev *sd, int enable)
702{
703 struct imx335 *imx335 = to_imx335(sd);
704 int ret;
705
706 mutex_lock(&imx335->mutex);
707
708 if (imx335->streaming == enable) {
709 mutex_unlock(&imx335->mutex);
710 return 0;
711 }
712
713 if (enable) {
714 ret = pm_runtime_resume_and_get(imx335->dev);
715 if (ret)
716 goto error_unlock;
717
718 ret = imx335_start_streaming(imx335);
719 if (ret)
720 goto error_power_off;
721 } else {
722 imx335_stop_streaming(imx335);
723 pm_runtime_put(imx335->dev);
724 }
725
726 imx335->streaming = enable;
727
728 mutex_unlock(&imx335->mutex);
729
730 return 0;
731
732error_power_off:
733 pm_runtime_put(imx335->dev);
734error_unlock:
735 mutex_unlock(&imx335->mutex);
736
737 return ret;
738}
739
740
741
742
743
744
745
746static int imx335_detect(struct imx335 *imx335)
747{
748 int ret;
749 u32 val;
750
751 ret = imx335_read_reg(imx335, IMX335_REG_ID, 2, &val);
752 if (ret)
753 return ret;
754
755 if (val != IMX335_ID) {
756 dev_err(imx335->dev, "chip id mismatch: %x!=%x",
757 IMX335_ID, val);
758 return -ENXIO;
759 }
760
761 return 0;
762}
763
764
765
766
767
768
769
770static int imx335_parse_hw_config(struct imx335 *imx335)
771{
772 struct fwnode_handle *fwnode = dev_fwnode(imx335->dev);
773 struct v4l2_fwnode_endpoint bus_cfg = {
774 .bus_type = V4L2_MBUS_CSI2_DPHY
775 };
776 struct fwnode_handle *ep;
777 unsigned long rate;
778 unsigned int i;
779 int ret;
780
781 if (!fwnode)
782 return -ENXIO;
783
784
785 imx335->reset_gpio = devm_gpiod_get_optional(imx335->dev, "reset",
786 GPIOD_OUT_LOW);
787 if (IS_ERR(imx335->reset_gpio)) {
788 dev_err(imx335->dev, "failed to get reset gpio %ld",
789 PTR_ERR(imx335->reset_gpio));
790 return PTR_ERR(imx335->reset_gpio);
791 }
792
793
794 imx335->inclk = devm_clk_get(imx335->dev, NULL);
795 if (IS_ERR(imx335->inclk)) {
796 dev_err(imx335->dev, "could not get inclk");
797 return PTR_ERR(imx335->inclk);
798 }
799
800 rate = clk_get_rate(imx335->inclk);
801 if (rate != IMX335_INCLK_RATE) {
802 dev_err(imx335->dev, "inclk frequency mismatch");
803 return -EINVAL;
804 }
805
806 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
807 if (!ep)
808 return -ENXIO;
809
810 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
811 fwnode_handle_put(ep);
812 if (ret)
813 return ret;
814
815 if (bus_cfg.bus.mipi_csi2.num_data_lanes != IMX335_NUM_DATA_LANES) {
816 dev_err(imx335->dev,
817 "number of CSI2 data lanes %d is not supported",
818 bus_cfg.bus.mipi_csi2.num_data_lanes);
819 ret = -EINVAL;
820 goto done_endpoint_free;
821 }
822
823 if (!bus_cfg.nr_of_link_frequencies) {
824 dev_err(imx335->dev, "no link frequencies defined");
825 ret = -EINVAL;
826 goto done_endpoint_free;
827 }
828
829 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
830 if (bus_cfg.link_frequencies[i] == IMX335_LINK_FREQ)
831 goto done_endpoint_free;
832
833 ret = -EINVAL;
834
835done_endpoint_free:
836 v4l2_fwnode_endpoint_free(&bus_cfg);
837
838 return ret;
839}
840
841
842static const struct v4l2_subdev_video_ops imx335_video_ops = {
843 .s_stream = imx335_set_stream,
844};
845
846static const struct v4l2_subdev_pad_ops imx335_pad_ops = {
847 .init_cfg = imx335_init_pad_cfg,
848 .enum_mbus_code = imx335_enum_mbus_code,
849 .enum_frame_size = imx335_enum_frame_size,
850 .get_fmt = imx335_get_pad_format,
851 .set_fmt = imx335_set_pad_format,
852};
853
854static const struct v4l2_subdev_ops imx335_subdev_ops = {
855 .video = &imx335_video_ops,
856 .pad = &imx335_pad_ops,
857};
858
859
860
861
862
863
864
865static int imx335_power_on(struct device *dev)
866{
867 struct v4l2_subdev *sd = dev_get_drvdata(dev);
868 struct imx335 *imx335 = to_imx335(sd);
869 int ret;
870
871 gpiod_set_value_cansleep(imx335->reset_gpio, 1);
872
873 ret = clk_prepare_enable(imx335->inclk);
874 if (ret) {
875 dev_err(imx335->dev, "fail to enable inclk");
876 goto error_reset;
877 }
878
879 usleep_range(20, 22);
880
881 return 0;
882
883error_reset:
884 gpiod_set_value_cansleep(imx335->reset_gpio, 0);
885
886 return ret;
887}
888
889
890
891
892
893
894
895static int imx335_power_off(struct device *dev)
896{
897 struct v4l2_subdev *sd = dev_get_drvdata(dev);
898 struct imx335 *imx335 = to_imx335(sd);
899
900 gpiod_set_value_cansleep(imx335->reset_gpio, 0);
901
902 clk_disable_unprepare(imx335->inclk);
903
904 return 0;
905}
906
907
908
909
910
911
912
913static int imx335_init_controls(struct imx335 *imx335)
914{
915 struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler;
916 const struct imx335_mode *mode = imx335->cur_mode;
917 u32 lpfr;
918 int ret;
919
920 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 6);
921 if (ret)
922 return ret;
923
924
925 ctrl_hdlr->lock = &imx335->mutex;
926
927
928 lpfr = mode->vblank + mode->height;
929 imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
930 &imx335_ctrl_ops,
931 V4L2_CID_EXPOSURE,
932 IMX335_EXPOSURE_MIN,
933 lpfr - IMX335_EXPOSURE_OFFSET,
934 IMX335_EXPOSURE_STEP,
935 IMX335_EXPOSURE_DEFAULT);
936
937 imx335->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
938 &imx335_ctrl_ops,
939 V4L2_CID_ANALOGUE_GAIN,
940 IMX335_AGAIN_MIN,
941 IMX335_AGAIN_MAX,
942 IMX335_AGAIN_STEP,
943 IMX335_AGAIN_DEFAULT);
944
945 v4l2_ctrl_cluster(2, &imx335->exp_ctrl);
946
947 imx335->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
948 &imx335_ctrl_ops,
949 V4L2_CID_VBLANK,
950 mode->vblank_min,
951 mode->vblank_max,
952 1, mode->vblank);
953
954
955 imx335->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
956 &imx335_ctrl_ops,
957 V4L2_CID_PIXEL_RATE,
958 mode->pclk, mode->pclk,
959 1, mode->pclk);
960
961 imx335->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr,
962 &imx335_ctrl_ops,
963 V4L2_CID_LINK_FREQ,
964 ARRAY_SIZE(link_freq) -
965 1,
966 mode->link_freq_idx,
967 link_freq);
968 if (imx335->link_freq_ctrl)
969 imx335->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
970
971 imx335->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
972 &imx335_ctrl_ops,
973 V4L2_CID_HBLANK,
974 IMX335_REG_MIN,
975 IMX335_REG_MAX,
976 1, mode->hblank);
977 if (imx335->hblank_ctrl)
978 imx335->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
979
980 if (ctrl_hdlr->error) {
981 dev_err(imx335->dev, "control init failed: %d",
982 ctrl_hdlr->error);
983 v4l2_ctrl_handler_free(ctrl_hdlr);
984 return ctrl_hdlr->error;
985 }
986
987 imx335->sd.ctrl_handler = ctrl_hdlr;
988
989 return 0;
990}
991
992
993
994
995
996
997
998static int imx335_probe(struct i2c_client *client)
999{
1000 struct imx335 *imx335;
1001 int ret;
1002
1003 imx335 = devm_kzalloc(&client->dev, sizeof(*imx335), GFP_KERNEL);
1004 if (!imx335)
1005 return -ENOMEM;
1006
1007 imx335->dev = &client->dev;
1008
1009
1010 v4l2_i2c_subdev_init(&imx335->sd, client, &imx335_subdev_ops);
1011
1012 ret = imx335_parse_hw_config(imx335);
1013 if (ret) {
1014 dev_err(imx335->dev, "HW configuration is not supported");
1015 return ret;
1016 }
1017
1018 mutex_init(&imx335->mutex);
1019
1020 ret = imx335_power_on(imx335->dev);
1021 if (ret) {
1022 dev_err(imx335->dev, "failed to power-on the sensor");
1023 goto error_mutex_destroy;
1024 }
1025
1026
1027 ret = imx335_detect(imx335);
1028 if (ret) {
1029 dev_err(imx335->dev, "failed to find sensor: %d", ret);
1030 goto error_power_off;
1031 }
1032
1033
1034 imx335->cur_mode = &supported_mode;
1035 imx335->vblank = imx335->cur_mode->vblank;
1036
1037 ret = imx335_init_controls(imx335);
1038 if (ret) {
1039 dev_err(imx335->dev, "failed to init controls: %d", ret);
1040 goto error_power_off;
1041 }
1042
1043
1044 imx335->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1045 imx335->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1046
1047
1048 imx335->pad.flags = MEDIA_PAD_FL_SOURCE;
1049 ret = media_entity_pads_init(&imx335->sd.entity, 1, &imx335->pad);
1050 if (ret) {
1051 dev_err(imx335->dev, "failed to init entity pads: %d", ret);
1052 goto error_handler_free;
1053 }
1054
1055 ret = v4l2_async_register_subdev_sensor(&imx335->sd);
1056 if (ret < 0) {
1057 dev_err(imx335->dev,
1058 "failed to register async subdev: %d", ret);
1059 goto error_media_entity;
1060 }
1061
1062 pm_runtime_set_active(imx335->dev);
1063 pm_runtime_enable(imx335->dev);
1064 pm_runtime_idle(imx335->dev);
1065
1066 return 0;
1067
1068error_media_entity:
1069 media_entity_cleanup(&imx335->sd.entity);
1070error_handler_free:
1071 v4l2_ctrl_handler_free(imx335->sd.ctrl_handler);
1072error_power_off:
1073 imx335_power_off(imx335->dev);
1074error_mutex_destroy:
1075 mutex_destroy(&imx335->mutex);
1076
1077 return ret;
1078}
1079
1080
1081
1082
1083
1084
1085
1086static int imx335_remove(struct i2c_client *client)
1087{
1088 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1089 struct imx335 *imx335 = to_imx335(sd);
1090
1091 v4l2_async_unregister_subdev(sd);
1092 media_entity_cleanup(&sd->entity);
1093 v4l2_ctrl_handler_free(sd->ctrl_handler);
1094
1095 pm_runtime_disable(&client->dev);
1096 if (!pm_runtime_status_suspended(&client->dev))
1097 imx335_power_off(&client->dev);
1098 pm_runtime_set_suspended(&client->dev);
1099
1100 mutex_destroy(&imx335->mutex);
1101
1102 return 0;
1103}
1104
1105static const struct dev_pm_ops imx335_pm_ops = {
1106 SET_RUNTIME_PM_OPS(imx335_power_off, imx335_power_on, NULL)
1107};
1108
1109static const struct of_device_id imx335_of_match[] = {
1110 { .compatible = "sony,imx335" },
1111 { }
1112};
1113
1114MODULE_DEVICE_TABLE(of, imx335_of_match);
1115
1116static struct i2c_driver imx335_driver = {
1117 .probe_new = imx335_probe,
1118 .remove = imx335_remove,
1119 .driver = {
1120 .name = "imx335",
1121 .pm = &imx335_pm_ops,
1122 .of_match_table = imx335_of_match,
1123 },
1124};
1125
1126module_i2c_driver(imx335_driver);
1127
1128MODULE_DESCRIPTION("Sony imx335 sensor driver");
1129MODULE_LICENSE("GPL");
1130