LXR linux/drivers/media/pci/tw68/tw68-risc.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *  tw68_risc.c
   4 *  Part of the device driver for Techwell 68xx based cards
   5 *
   6 *  Much of this code is derived from the cx88 and sa7134 drivers, which
   7 *  were in turn derived from the bt87x driver.  The original work was by
   8 *  Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
   9 *  Hans Verkuil, Andy Walls and many others.  Their work is gratefully
  10 *  acknowledged.  Full credit goes to them - any problems within this code
  11 *  are mine.
  12 *
  13 *  Copyright (C) 2009  William M. Brack
  14 *
  15 *  Refactored and updated to the latest v4l core frameworks:
  16 *
  17 *  Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
  18 */
  19
  20#include "tw68.h"
  21
  22/**
  23 * tw68_risc_field
  24 *  @rp:        pointer to current risc program position
  25 *  @sglist:    pointer to "scatter-gather list" of buffer pointers
  26 *  @offset:    offset to target memory buffer
  27 *  @sync_line: 0 -> no sync, 1 -> odd sync, 2 -> even sync
  28 *  @bpl:       number of bytes per scan line
  29 *  @padding:   number of bytes of padding to add
  30 *  @lines:     number of lines in field
  31 *  @jump:      insert a jump at the start
  32 */
  33static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
  34                            unsigned int offset, u32 sync_line,
  35                            unsigned int bpl, unsigned int padding,
  36                            unsigned int lines, bool jump)
  37{
  38        struct scatterlist *sg;
  39        unsigned int line, todo, done;
  40
  41        if (jump) {
  42                *(rp++) = cpu_to_le32(RISC_JUMP);
  43                *(rp++) = 0;
  44        }
  45
  46        /* sync instruction */
  47        if (sync_line == 1)
  48                *(rp++) = cpu_to_le32(RISC_SYNCO);
  49        else
  50                *(rp++) = cpu_to_le32(RISC_SYNCE);
  51        *(rp++) = 0;
  52
  53        /* scan lines */
  54        sg = sglist;
  55        for (line = 0; line < lines; line++) {
  56                /* calculate next starting position */
  57                while (offset && offset >= sg_dma_len(sg)) {
  58                        offset -= sg_dma_len(sg);
  59                        sg = sg_next(sg);
  60                }
  61                if (bpl <= sg_dma_len(sg) - offset) {
  62                        /* fits into current chunk */
  63                        *(rp++) = cpu_to_le32(RISC_LINESTART |
  64                                              /* (offset<<12) |*/  bpl);
  65                        *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
  66                        offset += bpl;
  67                } else {
  68                        /*
  69                         * scanline needs to be split.  Put the start in
  70                         * whatever memory remains using RISC_LINESTART,
  71                         * then the remainder into following addresses
  72                         * given by the scatter-gather list.
  73                         */
  74                        todo = bpl;     /* one full line to be done */
  75                        /* first fragment */
  76                        done = (sg_dma_len(sg) - offset);
  77                        *(rp++) = cpu_to_le32(RISC_LINESTART |
  78                                                (7 << 24) |
  79                                                done);
  80                        *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
  81                        todo -= done;
  82                        sg = sg_next(sg);
  83                        /* succeeding fragments have no offset */
  84                        while (todo > sg_dma_len(sg)) {
  85                                *(rp++) = cpu_to_le32(RISC_INLINE |
  86                                                (done << 12) |
  87                                                sg_dma_len(sg));
  88                                *(rp++) = cpu_to_le32(sg_dma_address(sg));
  89                                todo -= sg_dma_len(sg);
  90                                sg = sg_next(sg);
  91                                done += sg_dma_len(sg);
  92                        }
  93                        if (todo) {
  94                                /* final chunk - offset 0, count 'todo' */
  95                                *(rp++) = cpu_to_le32(RISC_INLINE |
  96                                                        (done << 12) |
  97                                                        todo);
  98                                *(rp++) = cpu_to_le32(sg_dma_address(sg));
  99                        }
 100                        offset = todo;
 101                }
 102                offset += padding;
 103        }
 104
 105        return rp;
 106}
 107
 108/**
 109 * tw68_risc_buffer
 110 *
 111 *      This routine is called by tw68-video.  It allocates
 112 *      memory for the dma controller "program" and then fills in that
 113 *      memory with the appropriate "instructions".
 114 *
 115 *      @pci:           structure with info about the pci
 116 *                      slot which our device is in.
 117 *      @buf:           structure with info about the memory
 118 *                      used for our controller program.
 119 *      @sglist:        scatter-gather list entry
 120 *      @top_offset:    offset within the risc program area for the
 121 *                      first odd frame line
 122 *      @bottom_offset: offset within the risc program area for the
 123 *                      first even frame line
 124 *      @bpl:           number of data bytes per scan line
 125 *      @padding:       number of extra bytes to add at end of line
 126 *      @lines:         number of scan lines
 127 */
 128int tw68_risc_buffer(struct pci_dev *pci,
 129                        struct tw68_buf *buf,
 130                        struct scatterlist *sglist,
 131                        unsigned int top_offset,
 132                        unsigned int bottom_offset,
 133                        unsigned int bpl,
 134                        unsigned int padding,
 135                        unsigned int lines)
 136{
 137        u32 instructions, fields;
 138        __le32 *rp;
 139
 140        fields = 0;
 141        if (UNSET != top_offset)
 142                fields++;
 143        if (UNSET != bottom_offset)
 144                fields++;
 145        /*
 146         * estimate risc mem: worst case is one write per page border +
 147         * one write per scan line + syncs + 2 jumps (all 2 dwords).
 148         * Padding can cause next bpl to start close to a page border.
 149         * First DMA region may be smaller than PAGE_SIZE
 150         */
 151        instructions  = fields * (1 + (((bpl + padding) * lines) /
 152                         PAGE_SIZE) + lines) + 4;
 153        buf->size = instructions * 8;
 154        buf->cpu = dma_alloc_coherent(&pci->dev, buf->size, &buf->dma,
 155                                      GFP_KERNEL);
 156        if (buf->cpu == NULL)
 157                return -ENOMEM;
 158
 159        /* write risc instructions */
 160        rp = buf->cpu;
 161        if (UNSET != top_offset)        /* generates SYNCO */
 162                rp = tw68_risc_field(rp, sglist, top_offset, 1,
 163                                     bpl, padding, lines, true);
 164        if (UNSET != bottom_offset)     /* generates SYNCE */
 165                rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
 166                                     bpl, padding, lines, top_offset == UNSET);
 167
 168        /* save pointer to jmp instruction address */
 169        buf->jmp = rp;
 170        buf->cpu[1] = cpu_to_le32(buf->dma + 8);
 171        /* assure risc buffer hasn't overflowed */
 172        BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
 173        return 0;
 174}
 175
 176#if 0
 177/* ------------------------------------------------------------------ */
 178/* debug helper code                                                  */
 179
 180static void tw68_risc_decode(u32 risc, u32 addr)
 181{
 182#define RISC_OP(reg)    (((reg) >> 28) & 7)
 183        static struct instr_details {
 184                char *name;
 185                u8 has_data_type;
 186                u8 has_byte_info;
 187                u8 has_addr;
 188        } instr[8] = {
 189                [RISC_OP(RISC_SYNCO)]     = {"syncOdd", 0, 0, 0},
 190                [RISC_OP(RISC_SYNCE)]     = {"syncEven", 0, 0, 0},
 191                [RISC_OP(RISC_JUMP)]      = {"jump", 0, 0, 1},
 192                [RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
 193                [RISC_OP(RISC_INLINE)]    = {"inline", 1, 1, 1},
 194        };
 195        u32 p;
 196
 197        p = RISC_OP(risc);
 198        if (!(risc & 0x80000000) || !instr[p].name) {
 199                pr_debug("0x%08x [ INVALID ]\n", risc);
 200                return;
 201        }
 202        pr_debug("0x%08x %-9s IRQ=%d",
 203                risc, instr[p].name, (risc >> 27) & 1);
 204        if (instr[p].has_data_type)
 205                pr_debug(" Type=%d", (risc >> 24) & 7);
 206        if (instr[p].has_byte_info)
 207                pr_debug(" Start=0x%03x Count=%03u",
 208                        (risc >> 12) & 0xfff, risc & 0xfff);
 209        if (instr[p].has_addr)
 210                pr_debug(" StartAddr=0x%08x", addr);
 211        pr_debug("\n");
 212}
 213
 214void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf)
 215{
 216        const __le32 *addr;
 217
 218        pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
 219                  core->name, buf, buf->cpu, buf->jmp);
 220        for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
 221                tw68_risc_decode(*addr, *(addr+1));
 222}
 223#endif
 224