linux/drivers/tty/moxa.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*****************************************************************************/
   3/*
   4 *           moxa.c  -- MOXA Intellio family multiport serial driver.
   5 *
   6 *      Copyright (C) 1999-2000  Moxa Technologies (support@moxa.com).
   7 *      Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
   8 *
   9 *      This code is loosely based on the Linux serial driver, written by
  10 *      Linus Torvalds, Theodore T'so and others.
  11 */
  12
  13/*
  14 *    MOXA Intellio Series Driver
  15 *      for             : LINUX
  16 *      date            : 1999/1/7
  17 *      version         : 5.1
  18 */
  19
  20#include <linux/module.h>
  21#include <linux/types.h>
  22#include <linux/mm.h>
  23#include <linux/ioport.h>
  24#include <linux/errno.h>
  25#include <linux/firmware.h>
  26#include <linux/signal.h>
  27#include <linux/sched.h>
  28#include <linux/timer.h>
  29#include <linux/interrupt.h>
  30#include <linux/tty.h>
  31#include <linux/tty_flip.h>
  32#include <linux/major.h>
  33#include <linux/string.h>
  34#include <linux/fcntl.h>
  35#include <linux/ptrace.h>
  36#include <linux/serial.h>
  37#include <linux/tty_driver.h>
  38#include <linux/delay.h>
  39#include <linux/pci.h>
  40#include <linux/init.h>
  41#include <linux/bitops.h>
  42#include <linux/slab.h>
  43#include <linux/ratelimit.h>
  44
  45#include <asm/io.h>
  46#include <linux/uaccess.h>
  47
  48#define MOXA                    0x400
  49#define MOXA_GET_IQUEUE         (MOXA + 1)      /* get input buffered count */
  50#define MOXA_GET_OQUEUE         (MOXA + 2)      /* get output buffered count */
  51#define MOXA_GETDATACOUNT       (MOXA + 23)
  52#define MOXA_GET_IOQUEUE        (MOXA + 27)
  53#define MOXA_FLUSH_QUEUE        (MOXA + 28)
  54#define MOXA_GETMSTATUS         (MOXA + 65)
  55
  56/*
  57 *    System Configuration
  58 */
  59
  60#define Magic_code      0x404
  61
  62/*
  63 *    for C218 BIOS initialization
  64 */
  65#define C218_ConfBase   0x800
  66#define C218_status     (C218_ConfBase + 0)     /* BIOS running status    */
  67#define C218_diag       (C218_ConfBase + 2)     /* diagnostic status      */
  68#define C218_key        (C218_ConfBase + 4)     /* WORD (0x218 for C218) */
  69#define C218DLoad_len   (C218_ConfBase + 6)     /* WORD           */
  70#define C218check_sum   (C218_ConfBase + 8)     /* BYTE           */
  71#define C218chksum_ok   (C218_ConfBase + 0x0a)  /* BYTE (1:ok)            */
  72#define C218_TestRx     (C218_ConfBase + 0x10)  /* 8 bytes for 8 ports    */
  73#define C218_TestTx     (C218_ConfBase + 0x18)  /* 8 bytes for 8 ports    */
  74#define C218_RXerr      (C218_ConfBase + 0x20)  /* 8 bytes for 8 ports    */
  75#define C218_ErrFlag    (C218_ConfBase + 0x28)  /* 8 bytes for 8 ports    */
  76
  77#define C218_LoadBuf    0x0F00
  78#define C218_KeyCode    0x218
  79#define CP204J_KeyCode  0x204
  80
  81/*
  82 *    for C320 BIOS initialization
  83 */
  84#define C320_ConfBase   0x800
  85#define C320_LoadBuf    0x0f00
  86#define STS_init        0x05    /* for C320_status        */
  87
  88#define C320_status     C320_ConfBase + 0       /* BIOS running status    */
  89#define C320_diag       C320_ConfBase + 2       /* diagnostic status      */
  90#define C320_key        C320_ConfBase + 4       /* WORD (0320H for C320) */
  91#define C320DLoad_len   C320_ConfBase + 6       /* WORD           */
  92#define C320check_sum   C320_ConfBase + 8       /* WORD           */
  93#define C320chksum_ok   C320_ConfBase + 0x0a    /* WORD (1:ok)            */
  94#define C320bapi_len    C320_ConfBase + 0x0c    /* WORD           */
  95#define C320UART_no     C320_ConfBase + 0x0e    /* WORD           */
  96
  97#define C320_KeyCode    0x320
  98
  99#define FixPage_addr    0x0000  /* starting addr of static page  */
 100#define DynPage_addr    0x2000  /* starting addr of dynamic page */
 101#define C218_start      0x3000  /* starting addr of C218 BIOS prg */
 102#define Control_reg     0x1ff0  /* select page and reset control */
 103#define HW_reset        0x80
 104
 105/*
 106 *    Function Codes
 107 */
 108#define FC_CardReset    0x80
 109#define FC_ChannelReset 1       /* C320 firmware not supported */
 110#define FC_EnableCH     2
 111#define FC_DisableCH    3
 112#define FC_SetParam     4
 113#define FC_SetMode      5
 114#define FC_SetRate      6
 115#define FC_LineControl  7
 116#define FC_LineStatus   8
 117#define FC_XmitControl  9
 118#define FC_FlushQueue   10
 119#define FC_SendBreak    11
 120#define FC_StopBreak    12
 121#define FC_LoopbackON   13
 122#define FC_LoopbackOFF  14
 123#define FC_ClrIrqTable  15
 124#define FC_SendXon      16
 125#define FC_SetTermIrq   17      /* C320 firmware not supported */
 126#define FC_SetCntIrq    18      /* C320 firmware not supported */
 127#define FC_SetBreakIrq  19
 128#define FC_SetLineIrq   20
 129#define FC_SetFlowCtl   21
 130#define FC_GenIrq       22
 131#define FC_InCD180      23
 132#define FC_OutCD180     24
 133#define FC_InUARTreg    23
 134#define FC_OutUARTreg   24
 135#define FC_SetXonXoff   25
 136#define FC_OutCD180CCR  26
 137#define FC_ExtIQueue    27
 138#define FC_ExtOQueue    28
 139#define FC_ClrLineIrq   29
 140#define FC_HWFlowCtl    30
 141#define FC_GetClockRate 35
 142#define FC_SetBaud      36
 143#define FC_SetDataMode  41
 144#define FC_GetCCSR      43
 145#define FC_GetDataError 45
 146#define FC_RxControl    50
 147#define FC_ImmSend      51
 148#define FC_SetXonState  52
 149#define FC_SetXoffState 53
 150#define FC_SetRxFIFOTrig 54
 151#define FC_SetTxFIFOCnt 55
 152#define FC_UnixRate     56
 153#define FC_UnixResetTimer 57
 154
 155#define RxFIFOTrig1     0
 156#define RxFIFOTrig4     1
 157#define RxFIFOTrig8     2
 158#define RxFIFOTrig14    3
 159
 160/*
 161 *    Dual-Ported RAM
 162 */
 163#define DRAM_global     0
 164#define INT_data        (DRAM_global + 0)
 165#define Config_base     (DRAM_global + 0x108)
 166
 167#define IRQindex        (INT_data + 0)
 168#define IRQpending      (INT_data + 4)
 169#define IRQtable        (INT_data + 8)
 170
 171/*
 172 *    Interrupt Status
 173 */
 174#define IntrRx          0x01    /* receiver data O.K.             */
 175#define IntrTx          0x02    /* transmit buffer empty  */
 176#define IntrFunc        0x04    /* function complete              */
 177#define IntrBreak       0x08    /* received break         */
 178#define IntrLine        0x10    /* line status change
 179                                   for transmitter                */
 180#define IntrIntr        0x20    /* received INTR code             */
 181#define IntrQuit        0x40    /* received QUIT code             */
 182#define IntrEOF         0x80    /* received EOF code              */
 183
 184#define IntrRxTrigger   0x100   /* rx data count reach trigger value */
 185#define IntrTxTrigger   0x200   /* tx data count below trigger value */
 186
 187#define Magic_no        (Config_base + 0)
 188#define Card_model_no   (Config_base + 2)
 189#define Total_ports     (Config_base + 4)
 190#define Module_cnt      (Config_base + 8)
 191#define Module_no       (Config_base + 10)
 192#define Timer_10ms      (Config_base + 14)
 193#define Disable_IRQ     (Config_base + 20)
 194#define TMS320_PORT1    (Config_base + 22)
 195#define TMS320_PORT2    (Config_base + 24)
 196#define TMS320_CLOCK    (Config_base + 26)
 197
 198/*
 199 *    DATA BUFFER in DRAM
 200 */
 201#define Extern_table    0x400   /* Base address of the external table
 202                                   (24 words *    64) total 3K bytes
 203                                   (24 words * 128) total 6K bytes */
 204#define Extern_size     0x60    /* 96 bytes                       */
 205#define RXrptr          0x00    /* read pointer for RX buffer     */
 206#define RXwptr          0x02    /* write pointer for RX buffer    */
 207#define TXrptr          0x04    /* read pointer for TX buffer     */
 208#define TXwptr          0x06    /* write pointer for TX buffer    */
 209#define HostStat        0x08    /* IRQ flag and general flag      */
 210#define FlagStat        0x0A
 211#define FlowControl     0x0C    /* B7 B6 B5 B4 B3 B2 B1 B0              */
 212                                /*  x  x  x  x  |  |  |  |            */
 213                                /*              |  |  |  + CTS flow   */
 214                                /*              |  |  +--- RTS flow   */
 215                                /*              |  +------ TX Xon/Xoff */
 216                                /*              +--------- RX Xon/Xoff */
 217#define Break_cnt       0x0E    /* received break count   */
 218#define CD180TXirq      0x10    /* if non-0: enable TX irq        */
 219#define RX_mask         0x12
 220#define TX_mask         0x14
 221#define Ofs_rxb         0x16
 222#define Ofs_txb         0x18
 223#define Page_rxb        0x1A
 224#define Page_txb        0x1C
 225#define EndPage_rxb     0x1E
 226#define EndPage_txb     0x20
 227#define Data_error      0x22
 228#define RxTrigger       0x28
 229#define TxTrigger       0x2a
 230
 231#define rRXwptr         0x34
 232#define Low_water       0x36
 233
 234#define FuncCode        0x40
 235#define FuncArg         0x42
 236#define FuncArg1        0x44
 237
 238#define C218rx_size     0x2000  /* 8K bytes */
 239#define C218tx_size     0x8000  /* 32K bytes */
 240
 241#define C218rx_mask     (C218rx_size - 1)
 242#define C218tx_mask     (C218tx_size - 1)
 243
 244#define C320p8rx_size   0x2000
 245#define C320p8tx_size   0x8000
 246#define C320p8rx_mask   (C320p8rx_size - 1)
 247#define C320p8tx_mask   (C320p8tx_size - 1)
 248
 249#define C320p16rx_size  0x2000
 250#define C320p16tx_size  0x4000
 251#define C320p16rx_mask  (C320p16rx_size - 1)
 252#define C320p16tx_mask  (C320p16tx_size - 1)
 253
 254#define C320p24rx_size  0x2000
 255#define C320p24tx_size  0x2000
 256#define C320p24rx_mask  (C320p24rx_size - 1)
 257#define C320p24tx_mask  (C320p24tx_size - 1)
 258
 259#define C320p32rx_size  0x1000
 260#define C320p32tx_size  0x1000
 261#define C320p32rx_mask  (C320p32rx_size - 1)
 262#define C320p32tx_mask  (C320p32tx_size - 1)
 263
 264#define Page_size       0x2000U
 265#define Page_mask       (Page_size - 1)
 266#define C218rx_spage    3
 267#define C218tx_spage    4
 268#define C218rx_pageno   1
 269#define C218tx_pageno   4
 270#define C218buf_pageno  5
 271
 272#define C320p8rx_spage  3
 273#define C320p8tx_spage  4
 274#define C320p8rx_pgno   1
 275#define C320p8tx_pgno   4
 276#define C320p8buf_pgno  5
 277
 278#define C320p16rx_spage 3
 279#define C320p16tx_spage 4
 280#define C320p16rx_pgno  1
 281#define C320p16tx_pgno  2
 282#define C320p16buf_pgno 3
 283
 284#define C320p24rx_spage 3
 285#define C320p24tx_spage 4
 286#define C320p24rx_pgno  1
 287#define C320p24tx_pgno  1
 288#define C320p24buf_pgno 2
 289
 290#define C320p32rx_spage 3
 291#define C320p32tx_ofs   C320p32rx_size
 292#define C320p32tx_spage 3
 293#define C320p32buf_pgno 1
 294
 295/*
 296 *    Host Status
 297 */
 298#define WakeupRx        0x01
 299#define WakeupTx        0x02
 300#define WakeupBreak     0x08
 301#define WakeupLine      0x10
 302#define WakeupIntr      0x20
 303#define WakeupQuit      0x40
 304#define WakeupEOF       0x80    /* used in VTIME control */
 305#define WakeupRxTrigger 0x100
 306#define WakeupTxTrigger 0x200
 307/*
 308 *    Flag status
 309 */
 310#define Rx_over         0x01
 311#define Xoff_state      0x02
 312#define Tx_flowOff      0x04
 313#define Tx_enable       0x08
 314#define CTS_state       0x10
 315#define DSR_state       0x20
 316#define DCD_state       0x80
 317/*
 318 *    FlowControl
 319 */
 320#define CTS_FlowCtl     1
 321#define RTS_FlowCtl     2
 322#define Tx_FlowCtl      4
 323#define Rx_FlowCtl      8
 324#define IXM_IXANY       0x10
 325
 326#define LowWater        128
 327
 328#define DTR_ON          1
 329#define RTS_ON          2
 330#define CTS_ON          1
 331#define DSR_ON          2
 332#define DCD_ON          8
 333
 334/* mode definition */
 335#define MX_CS8          0x03
 336#define MX_CS7          0x02
 337#define MX_CS6          0x01
 338#define MX_CS5          0x00
 339
 340#define MX_STOP1        0x00
 341#define MX_STOP15       0x04
 342#define MX_STOP2        0x08
 343
 344#define MX_PARNONE      0x00
 345#define MX_PAREVEN      0x40
 346#define MX_PARODD       0xC0
 347#define MX_PARMARK      0xA0
 348#define MX_PARSPACE     0x20
 349
 350#define MOXA_VERSION            "6.0k"
 351
 352#define MOXA_FW_HDRLEN          32
 353
 354#define MOXAMAJOR               172
 355
 356#define MAX_BOARDS              4       /* Don't change this value */
 357#define MAX_PORTS_PER_BOARD     32      /* Don't change this value */
 358#define MAX_PORTS               (MAX_BOARDS * MAX_PORTS_PER_BOARD)
 359
 360#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
 361                (brd)->boardType == MOXA_BOARD_C320_PCI)
 362
 363/*
 364 *    Define the Moxa PCI vendor and device IDs.
 365 */
 366#define MOXA_BUS_TYPE_ISA       0
 367#define MOXA_BUS_TYPE_PCI       1
 368
 369enum {
 370        MOXA_BOARD_C218_PCI = 1,
 371        MOXA_BOARD_C218_ISA,
 372        MOXA_BOARD_C320_PCI,
 373        MOXA_BOARD_C320_ISA,
 374        MOXA_BOARD_CP204J,
 375};
 376
 377static char *moxa_brdname[] =
 378{
 379        "C218 Turbo PCI series",
 380        "C218 Turbo ISA series",
 381        "C320 Turbo PCI series",
 382        "C320 Turbo ISA series",
 383        "CP-204J series",
 384};
 385
 386#ifdef CONFIG_PCI
 387static const struct pci_device_id moxa_pcibrds[] = {
 388        { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
 389                .driver_data = MOXA_BOARD_C218_PCI },
 390        { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
 391                .driver_data = MOXA_BOARD_C320_PCI },
 392        { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
 393                .driver_data = MOXA_BOARD_CP204J },
 394        { 0 }
 395};
 396MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
 397#endif /* CONFIG_PCI */
 398
 399struct moxa_port;
 400
 401static struct moxa_board_conf {
 402        int boardType;
 403        int numPorts;
 404        int busType;
 405
 406        unsigned int ready;
 407
 408        struct moxa_port *ports;
 409
 410        void __iomem *basemem;
 411        void __iomem *intNdx;
 412        void __iomem *intPend;
 413        void __iomem *intTable;
 414} moxa_boards[MAX_BOARDS];
 415
 416struct mxser_mstatus {
 417        tcflag_t cflag;
 418        int cts;
 419        int dsr;
 420        int ri;
 421        int dcd;
 422};
 423
 424struct moxaq_str {
 425        int inq;
 426        int outq;
 427};
 428
 429struct moxa_port {
 430        struct tty_port port;
 431        struct moxa_board_conf *board;
 432        void __iomem *tableAddr;
 433
 434        int type;
 435        int cflag;
 436        unsigned long statusflags;
 437
 438        u8 DCDState;            /* Protected by the port lock */
 439        u8 lineCtrl;
 440        u8 lowChkFlag;
 441};
 442
 443struct mon_str {
 444        int tick;
 445        int rxcnt[MAX_PORTS];
 446        int txcnt[MAX_PORTS];
 447};
 448
 449/* statusflags */
 450#define TXSTOPPED       1
 451#define LOWWAIT         2
 452#define EMPTYWAIT       3
 453
 454
 455#define WAKEUP_CHARS            256
 456
 457static int ttymajor = MOXAMAJOR;
 458static struct mon_str moxaLog;
 459static unsigned int moxaFuncTout = HZ / 2;
 460static unsigned int moxaLowWaterChk;
 461static DEFINE_MUTEX(moxa_openlock);
 462static DEFINE_SPINLOCK(moxa_lock);
 463
 464static unsigned long baseaddr[MAX_BOARDS];
 465static unsigned int type[MAX_BOARDS];
 466static unsigned int numports[MAX_BOARDS];
 467static struct tty_port moxa_service_port;
 468
 469MODULE_AUTHOR("William Chen");
 470MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
 471MODULE_LICENSE("GPL");
 472MODULE_FIRMWARE("c218tunx.cod");
 473MODULE_FIRMWARE("cp204unx.cod");
 474MODULE_FIRMWARE("c320tunx.cod");
 475
 476module_param_array(type, uint, NULL, 0);
 477MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
 478module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
 479MODULE_PARM_DESC(baseaddr, "base address");
 480module_param_array(numports, uint, NULL, 0);
 481MODULE_PARM_DESC(numports, "numports (ignored for C218)");
 482
 483module_param(ttymajor, int, 0);
 484
 485/*
 486 * static functions:
 487 */
 488static int moxa_open(struct tty_struct *, struct file *);
 489static void moxa_close(struct tty_struct *, struct file *);
 490static int moxa_write(struct tty_struct *, const unsigned char *, int);
 491static unsigned int moxa_write_room(struct tty_struct *);
 492static void moxa_flush_buffer(struct tty_struct *);
 493static unsigned int moxa_chars_in_buffer(struct tty_struct *);
 494static void moxa_set_termios(struct tty_struct *, struct ktermios *);
 495static void moxa_stop(struct tty_struct *);
 496static void moxa_start(struct tty_struct *);
 497static void moxa_hangup(struct tty_struct *);
 498static int moxa_tiocmget(struct tty_struct *tty);
 499static int moxa_tiocmset(struct tty_struct *tty,
 500                         unsigned int set, unsigned int clear);
 501static void moxa_poll(struct timer_list *);
 502static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
 503static void moxa_shutdown(struct tty_port *);
 504static int moxa_carrier_raised(struct tty_port *);
 505static void moxa_dtr_rts(struct tty_port *, int);
 506/*
 507 * moxa board interface functions:
 508 */
 509static void MoxaPortEnable(struct moxa_port *);
 510static void MoxaPortDisable(struct moxa_port *);
 511static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
 512static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
 513static void MoxaPortLineCtrl(struct moxa_port *, int, int);
 514static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
 515static int MoxaPortLineStatus(struct moxa_port *);
 516static void MoxaPortFlushData(struct moxa_port *, int);
 517static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
 518static int MoxaPortReadData(struct moxa_port *);
 519static unsigned int MoxaPortTxQueue(struct moxa_port *);
 520static int MoxaPortRxQueue(struct moxa_port *);
 521static unsigned int MoxaPortTxFree(struct moxa_port *);
 522static void MoxaPortTxDisable(struct moxa_port *);
 523static void MoxaPortTxEnable(struct moxa_port *);
 524static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
 525static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
 526static void MoxaSetFifo(struct moxa_port *port, int enable);
 527
 528/*
 529 * I/O functions
 530 */
 531
 532static DEFINE_SPINLOCK(moxafunc_lock);
 533
 534static void moxa_wait_finish(void __iomem *ofsAddr)
 535{
 536        unsigned long end = jiffies + moxaFuncTout;
 537
 538        while (readw(ofsAddr + FuncCode) != 0)
 539                if (time_after(jiffies, end))
 540                        return;
 541        if (readw(ofsAddr + FuncCode) != 0)
 542                printk_ratelimited(KERN_WARNING "moxa function expired\n");
 543}
 544
 545static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
 546{
 547        unsigned long flags;
 548        spin_lock_irqsave(&moxafunc_lock, flags);
 549        writew(arg, ofsAddr + FuncArg);
 550        writew(cmd, ofsAddr + FuncCode);
 551        moxa_wait_finish(ofsAddr);
 552        spin_unlock_irqrestore(&moxafunc_lock, flags);
 553}
 554
 555static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
 556{
 557        unsigned long flags;
 558        u16 ret;
 559        spin_lock_irqsave(&moxafunc_lock, flags);
 560        writew(arg, ofsAddr + FuncArg);
 561        writew(cmd, ofsAddr + FuncCode);
 562        moxa_wait_finish(ofsAddr);
 563        ret = readw(ofsAddr + FuncArg);
 564        spin_unlock_irqrestore(&moxafunc_lock, flags);
 565        return ret;
 566}
 567
 568static void moxa_low_water_check(void __iomem *ofsAddr)
 569{
 570        u16 rptr, wptr, mask, len;
 571
 572        if (readb(ofsAddr + FlagStat) & Xoff_state) {
 573                rptr = readw(ofsAddr + RXrptr);
 574                wptr = readw(ofsAddr + RXwptr);
 575                mask = readw(ofsAddr + RX_mask);
 576                len = (wptr - rptr) & mask;
 577                if (len <= Low_water)
 578                        moxafunc(ofsAddr, FC_SendXon, 0);
 579        }
 580}
 581
 582/*
 583 * TTY operations
 584 */
 585
 586static int moxa_ioctl(struct tty_struct *tty,
 587                      unsigned int cmd, unsigned long arg)
 588{
 589        struct moxa_port *ch = tty->driver_data;
 590        void __user *argp = (void __user *)arg;
 591        int status, ret = 0;
 592
 593        if (tty->index == MAX_PORTS) {
 594                if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
 595                                cmd != MOXA_GETMSTATUS)
 596                        return -EINVAL;
 597        } else if (!ch)
 598                return -ENODEV;
 599
 600        switch (cmd) {
 601        case MOXA_GETDATACOUNT:
 602                moxaLog.tick = jiffies;
 603                if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
 604                        ret = -EFAULT;
 605                break;
 606        case MOXA_FLUSH_QUEUE:
 607                MoxaPortFlushData(ch, arg);
 608                break;
 609        case MOXA_GET_IOQUEUE: {
 610                struct moxaq_str __user *argm = argp;
 611                struct moxaq_str tmp;
 612                struct moxa_port *p;
 613                unsigned int i, j;
 614
 615                for (i = 0; i < MAX_BOARDS; i++) {
 616                        p = moxa_boards[i].ports;
 617                        for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
 618                                memset(&tmp, 0, sizeof(tmp));
 619                                spin_lock_bh(&moxa_lock);
 620                                if (moxa_boards[i].ready) {
 621                                        tmp.inq = MoxaPortRxQueue(p);
 622                                        tmp.outq = MoxaPortTxQueue(p);
 623                                }
 624                                spin_unlock_bh(&moxa_lock);
 625                                if (copy_to_user(argm, &tmp, sizeof(tmp)))
 626                                        return -EFAULT;
 627                        }
 628                }
 629                break;
 630        } case MOXA_GET_OQUEUE:
 631                status = MoxaPortTxQueue(ch);
 632                ret = put_user(status, (unsigned long __user *)argp);
 633                break;
 634        case MOXA_GET_IQUEUE:
 635                status = MoxaPortRxQueue(ch);
 636                ret = put_user(status, (unsigned long __user *)argp);
 637                break;
 638        case MOXA_GETMSTATUS: {
 639                struct mxser_mstatus __user *argm = argp;
 640                struct mxser_mstatus tmp;
 641                struct moxa_port *p;
 642                unsigned int i, j;
 643
 644                for (i = 0; i < MAX_BOARDS; i++) {
 645                        p = moxa_boards[i].ports;
 646                        for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
 647                                struct tty_struct *ttyp;
 648                                memset(&tmp, 0, sizeof(tmp));
 649                                spin_lock_bh(&moxa_lock);
 650                                if (!moxa_boards[i].ready) {
 651                                        spin_unlock_bh(&moxa_lock);
 652                                        goto copy;
 653                                }
 654
 655                                status = MoxaPortLineStatus(p);
 656                                spin_unlock_bh(&moxa_lock);
 657
 658                                if (status & 1)
 659                                        tmp.cts = 1;
 660                                if (status & 2)
 661                                        tmp.dsr = 1;
 662                                if (status & 4)
 663                                        tmp.dcd = 1;
 664
 665                                ttyp = tty_port_tty_get(&p->port);
 666                                if (!ttyp)
 667                                        tmp.cflag = p->cflag;
 668                                else
 669                                        tmp.cflag = ttyp->termios.c_cflag;
 670                                tty_kref_put(ttyp);
 671copy:
 672                                if (copy_to_user(argm, &tmp, sizeof(tmp)))
 673                                        return -EFAULT;
 674                        }
 675                }
 676                break;
 677        }
 678        default:
 679                ret = -ENOIOCTLCMD;
 680        }
 681        return ret;
 682}
 683
 684static int moxa_break_ctl(struct tty_struct *tty, int state)
 685{
 686        struct moxa_port *port = tty->driver_data;
 687
 688        moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
 689                        Magic_code);
 690        return 0;
 691}
 692
 693static const struct tty_operations moxa_ops = {
 694        .open = moxa_open,
 695        .close = moxa_close,
 696        .write = moxa_write,
 697        .write_room = moxa_write_room,
 698        .flush_buffer = moxa_flush_buffer,
 699        .chars_in_buffer = moxa_chars_in_buffer,
 700        .ioctl = moxa_ioctl,
 701        .set_termios = moxa_set_termios,
 702        .stop = moxa_stop,
 703        .start = moxa_start,
 704        .hangup = moxa_hangup,
 705        .break_ctl = moxa_break_ctl,
 706        .tiocmget = moxa_tiocmget,
 707        .tiocmset = moxa_tiocmset,
 708        .set_serial = moxa_set_serial_info,
 709        .get_serial = moxa_get_serial_info,
 710};
 711
 712static const struct tty_port_operations moxa_port_ops = {
 713        .carrier_raised = moxa_carrier_raised,
 714        .dtr_rts = moxa_dtr_rts,
 715        .shutdown = moxa_shutdown,
 716};
 717
 718static struct tty_driver *moxaDriver;
 719static DEFINE_TIMER(moxaTimer, moxa_poll);
 720
 721/*
 722 * HW init
 723 */
 724
 725static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
 726{
 727        switch (brd->boardType) {
 728        case MOXA_BOARD_C218_ISA:
 729        case MOXA_BOARD_C218_PCI:
 730                if (model != 1)
 731                        goto err;
 732                break;
 733        case MOXA_BOARD_CP204J:
 734                if (model != 3)
 735                        goto err;
 736                break;
 737        default:
 738                if (model != 2)
 739                        goto err;
 740                break;
 741        }
 742        return 0;
 743err:
 744        return -EINVAL;
 745}
 746
 747static int moxa_check_fw(const void *ptr)
 748{
 749        const __le16 *lptr = ptr;
 750
 751        if (*lptr != cpu_to_le16(0x7980))
 752                return -EINVAL;
 753
 754        return 0;
 755}
 756
 757static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
 758                size_t len)
 759{
 760        void __iomem *baseAddr = brd->basemem;
 761        u16 tmp;
 762
 763        writeb(HW_reset, baseAddr + Control_reg);       /* reset */
 764        msleep(10);
 765        memset_io(baseAddr, 0, 4096);
 766        memcpy_toio(baseAddr, buf, len);        /* download BIOS */
 767        writeb(0, baseAddr + Control_reg);      /* restart */
 768
 769        msleep(2000);
 770
 771        switch (brd->boardType) {
 772        case MOXA_BOARD_C218_ISA:
 773        case MOXA_BOARD_C218_PCI:
 774                tmp = readw(baseAddr + C218_key);
 775                if (tmp != C218_KeyCode)
 776                        goto err;
 777                break;
 778        case MOXA_BOARD_CP204J:
 779                tmp = readw(baseAddr + C218_key);
 780                if (tmp != CP204J_KeyCode)
 781                        goto err;
 782                break;
 783        default:
 784                tmp = readw(baseAddr + C320_key);
 785                if (tmp != C320_KeyCode)
 786                        goto err;
 787                tmp = readw(baseAddr + C320_status);
 788                if (tmp != STS_init) {
 789                        printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
 790                                        "module not found\n");
 791                        return -EIO;
 792                }
 793                break;
 794        }
 795
 796        return 0;
 797err:
 798        printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
 799        return -EIO;
 800}
 801
 802static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
 803                size_t len)
 804{
 805        void __iomem *baseAddr = brd->basemem;
 806
 807        if (len < 7168) {
 808                printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
 809                return -EINVAL;
 810        }
 811
 812        writew(len - 7168 - 2, baseAddr + C320bapi_len);
 813        writeb(1, baseAddr + Control_reg);      /* Select Page 1 */
 814        memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
 815        writeb(2, baseAddr + Control_reg);      /* Select Page 2 */
 816        memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
 817
 818        return 0;
 819}
 820
 821static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
 822                size_t len)
 823{
 824        void __iomem *baseAddr = brd->basemem;
 825        const __le16 *uptr = ptr;
 826        size_t wlen, len2, j;
 827        unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
 828        unsigned int i, retry;
 829        u16 usum, keycode;
 830
 831        keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
 832                                C218_KeyCode;
 833
 834        switch (brd->boardType) {
 835        case MOXA_BOARD_CP204J:
 836        case MOXA_BOARD_C218_ISA:
 837        case MOXA_BOARD_C218_PCI:
 838                key = C218_key;
 839                loadbuf = C218_LoadBuf;
 840                loadlen = C218DLoad_len;
 841                checksum = C218check_sum;
 842                checksum_ok = C218chksum_ok;
 843                break;
 844        default:
 845                key = C320_key;
 846                keycode = C320_KeyCode;
 847                loadbuf = C320_LoadBuf;
 848                loadlen = C320DLoad_len;
 849                checksum = C320check_sum;
 850                checksum_ok = C320chksum_ok;
 851                break;
 852        }
 853
 854        usum = 0;
 855        wlen = len >> 1;
 856        for (i = 0; i < wlen; i++)
 857                usum += le16_to_cpu(uptr[i]);
 858        retry = 0;
 859        do {
 860                wlen = len >> 1;
 861                j = 0;
 862                while (wlen) {
 863                        len2 = (wlen > 2048) ? 2048 : wlen;
 864                        wlen -= len2;
 865                        memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
 866                        j += len2 << 1;
 867
 868                        writew(len2, baseAddr + loadlen);
 869                        writew(0, baseAddr + key);
 870                        for (i = 0; i < 100; i++) {
 871                                if (readw(baseAddr + key) == keycode)
 872                                        break;
 873                                msleep(10);
 874                        }
 875                        if (readw(baseAddr + key) != keycode)
 876                                return -EIO;
 877                }
 878                writew(0, baseAddr + loadlen);
 879                writew(usum, baseAddr + checksum);
 880                writew(0, baseAddr + key);
 881                for (i = 0; i < 100; i++) {
 882                        if (readw(baseAddr + key) == keycode)
 883                                break;
 884                        msleep(10);
 885                }
 886                retry++;
 887        } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
 888        if (readb(baseAddr + checksum_ok) != 1)
 889                return -EIO;
 890
 891        writew(0, baseAddr + key);
 892        for (i = 0; i < 600; i++) {
 893                if (readw(baseAddr + Magic_no) == Magic_code)
 894                        break;
 895                msleep(10);
 896        }
 897        if (readw(baseAddr + Magic_no) != Magic_code)
 898                return -EIO;
 899
 900        if (MOXA_IS_320(brd)) {
 901                if (brd->busType == MOXA_BUS_TYPE_PCI) {        /* ASIC board */
 902                        writew(0x3800, baseAddr + TMS320_PORT1);
 903                        writew(0x3900, baseAddr + TMS320_PORT2);
 904                        writew(28499, baseAddr + TMS320_CLOCK);
 905                } else {
 906                        writew(0x3200, baseAddr + TMS320_PORT1);
 907                        writew(0x3400, baseAddr + TMS320_PORT2);
 908                        writew(19999, baseAddr + TMS320_CLOCK);
 909                }
 910        }
 911        writew(1, baseAddr + Disable_IRQ);
 912        writew(0, baseAddr + Magic_no);
 913        for (i = 0; i < 500; i++) {
 914                if (readw(baseAddr + Magic_no) == Magic_code)
 915                        break;
 916                msleep(10);
 917        }
 918        if (readw(baseAddr + Magic_no) != Magic_code)
 919                return -EIO;
 920
 921        if (MOXA_IS_320(brd)) {
 922                j = readw(baseAddr + Module_cnt);
 923                if (j <= 0)
 924                        return -EIO;
 925                brd->numPorts = j * 8;
 926                writew(j, baseAddr + Module_no);
 927                writew(0, baseAddr + Magic_no);
 928                for (i = 0; i < 600; i++) {
 929                        if (readw(baseAddr + Magic_no) == Magic_code)
 930                                break;
 931                        msleep(10);
 932                }
 933                if (readw(baseAddr + Magic_no) != Magic_code)
 934                        return -EIO;
 935        }
 936        brd->intNdx = baseAddr + IRQindex;
 937        brd->intPend = baseAddr + IRQpending;
 938        brd->intTable = baseAddr + IRQtable;
 939
 940        return 0;
 941}
 942
 943static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
 944                size_t len)
 945{
 946        void __iomem *ofsAddr, *baseAddr = brd->basemem;
 947        struct moxa_port *port;
 948        int retval, i;
 949
 950        if (len % 2) {
 951                printk(KERN_ERR "MOXA: bios length is not even\n");
 952                return -EINVAL;
 953        }
 954
 955        retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
 956        if (retval)
 957                return retval;
 958
 959        switch (brd->boardType) {
 960        case MOXA_BOARD_C218_ISA:
 961        case MOXA_BOARD_C218_PCI:
 962        case MOXA_BOARD_CP204J:
 963                port = brd->ports;
 964                for (i = 0; i < brd->numPorts; i++, port++) {
 965                        port->board = brd;
 966                        port->DCDState = 0;
 967                        port->tableAddr = baseAddr + Extern_table +
 968                                        Extern_size * i;
 969                        ofsAddr = port->tableAddr;
 970                        writew(C218rx_mask, ofsAddr + RX_mask);
 971                        writew(C218tx_mask, ofsAddr + TX_mask);
 972                        writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
 973                        writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
 974
 975                        writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
 976                        writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
 977
 978                }
 979                break;
 980        default:
 981                port = brd->ports;
 982                for (i = 0; i < brd->numPorts; i++, port++) {
 983                        port->board = brd;
 984                        port->DCDState = 0;
 985                        port->tableAddr = baseAddr + Extern_table +
 986                                        Extern_size * i;
 987                        ofsAddr = port->tableAddr;
 988                        switch (brd->numPorts) {
 989                        case 8:
 990                                writew(C320p8rx_mask, ofsAddr + RX_mask);
 991                                writew(C320p8tx_mask, ofsAddr + TX_mask);
 992                                writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
 993                                writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
 994                                writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
 995                                writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
 996
 997                                break;
 998                        case 16:
 999                                writew(C320p16rx_mask, ofsAddr + RX_mask);
1000                                writew(C320p16tx_mask, ofsAddr + TX_mask);
1001                                writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
1002                                writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
1003                                writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
1004                                writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
1005                                break;
1006
1007                        case 24:
1008                                writew(C320p24rx_mask, ofsAddr + RX_mask);
1009                                writew(C320p24tx_mask, ofsAddr + TX_mask);
1010                                writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
1011                                writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
1012                                writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
1013                                writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
1014                                break;
1015                        case 32:
1016                                writew(C320p32rx_mask, ofsAddr + RX_mask);
1017                                writew(C320p32tx_mask, ofsAddr + TX_mask);
1018                                writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
1019                                writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
1020                                writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
1021                                writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
1022                                writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
1023                                break;
1024                        }
1025                }
1026                break;
1027        }
1028        return 0;
1029}
1030
1031static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
1032{
1033        const void *ptr = fw->data;
1034        char rsn[64];
1035        u16 lens[5];
1036        size_t len;
1037        unsigned int a, lenp, lencnt;
1038        int ret = -EINVAL;
1039        struct {
1040                __le32 magic;   /* 0x34303430 */
1041                u8 reserved1[2];
1042                u8 type;        /* UNIX = 3 */
1043                u8 model;       /* C218T=1, C320T=2, CP204=3 */
1044                u8 reserved2[8];
1045                __le16 len[5];
1046        } const *hdr = ptr;
1047
1048        BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
1049
1050        if (fw->size < MOXA_FW_HDRLEN) {
1051                strcpy(rsn, "too short (even header won't fit)");
1052                goto err;
1053        }
1054        if (hdr->magic != cpu_to_le32(0x30343034)) {
1055                sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
1056                goto err;
1057        }
1058        if (hdr->type != 3) {
1059                sprintf(rsn, "not for linux, type is %u", hdr->type);
1060                goto err;
1061        }
1062        if (moxa_check_fw_model(brd, hdr->model)) {
1063                sprintf(rsn, "not for this card, model is %u", hdr->model);
1064                goto err;
1065        }
1066
1067        len = MOXA_FW_HDRLEN;
1068        lencnt = hdr->model == 2 ? 5 : 3;
1069        for (a = 0; a < ARRAY_SIZE(lens); a++) {
1070                lens[a] = le16_to_cpu(hdr->len[a]);
1071                if (lens[a] && len + lens[a] <= fw->size &&
1072                                moxa_check_fw(&fw->data[len]))
1073                        printk(KERN_WARNING "MOXA firmware: unexpected input "
1074                                "at offset %u, but going on\n", (u32)len);
1075                if (!lens[a] && a < lencnt) {
1076                        sprintf(rsn, "too few entries in fw file");
1077                        goto err;
1078                }
1079                len += lens[a];
1080        }
1081
1082        if (len != fw->size) {
1083                sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
1084                                (u32)len);
1085                goto err;
1086        }
1087
1088        ptr += MOXA_FW_HDRLEN;
1089        lenp = 0; /* bios */
1090
1091        strcpy(rsn, "read above");
1092
1093        ret = moxa_load_bios(brd, ptr, lens[lenp]);
1094        if (ret)
1095                goto err;
1096
1097        /* we skip the tty section (lens[1]), since we don't need it */
1098        ptr += lens[lenp] + lens[lenp + 1];
1099        lenp += 2; /* comm */
1100
1101        if (hdr->model == 2) {
1102                ret = moxa_load_320b(brd, ptr, lens[lenp]);
1103                if (ret)
1104                        goto err;
1105                /* skip another tty */
1106                ptr += lens[lenp] + lens[lenp + 1];
1107                lenp += 2;
1108        }
1109
1110        ret = moxa_load_code(brd, ptr, lens[lenp]);
1111        if (ret)
1112                goto err;
1113
1114        return 0;
1115err:
1116        printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
1117        return ret;
1118}
1119
1120static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
1121{
1122        const struct firmware *fw;
1123        const char *file;
1124        struct moxa_port *p;
1125        unsigned int i, first_idx;
1126        int ret;
1127
1128        brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
1129                        GFP_KERNEL);
1130        if (brd->ports == NULL) {
1131                printk(KERN_ERR "cannot allocate memory for ports\n");
1132                ret = -ENOMEM;
1133                goto err;
1134        }
1135
1136        for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
1137                tty_port_init(&p->port);
1138                p->port.ops = &moxa_port_ops;
1139                p->type = PORT_16550A;
1140                p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1141        }
1142
1143        switch (brd->boardType) {
1144        case MOXA_BOARD_C218_ISA:
1145        case MOXA_BOARD_C218_PCI:
1146                file = "c218tunx.cod";
1147                break;
1148        case MOXA_BOARD_CP204J:
1149                file = "cp204unx.cod";
1150                break;
1151        default:
1152                file = "c320tunx.cod";
1153                break;
1154        }
1155
1156        ret = request_firmware(&fw, file, dev);
1157        if (ret) {
1158                printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
1159                                "you've placed '%s' file into your firmware "
1160                                "loader directory (e.g. /lib/firmware)\n",
1161                                file);
1162                goto err_free;
1163        }
1164
1165        ret = moxa_load_fw(brd, fw);
1166
1167        release_firmware(fw);
1168
1169        if (ret)
1170                goto err_free;
1171
1172        spin_lock_bh(&moxa_lock);
1173        brd->ready = 1;
1174        if (!timer_pending(&moxaTimer))
1175                mod_timer(&moxaTimer, jiffies + HZ / 50);
1176        spin_unlock_bh(&moxa_lock);
1177
1178        first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1179        for (i = 0; i < brd->numPorts; i++)
1180                tty_port_register_device(&brd->ports[i].port, moxaDriver,
1181                                first_idx + i, dev);
1182
1183        return 0;
1184err_free:
1185        for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
1186                tty_port_destroy(&brd->ports[i].port);
1187        kfree(brd->ports);
1188err:
1189        return ret;
1190}
1191
1192static void moxa_board_deinit(struct moxa_board_conf *brd)
1193{
1194        unsigned int a, opened, first_idx;
1195
1196        mutex_lock(&moxa_openlock);
1197        spin_lock_bh(&moxa_lock);
1198        brd->ready = 0;
1199        spin_unlock_bh(&moxa_lock);
1200
1201        /* pci hot-un-plug support */
1202        for (a = 0; a < brd->numPorts; a++)
1203                if (tty_port_initialized(&brd->ports[a].port))
1204                        tty_port_tty_hangup(&brd->ports[a].port, false);
1205
1206        for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
1207                tty_port_destroy(&brd->ports[a].port);
1208
1209        while (1) {
1210                opened = 0;
1211                for (a = 0; a < brd->numPorts; a++)
1212                        if (tty_port_initialized(&brd->ports[a].port))
1213                                opened++;
1214                mutex_unlock(&moxa_openlock);
1215                if (!opened)
1216                        break;
1217                msleep(50);
1218                mutex_lock(&moxa_openlock);
1219        }
1220
1221        first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1222        for (a = 0; a < brd->numPorts; a++)
1223                tty_unregister_device(moxaDriver, first_idx + a);
1224
1225        iounmap(brd->basemem);
1226        brd->basemem = NULL;
1227        kfree(brd->ports);
1228}
1229
1230#ifdef CONFIG_PCI
1231static int moxa_pci_probe(struct pci_dev *pdev,
1232                const struct pci_device_id *ent)
1233{
1234        struct moxa_board_conf *board;
1235        unsigned int i;
1236        int board_type = ent->driver_data;
1237        int retval;
1238
1239        retval = pci_enable_device(pdev);
1240        if (retval) {
1241                dev_err(&pdev->dev, "can't enable pci device\n");
1242                goto err;
1243        }
1244
1245        for (i = 0; i < MAX_BOARDS; i++)
1246                if (moxa_boards[i].basemem == NULL)
1247                        break;
1248
1249        retval = -ENODEV;
1250        if (i >= MAX_BOARDS) {
1251                dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
1252                                "found. Board is ignored.\n", MAX_BOARDS);
1253                goto err;
1254        }
1255
1256        board = &moxa_boards[i];
1257
1258        retval = pci_request_region(pdev, 2, "moxa-base");
1259        if (retval) {
1260                dev_err(&pdev->dev, "can't request pci region 2\n");
1261                goto err;
1262        }
1263
1264        board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
1265        if (board->basemem == NULL) {
1266                dev_err(&pdev->dev, "can't remap io space 2\n");
1267                retval = -ENOMEM;
1268                goto err_reg;
1269        }
1270
1271        board->boardType = board_type;
1272        switch (board_type) {
1273        case MOXA_BOARD_C218_ISA:
1274        case MOXA_BOARD_C218_PCI:
1275                board->numPorts = 8;
1276                break;
1277
1278        case MOXA_BOARD_CP204J:
1279                board->numPorts = 4;
1280                break;
1281        default:
1282                board->numPorts = 0;
1283                break;
1284        }
1285        board->busType = MOXA_BUS_TYPE_PCI;
1286
1287        retval = moxa_init_board(board, &pdev->dev);
1288        if (retval)
1289                goto err_base;
1290
1291        pci_set_drvdata(pdev, board);
1292
1293        dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1294                        moxa_brdname[board_type - 1], board->numPorts);
1295
1296        return 0;
1297err_base:
1298        iounmap(board->basemem);
1299        board->basemem = NULL;
1300err_reg:
1301        pci_release_region(pdev, 2);
1302err:
1303        return retval;
1304}
1305
1306static void moxa_pci_remove(struct pci_dev *pdev)
1307{
1308        struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1309
1310        moxa_board_deinit(brd);
1311
1312        pci_release_region(pdev, 2);
1313}
1314
1315static struct pci_driver moxa_pci_driver = {
1316        .name = "moxa",
1317        .id_table = moxa_pcibrds,
1318        .probe = moxa_pci_probe,
1319        .remove = moxa_pci_remove
1320};
1321#endif /* CONFIG_PCI */
1322
1323static int __init moxa_init(void)
1324{
1325        unsigned int isabrds = 0;
1326        int retval = 0;
1327        struct moxa_board_conf *brd = moxa_boards;
1328        unsigned int i;
1329
1330        printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1331                        MOXA_VERSION);
1332
1333        tty_port_init(&moxa_service_port);
1334
1335        moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1336                        TTY_DRIVER_REAL_RAW |
1337                        TTY_DRIVER_DYNAMIC_DEV);
1338        if (IS_ERR(moxaDriver))
1339                return PTR_ERR(moxaDriver);
1340
1341        moxaDriver->name = "ttyMX";
1342        moxaDriver->major = ttymajor;
1343        moxaDriver->minor_start = 0;
1344        moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1345        moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1346        moxaDriver->init_termios = tty_std_termios;
1347        moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1348        moxaDriver->init_termios.c_ispeed = 9600;
1349        moxaDriver->init_termios.c_ospeed = 9600;
1350        tty_set_operations(moxaDriver, &moxa_ops);
1351        /* Having one more port only for ioctls is ugly */
1352        tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1353
1354        if (tty_register_driver(moxaDriver)) {
1355                printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1356                tty_driver_kref_put(moxaDriver);
1357                return -1;
1358        }
1359
1360        /* Find the boards defined from module args. */
1361
1362        for (i = 0; i < MAX_BOARDS; i++) {
1363                if (!baseaddr[i])
1364                        break;
1365                if (type[i] == MOXA_BOARD_C218_ISA ||
1366                                type[i] == MOXA_BOARD_C320_ISA) {
1367                        pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1368                                        isabrds + 1, moxa_brdname[type[i] - 1],
1369                                        baseaddr[i]);
1370                        brd->boardType = type[i];
1371                        brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1372                                        numports[i];
1373                        brd->busType = MOXA_BUS_TYPE_ISA;
1374                        brd->basemem = ioremap(baseaddr[i], 0x4000);
1375                        if (!brd->basemem) {
1376                                printk(KERN_ERR "MOXA: can't remap %lx\n",
1377                                                baseaddr[i]);
1378                                continue;
1379                        }
1380                        if (moxa_init_board(brd, NULL)) {
1381                                iounmap(brd->basemem);
1382                                brd->basemem = NULL;
1383                                continue;
1384                        }
1385
1386                        printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1387                                        "ready (%u ports, firmware loaded)\n",
1388                                        baseaddr[i], brd->numPorts);
1389
1390                        brd++;
1391                        isabrds++;
1392                }
1393        }
1394
1395#ifdef CONFIG_PCI
1396        retval = pci_register_driver(&moxa_pci_driver);
1397        if (retval) {
1398                printk(KERN_ERR "Can't register MOXA pci driver!\n");
1399                if (isabrds)
1400                        retval = 0;
1401        }
1402#endif
1403
1404        return retval;
1405}
1406
1407static void __exit moxa_exit(void)
1408{
1409        unsigned int i;
1410
1411#ifdef CONFIG_PCI
1412        pci_unregister_driver(&moxa_pci_driver);
1413#endif
1414
1415        for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1416                if (moxa_boards[i].ready)
1417                        moxa_board_deinit(&moxa_boards[i]);
1418
1419        del_timer_sync(&moxaTimer);
1420
1421        tty_unregister_driver(moxaDriver);
1422        tty_driver_kref_put(moxaDriver);
1423}
1424
1425module_init(moxa_init);
1426module_exit(moxa_exit);
1427
1428static void moxa_shutdown(struct tty_port *port)
1429{
1430        struct moxa_port *ch = container_of(port, struct moxa_port, port);
1431        MoxaPortDisable(ch);
1432        MoxaPortFlushData(ch, 2);
1433}
1434
1435static int moxa_carrier_raised(struct tty_port *port)
1436{
1437        struct moxa_port *ch = container_of(port, struct moxa_port, port);
1438        int dcd;
1439
1440        spin_lock_irq(&port->lock);
1441        dcd = ch->DCDState;
1442        spin_unlock_irq(&port->lock);
1443        return dcd;
1444}
1445
1446static void moxa_dtr_rts(struct tty_port *port, int onoff)
1447{
1448        struct moxa_port *ch = container_of(port, struct moxa_port, port);
1449        MoxaPortLineCtrl(ch, onoff, onoff);
1450}
1451
1452
1453static int moxa_open(struct tty_struct *tty, struct file *filp)
1454{
1455        struct moxa_board_conf *brd;
1456        struct moxa_port *ch;
1457        int port;
1458
1459        port = tty->index;
1460        if (port == MAX_PORTS) {
1461                return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1462        }
1463        if (mutex_lock_interruptible(&moxa_openlock))
1464                return -ERESTARTSYS;
1465        brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1466        if (!brd->ready) {
1467                mutex_unlock(&moxa_openlock);
1468                return -ENODEV;
1469        }
1470
1471        if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1472                mutex_unlock(&moxa_openlock);
1473                return -ENODEV;
1474        }
1475
1476        ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1477        ch->port.count++;
1478        tty->driver_data = ch;
1479        tty_port_tty_set(&ch->port, tty);
1480        mutex_lock(&ch->port.mutex);
1481        if (!tty_port_initialized(&ch->port)) {
1482                ch->statusflags = 0;
1483                moxa_set_tty_param(tty, &tty->termios);
1484                MoxaPortLineCtrl(ch, 1, 1);
1485                MoxaPortEnable(ch);
1486                MoxaSetFifo(ch, ch->type == PORT_16550A);
1487                tty_port_set_initialized(&ch->port, 1);
1488        }
1489        mutex_unlock(&ch->port.mutex);
1490        mutex_unlock(&moxa_openlock);
1491
1492        return tty_port_block_til_ready(&ch->port, tty, filp);
1493}
1494
1495static void moxa_close(struct tty_struct *tty, struct file *filp)
1496{
1497        struct moxa_port *ch = tty->driver_data;
1498        ch->cflag = tty->termios.c_cflag;
1499        tty_port_close(&ch->port, tty, filp);
1500}
1501
1502static int moxa_write(struct tty_struct *tty,
1503                      const unsigned char *buf, int count)
1504{
1505        struct moxa_port *ch = tty->driver_data;
1506        unsigned long flags;
1507        int len;
1508
1509        if (ch == NULL)
1510                return 0;
1511
1512        spin_lock_irqsave(&moxa_lock, flags);
1513        len = MoxaPortWriteData(tty, buf, count);
1514        spin_unlock_irqrestore(&moxa_lock, flags);
1515
1516        set_bit(LOWWAIT, &ch->statusflags);
1517        return len;
1518}
1519
1520static unsigned int moxa_write_room(struct tty_struct *tty)
1521{
1522        struct moxa_port *ch;
1523
1524        if (tty->flow.stopped)
1525                return 0;
1526        ch = tty->driver_data;
1527        if (ch == NULL)
1528                return 0;
1529        return MoxaPortTxFree(ch);
1530}
1531
1532static void moxa_flush_buffer(struct tty_struct *tty)
1533{
1534        struct moxa_port *ch = tty->driver_data;
1535
1536        if (ch == NULL)
1537                return;
1538        MoxaPortFlushData(ch, 1);
1539        tty_wakeup(tty);
1540}
1541
1542static unsigned int moxa_chars_in_buffer(struct tty_struct *tty)
1543{
1544        struct moxa_port *ch = tty->driver_data;
1545        unsigned int chars;
1546
1547        chars = MoxaPortTxQueue(ch);
1548        if (chars)
1549                /*
1550                 * Make it possible to wakeup anything waiting for output
1551                 * in tty_ioctl.c, etc.
1552                 */
1553                set_bit(EMPTYWAIT, &ch->statusflags);
1554        return chars;
1555}
1556
1557static int moxa_tiocmget(struct tty_struct *tty)
1558{
1559        struct moxa_port *ch = tty->driver_data;
1560        int flag = 0, dtr, rts;
1561
1562        MoxaPortGetLineOut(ch, &dtr, &rts);
1563        if (dtr)
1564                flag |= TIOCM_DTR;
1565        if (rts)
1566                flag |= TIOCM_RTS;
1567        dtr = MoxaPortLineStatus(ch);
1568        if (dtr & 1)
1569                flag |= TIOCM_CTS;
1570        if (dtr & 2)
1571                flag |= TIOCM_DSR;
1572        if (dtr & 4)
1573                flag |= TIOCM_CD;
1574        return flag;
1575}
1576
1577static int moxa_tiocmset(struct tty_struct *tty,
1578                         unsigned int set, unsigned int clear)
1579{
1580        struct moxa_port *ch;
1581        int dtr, rts;
1582
1583        mutex_lock(&moxa_openlock);
1584        ch = tty->driver_data;
1585        if (!ch) {
1586                mutex_unlock(&moxa_openlock);
1587                return -EINVAL;
1588        }
1589
1590        MoxaPortGetLineOut(ch, &dtr, &rts);
1591        if (set & TIOCM_RTS)
1592                rts = 1;
1593        if (set & TIOCM_DTR)
1594                dtr = 1;
1595        if (clear & TIOCM_RTS)
1596                rts = 0;
1597        if (clear & TIOCM_DTR)
1598                dtr = 0;
1599        MoxaPortLineCtrl(ch, dtr, rts);
1600        mutex_unlock(&moxa_openlock);
1601        return 0;
1602}
1603
1604static void moxa_set_termios(struct tty_struct *tty,
1605                struct ktermios *old_termios)
1606{
1607        struct moxa_port *ch = tty->driver_data;
1608
1609        if (ch == NULL)
1610                return;
1611        moxa_set_tty_param(tty, old_termios);
1612        if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1613                wake_up_interruptible(&ch->port.open_wait);
1614}
1615
1616static void moxa_stop(struct tty_struct *tty)
1617{
1618        struct moxa_port *ch = tty->driver_data;
1619
1620        if (ch == NULL)
1621                return;
1622        MoxaPortTxDisable(ch);
1623        set_bit(TXSTOPPED, &ch->statusflags);
1624}
1625
1626
1627static void moxa_start(struct tty_struct *tty)
1628{
1629        struct moxa_port *ch = tty->driver_data;
1630
1631        if (ch == NULL)
1632                return;
1633
1634        if (!test_bit(TXSTOPPED, &ch->statusflags))
1635                return;
1636
1637        MoxaPortTxEnable(ch);
1638        clear_bit(TXSTOPPED, &ch->statusflags);
1639}
1640
1641static void moxa_hangup(struct tty_struct *tty)
1642{
1643        struct moxa_port *ch = tty->driver_data;
1644        tty_port_hangup(&ch->port);
1645}
1646
1647static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1648{
1649        unsigned long flags;
1650        dcd = !!dcd;
1651
1652        spin_lock_irqsave(&p->port.lock, flags);
1653        if (dcd != p->DCDState) {
1654                p->DCDState = dcd;
1655                spin_unlock_irqrestore(&p->port.lock, flags);
1656                if (!dcd)
1657                        tty_port_tty_hangup(&p->port, true);
1658        }
1659        else
1660                spin_unlock_irqrestore(&p->port.lock, flags);
1661}
1662
1663static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1664                u16 __iomem *ip)
1665{
1666        struct tty_struct *tty = tty_port_tty_get(&p->port);
1667        void __iomem *ofsAddr;
1668        unsigned int inited = tty_port_initialized(&p->port);
1669        u16 intr;
1670
1671        if (tty) {
1672                if (test_bit(EMPTYWAIT, &p->statusflags) &&
1673                                MoxaPortTxQueue(p) == 0) {
1674                        clear_bit(EMPTYWAIT, &p->statusflags);
1675                        tty_wakeup(tty);
1676                }
1677                if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped &&
1678                                MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1679                        clear_bit(LOWWAIT, &p->statusflags);
1680                        tty_wakeup(tty);
1681                }
1682
1683                if (inited && !tty_throttled(tty) &&
1684                                MoxaPortRxQueue(p) > 0) { /* RX */
1685                        MoxaPortReadData(p);
1686                        tty_flip_buffer_push(&p->port);
1687                }
1688        } else {
1689                clear_bit(EMPTYWAIT, &p->statusflags);
1690                MoxaPortFlushData(p, 0); /* flush RX */
1691        }
1692
1693        if (!handle) /* nothing else to do */
1694                goto put;
1695
1696        intr = readw(ip); /* port irq status */
1697        if (intr == 0)
1698                goto put;
1699
1700        writew(0, ip); /* ACK port */
1701        ofsAddr = p->tableAddr;
1702        if (intr & IntrTx) /* disable tx intr */
1703                writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1704                                ofsAddr + HostStat);
1705
1706        if (!inited)
1707                goto put;
1708
1709        if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1710                tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1711                tty_flip_buffer_push(&p->port);
1712        }
1713
1714        if (intr & IntrLine)
1715                moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1716put:
1717        tty_kref_put(tty);
1718
1719        return 0;
1720}
1721
1722static void moxa_poll(struct timer_list *unused)
1723{
1724        struct moxa_board_conf *brd;
1725        u16 __iomem *ip;
1726        unsigned int card, port, served = 0;
1727
1728        spin_lock(&moxa_lock);
1729        for (card = 0; card < MAX_BOARDS; card++) {
1730                brd = &moxa_boards[card];
1731                if (!brd->ready)
1732                        continue;
1733
1734                served++;
1735
1736                ip = NULL;
1737                if (readb(brd->intPend) == 0xff)
1738                        ip = brd->intTable + readb(brd->intNdx);
1739
1740                for (port = 0; port < brd->numPorts; port++)
1741                        moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1742
1743                if (ip)
1744                        writeb(0, brd->intPend); /* ACK */
1745
1746                if (moxaLowWaterChk) {
1747                        struct moxa_port *p = brd->ports;
1748                        for (port = 0; port < brd->numPorts; port++, p++)
1749                                if (p->lowChkFlag) {
1750                                        p->lowChkFlag = 0;
1751                                        moxa_low_water_check(p->tableAddr);
1752                                }
1753                }
1754        }
1755        moxaLowWaterChk = 0;
1756
1757        if (served)
1758                mod_timer(&moxaTimer, jiffies + HZ / 50);
1759        spin_unlock(&moxa_lock);
1760}
1761
1762/******************************************************************************/
1763
1764static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1765{
1766        register struct ktermios *ts = &tty->termios;
1767        struct moxa_port *ch = tty->driver_data;
1768        int rts, cts, txflow, rxflow, xany, baud;
1769
1770        rts = cts = txflow = rxflow = xany = 0;
1771        if (ts->c_cflag & CRTSCTS)
1772                rts = cts = 1;
1773        if (ts->c_iflag & IXON)
1774                txflow = 1;
1775        if (ts->c_iflag & IXOFF)
1776                rxflow = 1;
1777        if (ts->c_iflag & IXANY)
1778                xany = 1;
1779
1780        MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1781        baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1782        if (baud == -1)
1783                baud = tty_termios_baud_rate(old_termios);
1784        /* Not put the baud rate into the termios data */
1785        tty_encode_baud_rate(tty, baud, baud);
1786}
1787
1788/*****************************************************************************
1789 *      Driver level functions:                                              *
1790 *****************************************************************************/
1791
1792static void MoxaPortFlushData(struct moxa_port *port, int mode)
1793{
1794        void __iomem *ofsAddr;
1795        if (mode < 0 || mode > 2)
1796                return;
1797        ofsAddr = port->tableAddr;
1798        moxafunc(ofsAddr, FC_FlushQueue, mode);
1799        if (mode != 1) {
1800                port->lowChkFlag = 0;
1801                moxa_low_water_check(ofsAddr);
1802        }
1803}
1804
1805/*
1806 *    Moxa Port Number Description:
1807 *
1808 *      MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1809 *      the port number using in MOXA driver functions will be 0 to 31 for
1810 *      first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1811 *      to 127 for fourth. For example, if you setup three MOXA boards,
1812 *      first board is C218, second board is C320-16 and third board is
1813 *      C320-32. The port number of first board (C218 - 8 ports) is from
1814 *      0 to 7. The port number of second board (C320 - 16 ports) is form
1815 *      32 to 47. The port number of third board (C320 - 32 ports) is from
1816 *      64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1817 *      127 will be invalid.
1818 *
1819 *
1820 *      Moxa Functions Description:
1821 *
1822 *      Function 1:     Driver initialization routine, this routine must be
1823 *                      called when initialized driver.
1824 *      Syntax:
1825 *      void MoxaDriverInit();
1826 *
1827 *
1828 *      Function 2:     Moxa driver private IOCTL command processing.
1829 *      Syntax:
1830 *      int  MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1831 *
1832 *           unsigned int cmd   : IOCTL command
1833 *           unsigned long arg  : IOCTL argument
1834 *           int port           : port number (0 - 127)
1835 *
1836 *           return:    0  (OK)
1837 *                      -EINVAL
1838 *                      -ENOIOCTLCMD
1839 *
1840 *
1841 *      Function 6:     Enable this port to start Tx/Rx data.
1842 *      Syntax:
1843 *      void MoxaPortEnable(int port);
1844 *           int port           : port number (0 - 127)
1845 *
1846 *
1847 *      Function 7:     Disable this port
1848 *      Syntax:
1849 *      void MoxaPortDisable(int port);
1850 *           int port           : port number (0 - 127)
1851 *
1852 *
1853 *      Function 10:    Setting baud rate of this port.
1854 *      Syntax:
1855 *      speed_t MoxaPortSetBaud(int port, speed_t baud);
1856 *           int port           : port number (0 - 127)
1857 *           long baud          : baud rate (50 - 115200)
1858 *
1859 *           return:    0       : this port is invalid or baud < 50
1860 *                      50 - 115200 : the real baud rate set to the port, if
1861 *                                    the argument baud is large than maximun
1862 *                                    available baud rate, the real setting
1863 *                                    baud rate will be the maximun baud rate.
1864 *
1865 *
1866 *      Function 12:    Configure the port.
1867 *      Syntax:
1868 *      int  MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1869 *           int port           : port number (0 - 127)
1870 *           struct ktermios * termio : termio structure pointer
1871 *           speed_t baud       : baud rate
1872 *
1873 *           return:    -1      : this port is invalid or termio == NULL
1874 *                      0       : setting O.K.
1875 *
1876 *
1877 *      Function 13:    Get the DTR/RTS state of this port.
1878 *      Syntax:
1879 *      int  MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1880 *           int port           : port number (0 - 127)
1881 *           int * dtrState     : pointer to INT to receive the current DTR
1882 *                                state. (if NULL, this function will not
1883 *                                write to this address)
1884 *           int * rtsState     : pointer to INT to receive the current RTS
1885 *                                state. (if NULL, this function will not
1886 *                                write to this address)
1887 *
1888 *           return:    -1      : this port is invalid
1889 *                      0       : O.K.
1890 *
1891 *
1892 *      Function 14:    Setting the DTR/RTS output state of this port.
1893 *      Syntax:
1894 *      void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1895 *           int port           : port number (0 - 127)
1896 *           int dtrState       : DTR output state (0: off, 1: on)
1897 *           int rtsState       : RTS output state (0: off, 1: on)
1898 *
1899 *
1900 *      Function 15:    Setting the flow control of this port.
1901 *      Syntax:
1902 *      void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1903 *                            int txFlow,int xany);
1904 *           int port           : port number (0 - 127)
1905 *           int rtsFlow        : H/W RTS flow control (0: no, 1: yes)
1906 *           int ctsFlow        : H/W CTS flow control (0: no, 1: yes)
1907 *           int rxFlow         : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1908 *           int txFlow         : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1909 *           int xany           : S/W XANY flow control (0: no, 1: yes)
1910 *
1911 *
1912 *      Function 16:    Get ths line status of this port
1913 *      Syntax:
1914 *      int  MoxaPortLineStatus(int port);
1915 *           int port           : port number (0 - 127)
1916 *
1917 *           return:    Bit 0 - CTS state (0: off, 1: on)
1918 *                      Bit 1 - DSR state (0: off, 1: on)
1919 *                      Bit 2 - DCD state (0: off, 1: on)
1920 *
1921 *
1922 *      Function 19:    Flush the Rx/Tx buffer data of this port.
1923 *      Syntax:
1924 *      void MoxaPortFlushData(int port, int mode);
1925 *           int port           : port number (0 - 127)
1926 *           int mode    
1927 *                      0       : flush the Rx buffer 
1928 *                      1       : flush the Tx buffer 
1929 *                      2       : flush the Rx and Tx buffer 
1930 *
1931 *
1932 *      Function 20:    Write data.
1933 *      Syntax:
1934 *      int  MoxaPortWriteData(int port, unsigned char * buffer, int length);
1935 *           int port           : port number (0 - 127)
1936 *           unsigned char * buffer     : pointer to write data buffer.
1937 *           int length         : write data length
1938 *
1939 *           return:    0 - length      : real write data length
1940 *
1941 *
1942 *      Function 21:    Read data.
1943 *      Syntax:
1944 *      int  MoxaPortReadData(int port, struct tty_struct *tty);
1945 *           int port           : port number (0 - 127)
1946 *           struct tty_struct *tty : tty for data
1947 *
1948 *           return:    0 - length      : real read data length
1949 *
1950 *
1951 *      Function 24:    Get the Tx buffer current queued data bytes
1952 *      Syntax:
1953 *      int  MoxaPortTxQueue(int port);
1954 *           int port           : port number (0 - 127)
1955 *
1956 *           return:    ..      : Tx buffer current queued data bytes
1957 *
1958 *
1959 *      Function 25:    Get the Tx buffer current free space
1960 *      Syntax:
1961 *      int  MoxaPortTxFree(int port);
1962 *           int port           : port number (0 - 127)
1963 *
1964 *           return:    ..      : Tx buffer current free space
1965 *
1966 *
1967 *      Function 26:    Get the Rx buffer current queued data bytes
1968 *      Syntax:
1969 *      int  MoxaPortRxQueue(int port);
1970 *           int port           : port number (0 - 127)
1971 *
1972 *           return:    ..      : Rx buffer current queued data bytes
1973 *
1974 *
1975 *      Function 28:    Disable port data transmission.
1976 *      Syntax:
1977 *      void MoxaPortTxDisable(int port);
1978 *           int port           : port number (0 - 127)
1979 *
1980 *
1981 *      Function 29:    Enable port data transmission.
1982 *      Syntax:
1983 *      void MoxaPortTxEnable(int port);
1984 *           int port           : port number (0 - 127)
1985 *
1986 *
1987 *      Function 31:    Get the received BREAK signal count and reset it.
1988 *      Syntax:
1989 *      int  MoxaPortResetBrkCnt(int port);
1990 *           int port           : port number (0 - 127)
1991 *
1992 *           return:    0 - ..  : BREAK signal count
1993 *
1994 *
1995 */
1996
1997static void MoxaPortEnable(struct moxa_port *port)
1998{
1999        void __iomem *ofsAddr;
2000        u16 lowwater = 512;
2001
2002        ofsAddr = port->tableAddr;
2003        writew(lowwater, ofsAddr + Low_water);
2004        if (MOXA_IS_320(port->board))
2005                moxafunc(ofsAddr, FC_SetBreakIrq, 0);
2006        else
2007                writew(readw(ofsAddr + HostStat) | WakeupBreak,
2008                                ofsAddr + HostStat);
2009
2010        moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
2011        moxafunc(ofsAddr, FC_FlushQueue, 2);
2012
2013        moxafunc(ofsAddr, FC_EnableCH, Magic_code);
2014        MoxaPortLineStatus(port);
2015}
2016
2017static void MoxaPortDisable(struct moxa_port *port)
2018{
2019        void __iomem *ofsAddr = port->tableAddr;
2020
2021        moxafunc(ofsAddr, FC_SetFlowCtl, 0);    /* disable flow control */
2022        moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
2023        writew(0, ofsAddr + HostStat);
2024        moxafunc(ofsAddr, FC_DisableCH, Magic_code);
2025}
2026
2027static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
2028{
2029        void __iomem *ofsAddr = port->tableAddr;
2030        unsigned int clock, val;
2031        speed_t max;
2032
2033        max = MOXA_IS_320(port->board) ? 460800 : 921600;
2034        if (baud < 50)
2035                return 0;
2036        if (baud > max)
2037                baud = max;
2038        clock = 921600;
2039        val = clock / baud;
2040        moxafunc(ofsAddr, FC_SetBaud, val);
2041        baud = clock / val;
2042        return baud;
2043}
2044
2045static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
2046                speed_t baud)
2047{
2048        void __iomem *ofsAddr;
2049        tcflag_t mode = 0;
2050
2051        ofsAddr = port->tableAddr;
2052
2053        mode = termio->c_cflag & CSIZE;
2054        if (mode == CS5)
2055                mode = MX_CS5;
2056        else if (mode == CS6)
2057                mode = MX_CS6;
2058        else if (mode == CS7)
2059                mode = MX_CS7;
2060        else if (mode == CS8)
2061                mode = MX_CS8;
2062
2063        if (termio->c_cflag & CSTOPB) {
2064                if (mode == MX_CS5)
2065                        mode |= MX_STOP15;
2066                else
2067                        mode |= MX_STOP2;
2068        } else
2069                mode |= MX_STOP1;
2070
2071        if (termio->c_cflag & PARENB) {
2072                if (termio->c_cflag & PARODD) {
2073                        if (termio->c_cflag & CMSPAR)
2074                                mode |= MX_PARMARK;
2075                        else
2076                                mode |= MX_PARODD;
2077                } else {
2078                        if (termio->c_cflag & CMSPAR)
2079                                mode |= MX_PARSPACE;
2080                        else
2081                                mode |= MX_PAREVEN;
2082                }
2083        } else
2084                mode |= MX_PARNONE;
2085
2086        moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
2087
2088        if (MOXA_IS_320(port->board) && baud >= 921600)
2089                return -1;
2090
2091        baud = MoxaPortSetBaud(port, baud);
2092
2093        if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2094                spin_lock_irq(&moxafunc_lock);
2095                writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
2096                writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
2097                writeb(FC_SetXonXoff, ofsAddr + FuncCode);
2098                moxa_wait_finish(ofsAddr);
2099                spin_unlock_irq(&moxafunc_lock);
2100
2101        }
2102        return baud;
2103}
2104
2105static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
2106                int *rtsState)
2107{
2108        if (dtrState)
2109                *dtrState = !!(port->lineCtrl & DTR_ON);
2110        if (rtsState)
2111                *rtsState = !!(port->lineCtrl & RTS_ON);
2112
2113        return 0;
2114}
2115
2116static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
2117{
2118        u8 mode = 0;
2119
2120        if (dtr)
2121                mode |= DTR_ON;
2122        if (rts)
2123                mode |= RTS_ON;
2124        port->lineCtrl = mode;
2125        moxafunc(port->tableAddr, FC_LineControl, mode);
2126}
2127
2128static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
2129                int txflow, int rxflow, int txany)
2130{
2131        int mode = 0;
2132
2133        if (rts)
2134                mode |= RTS_FlowCtl;
2135        if (cts)
2136                mode |= CTS_FlowCtl;
2137        if (txflow)
2138                mode |= Tx_FlowCtl;
2139        if (rxflow)
2140                mode |= Rx_FlowCtl;
2141        if (txany)
2142                mode |= IXM_IXANY;
2143        moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
2144}
2145
2146static int MoxaPortLineStatus(struct moxa_port *port)
2147{
2148        void __iomem *ofsAddr;
2149        int val;
2150
2151        ofsAddr = port->tableAddr;
2152        if (MOXA_IS_320(port->board))
2153                val = moxafuncret(ofsAddr, FC_LineStatus, 0);
2154        else
2155                val = readw(ofsAddr + FlagStat) >> 4;
2156        val &= 0x0B;
2157        if (val & 8)
2158                val |= 4;
2159        moxa_new_dcdstate(port, val & 8);
2160        val &= 7;
2161        return val;
2162}
2163
2164static int MoxaPortWriteData(struct tty_struct *tty,
2165                const unsigned char *buffer, int len)
2166{
2167        struct moxa_port *port = tty->driver_data;
2168        void __iomem *baseAddr, *ofsAddr, *ofs;
2169        unsigned int c, total;
2170        u16 head, tail, tx_mask, spage, epage;
2171        u16 pageno, pageofs, bufhead;
2172
2173        ofsAddr = port->tableAddr;
2174        baseAddr = port->board->basemem;
2175        tx_mask = readw(ofsAddr + TX_mask);
2176        spage = readw(ofsAddr + Page_txb);
2177        epage = readw(ofsAddr + EndPage_txb);
2178        tail = readw(ofsAddr + TXwptr);
2179        head = readw(ofsAddr + TXrptr);
2180        c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
2181        if (c > len)
2182                c = len;
2183        moxaLog.txcnt[port->port.tty->index] += c;
2184        total = c;
2185        if (spage == epage) {
2186                bufhead = readw(ofsAddr + Ofs_txb);
2187                writew(spage, baseAddr + Control_reg);
2188                while (c > 0) {
2189                        if (head > tail)
2190                                len = head - tail - 1;
2191                        else
2192                                len = tx_mask + 1 - tail;
2193                        len = (c > len) ? len : c;
2194                        ofs = baseAddr + DynPage_addr + bufhead + tail;
2195                        memcpy_toio(ofs, buffer, len);
2196                        buffer += len;
2197                        tail = (tail + len) & tx_mask;
2198                        c -= len;
2199                }
2200        } else {
2201                pageno = spage + (tail >> 13);
2202                pageofs = tail & Page_mask;
2203                while (c > 0) {
2204                        len = Page_size - pageofs;
2205                        if (len > c)
2206                                len = c;
2207                        writeb(pageno, baseAddr + Control_reg);
2208                        ofs = baseAddr + DynPage_addr + pageofs;
2209                        memcpy_toio(ofs, buffer, len);
2210                        buffer += len;
2211                        if (++pageno == epage)
2212                                pageno = spage;
2213                        pageofs = 0;
2214                        c -= len;
2215                }
2216                tail = (tail + total) & tx_mask;
2217        }
2218        writew(tail, ofsAddr + TXwptr);
2219        writeb(1, ofsAddr + CD180TXirq);        /* start to send */
2220        return total;
2221}
2222
2223static int MoxaPortReadData(struct moxa_port *port)
2224{
2225        struct tty_struct *tty = port->port.tty;
2226        unsigned char *dst;
2227        void __iomem *baseAddr, *ofsAddr, *ofs;
2228        unsigned int count, len, total;
2229        u16 tail, rx_mask, spage, epage;
2230        u16 pageno, pageofs, bufhead, head;
2231
2232        ofsAddr = port->tableAddr;
2233        baseAddr = port->board->basemem;
2234        head = readw(ofsAddr + RXrptr);
2235        tail = readw(ofsAddr + RXwptr);
2236        rx_mask = readw(ofsAddr + RX_mask);
2237        spage = readw(ofsAddr + Page_rxb);
2238        epage = readw(ofsAddr + EndPage_rxb);
2239        count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
2240        if (count == 0)
2241                return 0;
2242
2243        total = count;
2244        moxaLog.rxcnt[tty->index] += total;
2245        if (spage == epage) {
2246                bufhead = readw(ofsAddr + Ofs_rxb);
2247                writew(spage, baseAddr + Control_reg);
2248                while (count > 0) {
2249                        ofs = baseAddr + DynPage_addr + bufhead + head;
2250                        len = (tail >= head) ? (tail - head) :
2251                                        (rx_mask + 1 - head);
2252                        len = tty_prepare_flip_string(&port->port, &dst,
2253                                        min(len, count));
2254                        memcpy_fromio(dst, ofs, len);
2255                        head = (head + len) & rx_mask;
2256                        count -= len;
2257                }
2258        } else {
2259                pageno = spage + (head >> 13);
2260                pageofs = head & Page_mask;
2261                while (count > 0) {
2262                        writew(pageno, baseAddr + Control_reg);
2263                        ofs = baseAddr + DynPage_addr + pageofs;
2264                        len = tty_prepare_flip_string(&port->port, &dst,
2265                                        min(Page_size - pageofs, count));
2266                        memcpy_fromio(dst, ofs, len);
2267
2268                        count -= len;
2269                        pageofs = (pageofs + len) & Page_mask;
2270                        if (pageofs == 0 && ++pageno == epage)
2271                                pageno = spage;
2272                }
2273                head = (head + total) & rx_mask;
2274        }
2275        writew(head, ofsAddr + RXrptr);
2276        if (readb(ofsAddr + FlagStat) & Xoff_state) {
2277                moxaLowWaterChk = 1;
2278                port->lowChkFlag = 1;
2279        }
2280        return total;
2281}
2282
2283
2284static unsigned int MoxaPortTxQueue(struct moxa_port *port)
2285{
2286        void __iomem *ofsAddr = port->tableAddr;
2287        u16 rptr, wptr, mask;
2288
2289        rptr = readw(ofsAddr + TXrptr);
2290        wptr = readw(ofsAddr + TXwptr);
2291        mask = readw(ofsAddr + TX_mask);
2292        return (wptr - rptr) & mask;
2293}
2294
2295static unsigned int MoxaPortTxFree(struct moxa_port *port)
2296{
2297        void __iomem *ofsAddr = port->tableAddr;
2298        u16 rptr, wptr, mask;
2299
2300        rptr = readw(ofsAddr + TXrptr);
2301        wptr = readw(ofsAddr + TXwptr);
2302        mask = readw(ofsAddr + TX_mask);
2303        return mask - ((wptr - rptr) & mask);
2304}
2305
2306static int MoxaPortRxQueue(struct moxa_port *port)
2307{
2308        void __iomem *ofsAddr = port->tableAddr;
2309        u16 rptr, wptr, mask;
2310
2311        rptr = readw(ofsAddr + RXrptr);
2312        wptr = readw(ofsAddr + RXwptr);
2313        mask = readw(ofsAddr + RX_mask);
2314        return (wptr - rptr) & mask;
2315}
2316
2317static void MoxaPortTxDisable(struct moxa_port *port)
2318{
2319        moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2320}
2321
2322static void MoxaPortTxEnable(struct moxa_port *port)
2323{
2324        moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2325}
2326
2327static int moxa_get_serial_info(struct tty_struct *tty,
2328                struct serial_struct *ss)
2329{
2330        struct moxa_port *info = tty->driver_data;
2331
2332        if (tty->index == MAX_PORTS)
2333                return -EINVAL;
2334        if (!info)
2335                return -ENODEV;
2336        mutex_lock(&info->port.mutex);
2337        ss->type = info->type;
2338        ss->line = info->port.tty->index;
2339        ss->flags = info->port.flags;
2340        ss->baud_base = 921600;
2341        ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
2342        mutex_unlock(&info->port.mutex);
2343        return 0;
2344}
2345
2346
2347static int moxa_set_serial_info(struct tty_struct *tty,
2348                struct serial_struct *ss)
2349{
2350        struct moxa_port *info = tty->driver_data;
2351        unsigned int close_delay;
2352
2353        if (tty->index == MAX_PORTS)
2354                return -EINVAL;
2355        if (!info)
2356                return -ENODEV;
2357
2358        close_delay = msecs_to_jiffies(ss->close_delay * 10);
2359
2360        mutex_lock(&info->port.mutex);
2361        if (!capable(CAP_SYS_ADMIN)) {
2362                if (close_delay != info->port.close_delay ||
2363                    ss->type != info->type ||
2364                    ((ss->flags & ~ASYNC_USR_MASK) !=
2365                     (info->port.flags & ~ASYNC_USR_MASK))) {
2366                        mutex_unlock(&info->port.mutex);
2367                        return -EPERM;
2368                }
2369        } else {
2370                info->port.close_delay = close_delay;
2371
2372                MoxaSetFifo(info, ss->type == PORT_16550A);
2373
2374                info->type = ss->type;
2375        }
2376        mutex_unlock(&info->port.mutex);
2377        return 0;
2378}
2379
2380
2381
2382/*****************************************************************************
2383 *      Static local functions:                                              *
2384 *****************************************************************************/
2385
2386static void MoxaSetFifo(struct moxa_port *port, int enable)
2387{
2388        void __iomem *ofsAddr = port->tableAddr;
2389
2390        if (!enable) {
2391                moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2392                moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2393        } else {
2394                moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2395                moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2396        }
2397}
2398