linux/drivers/video/fbdev/intelfb/intelfb.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef _INTELFB_H
   3#define _INTELFB_H
   4
   5/* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
   6
   7#include <linux/agp_backend.h>
   8#include <linux/fb.h>
   9
  10#ifdef CONFIG_FB_INTEL_I2C
  11#include <linux/i2c.h>
  12#include <linux/i2c-algo-bit.h>
  13#endif
  14
  15/*** Version/name ***/
  16#define INTELFB_VERSION                 "0.9.6"
  17#define INTELFB_MODULE_NAME             "intelfb"
  18#define SUPPORTED_CHIPSETS              "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
  19
  20
  21/*** Debug/feature defines ***/
  22
  23#ifndef DEBUG
  24#define DEBUG                           0
  25#endif
  26
  27#ifndef VERBOSE
  28#define VERBOSE                         0
  29#endif
  30
  31#ifndef REGDUMP
  32#define REGDUMP                         0
  33#endif
  34
  35#ifndef DETECT_VGA_CLASS_ONLY
  36#define DETECT_VGA_CLASS_ONLY           1
  37#endif
  38
  39#ifndef ALLOCATE_FOR_PANNING
  40#define ALLOCATE_FOR_PANNING            1
  41#endif
  42
  43#ifndef PREFERRED_MODE
  44#define PREFERRED_MODE                  "1024x768-32@70"
  45#endif
  46
  47/*** hw-related values ***/
  48
  49/* Resource Allocation */
  50#define INTELFB_FB_ACQUIRED                 1
  51#define INTELFB_MMIO_ACQUIRED               2
  52
  53/* PCI ids for supported devices */
  54#define PCI_DEVICE_ID_INTEL_830M        0x3577
  55#define PCI_DEVICE_ID_INTEL_845G        0x2562
  56#define PCI_DEVICE_ID_INTEL_85XGM       0x3582
  57#define PCI_DEVICE_ID_INTEL_854         0x358E
  58#define PCI_DEVICE_ID_INTEL_865G        0x2572
  59#define PCI_DEVICE_ID_INTEL_915G        0x2582
  60#define PCI_DEVICE_ID_INTEL_915GM       0x2592
  61#define PCI_DEVICE_ID_INTEL_945G        0x2772
  62#define PCI_DEVICE_ID_INTEL_945GM       0x27A2
  63#define PCI_DEVICE_ID_INTEL_945GME      0x27AE
  64#define PCI_DEVICE_ID_INTEL_965G        0x29A2
  65#define PCI_DEVICE_ID_INTEL_965GM       0x2A02
  66
  67/* Size of MMIO region */
  68#define INTEL_REG_SIZE                  0x80000
  69
  70#define STRIDE_ALIGNMENT                16
  71#define STRIDE_ALIGNMENT_I9XX           64
  72
  73#define PALETTE_8_ENTRIES               256
  74
  75
  76/*** Macros ***/
  77
  78/* basic arithmetic */
  79#define KB(x)                   ((x) * 1024)
  80#define MB(x)                   ((x) * 1024 * 1024)
  81#define BtoKB(x)                ((x) / 1024)
  82#define BtoMB(x)                ((x) / 1024 / 1024)
  83
  84#define GTT_PAGE_SIZE           KB(4)
  85
  86#define ROUND_UP_TO(x, y)       (((x) + (y) - 1) / (y) * (y))
  87#define ROUND_DOWN_TO(x, y)     ((x) / (y) * (y))
  88#define ROUND_UP_TO_PAGE(x)     ROUND_UP_TO((x), GTT_PAGE_SIZE)
  89#define ROUND_DOWN_TO_PAGE(x)   ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
  90
  91/* messages */
  92#define PFX                     INTELFB_MODULE_NAME ": "
  93
  94#define ERR_MSG(fmt, args...)   printk(KERN_ERR PFX fmt, ## args)
  95#define WRN_MSG(fmt, args...)   printk(KERN_WARNING PFX fmt, ## args)
  96#define NOT_MSG(fmt, args...)   printk(KERN_NOTICE PFX fmt, ## args)
  97#define INF_MSG(fmt, args...)   printk(KERN_INFO PFX fmt, ## args)
  98#if DEBUG
  99#define DBG_MSG(fmt, args...)   printk(KERN_DEBUG PFX fmt, ## args)
 100#else
 101#define DBG_MSG(fmt, args...)   while (0) printk(fmt, ## args)
 102#endif
 103
 104/* get commonly used pointers */
 105#define GET_DINFO(info)         (info)->par
 106
 107/* misc macros */
 108#define ACCEL(d, i)                                                     \
 109        ((d)->accel && !(d)->ring_lockup &&                             \
 110         ((i)->var.accel_flags & FB_ACCELF_TEXT))
 111
 112/*#define NOACCEL_CHIPSET(d)                                            \
 113        ((d)->chipset != INTEL_865G)*/
 114#define NOACCEL_CHIPSET(d)                                              \
 115        (0)
 116
 117#define FIXED_MODE(d) ((d)->fixed_mode)
 118
 119/*** Driver parameters ***/
 120
 121#define RINGBUFFER_SIZE         KB(64)
 122#define HW_CURSOR_SIZE          KB(4)
 123
 124/* Intel agpgart driver */
 125#define AGP_PHYSICAL_MEMORY     2
 126
 127/* store information about an Ixxx DVO */
 128/* The i830->i865 use multiple DVOs with multiple i2cs */
 129/* the i915, i945 have a single sDVO i2c bus - which is different */
 130#define MAX_OUTPUTS 6
 131
 132/* these are outputs from the chip - integrated only
 133   external chips are via DVO or SDVO output */
 134#define INTELFB_OUTPUT_UNUSED 0
 135#define INTELFB_OUTPUT_ANALOG 1
 136#define INTELFB_OUTPUT_DVO 2
 137#define INTELFB_OUTPUT_SDVO 3
 138#define INTELFB_OUTPUT_LVDS 4
 139#define INTELFB_OUTPUT_TVOUT 5
 140
 141#define INTELFB_DVO_CHIP_NONE 0
 142#define INTELFB_DVO_CHIP_LVDS 1
 143#define INTELFB_DVO_CHIP_TMDS 2
 144#define INTELFB_DVO_CHIP_TVOUT 4
 145
 146#define INTELFB_OUTPUT_PIPE_NC  0
 147#define INTELFB_OUTPUT_PIPE_A   1
 148#define INTELFB_OUTPUT_PIPE_B   2
 149
 150/*** Data Types ***/
 151
 152/* supported chipsets */
 153enum intel_chips {
 154        INTEL_830M,
 155        INTEL_845G,
 156        INTEL_85XGM,
 157        INTEL_852GM,
 158        INTEL_852GME,
 159        INTEL_854,
 160        INTEL_855GM,
 161        INTEL_855GME,
 162        INTEL_865G,
 163        INTEL_915G,
 164        INTEL_915GM,
 165        INTEL_945G,
 166        INTEL_945GM,
 167        INTEL_945GME,
 168        INTEL_965G,
 169        INTEL_965GM,
 170};
 171
 172struct intelfb_hwstate {
 173        u32 vga0_divisor;
 174        u32 vga1_divisor;
 175        u32 vga_pd;
 176        u32 dpll_a;
 177        u32 dpll_b;
 178        u32 fpa0;
 179        u32 fpa1;
 180        u32 fpb0;
 181        u32 fpb1;
 182        u32 palette_a[PALETTE_8_ENTRIES];
 183        u32 palette_b[PALETTE_8_ENTRIES];
 184        u32 htotal_a;
 185        u32 hblank_a;
 186        u32 hsync_a;
 187        u32 vtotal_a;
 188        u32 vblank_a;
 189        u32 vsync_a;
 190        u32 src_size_a;
 191        u32 bclrpat_a;
 192        u32 htotal_b;
 193        u32 hblank_b;
 194        u32 hsync_b;
 195        u32 vtotal_b;
 196        u32 vblank_b;
 197        u32 vsync_b;
 198        u32 src_size_b;
 199        u32 bclrpat_b;
 200        u32 adpa;
 201        u32 dvoa;
 202        u32 dvob;
 203        u32 dvoc;
 204        u32 dvoa_srcdim;
 205        u32 dvob_srcdim;
 206        u32 dvoc_srcdim;
 207        u32 lvds;
 208        u32 pipe_a_conf;
 209        u32 pipe_b_conf;
 210        u32 disp_arb;
 211        u32 cursor_a_control;
 212        u32 cursor_b_control;
 213        u32 cursor_a_base;
 214        u32 cursor_b_base;
 215        u32 cursor_size;
 216        u32 disp_a_ctrl;
 217        u32 disp_b_ctrl;
 218        u32 disp_a_base;
 219        u32 disp_b_base;
 220        u32 cursor_a_palette[4];
 221        u32 cursor_b_palette[4];
 222        u32 disp_a_stride;
 223        u32 disp_b_stride;
 224        u32 vgacntrl;
 225        u32 add_id;
 226        u32 swf0x[7];
 227        u32 swf1x[7];
 228        u32 swf3x[3];
 229        u32 fence[8];
 230        u32 instpm;
 231        u32 mem_mode;
 232        u32 fw_blc_0;
 233        u32 fw_blc_1;
 234        u16 hwstam;
 235        u16 ier;
 236        u16 iir;
 237        u16 imr;
 238};
 239
 240struct intelfb_heap_data {
 241        u32 physical;
 242        u8 __iomem *virtual;
 243        u32 offset;             /* in GATT pages */
 244        u32 size;               /* in bytes */
 245};
 246
 247#ifdef CONFIG_FB_INTEL_I2C
 248struct intelfb_i2c_chan {
 249    struct intelfb_info *dinfo;
 250    u32 reg;
 251    struct i2c_adapter adapter;
 252    struct i2c_algo_bit_data algo;
 253};
 254#endif
 255
 256struct intelfb_output_rec {
 257    int type;
 258    int pipe;
 259    int flags;
 260
 261#ifdef CONFIG_FB_INTEL_I2C
 262    struct intelfb_i2c_chan i2c_bus;
 263    struct intelfb_i2c_chan ddc_bus;
 264#endif
 265};
 266
 267struct intelfb_vsync {
 268        wait_queue_head_t wait;
 269        unsigned int count;
 270        int pan_display;
 271        u32 pan_offset;
 272};
 273
 274struct intelfb_info {
 275        struct fb_info *info;
 276        const struct fb_ops *fbops;
 277        struct pci_dev *pdev;
 278
 279        struct intelfb_hwstate save_state;
 280
 281        /* agpgart structs */
 282        struct agp_memory *gtt_fb_mem;     /* use all stolen memory or vram */
 283        struct agp_memory *gtt_ring_mem;   /* ring buffer */
 284        struct agp_memory *gtt_cursor_mem; /* hw cursor */
 285
 286        /* use a gart reserved fb mem */
 287        u8 fbmem_gart;
 288
 289        int wc_cookie;
 290
 291        /* heap data */
 292        struct intelfb_heap_data aperture;
 293        struct intelfb_heap_data fb;
 294        struct intelfb_heap_data ring;
 295        struct intelfb_heap_data cursor;
 296
 297        /* mmio regs */
 298        u32 mmio_base_phys;
 299        u8 __iomem *mmio_base;
 300
 301        /* fb start offset (in bytes) */
 302        u32 fb_start;
 303
 304        /* ring buffer */
 305        u32 ring_head;
 306        u32 ring_tail;
 307        u32 ring_tail_mask;
 308        u32 ring_space;
 309        u32 ring_lockup;
 310
 311        /* palette */
 312        u32 pseudo_palette[16];
 313
 314        /* chip info */
 315        int pci_chipset;
 316        int chipset;
 317        const char *name;
 318        int mobile;
 319
 320        /* current mode */
 321        int bpp, depth;
 322        u32 visual;
 323        int xres, yres, pitch;
 324        int pixclock;
 325
 326        /* current pipe */
 327        int pipe;
 328
 329        /* some flags */
 330        int accel;
 331        int hwcursor;
 332        int fixed_mode;
 333        int ring_active;
 334        int flag;
 335        unsigned long irq_flags;
 336        int open;
 337
 338        /* vsync */
 339        struct intelfb_vsync vsync;
 340        spinlock_t int_lock;
 341
 342        /* hw cursor */
 343        int cursor_on;
 344        int cursor_blanked;
 345        u8  cursor_src[64];
 346
 347        /* initial parameters */
 348        int initial_vga;
 349        struct fb_var_screeninfo initial_var;
 350        u32 initial_fb_base;
 351        u32 initial_video_ram;
 352        u32 initial_pitch;
 353
 354        /* driver registered */
 355        int registered;
 356
 357        /* index into plls */
 358        int pll_index;
 359
 360        /* outputs */
 361        int num_outputs;
 362        struct intelfb_output_rec output[MAX_OUTPUTS];
 363};
 364
 365#define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) ||     \
 366                        ((dinfo)->chipset == INTEL_915GM) ||    \
 367                        ((dinfo)->chipset == INTEL_945G) ||     \
 368                        ((dinfo)->chipset == INTEL_945GM) ||    \
 369                        ((dinfo)->chipset == INTEL_945GME) ||   \
 370                        ((dinfo)->chipset == INTEL_965G) ||     \
 371                        ((dinfo)->chipset == INTEL_965GM))
 372
 373/*** function prototypes ***/
 374
 375extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
 376
 377#ifdef CONFIG_FB_INTEL_I2C
 378extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
 379extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
 380#endif
 381
 382#endif /* _INTELFB_H */
 383