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24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
27#if defined(__KERNEL__) || defined(__linux__)
28#include <linux/types.h>
29#include <asm/byteorder.h>
30#else
31#include <endian.h>
32#include <sys/ioctl.h>
33#endif
34
35#ifndef __KERNEL__
36#include <stdlib.h>
37#include <time.h>
38#endif
39
40
41
42
43
44#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
45#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
46#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
47#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
48#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
49 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
50 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
51 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
52
53
54
55
56
57
58
59#define AES_IEC958_STATUS_SIZE 24
60
61struct snd_aes_iec958 {
62 unsigned char status[AES_IEC958_STATUS_SIZE];
63 unsigned char subcode[147];
64 unsigned char pad;
65 unsigned char dig_subframe[4];
66};
67
68
69
70
71
72
73
74struct snd_cea_861_aud_if {
75 unsigned char db1_ct_cc;
76 unsigned char db2_sf_ss;
77 unsigned char db3;
78 unsigned char db4_ca;
79 unsigned char db5_dminh_lsv;
80};
81
82
83
84
85
86
87
88#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
89
90enum {
91 SNDRV_HWDEP_IFACE_OPL2 = 0,
92 SNDRV_HWDEP_IFACE_OPL3,
93 SNDRV_HWDEP_IFACE_OPL4,
94 SNDRV_HWDEP_IFACE_SB16CSP,
95 SNDRV_HWDEP_IFACE_EMU10K1,
96 SNDRV_HWDEP_IFACE_YSS225,
97 SNDRV_HWDEP_IFACE_ICS2115,
98 SNDRV_HWDEP_IFACE_SSCAPE,
99 SNDRV_HWDEP_IFACE_VX,
100 SNDRV_HWDEP_IFACE_MIXART,
101 SNDRV_HWDEP_IFACE_USX2Y,
102 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
103 SNDRV_HWDEP_IFACE_BLUETOOTH,
104 SNDRV_HWDEP_IFACE_USX2Y_PCM,
105 SNDRV_HWDEP_IFACE_PCXHR,
106 SNDRV_HWDEP_IFACE_SB_RC,
107 SNDRV_HWDEP_IFACE_HDA,
108 SNDRV_HWDEP_IFACE_USB_STREAM,
109 SNDRV_HWDEP_IFACE_FW_DICE,
110 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
111 SNDRV_HWDEP_IFACE_FW_BEBOB,
112 SNDRV_HWDEP_IFACE_FW_OXFW,
113 SNDRV_HWDEP_IFACE_FW_DIGI00X,
114 SNDRV_HWDEP_IFACE_FW_TASCAM,
115 SNDRV_HWDEP_IFACE_LINE6,
116 SNDRV_HWDEP_IFACE_FW_MOTU,
117 SNDRV_HWDEP_IFACE_FW_FIREFACE,
118
119
120 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
121};
122
123struct snd_hwdep_info {
124 unsigned int device;
125 int card;
126 unsigned char id[64];
127 unsigned char name[80];
128 int iface;
129 unsigned char reserved[64];
130};
131
132
133struct snd_hwdep_dsp_status {
134 unsigned int version;
135 unsigned char id[32];
136 unsigned int num_dsps;
137 unsigned int dsp_loaded;
138 unsigned int chip_ready;
139 unsigned char reserved[16];
140};
141
142struct snd_hwdep_dsp_image {
143 unsigned int index;
144 unsigned char name[64];
145 unsigned char __user *image;
146 size_t length;
147 unsigned long driver_data;
148};
149
150#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
151#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
152#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
153#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
154
155
156
157
158
159
160
161#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
162
163typedef unsigned long snd_pcm_uframes_t;
164typedef signed long snd_pcm_sframes_t;
165
166enum {
167 SNDRV_PCM_CLASS_GENERIC = 0,
168 SNDRV_PCM_CLASS_MULTI,
169 SNDRV_PCM_CLASS_MODEM,
170 SNDRV_PCM_CLASS_DIGITIZER,
171
172 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
173};
174
175enum {
176 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
177 SNDRV_PCM_SUBCLASS_MULTI_MIX,
178
179 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
180};
181
182enum {
183 SNDRV_PCM_STREAM_PLAYBACK = 0,
184 SNDRV_PCM_STREAM_CAPTURE,
185 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
186};
187
188typedef int __bitwise snd_pcm_access_t;
189#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
190#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
191#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
192#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
193#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
194#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
195
196typedef int __bitwise snd_pcm_format_t;
197#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
198#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
199#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
200#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
201#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
202#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
203#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
204#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
205#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
206#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
207
208
209
210
211
212#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
213#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
214#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
215#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
216#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
217#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
218#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
219#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
220#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
221#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
222#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
223#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
224#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
225#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
226#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
227#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
228#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
229#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
230#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
231
232#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
233#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
234#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
235#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
236#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
237#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
238#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
239#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
240#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
241#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
242#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
243#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
244#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
245#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
246#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
247#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
248#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
249#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
250#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
251#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
252#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
253#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
254#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
255#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
256
257#ifdef SNDRV_LITTLE_ENDIAN
258#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
259#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
260#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
261#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
262#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
263#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
264#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
265#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
266#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
267#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
268#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
269#endif
270#ifdef SNDRV_BIG_ENDIAN
271#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
272#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
273#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
274#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
275#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
276#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
277#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
278#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
279#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
280#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
281#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
282#endif
283
284typedef int __bitwise snd_pcm_subformat_t;
285#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
286#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
287
288#define SNDRV_PCM_INFO_MMAP 0x00000001
289#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
290#define SNDRV_PCM_INFO_DOUBLE 0x00000004
291#define SNDRV_PCM_INFO_BATCH 0x00000010
292#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
293#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
294#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
295#define SNDRV_PCM_INFO_COMPLEX 0x00000400
296#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
297#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
298#define SNDRV_PCM_INFO_RESUME 0x00040000
299#define SNDRV_PCM_INFO_PAUSE 0x00080000
300#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
301#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
302#define SNDRV_PCM_INFO_SYNC_START 0x00400000
303#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
304#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
305#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
306#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
307#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
308#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
309#define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000
310#define SNDRV_PCM_INFO_NO_REWINDS 0x20000000
311#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
312#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
313
314#if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__
315#define __SND_STRUCT_TIME64
316#endif
317
318typedef int __bitwise snd_pcm_state_t;
319#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
320#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
321#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
322#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
323#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
324#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
325#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
326#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
327#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
328#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
329
330enum {
331 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
332 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
333 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
334 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
335 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
336#ifdef __SND_STRUCT_TIME64
337 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW,
338 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW,
339#else
340 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD,
341 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD,
342#endif
343};
344
345union snd_pcm_sync_id {
346 unsigned char id[16];
347 unsigned short id16[8];
348 unsigned int id32[4];
349};
350
351struct snd_pcm_info {
352 unsigned int device;
353 unsigned int subdevice;
354 int stream;
355 int card;
356 unsigned char id[64];
357 unsigned char name[80];
358 unsigned char subname[32];
359 int dev_class;
360 int dev_subclass;
361 unsigned int subdevices_count;
362 unsigned int subdevices_avail;
363 union snd_pcm_sync_id sync;
364 unsigned char reserved[64];
365};
366
367typedef int snd_pcm_hw_param_t;
368#define SNDRV_PCM_HW_PARAM_ACCESS 0
369#define SNDRV_PCM_HW_PARAM_FORMAT 1
370#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
371#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
372#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
373
374#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
375#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
376#define SNDRV_PCM_HW_PARAM_CHANNELS 10
377#define SNDRV_PCM_HW_PARAM_RATE 11
378#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
379
380
381#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
382
383
384#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
385
386
387#define SNDRV_PCM_HW_PARAM_PERIODS 15
388
389
390#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
391
392
393#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
394#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
395#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
396#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
397#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
398
399#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
400#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
401#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
402
403struct snd_interval {
404 unsigned int min, max;
405 unsigned int openmin:1,
406 openmax:1,
407 integer:1,
408 empty:1;
409};
410
411#define SNDRV_MASK_MAX 256
412
413struct snd_mask {
414 __u32 bits[(SNDRV_MASK_MAX+31)/32];
415};
416
417struct snd_pcm_hw_params {
418 unsigned int flags;
419 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
420 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
421 struct snd_mask mres[5];
422 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
423 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
424 struct snd_interval ires[9];
425 unsigned int rmask;
426 unsigned int cmask;
427 unsigned int info;
428 unsigned int msbits;
429 unsigned int rate_num;
430 unsigned int rate_den;
431 snd_pcm_uframes_t fifo_size;
432 unsigned char reserved[64];
433};
434
435enum {
436 SNDRV_PCM_TSTAMP_NONE = 0,
437 SNDRV_PCM_TSTAMP_ENABLE,
438 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
439};
440
441struct snd_pcm_sw_params {
442 int tstamp_mode;
443 unsigned int period_step;
444 unsigned int sleep_min;
445 snd_pcm_uframes_t avail_min;
446 snd_pcm_uframes_t xfer_align;
447 snd_pcm_uframes_t start_threshold;
448 snd_pcm_uframes_t stop_threshold;
449 snd_pcm_uframes_t silence_threshold;
450 snd_pcm_uframes_t silence_size;
451 snd_pcm_uframes_t boundary;
452 unsigned int proto;
453 unsigned int tstamp_type;
454 unsigned char reserved[56];
455};
456
457struct snd_pcm_channel_info {
458 unsigned int channel;
459 __kernel_off_t offset;
460 unsigned int first;
461 unsigned int step;
462};
463
464enum {
465
466
467
468
469 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
470
471
472 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
473 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
474 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
475 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
476 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
477 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
478};
479
480#ifndef __KERNEL__
481
482typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad;
483
484struct snd_pcm_status {
485 snd_pcm_state_t state;
486 __time_pad pad1;
487 struct timespec trigger_tstamp;
488 struct timespec tstamp;
489 snd_pcm_uframes_t appl_ptr;
490 snd_pcm_uframes_t hw_ptr;
491 snd_pcm_sframes_t delay;
492 snd_pcm_uframes_t avail;
493 snd_pcm_uframes_t avail_max;
494 snd_pcm_uframes_t overrange;
495 snd_pcm_state_t suspended_state;
496 __u32 audio_tstamp_data;
497 struct timespec audio_tstamp;
498 struct timespec driver_tstamp;
499 __u32 audio_tstamp_accuracy;
500 unsigned char reserved[52-2*sizeof(struct timespec)];
501};
502#endif
503
504
505
506
507
508
509#ifdef __SND_STRUCT_TIME64
510#define __snd_pcm_mmap_status64 snd_pcm_mmap_status
511#define __snd_pcm_mmap_control64 snd_pcm_mmap_control
512#define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr
513#ifdef __KERNEL__
514#define __snd_timespec64 __kernel_timespec
515#else
516#define __snd_timespec64 timespec
517#endif
518struct __snd_timespec {
519 __s32 tv_sec;
520 __s32 tv_nsec;
521};
522#else
523#define __snd_pcm_mmap_status snd_pcm_mmap_status
524#define __snd_pcm_mmap_control snd_pcm_mmap_control
525#define __snd_pcm_sync_ptr snd_pcm_sync_ptr
526#define __snd_timespec timespec
527struct __snd_timespec64 {
528 __s64 tv_sec;
529 __s64 tv_nsec;
530};
531
532#endif
533
534struct __snd_pcm_mmap_status {
535 snd_pcm_state_t state;
536 int pad1;
537 snd_pcm_uframes_t hw_ptr;
538 struct __snd_timespec tstamp;
539 snd_pcm_state_t suspended_state;
540 struct __snd_timespec audio_tstamp;
541};
542
543struct __snd_pcm_mmap_control {
544 snd_pcm_uframes_t appl_ptr;
545 snd_pcm_uframes_t avail_min;
546};
547
548#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
549#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
550#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
551
552struct __snd_pcm_sync_ptr {
553 unsigned int flags;
554 union {
555 struct __snd_pcm_mmap_status status;
556 unsigned char reserved[64];
557 } s;
558 union {
559 struct __snd_pcm_mmap_control control;
560 unsigned char reserved[64];
561 } c;
562};
563
564#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
565typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
566typedef char __pad_after_uframe[0];
567#endif
568
569#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
570typedef char __pad_before_uframe[0];
571typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
572#endif
573
574struct __snd_pcm_mmap_status64 {
575 snd_pcm_state_t state;
576 __u32 pad1;
577 __pad_before_uframe __pad1;
578 snd_pcm_uframes_t hw_ptr;
579 __pad_after_uframe __pad2;
580 struct __snd_timespec64 tstamp;
581 snd_pcm_state_t suspended_state;
582 __u32 pad3;
583 struct __snd_timespec64 audio_tstamp;
584};
585
586struct __snd_pcm_mmap_control64 {
587 __pad_before_uframe __pad1;
588 snd_pcm_uframes_t appl_ptr;
589 __pad_before_uframe __pad2;
590
591 __pad_before_uframe __pad3;
592 snd_pcm_uframes_t avail_min;
593 __pad_after_uframe __pad4;
594};
595
596struct __snd_pcm_sync_ptr64 {
597 __u32 flags;
598 __u32 pad1;
599 union {
600 struct __snd_pcm_mmap_status64 status;
601 unsigned char reserved[64];
602 } s;
603 union {
604 struct __snd_pcm_mmap_control64 control;
605 unsigned char reserved[64];
606 } c;
607};
608
609struct snd_xferi {
610 snd_pcm_sframes_t result;
611 void __user *buf;
612 snd_pcm_uframes_t frames;
613};
614
615struct snd_xfern {
616 snd_pcm_sframes_t result;
617 void __user * __user *bufs;
618 snd_pcm_uframes_t frames;
619};
620
621enum {
622 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
623 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
624 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
625 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
626};
627
628
629enum {
630 SNDRV_CHMAP_UNKNOWN = 0,
631 SNDRV_CHMAP_NA,
632 SNDRV_CHMAP_MONO,
633
634 SNDRV_CHMAP_FL,
635 SNDRV_CHMAP_FR,
636 SNDRV_CHMAP_RL,
637 SNDRV_CHMAP_RR,
638 SNDRV_CHMAP_FC,
639 SNDRV_CHMAP_LFE,
640 SNDRV_CHMAP_SL,
641 SNDRV_CHMAP_SR,
642 SNDRV_CHMAP_RC,
643
644 SNDRV_CHMAP_FLC,
645 SNDRV_CHMAP_FRC,
646 SNDRV_CHMAP_RLC,
647 SNDRV_CHMAP_RRC,
648 SNDRV_CHMAP_FLW,
649 SNDRV_CHMAP_FRW,
650 SNDRV_CHMAP_FLH,
651 SNDRV_CHMAP_FCH,
652 SNDRV_CHMAP_FRH,
653 SNDRV_CHMAP_TC,
654 SNDRV_CHMAP_TFL,
655 SNDRV_CHMAP_TFR,
656 SNDRV_CHMAP_TFC,
657 SNDRV_CHMAP_TRL,
658 SNDRV_CHMAP_TRR,
659 SNDRV_CHMAP_TRC,
660
661 SNDRV_CHMAP_TFLC,
662 SNDRV_CHMAP_TFRC,
663 SNDRV_CHMAP_TSL,
664 SNDRV_CHMAP_TSR,
665 SNDRV_CHMAP_LLFE,
666 SNDRV_CHMAP_RLFE,
667 SNDRV_CHMAP_BC,
668 SNDRV_CHMAP_BLC,
669 SNDRV_CHMAP_BRC,
670 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
671};
672
673#define SNDRV_CHMAP_POSITION_MASK 0xffff
674#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
675#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
676
677#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
678#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
679#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
680#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
681#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
682#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
683#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
684#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
685#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
686#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
687#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
688#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
689#define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
690#define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
691#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
692#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
693#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
694#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
695#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
696#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
697#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
698#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
699#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
700#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
701#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
702#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
703#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
704#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
705#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
706#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
707#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
708#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
709#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
710
711
712
713
714
715
716
717
718
719
720
721#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2)
722
723enum {
724 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
725 SNDRV_RAWMIDI_STREAM_INPUT,
726 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
727};
728
729#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
730#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
731#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
732
733struct snd_rawmidi_info {
734 unsigned int device;
735 unsigned int subdevice;
736 int stream;
737 int card;
738 unsigned int flags;
739 unsigned char id[64];
740 unsigned char name[80];
741 unsigned char subname[32];
742 unsigned int subdevices_count;
743 unsigned int subdevices_avail;
744 unsigned char reserved[64];
745};
746
747#define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0)
748#define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0
749#define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0<<0)
750#define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1<<0)
751#define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7<<3)
752#define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3
753#define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0<<3)
754#define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1<<3)
755#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2<<3)
756#define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3<<3)
757
758#define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16
759
760struct snd_rawmidi_framing_tstamp {
761
762
763
764 __u8 frame_type;
765 __u8 length;
766 __u8 reserved[2];
767 __u32 tv_nsec;
768 __u64 tv_sec;
769 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH];
770} __packed;
771
772struct snd_rawmidi_params {
773 int stream;
774 size_t buffer_size;
775 size_t avail_min;
776 unsigned int no_active_sensing: 1;
777 unsigned int mode;
778 unsigned char reserved[12];
779};
780
781#ifndef __KERNEL__
782struct snd_rawmidi_status {
783 int stream;
784 __time_pad pad1;
785 struct timespec tstamp;
786 size_t avail;
787 size_t xruns;
788 unsigned char reserved[16];
789};
790#endif
791
792#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
793#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
794#define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int)
795#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
796#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
797#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
798#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
799
800
801
802
803
804#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
805
806enum {
807 SNDRV_TIMER_CLASS_NONE = -1,
808 SNDRV_TIMER_CLASS_SLAVE = 0,
809 SNDRV_TIMER_CLASS_GLOBAL,
810 SNDRV_TIMER_CLASS_CARD,
811 SNDRV_TIMER_CLASS_PCM,
812 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
813};
814
815
816enum {
817 SNDRV_TIMER_SCLASS_NONE = 0,
818 SNDRV_TIMER_SCLASS_APPLICATION,
819 SNDRV_TIMER_SCLASS_SEQUENCER,
820 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
821 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
822};
823
824
825#define SNDRV_TIMER_GLOBAL_SYSTEM 0
826#define SNDRV_TIMER_GLOBAL_RTC 1
827#define SNDRV_TIMER_GLOBAL_HPET 2
828#define SNDRV_TIMER_GLOBAL_HRTIMER 3
829
830
831#define SNDRV_TIMER_FLG_SLAVE (1<<0)
832
833struct snd_timer_id {
834 int dev_class;
835 int dev_sclass;
836 int card;
837 int device;
838 int subdevice;
839};
840
841struct snd_timer_ginfo {
842 struct snd_timer_id tid;
843 unsigned int flags;
844 int card;
845 unsigned char id[64];
846 unsigned char name[80];
847 unsigned long reserved0;
848 unsigned long resolution;
849 unsigned long resolution_min;
850 unsigned long resolution_max;
851 unsigned int clients;
852 unsigned char reserved[32];
853};
854
855struct snd_timer_gparams {
856 struct snd_timer_id tid;
857 unsigned long period_num;
858 unsigned long period_den;
859 unsigned char reserved[32];
860};
861
862struct snd_timer_gstatus {
863 struct snd_timer_id tid;
864 unsigned long resolution;
865 unsigned long resolution_num;
866 unsigned long resolution_den;
867 unsigned char reserved[32];
868};
869
870struct snd_timer_select {
871 struct snd_timer_id id;
872 unsigned char reserved[32];
873};
874
875struct snd_timer_info {
876 unsigned int flags;
877 int card;
878 unsigned char id[64];
879 unsigned char name[80];
880 unsigned long reserved0;
881 unsigned long resolution;
882 unsigned char reserved[64];
883};
884
885#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
886#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
887#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
888
889struct snd_timer_params {
890 unsigned int flags;
891 unsigned int ticks;
892 unsigned int queue_size;
893 unsigned int reserved0;
894 unsigned int filter;
895 unsigned char reserved[60];
896};
897
898#ifndef __KERNEL__
899struct snd_timer_status {
900 struct timespec tstamp;
901 unsigned int resolution;
902 unsigned int lost;
903 unsigned int overrun;
904 unsigned int queue;
905 unsigned char reserved[64];
906};
907#endif
908
909#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
910#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
911#define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int)
912#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
913#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
914#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
915#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
916#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
917#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
918#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
919
920#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
921#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
922#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
923#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
924#define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int)
925
926#if __BITS_PER_LONG == 64
927#define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD
928#else
929#define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \
930 SNDRV_TIMER_IOCTL_TREAD_OLD : \
931 SNDRV_TIMER_IOCTL_TREAD64)
932#endif
933
934struct snd_timer_read {
935 unsigned int resolution;
936 unsigned int ticks;
937};
938
939enum {
940 SNDRV_TIMER_EVENT_RESOLUTION = 0,
941 SNDRV_TIMER_EVENT_TICK,
942 SNDRV_TIMER_EVENT_START,
943 SNDRV_TIMER_EVENT_STOP,
944 SNDRV_TIMER_EVENT_CONTINUE,
945 SNDRV_TIMER_EVENT_PAUSE,
946 SNDRV_TIMER_EVENT_EARLY,
947 SNDRV_TIMER_EVENT_SUSPEND,
948 SNDRV_TIMER_EVENT_RESUME,
949
950 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
951 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
952 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
953 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
954 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
955 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
956};
957
958#ifndef __KERNEL__
959struct snd_timer_tread {
960 int event;
961 __time_pad pad1;
962 struct timespec tstamp;
963 unsigned int val;
964 __time_pad pad2;
965};
966#endif
967
968
969
970
971
972
973
974#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
975
976struct snd_ctl_card_info {
977 int card;
978 int pad;
979 unsigned char id[16];
980 unsigned char driver[16];
981 unsigned char name[32];
982 unsigned char longname[80];
983 unsigned char reserved_[16];
984 unsigned char mixername[80];
985 unsigned char components[128];
986};
987
988typedef int __bitwise snd_ctl_elem_type_t;
989#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
990#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
991#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
992#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
993#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
994#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
995#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
996#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
997
998typedef int __bitwise snd_ctl_elem_iface_t;
999#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
1000#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
1001#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
1002#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
1003#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
1004#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
1005#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
1006#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1007
1008#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
1009#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
1010#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
1011#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
1012
1013#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
1014#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
1015#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
1016#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
1017#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
1018#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
1019#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
1020#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
1021#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
1022
1023
1024
1025#define SNDRV_CTL_POWER_D0 0x0000
1026#define SNDRV_CTL_POWER_D1 0x0100
1027#define SNDRV_CTL_POWER_D2 0x0200
1028#define SNDRV_CTL_POWER_D3 0x0300
1029#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
1030#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
1031
1032#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
1033
1034struct snd_ctl_elem_id {
1035 unsigned int numid;
1036 snd_ctl_elem_iface_t iface;
1037 unsigned int device;
1038 unsigned int subdevice;
1039 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1040 unsigned int index;
1041};
1042
1043struct snd_ctl_elem_list {
1044 unsigned int offset;
1045 unsigned int space;
1046 unsigned int used;
1047 unsigned int count;
1048 struct snd_ctl_elem_id __user *pids;
1049 unsigned char reserved[50];
1050};
1051
1052struct snd_ctl_elem_info {
1053 struct snd_ctl_elem_id id;
1054 snd_ctl_elem_type_t type;
1055 unsigned int access;
1056 unsigned int count;
1057 __kernel_pid_t owner;
1058 union {
1059 struct {
1060 long min;
1061 long max;
1062 long step;
1063 } integer;
1064 struct {
1065 long long min;
1066 long long max;
1067 long long step;
1068 } integer64;
1069 struct {
1070 unsigned int items;
1071 unsigned int item;
1072 char name[64];
1073 __u64 names_ptr;
1074 unsigned int names_length;
1075 } enumerated;
1076 unsigned char reserved[128];
1077 } value;
1078 unsigned char reserved[64];
1079};
1080
1081struct snd_ctl_elem_value {
1082 struct snd_ctl_elem_id id;
1083 unsigned int indirect: 1;
1084 union {
1085 union {
1086 long value[128];
1087 long *value_ptr;
1088 } integer;
1089 union {
1090 long long value[64];
1091 long long *value_ptr;
1092 } integer64;
1093 union {
1094 unsigned int item[128];
1095 unsigned int *item_ptr;
1096 } enumerated;
1097 union {
1098 unsigned char data[512];
1099 unsigned char *data_ptr;
1100 } bytes;
1101 struct snd_aes_iec958 iec958;
1102 } value;
1103 unsigned char reserved[128];
1104};
1105
1106struct snd_ctl_tlv {
1107 unsigned int numid;
1108 unsigned int length;
1109 unsigned int tlv[0];
1110};
1111
1112#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
1113#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
1114#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
1115#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
1116#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
1117#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
1118#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
1119#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
1120#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1121#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
1122#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
1123#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
1124#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
1125#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
1126#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
1127#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1128#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
1129#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
1130#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
1131#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1132#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1133#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
1134#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1135#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
1136#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1137
1138
1139
1140
1141
1142enum sndrv_ctl_event_type {
1143 SNDRV_CTL_EVENT_ELEM = 0,
1144 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1145};
1146
1147#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
1148#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
1149#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
1150#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
1151#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
1152
1153struct snd_ctl_event {
1154 int type;
1155 union {
1156 struct {
1157 unsigned int mask;
1158 struct snd_ctl_elem_id id;
1159 } elem;
1160 unsigned char data8[60];
1161 } data;
1162};
1163
1164
1165
1166
1167
1168#define SNDRV_CTL_NAME_NONE ""
1169#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1170#define SNDRV_CTL_NAME_CAPTURE "Capture "
1171
1172#define SNDRV_CTL_NAME_IEC958_NONE ""
1173#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1174#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1175#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1176#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1177#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1178#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1179#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1180#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1181
1182#endif
1183