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7#ifndef __ASM_ARCH_MXC_COMMON_H__
8#define __ASM_ARCH_MXC_COMMON_H__
9
10#include <linux/reboot.h>
11
12struct irq_data;
13struct platform_device;
14struct pt_regs;
15struct clk;
16struct device_node;
17enum mxc_cpu_pwr_mode;
18struct of_device_id;
19
20void mx21_map_io(void);
21void mx27_map_io(void);
22void mx31_map_io(void);
23void mx35_map_io(void);
24void imx21_init_early(void);
25void imx27_init_early(void);
26void imx31_init_early(void);
27void imx35_init_early(void);
28void mxc_init_irq(void __iomem *);
29void mx21_init_irq(void);
30void mx27_init_irq(void);
31void mx31_init_irq(void);
32void mx35_init_irq(void);
33void imx21_soc_init(void);
34void imx27_soc_init(void);
35void imx31_soc_init(void);
36void imx35_soc_init(void);
37int mx21_clocks_init(unsigned long lref, unsigned long fref);
38int mx27_clocks_init(unsigned long fref);
39int mx31_clocks_init(unsigned long fref);
40int mx35_clocks_init(void);
41struct platform_device *mxc_register_gpio(char *name, int id,
42 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
43void mxc_set_cpu_type(unsigned int type);
44void mxc_restart(enum reboot_mode, const char *);
45void mxc_arch_reset_init(void __iomem *);
46void imx1_reset_init(void __iomem *);
47void imx_set_aips(void __iomem *);
48void imx_aips_allow_unprivileged_access(const char *compat);
49int mxc_device_init(void);
50void imx_set_soc_revision(unsigned int rev);
51void imx_init_revision_from_anatop(void);
52struct device *imx_soc_device_init(void);
53void imx6_enable_rbc(bool enable);
54void imx_gpc_check_dt(void);
55void imx_gpc_set_arm_power_in_lpm(bool power_off);
56void imx_gpc_set_l2_mem_power_in_lpm(bool power_off);
57void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
58void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
59void imx25_pm_init(void);
60void imx27_pm_init(void);
61void imx5_pmu_init(void);
62
63enum mxc_cpu_pwr_mode {
64 WAIT_CLOCKED,
65 WAIT_UNCLOCKED,
66 WAIT_UNCLOCKED_POWER_OFF,
67 STOP_POWER_ON,
68 STOP_POWER_OFF,
69};
70
71enum ulp_cpu_pwr_mode {
72 ULP_PM_HSRUN,
73 ULP_PM_RUN,
74 ULP_PM_WAIT,
75 ULP_PM_STOP,
76 ULP_PM_VLPS,
77 ULP_PM_VLLS,
78};
79
80void imx_enable_cpu(int cpu, bool enable);
81void imx_set_cpu_jump(int cpu, void *jump_addr);
82u32 imx_get_cpu_arg(int cpu);
83void imx_set_cpu_arg(int cpu, u32 arg);
84#ifdef CONFIG_SMP
85void v7_secondary_startup(void);
86void imx_scu_map_io(void);
87void imx_smp_prepare(void);
88#else
89static inline void imx_scu_map_io(void) {}
90static inline void imx_smp_prepare(void) {}
91#endif
92void imx_src_init(void);
93void imx_gpc_pre_suspend(bool arm_power_off);
94void imx_gpc_post_resume(void);
95void imx_gpc_mask_all(void);
96void imx_gpc_restore_all(void);
97void imx_gpc_hwirq_mask(unsigned int hwirq);
98void imx_gpc_hwirq_unmask(unsigned int hwirq);
99void imx_anatop_init(void);
100void imx_anatop_pre_suspend(void);
101void imx_anatop_post_resume(void);
102int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
103void imx6_set_int_mem_clk_lpm(bool enable);
104void imx6sl_set_wait_clk(bool enter);
105int imx_mmdc_get_ddr_type(void);
106int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode);
107
108void imx_cpu_die(unsigned int cpu);
109int imx_cpu_kill(unsigned int cpu);
110
111#ifdef CONFIG_SUSPEND
112void v7_cpu_resume(void);
113void imx53_suspend(void __iomem *ocram_vbase);
114extern const u32 imx53_suspend_sz;
115void imx6_suspend(void __iomem *ocram_vbase);
116#else
117static inline void v7_cpu_resume(void) {}
118static inline void imx53_suspend(void __iomem *ocram_vbase) {}
119static const u32 imx53_suspend_sz;
120static inline void imx6_suspend(void __iomem *ocram_vbase) {}
121#endif
122
123void imx6_pm_ccm_init(const char *ccm_compat);
124void imx6q_pm_init(void);
125void imx6dl_pm_init(void);
126void imx6sl_pm_init(void);
127void imx6sx_pm_init(void);
128void imx6ul_pm_init(void);
129void imx7ulp_pm_init(void);
130
131#ifdef CONFIG_PM
132void imx51_pm_init(void);
133void imx53_pm_init(void);
134#else
135static inline void imx51_pm_init(void) {}
136static inline void imx53_pm_init(void) {}
137#endif
138
139#ifdef CONFIG_NEON
140int mx51_neon_fixup(void);
141#else
142static inline int mx51_neon_fixup(void) { return 0; }
143#endif
144
145#ifdef CONFIG_CACHE_L2X0
146void imx_init_l2cache(void);
147#else
148static inline void imx_init_l2cache(void) {}
149#endif
150
151extern const struct smp_operations imx_smp_ops;
152extern const struct smp_operations ls1021a_smp_ops;
153
154#endif
155