linux/arch/arm64/kernel/fpsimd.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * FP/SIMD context switching and fault handling
   4 *
   5 * Copyright (C) 2012 ARM Ltd.
   6 * Author: Catalin Marinas <catalin.marinas@arm.com>
   7 */
   8
   9#include <linux/bitmap.h>
  10#include <linux/bitops.h>
  11#include <linux/bottom_half.h>
  12#include <linux/bug.h>
  13#include <linux/cache.h>
  14#include <linux/compat.h>
  15#include <linux/cpu.h>
  16#include <linux/cpu_pm.h>
  17#include <linux/kernel.h>
  18#include <linux/linkage.h>
  19#include <linux/irqflags.h>
  20#include <linux/init.h>
  21#include <linux/percpu.h>
  22#include <linux/prctl.h>
  23#include <linux/preempt.h>
  24#include <linux/ptrace.h>
  25#include <linux/sched/signal.h>
  26#include <linux/sched/task_stack.h>
  27#include <linux/signal.h>
  28#include <linux/slab.h>
  29#include <linux/stddef.h>
  30#include <linux/sysctl.h>
  31#include <linux/swab.h>
  32
  33#include <asm/esr.h>
  34#include <asm/fpsimd.h>
  35#include <asm/cpufeature.h>
  36#include <asm/cputype.h>
  37#include <asm/processor.h>
  38#include <asm/simd.h>
  39#include <asm/sigcontext.h>
  40#include <asm/sysreg.h>
  41#include <asm/traps.h>
  42#include <asm/virt.h>
  43
  44#define FPEXC_IOF       (1 << 0)
  45#define FPEXC_DZF       (1 << 1)
  46#define FPEXC_OFF       (1 << 2)
  47#define FPEXC_UFF       (1 << 3)
  48#define FPEXC_IXF       (1 << 4)
  49#define FPEXC_IDF       (1 << 7)
  50
  51/*
  52 * (Note: in this discussion, statements about FPSIMD apply equally to SVE.)
  53 *
  54 * In order to reduce the number of times the FPSIMD state is needlessly saved
  55 * and restored, we need to keep track of two things:
  56 * (a) for each task, we need to remember which CPU was the last one to have
  57 *     the task's FPSIMD state loaded into its FPSIMD registers;
  58 * (b) for each CPU, we need to remember which task's userland FPSIMD state has
  59 *     been loaded into its FPSIMD registers most recently, or whether it has
  60 *     been used to perform kernel mode NEON in the meantime.
  61 *
  62 * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to
  63 * the id of the current CPU every time the state is loaded onto a CPU. For (b),
  64 * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the
  65 * address of the userland FPSIMD state of the task that was loaded onto the CPU
  66 * the most recently, or NULL if kernel mode NEON has been performed after that.
  67 *
  68 * With this in place, we no longer have to restore the next FPSIMD state right
  69 * when switching between tasks. Instead, we can defer this check to userland
  70 * resume, at which time we verify whether the CPU's fpsimd_last_state and the
  71 * task's fpsimd_cpu are still mutually in sync. If this is the case, we
  72 * can omit the FPSIMD restore.
  73 *
  74 * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to
  75 * indicate whether or not the userland FPSIMD state of the current task is
  76 * present in the registers. The flag is set unless the FPSIMD registers of this
  77 * CPU currently contain the most recent userland FPSIMD state of the current
  78 * task.
  79 *
  80 * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may
  81 * save the task's FPSIMD context back to task_struct from softirq context.
  82 * To prevent this from racing with the manipulation of the task's FPSIMD state
  83 * from task context and thereby corrupting the state, it is necessary to
  84 * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE
  85 * flag with local_bh_disable() unless softirqs are already masked.
  86 *
  87 * For a certain task, the sequence may look something like this:
  88 * - the task gets scheduled in; if both the task's fpsimd_cpu field
  89 *   contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu
  90 *   variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is
  91 *   cleared, otherwise it is set;
  92 *
  93 * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's
  94 *   userland FPSIMD state is copied from memory to the registers, the task's
  95 *   fpsimd_cpu field is set to the id of the current CPU, the current
  96 *   CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the
  97 *   TIF_FOREIGN_FPSTATE flag is cleared;
  98 *
  99 * - the task executes an ordinary syscall; upon return to userland, the
 100 *   TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is
 101 *   restored;
 102 *
 103 * - the task executes a syscall which executes some NEON instructions; this is
 104 *   preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD
 105 *   register contents to memory, clears the fpsimd_last_state per-cpu variable
 106 *   and sets the TIF_FOREIGN_FPSTATE flag;
 107 *
 108 * - the task gets preempted after kernel_neon_end() is called; as we have not
 109 *   returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so
 110 *   whatever is in the FPSIMD registers is not saved to memory, but discarded.
 111 */
 112struct fpsimd_last_state_struct {
 113        struct user_fpsimd_state *st;
 114        void *sve_state;
 115        unsigned int sve_vl;
 116};
 117
 118static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state);
 119
 120/* Default VL for tasks that don't set it explicitly: */
 121static int sve_default_vl = -1;
 122
 123#ifdef CONFIG_ARM64_SVE
 124
 125/* Maximum supported vector length across all CPUs (initially poisoned) */
 126int __ro_after_init sve_max_vl = SVE_VL_MIN;
 127int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN;
 128
 129/*
 130 * Set of available vector lengths,
 131 * where length vq encoded as bit __vq_to_bit(vq):
 132 */
 133__ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
 134/* Set of vector lengths present on at least one cpu: */
 135static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX);
 136
 137static void __percpu *efi_sve_state;
 138
 139#else /* ! CONFIG_ARM64_SVE */
 140
 141/* Dummy declaration for code that will be optimised out: */
 142extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
 143extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX);
 144extern void __percpu *efi_sve_state;
 145
 146#endif /* ! CONFIG_ARM64_SVE */
 147
 148/*
 149 * Call __sve_free() directly only if you know task can't be scheduled
 150 * or preempted.
 151 */
 152static void __sve_free(struct task_struct *task)
 153{
 154        kfree(task->thread.sve_state);
 155        task->thread.sve_state = NULL;
 156}
 157
 158static void sve_free(struct task_struct *task)
 159{
 160        WARN_ON(test_tsk_thread_flag(task, TIF_SVE));
 161
 162        __sve_free(task);
 163}
 164
 165/*
 166 * TIF_SVE controls whether a task can use SVE without trapping while
 167 * in userspace, and also the way a task's FPSIMD/SVE state is stored
 168 * in thread_struct.
 169 *
 170 * The kernel uses this flag to track whether a user task is actively
 171 * using SVE, and therefore whether full SVE register state needs to
 172 * be tracked.  If not, the cheaper FPSIMD context handling code can
 173 * be used instead of the more costly SVE equivalents.
 174 *
 175 *  * TIF_SVE set:
 176 *
 177 *    The task can execute SVE instructions while in userspace without
 178 *    trapping to the kernel.
 179 *
 180 *    When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the
 181 *    corresponding Zn), P0-P15 and FFR are encoded in in
 182 *    task->thread.sve_state, formatted appropriately for vector
 183 *    length task->thread.sve_vl.
 184 *
 185 *    task->thread.sve_state must point to a valid buffer at least
 186 *    sve_state_size(task) bytes in size.
 187 *
 188 *    During any syscall, the kernel may optionally clear TIF_SVE and
 189 *    discard the vector state except for the FPSIMD subset.
 190 *
 191 *  * TIF_SVE clear:
 192 *
 193 *    An attempt by the user task to execute an SVE instruction causes
 194 *    do_sve_acc() to be called, which does some preparation and then
 195 *    sets TIF_SVE.
 196 *
 197 *    When stored, FPSIMD registers V0-V31 are encoded in
 198 *    task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are
 199 *    logically zero but not stored anywhere; P0-P15 and FFR are not
 200 *    stored and have unspecified values from userspace's point of
 201 *    view.  For hygiene purposes, the kernel zeroes them on next use,
 202 *    but userspace is discouraged from relying on this.
 203 *
 204 *    task->thread.sve_state does not need to be non-NULL, valid or any
 205 *    particular size: it must not be dereferenced.
 206 *
 207 *  * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state
 208 *    irrespective of whether TIF_SVE is clear or set, since these are
 209 *    not vector length dependent.
 210 */
 211
 212/*
 213 * Update current's FPSIMD/SVE registers from thread_struct.
 214 *
 215 * This function should be called only when the FPSIMD/SVE state in
 216 * thread_struct is known to be up to date, when preparing to enter
 217 * userspace.
 218 *
 219 * Softirqs (and preemption) must be disabled.
 220 */
 221static void task_fpsimd_load(void)
 222{
 223        WARN_ON(!in_softirq() && !irqs_disabled());
 224
 225        if (system_supports_sve() && test_thread_flag(TIF_SVE))
 226                sve_load_state(sve_pffr(&current->thread),
 227                               &current->thread.uw.fpsimd_state.fpsr,
 228                               sve_vq_from_vl(current->thread.sve_vl) - 1);
 229        else
 230                fpsimd_load_state(&current->thread.uw.fpsimd_state);
 231}
 232
 233/*
 234 * Ensure FPSIMD/SVE storage in memory for the loaded context is up to
 235 * date with respect to the CPU registers.
 236 *
 237 * Softirqs (and preemption) must be disabled.
 238 */
 239void fpsimd_save(void)
 240{
 241        struct fpsimd_last_state_struct const *last =
 242                this_cpu_ptr(&fpsimd_last_state);
 243        /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */
 244
 245        WARN_ON(!in_softirq() && !irqs_disabled());
 246
 247        if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
 248                if (system_supports_sve() && test_thread_flag(TIF_SVE)) {
 249                        if (WARN_ON(sve_get_vl() != last->sve_vl)) {
 250                                /*
 251                                 * Can't save the user regs, so current would
 252                                 * re-enter user with corrupt state.
 253                                 * There's no way to recover, so kill it:
 254                                 */
 255                                force_signal_inject(SIGKILL, SI_KERNEL, 0);
 256                                return;
 257                        }
 258
 259                        sve_save_state((char *)last->sve_state +
 260                                                sve_ffr_offset(last->sve_vl),
 261                                       &last->st->fpsr);
 262                } else
 263                        fpsimd_save_state(last->st);
 264        }
 265}
 266
 267/*
 268 * All vector length selection from userspace comes through here.
 269 * We're on a slow path, so some sanity-checks are included.
 270 * If things go wrong there's a bug somewhere, but try to fall back to a
 271 * safe choice.
 272 */
 273static unsigned int find_supported_vector_length(unsigned int vl)
 274{
 275        int bit;
 276        int max_vl = sve_max_vl;
 277
 278        if (WARN_ON(!sve_vl_valid(vl)))
 279                vl = SVE_VL_MIN;
 280
 281        if (WARN_ON(!sve_vl_valid(max_vl)))
 282                max_vl = SVE_VL_MIN;
 283
 284        if (vl > max_vl)
 285                vl = max_vl;
 286
 287        bit = find_next_bit(sve_vq_map, SVE_VQ_MAX,
 288                            __vq_to_bit(sve_vq_from_vl(vl)));
 289        return sve_vl_from_vq(__bit_to_vq(bit));
 290}
 291
 292#ifdef CONFIG_SYSCTL
 293
 294static int sve_proc_do_default_vl(struct ctl_table *table, int write,
 295                                  void __user *buffer, size_t *lenp,
 296                                  loff_t *ppos)
 297{
 298        int ret;
 299        int vl = sve_default_vl;
 300        struct ctl_table tmp_table = {
 301                .data = &vl,
 302                .maxlen = sizeof(vl),
 303        };
 304
 305        ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos);
 306        if (ret || !write)
 307                return ret;
 308
 309        /* Writing -1 has the special meaning "set to max": */
 310        if (vl == -1)
 311                vl = sve_max_vl;
 312
 313        if (!sve_vl_valid(vl))
 314                return -EINVAL;
 315
 316        sve_default_vl = find_supported_vector_length(vl);
 317        return 0;
 318}
 319
 320static struct ctl_table sve_default_vl_table[] = {
 321        {
 322                .procname       = "sve_default_vector_length",
 323                .mode           = 0644,
 324                .proc_handler   = sve_proc_do_default_vl,
 325        },
 326        { }
 327};
 328
 329static int __init sve_sysctl_init(void)
 330{
 331        if (system_supports_sve())
 332                if (!register_sysctl("abi", sve_default_vl_table))
 333                        return -EINVAL;
 334
 335        return 0;
 336}
 337
 338#else /* ! CONFIG_SYSCTL */
 339static int __init sve_sysctl_init(void) { return 0; }
 340#endif /* ! CONFIG_SYSCTL */
 341
 342#define ZREG(sve_state, vq, n) ((char *)(sve_state) +           \
 343        (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
 344
 345#ifdef CONFIG_CPU_BIG_ENDIAN
 346static __uint128_t arm64_cpu_to_le128(__uint128_t x)
 347{
 348        u64 a = swab64(x);
 349        u64 b = swab64(x >> 64);
 350
 351        return ((__uint128_t)a << 64) | b;
 352}
 353#else
 354static __uint128_t arm64_cpu_to_le128(__uint128_t x)
 355{
 356        return x;
 357}
 358#endif
 359
 360#define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x)
 361
 362/*
 363 * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to
 364 * task->thread.sve_state.
 365 *
 366 * Task can be a non-runnable task, or current.  In the latter case,
 367 * softirqs (and preemption) must be disabled.
 368 * task->thread.sve_state must point to at least sve_state_size(task)
 369 * bytes of allocated kernel memory.
 370 * task->thread.uw.fpsimd_state must be up to date before calling this
 371 * function.
 372 */
 373static void fpsimd_to_sve(struct task_struct *task)
 374{
 375        unsigned int vq;
 376        void *sst = task->thread.sve_state;
 377        struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
 378        unsigned int i;
 379        __uint128_t *p;
 380
 381        if (!system_supports_sve())
 382                return;
 383
 384        vq = sve_vq_from_vl(task->thread.sve_vl);
 385        for (i = 0; i < 32; ++i) {
 386                p = (__uint128_t *)ZREG(sst, vq, i);
 387                *p = arm64_cpu_to_le128(fst->vregs[i]);
 388        }
 389}
 390
 391/*
 392 * Transfer the SVE state in task->thread.sve_state to
 393 * task->thread.uw.fpsimd_state.
 394 *
 395 * Task can be a non-runnable task, or current.  In the latter case,
 396 * softirqs (and preemption) must be disabled.
 397 * task->thread.sve_state must point to at least sve_state_size(task)
 398 * bytes of allocated kernel memory.
 399 * task->thread.sve_state must be up to date before calling this function.
 400 */
 401static void sve_to_fpsimd(struct task_struct *task)
 402{
 403        unsigned int vq;
 404        void const *sst = task->thread.sve_state;
 405        struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state;
 406        unsigned int i;
 407        __uint128_t const *p;
 408
 409        if (!system_supports_sve())
 410                return;
 411
 412        vq = sve_vq_from_vl(task->thread.sve_vl);
 413        for (i = 0; i < 32; ++i) {
 414                p = (__uint128_t const *)ZREG(sst, vq, i);
 415                fst->vregs[i] = arm64_le128_to_cpu(*p);
 416        }
 417}
 418
 419#ifdef CONFIG_ARM64_SVE
 420
 421/*
 422 * Return how many bytes of memory are required to store the full SVE
 423 * state for task, given task's currently configured vector length.
 424 */
 425size_t sve_state_size(struct task_struct const *task)
 426{
 427        return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task->thread.sve_vl));
 428}
 429
 430/*
 431 * Ensure that task->thread.sve_state is allocated and sufficiently large.
 432 *
 433 * This function should be used only in preparation for replacing
 434 * task->thread.sve_state with new data.  The memory is always zeroed
 435 * here to prevent stale data from showing through: this is done in
 436 * the interest of testability and predictability: except in the
 437 * do_sve_acc() case, there is no ABI requirement to hide stale data
 438 * written previously be task.
 439 */
 440void sve_alloc(struct task_struct *task)
 441{
 442        if (task->thread.sve_state) {
 443                memset(task->thread.sve_state, 0, sve_state_size(current));
 444                return;
 445        }
 446
 447        /* This is a small allocation (maximum ~8KB) and Should Not Fail. */
 448        task->thread.sve_state =
 449                kzalloc(sve_state_size(task), GFP_KERNEL);
 450
 451        /*
 452         * If future SVE revisions can have larger vectors though,
 453         * this may cease to be true:
 454         */
 455        BUG_ON(!task->thread.sve_state);
 456}
 457
 458
 459/*
 460 * Ensure that task->thread.sve_state is up to date with respect to
 461 * the user task, irrespective of when SVE is in use or not.
 462 *
 463 * This should only be called by ptrace.  task must be non-runnable.
 464 * task->thread.sve_state must point to at least sve_state_size(task)
 465 * bytes of allocated kernel memory.
 466 */
 467void fpsimd_sync_to_sve(struct task_struct *task)
 468{
 469        if (!test_tsk_thread_flag(task, TIF_SVE))
 470                fpsimd_to_sve(task);
 471}
 472
 473/*
 474 * Ensure that task->thread.uw.fpsimd_state is up to date with respect to
 475 * the user task, irrespective of whether SVE is in use or not.
 476 *
 477 * This should only be called by ptrace.  task must be non-runnable.
 478 * task->thread.sve_state must point to at least sve_state_size(task)
 479 * bytes of allocated kernel memory.
 480 */
 481void sve_sync_to_fpsimd(struct task_struct *task)
 482{
 483        if (test_tsk_thread_flag(task, TIF_SVE))
 484                sve_to_fpsimd(task);
 485}
 486
 487/*
 488 * Ensure that task->thread.sve_state is up to date with respect to
 489 * the task->thread.uw.fpsimd_state.
 490 *
 491 * This should only be called by ptrace to merge new FPSIMD register
 492 * values into a task for which SVE is currently active.
 493 * task must be non-runnable.
 494 * task->thread.sve_state must point to at least sve_state_size(task)
 495 * bytes of allocated kernel memory.
 496 * task->thread.uw.fpsimd_state must already have been initialised with
 497 * the new FPSIMD register values to be merged in.
 498 */
 499void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
 500{
 501        unsigned int vq;
 502        void *sst = task->thread.sve_state;
 503        struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
 504        unsigned int i;
 505        __uint128_t *p;
 506
 507        if (!test_tsk_thread_flag(task, TIF_SVE))
 508                return;
 509
 510        vq = sve_vq_from_vl(task->thread.sve_vl);
 511
 512        memset(sst, 0, SVE_SIG_REGS_SIZE(vq));
 513
 514        for (i = 0; i < 32; ++i) {
 515                p = (__uint128_t *)ZREG(sst, vq, i);
 516                *p = arm64_cpu_to_le128(fst->vregs[i]);
 517        }
 518}
 519
 520int sve_set_vector_length(struct task_struct *task,
 521                          unsigned long vl, unsigned long flags)
 522{
 523        if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |
 524                                     PR_SVE_SET_VL_ONEXEC))
 525                return -EINVAL;
 526
 527        if (!sve_vl_valid(vl))
 528                return -EINVAL;
 529
 530        /*
 531         * Clamp to the maximum vector length that VL-agnostic SVE code can
 532         * work with.  A flag may be assigned in the future to allow setting
 533         * of larger vector lengths without confusing older software.
 534         */
 535        if (vl > SVE_VL_ARCH_MAX)
 536                vl = SVE_VL_ARCH_MAX;
 537
 538        vl = find_supported_vector_length(vl);
 539
 540        if (flags & (PR_SVE_VL_INHERIT |
 541                     PR_SVE_SET_VL_ONEXEC))
 542                task->thread.sve_vl_onexec = vl;
 543        else
 544                /* Reset VL to system default on next exec: */
 545                task->thread.sve_vl_onexec = 0;
 546
 547        /* Only actually set the VL if not deferred: */
 548        if (flags & PR_SVE_SET_VL_ONEXEC)
 549                goto out;
 550
 551        if (vl == task->thread.sve_vl)
 552                goto out;
 553
 554        /*
 555         * To ensure the FPSIMD bits of the SVE vector registers are preserved,
 556         * write any live register state back to task_struct, and convert to a
 557         * non-SVE thread.
 558         */
 559        if (task == current) {
 560                local_bh_disable();
 561
 562                fpsimd_save();
 563        }
 564
 565        fpsimd_flush_task_state(task);
 566        if (test_and_clear_tsk_thread_flag(task, TIF_SVE))
 567                sve_to_fpsimd(task);
 568
 569        if (task == current)
 570                local_bh_enable();
 571
 572        /*
 573         * Force reallocation of task SVE state to the correct size
 574         * on next use:
 575         */
 576        sve_free(task);
 577
 578        task->thread.sve_vl = vl;
 579
 580out:
 581        update_tsk_thread_flag(task, TIF_SVE_VL_INHERIT,
 582                               flags & PR_SVE_VL_INHERIT);
 583
 584        return 0;
 585}
 586
 587/*
 588 * Encode the current vector length and flags for return.
 589 * This is only required for prctl(): ptrace has separate fields
 590 *
 591 * flags are as for sve_set_vector_length().
 592 */
 593static int sve_prctl_status(unsigned long flags)
 594{
 595        int ret;
 596
 597        if (flags & PR_SVE_SET_VL_ONEXEC)
 598                ret = current->thread.sve_vl_onexec;
 599        else
 600                ret = current->thread.sve_vl;
 601
 602        if (test_thread_flag(TIF_SVE_VL_INHERIT))
 603                ret |= PR_SVE_VL_INHERIT;
 604
 605        return ret;
 606}
 607
 608/* PR_SVE_SET_VL */
 609int sve_set_current_vl(unsigned long arg)
 610{
 611        unsigned long vl, flags;
 612        int ret;
 613
 614        vl = arg & PR_SVE_VL_LEN_MASK;
 615        flags = arg & ~vl;
 616
 617        if (!system_supports_sve())
 618                return -EINVAL;
 619
 620        ret = sve_set_vector_length(current, vl, flags);
 621        if (ret)
 622                return ret;
 623
 624        return sve_prctl_status(flags);
 625}
 626
 627/* PR_SVE_GET_VL */
 628int sve_get_current_vl(void)
 629{
 630        if (!system_supports_sve())
 631                return -EINVAL;
 632
 633        return sve_prctl_status(0);
 634}
 635
 636static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX))
 637{
 638        unsigned int vq, vl;
 639        unsigned long zcr;
 640
 641        bitmap_zero(map, SVE_VQ_MAX);
 642
 643        zcr = ZCR_ELx_LEN_MASK;
 644        zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr;
 645
 646        for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) {
 647                write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */
 648                vl = sve_get_vl();
 649                vq = sve_vq_from_vl(vl); /* skip intervening lengths */
 650                set_bit(__vq_to_bit(vq), map);
 651        }
 652}
 653
 654/*
 655 * Initialise the set of known supported VQs for the boot CPU.
 656 * This is called during kernel boot, before secondary CPUs are brought up.
 657 */
 658void __init sve_init_vq_map(void)
 659{
 660        sve_probe_vqs(sve_vq_map);
 661        bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX);
 662}
 663
 664/*
 665 * If we haven't committed to the set of supported VQs yet, filter out
 666 * those not supported by the current CPU.
 667 * This function is called during the bring-up of early secondary CPUs only.
 668 */
 669void sve_update_vq_map(void)
 670{
 671        DECLARE_BITMAP(tmp_map, SVE_VQ_MAX);
 672
 673        sve_probe_vqs(tmp_map);
 674        bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX);
 675        bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX);
 676}
 677
 678/*
 679 * Check whether the current CPU supports all VQs in the committed set.
 680 * This function is called during the bring-up of late secondary CPUs only.
 681 */
 682int sve_verify_vq_map(void)
 683{
 684        DECLARE_BITMAP(tmp_map, SVE_VQ_MAX);
 685        unsigned long b;
 686
 687        sve_probe_vqs(tmp_map);
 688
 689        bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX);
 690        if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) {
 691                pr_warn("SVE: cpu%d: Required vector length(s) missing\n",
 692                        smp_processor_id());
 693                return -EINVAL;
 694        }
 695
 696        if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available())
 697                return 0;
 698
 699        /*
 700         * For KVM, it is necessary to ensure that this CPU doesn't
 701         * support any vector length that guests may have probed as
 702         * unsupported.
 703         */
 704
 705        /* Recover the set of supported VQs: */
 706        bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX);
 707        /* Find VQs supported that are not globally supported: */
 708        bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX);
 709
 710        /* Find the lowest such VQ, if any: */
 711        b = find_last_bit(tmp_map, SVE_VQ_MAX);
 712        if (b >= SVE_VQ_MAX)
 713                return 0; /* no mismatches */
 714
 715        /*
 716         * Mismatches above sve_max_virtualisable_vl are fine, since
 717         * no guest is allowed to configure ZCR_EL2.LEN to exceed this:
 718         */
 719        if (sve_vl_from_vq(__bit_to_vq(b)) <= sve_max_virtualisable_vl) {
 720                pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n",
 721                        smp_processor_id());
 722                return -EINVAL;
 723        }
 724
 725        return 0;
 726}
 727
 728static void __init sve_efi_setup(void)
 729{
 730        if (!IS_ENABLED(CONFIG_EFI))
 731                return;
 732
 733        /*
 734         * alloc_percpu() warns and prints a backtrace if this goes wrong.
 735         * This is evidence of a crippled system and we are returning void,
 736         * so no attempt is made to handle this situation here.
 737         */
 738        if (!sve_vl_valid(sve_max_vl))
 739                goto fail;
 740
 741        efi_sve_state = __alloc_percpu(
 742                SVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES);
 743        if (!efi_sve_state)
 744                goto fail;
 745
 746        return;
 747
 748fail:
 749        panic("Cannot allocate percpu memory for EFI SVE save/restore");
 750}
 751
 752/*
 753 * Enable SVE for EL1.
 754 * Intended for use by the cpufeatures code during CPU boot.
 755 */
 756void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p)
 757{
 758        write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1);
 759        isb();
 760}
 761
 762/*
 763 * Read the pseudo-ZCR used by cpufeatures to identify the supported SVE
 764 * vector length.
 765 *
 766 * Use only if SVE is present.
 767 * This function clobbers the SVE vector length.
 768 */
 769u64 read_zcr_features(void)
 770{
 771        u64 zcr;
 772        unsigned int vq_max;
 773
 774        /*
 775         * Set the maximum possible VL, and write zeroes to all other
 776         * bits to see if they stick.
 777         */
 778        sve_kernel_enable(NULL);
 779        write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1);
 780
 781        zcr = read_sysreg_s(SYS_ZCR_EL1);
 782        zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */
 783        vq_max = sve_vq_from_vl(sve_get_vl());
 784        zcr |= vq_max - 1; /* set LEN field to maximum effective value */
 785
 786        return zcr;
 787}
 788
 789void __init sve_setup(void)
 790{
 791        u64 zcr;
 792        DECLARE_BITMAP(tmp_map, SVE_VQ_MAX);
 793        unsigned long b;
 794
 795        if (!system_supports_sve())
 796                return;
 797
 798        /*
 799         * The SVE architecture mandates support for 128-bit vectors,
 800         * so sve_vq_map must have at least SVE_VQ_MIN set.
 801         * If something went wrong, at least try to patch it up:
 802         */
 803        if (WARN_ON(!test_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map)))
 804                set_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map);
 805
 806        zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1);
 807        sve_max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1);
 808
 809        /*
 810         * Sanity-check that the max VL we determined through CPU features
 811         * corresponds properly to sve_vq_map.  If not, do our best:
 812         */
 813        if (WARN_ON(sve_max_vl != find_supported_vector_length(sve_max_vl)))
 814                sve_max_vl = find_supported_vector_length(sve_max_vl);
 815
 816        /*
 817         * For the default VL, pick the maximum supported value <= 64.
 818         * VL == 64 is guaranteed not to grow the signal frame.
 819         */
 820        sve_default_vl = find_supported_vector_length(64);
 821
 822        bitmap_andnot(tmp_map, sve_vq_partial_map, sve_vq_map,
 823                      SVE_VQ_MAX);
 824
 825        b = find_last_bit(tmp_map, SVE_VQ_MAX);
 826        if (b >= SVE_VQ_MAX)
 827                /* No non-virtualisable VLs found */
 828                sve_max_virtualisable_vl = SVE_VQ_MAX;
 829        else if (WARN_ON(b == SVE_VQ_MAX - 1))
 830                /* No virtualisable VLs?  This is architecturally forbidden. */
 831                sve_max_virtualisable_vl = SVE_VQ_MIN;
 832        else /* b + 1 < SVE_VQ_MAX */
 833                sve_max_virtualisable_vl = sve_vl_from_vq(__bit_to_vq(b + 1));
 834
 835        if (sve_max_virtualisable_vl > sve_max_vl)
 836                sve_max_virtualisable_vl = sve_max_vl;
 837
 838        pr_info("SVE: maximum available vector length %u bytes per vector\n",
 839                sve_max_vl);
 840        pr_info("SVE: default vector length %u bytes per vector\n",
 841                sve_default_vl);
 842
 843        /* KVM decides whether to support mismatched systems. Just warn here: */
 844        if (sve_max_virtualisable_vl < sve_max_vl)
 845                pr_warn("SVE: unvirtualisable vector lengths present\n");
 846
 847        sve_efi_setup();
 848}
 849
 850/*
 851 * Called from the put_task_struct() path, which cannot get here
 852 * unless dead_task is really dead and not schedulable.
 853 */
 854void fpsimd_release_task(struct task_struct *dead_task)
 855{
 856        __sve_free(dead_task);
 857}
 858
 859#endif /* CONFIG_ARM64_SVE */
 860
 861/*
 862 * Trapped SVE access
 863 *
 864 * Storage is allocated for the full SVE state, the current FPSIMD
 865 * register contents are migrated across, and TIF_SVE is set so that
 866 * the SVE access trap will be disabled the next time this task
 867 * reaches ret_to_user.
 868 *
 869 * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load()
 870 * would have disabled the SVE access trap for userspace during
 871 * ret_to_user, making an SVE access trap impossible in that case.
 872 */
 873asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs)
 874{
 875        /* Even if we chose not to use SVE, the hardware could still trap: */
 876        if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) {
 877                force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc);
 878                return;
 879        }
 880
 881        sve_alloc(current);
 882
 883        local_bh_disable();
 884
 885        fpsimd_save();
 886
 887        /* Force ret_to_user to reload the registers: */
 888        fpsimd_flush_task_state(current);
 889
 890        fpsimd_to_sve(current);
 891        if (test_and_set_thread_flag(TIF_SVE))
 892                WARN_ON(1); /* SVE access shouldn't have trapped */
 893
 894        local_bh_enable();
 895}
 896
 897/*
 898 * Trapped FP/ASIMD access.
 899 */
 900asmlinkage void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
 901{
 902        /* TODO: implement lazy context saving/restoring */
 903        WARN_ON(1);
 904}
 905
 906/*
 907 * Raise a SIGFPE for the current process.
 908 */
 909asmlinkage void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs)
 910{
 911        unsigned int si_code = FPE_FLTUNK;
 912
 913        if (esr & ESR_ELx_FP_EXC_TFV) {
 914                if (esr & FPEXC_IOF)
 915                        si_code = FPE_FLTINV;
 916                else if (esr & FPEXC_DZF)
 917                        si_code = FPE_FLTDIV;
 918                else if (esr & FPEXC_OFF)
 919                        si_code = FPE_FLTOVF;
 920                else if (esr & FPEXC_UFF)
 921                        si_code = FPE_FLTUND;
 922                else if (esr & FPEXC_IXF)
 923                        si_code = FPE_FLTRES;
 924        }
 925
 926        send_sig_fault(SIGFPE, si_code,
 927                       (void __user *)instruction_pointer(regs),
 928                       current);
 929}
 930
 931void fpsimd_thread_switch(struct task_struct *next)
 932{
 933        bool wrong_task, wrong_cpu;
 934
 935        if (!system_supports_fpsimd())
 936                return;
 937
 938        /* Save unsaved fpsimd state, if any: */
 939        fpsimd_save();
 940
 941        /*
 942         * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's
 943         * state.  For kernel threads, FPSIMD registers are never loaded
 944         * and wrong_task and wrong_cpu will always be true.
 945         */
 946        wrong_task = __this_cpu_read(fpsimd_last_state.st) !=
 947                                        &next->thread.uw.fpsimd_state;
 948        wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id();
 949
 950        update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE,
 951                               wrong_task || wrong_cpu);
 952}
 953
 954void fpsimd_flush_thread(void)
 955{
 956        int vl, supported_vl;
 957
 958        if (!system_supports_fpsimd())
 959                return;
 960
 961        local_bh_disable();
 962
 963        fpsimd_flush_task_state(current);
 964        memset(&current->thread.uw.fpsimd_state, 0,
 965               sizeof(current->thread.uw.fpsimd_state));
 966
 967        if (system_supports_sve()) {
 968                clear_thread_flag(TIF_SVE);
 969                sve_free(current);
 970
 971                /*
 972                 * Reset the task vector length as required.
 973                 * This is where we ensure that all user tasks have a valid
 974                 * vector length configured: no kernel task can become a user
 975                 * task without an exec and hence a call to this function.
 976                 * By the time the first call to this function is made, all
 977                 * early hardware probing is complete, so sve_default_vl
 978                 * should be valid.
 979                 * If a bug causes this to go wrong, we make some noise and
 980                 * try to fudge thread.sve_vl to a safe value here.
 981                 */
 982                vl = current->thread.sve_vl_onexec ?
 983                        current->thread.sve_vl_onexec : sve_default_vl;
 984
 985                if (WARN_ON(!sve_vl_valid(vl)))
 986                        vl = SVE_VL_MIN;
 987
 988                supported_vl = find_supported_vector_length(vl);
 989                if (WARN_ON(supported_vl != vl))
 990                        vl = supported_vl;
 991
 992                current->thread.sve_vl = vl;
 993
 994                /*
 995                 * If the task is not set to inherit, ensure that the vector
 996                 * length will be reset by a subsequent exec:
 997                 */
 998                if (!test_thread_flag(TIF_SVE_VL_INHERIT))
 999                        current->thread.sve_vl_onexec = 0;
1000        }
1001
1002        local_bh_enable();
1003}
1004
1005/*
1006 * Save the userland FPSIMD state of 'current' to memory, but only if the state
1007 * currently held in the registers does in fact belong to 'current'
1008 */
1009void fpsimd_preserve_current_state(void)
1010{
1011        if (!system_supports_fpsimd())
1012                return;
1013
1014        local_bh_disable();
1015        fpsimd_save();
1016        local_bh_enable();
1017}
1018
1019/*
1020 * Like fpsimd_preserve_current_state(), but ensure that
1021 * current->thread.uw.fpsimd_state is updated so that it can be copied to
1022 * the signal frame.
1023 */
1024void fpsimd_signal_preserve_current_state(void)
1025{
1026        fpsimd_preserve_current_state();
1027        if (system_supports_sve() && test_thread_flag(TIF_SVE))
1028                sve_to_fpsimd(current);
1029}
1030
1031/*
1032 * Associate current's FPSIMD context with this cpu
1033 * Preemption must be disabled when calling this function.
1034 */
1035void fpsimd_bind_task_to_cpu(void)
1036{
1037        struct fpsimd_last_state_struct *last =
1038                this_cpu_ptr(&fpsimd_last_state);
1039
1040        last->st = &current->thread.uw.fpsimd_state;
1041        last->sve_state = current->thread.sve_state;
1042        last->sve_vl = current->thread.sve_vl;
1043        current->thread.fpsimd_cpu = smp_processor_id();
1044
1045        if (system_supports_sve()) {
1046                /* Toggle SVE trapping for userspace if needed */
1047                if (test_thread_flag(TIF_SVE))
1048                        sve_user_enable();
1049                else
1050                        sve_user_disable();
1051
1052                /* Serialised by exception return to user */
1053        }
1054}
1055
1056void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state,
1057                              unsigned int sve_vl)
1058{
1059        struct fpsimd_last_state_struct *last =
1060                this_cpu_ptr(&fpsimd_last_state);
1061
1062        WARN_ON(!in_softirq() && !irqs_disabled());
1063
1064        last->st = st;
1065        last->sve_state = sve_state;
1066        last->sve_vl = sve_vl;
1067}
1068
1069/*
1070 * Load the userland FPSIMD state of 'current' from memory, but only if the
1071 * FPSIMD state already held in the registers is /not/ the most recent FPSIMD
1072 * state of 'current'
1073 */
1074void fpsimd_restore_current_state(void)
1075{
1076        if (!system_supports_fpsimd())
1077                return;
1078
1079        local_bh_disable();
1080
1081        if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) {
1082                task_fpsimd_load();
1083                fpsimd_bind_task_to_cpu();
1084        }
1085
1086        local_bh_enable();
1087}
1088
1089/*
1090 * Load an updated userland FPSIMD state for 'current' from memory and set the
1091 * flag that indicates that the FPSIMD register contents are the most recent
1092 * FPSIMD state of 'current'
1093 */
1094void fpsimd_update_current_state(struct user_fpsimd_state const *state)
1095{
1096        if (!system_supports_fpsimd())
1097                return;
1098
1099        local_bh_disable();
1100
1101        current->thread.uw.fpsimd_state = *state;
1102        if (system_supports_sve() && test_thread_flag(TIF_SVE))
1103                fpsimd_to_sve(current);
1104
1105        task_fpsimd_load();
1106        fpsimd_bind_task_to_cpu();
1107
1108        clear_thread_flag(TIF_FOREIGN_FPSTATE);
1109
1110        local_bh_enable();
1111}
1112
1113/*
1114 * Invalidate live CPU copies of task t's FPSIMD state
1115 *
1116 * This function may be called with preemption enabled.  The barrier()
1117 * ensures that the assignment to fpsimd_cpu is visible to any
1118 * preemption/softirq that could race with set_tsk_thread_flag(), so
1119 * that TIF_FOREIGN_FPSTATE cannot be spuriously re-cleared.
1120 *
1121 * The final barrier ensures that TIF_FOREIGN_FPSTATE is seen set by any
1122 * subsequent code.
1123 */
1124void fpsimd_flush_task_state(struct task_struct *t)
1125{
1126        t->thread.fpsimd_cpu = NR_CPUS;
1127
1128        barrier();
1129        set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE);
1130
1131        barrier();
1132}
1133
1134/*
1135 * Invalidate any task's FPSIMD state that is present on this cpu.
1136 * This function must be called with softirqs disabled.
1137 */
1138void fpsimd_flush_cpu_state(void)
1139{
1140        __this_cpu_write(fpsimd_last_state.st, NULL);
1141        set_thread_flag(TIF_FOREIGN_FPSTATE);
1142}
1143
1144#ifdef CONFIG_KERNEL_MODE_NEON
1145
1146DEFINE_PER_CPU(bool, kernel_neon_busy);
1147EXPORT_PER_CPU_SYMBOL(kernel_neon_busy);
1148
1149/*
1150 * Kernel-side NEON support functions
1151 */
1152
1153/*
1154 * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling
1155 * context
1156 *
1157 * Must not be called unless may_use_simd() returns true.
1158 * Task context in the FPSIMD registers is saved back to memory as necessary.
1159 *
1160 * A matching call to kernel_neon_end() must be made before returning from the
1161 * calling context.
1162 *
1163 * The caller may freely use the FPSIMD registers until kernel_neon_end() is
1164 * called.
1165 */
1166void kernel_neon_begin(void)
1167{
1168        if (WARN_ON(!system_supports_fpsimd()))
1169                return;
1170
1171        BUG_ON(!may_use_simd());
1172
1173        local_bh_disable();
1174
1175        __this_cpu_write(kernel_neon_busy, true);
1176
1177        /* Save unsaved fpsimd state, if any: */
1178        fpsimd_save();
1179
1180        /* Invalidate any task state remaining in the fpsimd regs: */
1181        fpsimd_flush_cpu_state();
1182
1183        preempt_disable();
1184
1185        local_bh_enable();
1186}
1187EXPORT_SYMBOL(kernel_neon_begin);
1188
1189/*
1190 * kernel_neon_end(): give the CPU FPSIMD registers back to the current task
1191 *
1192 * Must be called from a context in which kernel_neon_begin() was previously
1193 * called, with no call to kernel_neon_end() in the meantime.
1194 *
1195 * The caller must not use the FPSIMD registers after this function is called,
1196 * unless kernel_neon_begin() is called again in the meantime.
1197 */
1198void kernel_neon_end(void)
1199{
1200        bool busy;
1201
1202        if (!system_supports_fpsimd())
1203                return;
1204
1205        busy = __this_cpu_xchg(kernel_neon_busy, false);
1206        WARN_ON(!busy); /* No matching kernel_neon_begin()? */
1207
1208        preempt_enable();
1209}
1210EXPORT_SYMBOL(kernel_neon_end);
1211
1212#ifdef CONFIG_EFI
1213
1214static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state);
1215static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);
1216static DEFINE_PER_CPU(bool, efi_sve_state_used);
1217
1218/*
1219 * EFI runtime services support functions
1220 *
1221 * The ABI for EFI runtime services allows EFI to use FPSIMD during the call.
1222 * This means that for EFI (and only for EFI), we have to assume that FPSIMD
1223 * is always used rather than being an optional accelerator.
1224 *
1225 * These functions provide the necessary support for ensuring FPSIMD
1226 * save/restore in the contexts from which EFI is used.
1227 *
1228 * Do not use them for any other purpose -- if tempted to do so, you are
1229 * either doing something wrong or you need to propose some refactoring.
1230 */
1231
1232/*
1233 * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call
1234 */
1235void __efi_fpsimd_begin(void)
1236{
1237        if (!system_supports_fpsimd())
1238                return;
1239
1240        WARN_ON(preemptible());
1241
1242        if (may_use_simd()) {
1243                kernel_neon_begin();
1244        } else {
1245                /*
1246                 * If !efi_sve_state, SVE can't be in use yet and doesn't need
1247                 * preserving:
1248                 */
1249                if (system_supports_sve() && likely(efi_sve_state)) {
1250                        char *sve_state = this_cpu_ptr(efi_sve_state);
1251
1252                        __this_cpu_write(efi_sve_state_used, true);
1253
1254                        sve_save_state(sve_state + sve_ffr_offset(sve_max_vl),
1255                                       &this_cpu_ptr(&efi_fpsimd_state)->fpsr);
1256                } else {
1257                        fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
1258                }
1259
1260                __this_cpu_write(efi_fpsimd_state_used, true);
1261        }
1262}
1263
1264/*
1265 * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call
1266 */
1267void __efi_fpsimd_end(void)
1268{
1269        if (!system_supports_fpsimd())
1270                return;
1271
1272        if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) {
1273                kernel_neon_end();
1274        } else {
1275                if (system_supports_sve() &&
1276                    likely(__this_cpu_read(efi_sve_state_used))) {
1277                        char const *sve_state = this_cpu_ptr(efi_sve_state);
1278
1279                        sve_load_state(sve_state + sve_ffr_offset(sve_max_vl),
1280                                       &this_cpu_ptr(&efi_fpsimd_state)->fpsr,
1281                                       sve_vq_from_vl(sve_get_vl()) - 1);
1282
1283                        __this_cpu_write(efi_sve_state_used, false);
1284                } else {
1285                        fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state));
1286                }
1287        }
1288}
1289
1290#endif /* CONFIG_EFI */
1291
1292#endif /* CONFIG_KERNEL_MODE_NEON */
1293
1294#ifdef CONFIG_CPU_PM
1295static int fpsimd_cpu_pm_notifier(struct notifier_block *self,
1296                                  unsigned long cmd, void *v)
1297{
1298        switch (cmd) {
1299        case CPU_PM_ENTER:
1300                fpsimd_save();
1301                fpsimd_flush_cpu_state();
1302                break;
1303        case CPU_PM_EXIT:
1304                break;
1305        case CPU_PM_ENTER_FAILED:
1306        default:
1307                return NOTIFY_DONE;
1308        }
1309        return NOTIFY_OK;
1310}
1311
1312static struct notifier_block fpsimd_cpu_pm_notifier_block = {
1313        .notifier_call = fpsimd_cpu_pm_notifier,
1314};
1315
1316static void __init fpsimd_pm_init(void)
1317{
1318        cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block);
1319}
1320
1321#else
1322static inline void fpsimd_pm_init(void) { }
1323#endif /* CONFIG_CPU_PM */
1324
1325#ifdef CONFIG_HOTPLUG_CPU
1326static int fpsimd_cpu_dead(unsigned int cpu)
1327{
1328        per_cpu(fpsimd_last_state.st, cpu) = NULL;
1329        return 0;
1330}
1331
1332static inline void fpsimd_hotplug_init(void)
1333{
1334        cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead",
1335                                  NULL, fpsimd_cpu_dead);
1336}
1337
1338#else
1339static inline void fpsimd_hotplug_init(void) { }
1340#endif
1341
1342/*
1343 * FP/SIMD support code initialisation.
1344 */
1345static int __init fpsimd_init(void)
1346{
1347        if (cpu_have_named_feature(FP)) {
1348                fpsimd_pm_init();
1349                fpsimd_hotplug_init();
1350        } else {
1351                pr_notice("Floating-point is not implemented\n");
1352        }
1353
1354        if (!cpu_have_named_feature(ASIMD))
1355                pr_notice("Advanced SIMD is not implemented\n");
1356
1357        return sve_sysctl_init();
1358}
1359core_initcall(fpsimd_init);
1360