1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Port on Texas Instruments TMS320C6x architecture 4 * 5 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated 6 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) 7 */ 8#ifndef _ASM_C6X_PGTABLE_H 9#define _ASM_C6X_PGTABLE_H 10 11#include <asm-generic/4level-fixup.h> 12 13#include <asm/setup.h> 14#include <asm/page.h> 15 16/* 17 * All 32bit addresses are effectively valid for vmalloc... 18 * Sort of meaningless for non-VM targets. 19 */ 20#define VMALLOC_START 0 21#define VMALLOC_END 0xffffffff 22 23#define pgd_present(pgd) (1) 24#define pgd_none(pgd) (0) 25#define pgd_bad(pgd) (0) 26#define pgd_clear(pgdp) 27#define kern_addr_valid(addr) (1) 28 29#define pmd_offset(a, b) ((void *)0) 30#define pmd_none(x) (!pmd_val(x)) 31#define pmd_present(x) (pmd_val(x)) 32#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 33#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) 34 35#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ 36#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ 37#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */ 38#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */ 39#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */ 40#define pgprot_noncached(prot) (prot) 41 42extern void paging_init(void); 43 44#define __swp_type(x) (0) 45#define __swp_offset(x) (0) 46#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) 47#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 48#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 49 50#define set_pte(pteptr, pteval) (*(pteptr) = pteval) 51#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) 52 53/* 54 * ZERO_PAGE is a global shared page that is always zero: used 55 * for zero-mapped memory areas etc.. 56 */ 57#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) 58extern unsigned long empty_zero_page; 59 60#define swapper_pg_dir ((pgd_t *) 0) 61 62/* 63 * No page table caches to initialise 64 */ 65#define pgtable_cache_init() do { } while (0) 66 67/* 68 * c6x is !MMU, so define the simpliest implementation 69 */ 70#define pgprot_writecombine pgprot_noncached 71 72#include <asm-generic/pgtable.h> 73 74#endif /* _ASM_C6X_PGTABLE_H */ 75