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43#include <linux/sched/mm.h>
44#include <linux/highmem.h>
45#include <linux/debugfs.h>
46#include <linux/bug.h>
47#include <linux/vmalloc.h>
48#include <linux/export.h>
49#include <linux/init.h>
50#include <linux/gfp.h>
51#include <linux/memblock.h>
52#include <linux/seq_file.h>
53#include <linux/crash_dump.h>
54#ifdef CONFIG_KEXEC_CORE
55#include <linux/kexec.h>
56#endif
57
58#include <trace/events/xen.h>
59
60#include <asm/pgtable.h>
61#include <asm/tlbflush.h>
62#include <asm/fixmap.h>
63#include <asm/mmu_context.h>
64#include <asm/setup.h>
65#include <asm/paravirt.h>
66#include <asm/e820/api.h>
67#include <asm/linkage.h>
68#include <asm/page.h>
69#include <asm/init.h>
70#include <asm/pat.h>
71#include <asm/smp.h>
72#include <asm/tlb.h>
73
74#include <asm/xen/hypercall.h>
75#include <asm/xen/hypervisor.h>
76
77#include <xen/xen.h>
78#include <xen/page.h>
79#include <xen/interface/xen.h>
80#include <xen/interface/hvm/hvm_op.h>
81#include <xen/interface/version.h>
82#include <xen/interface/memory.h>
83#include <xen/hvc-console.h>
84
85#include "multicalls.h"
86#include "mmu.h"
87#include "debugfs.h"
88
89#ifdef CONFIG_X86_32
90
91
92
93
94
95#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
96static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
97#endif
98#ifdef CONFIG_X86_64
99
100static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
101#endif
102
103
104
105
106
107static DEFINE_SPINLOCK(xen_reservation_lock);
108
109
110
111
112
113
114
115
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117
118
119
120
121
122
123DEFINE_PER_CPU(unsigned long, xen_cr3);
124DEFINE_PER_CPU(unsigned long, xen_current_cr3);
125
126static phys_addr_t xen_pt_base, xen_pt_size __initdata;
127
128static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
129
130
131
132
133
134#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
135
136void make_lowmem_page_readonly(void *vaddr)
137{
138 pte_t *pte, ptev;
139 unsigned long address = (unsigned long)vaddr;
140 unsigned int level;
141
142 pte = lookup_address(address, &level);
143 if (pte == NULL)
144 return;
145
146 ptev = pte_wrprotect(*pte);
147
148 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
149 BUG();
150}
151
152void make_lowmem_page_readwrite(void *vaddr)
153{
154 pte_t *pte, ptev;
155 unsigned long address = (unsigned long)vaddr;
156 unsigned int level;
157
158 pte = lookup_address(address, &level);
159 if (pte == NULL)
160 return;
161
162 ptev = pte_mkwrite(*pte);
163
164 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
165 BUG();
166}
167
168
169
170
171
172
173static bool xen_page_pinned(void *ptr)
174{
175 if (static_branch_likely(&xen_struct_pages_ready)) {
176 struct page *page = virt_to_page(ptr);
177
178 return PagePinned(page);
179 }
180 return true;
181}
182
183static void xen_extend_mmu_update(const struct mmu_update *update)
184{
185 struct multicall_space mcs;
186 struct mmu_update *u;
187
188 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
189
190 if (mcs.mc != NULL) {
191 mcs.mc->args[1]++;
192 } else {
193 mcs = __xen_mc_entry(sizeof(*u));
194 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
195 }
196
197 u = mcs.args;
198 *u = *update;
199}
200
201static void xen_extend_mmuext_op(const struct mmuext_op *op)
202{
203 struct multicall_space mcs;
204 struct mmuext_op *u;
205
206 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
207
208 if (mcs.mc != NULL) {
209 mcs.mc->args[1]++;
210 } else {
211 mcs = __xen_mc_entry(sizeof(*u));
212 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
213 }
214
215 u = mcs.args;
216 *u = *op;
217}
218
219static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
220{
221 struct mmu_update u;
222
223 preempt_disable();
224
225 xen_mc_batch();
226
227
228 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
229 u.val = pmd_val_ma(val);
230 xen_extend_mmu_update(&u);
231
232 xen_mc_issue(PARAVIRT_LAZY_MMU);
233
234 preempt_enable();
235}
236
237static void xen_set_pmd(pmd_t *ptr, pmd_t val)
238{
239 trace_xen_mmu_set_pmd(ptr, val);
240
241
242
243 if (!xen_page_pinned(ptr)) {
244 *ptr = val;
245 return;
246 }
247
248 xen_set_pmd_hyper(ptr, val);
249}
250
251
252
253
254
255void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
256{
257 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
258}
259
260static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
261{
262 struct mmu_update u;
263
264 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
265 return false;
266
267 xen_mc_batch();
268
269 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
270 u.val = pte_val_ma(pteval);
271 xen_extend_mmu_update(&u);
272
273 xen_mc_issue(PARAVIRT_LAZY_MMU);
274
275 return true;
276}
277
278static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
279{
280 if (!xen_batched_set_pte(ptep, pteval)) {
281
282
283
284
285
286
287
288 struct mmu_update u;
289
290 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
291 u.val = pte_val_ma(pteval);
292 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
293 }
294}
295
296static void xen_set_pte(pte_t *ptep, pte_t pteval)
297{
298 trace_xen_mmu_set_pte(ptep, pteval);
299 __xen_set_pte(ptep, pteval);
300}
301
302static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
303 pte_t *ptep, pte_t pteval)
304{
305 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
306 __xen_set_pte(ptep, pteval);
307}
308
309pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
310 unsigned long addr, pte_t *ptep)
311{
312
313 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
314 return *ptep;
315}
316
317void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
318 pte_t *ptep, pte_t pte)
319{
320 struct mmu_update u;
321
322 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
323 xen_mc_batch();
324
325 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
326 u.val = pte_val_ma(pte);
327 xen_extend_mmu_update(&u);
328
329 xen_mc_issue(PARAVIRT_LAZY_MMU);
330}
331
332
333static pteval_t pte_mfn_to_pfn(pteval_t val)
334{
335 if (val & _PAGE_PRESENT) {
336 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
337 unsigned long pfn = mfn_to_pfn(mfn);
338
339 pteval_t flags = val & PTE_FLAGS_MASK;
340 if (unlikely(pfn == ~0))
341 val = flags & ~_PAGE_PRESENT;
342 else
343 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
344 }
345
346 return val;
347}
348
349static pteval_t pte_pfn_to_mfn(pteval_t val)
350{
351 if (val & _PAGE_PRESENT) {
352 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
353 pteval_t flags = val & PTE_FLAGS_MASK;
354 unsigned long mfn;
355
356 mfn = __pfn_to_mfn(pfn);
357
358
359
360
361
362
363
364 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
365 mfn = 0;
366 flags = 0;
367 } else
368 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
369 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
370 }
371
372 return val;
373}
374
375__visible pteval_t xen_pte_val(pte_t pte)
376{
377 pteval_t pteval = pte.pte;
378
379 return pte_mfn_to_pfn(pteval);
380}
381PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
382
383__visible pgdval_t xen_pgd_val(pgd_t pgd)
384{
385 return pte_mfn_to_pfn(pgd.pgd);
386}
387PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
388
389__visible pte_t xen_make_pte(pteval_t pte)
390{
391 pte = pte_pfn_to_mfn(pte);
392
393 return native_make_pte(pte);
394}
395PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
396
397__visible pgd_t xen_make_pgd(pgdval_t pgd)
398{
399 pgd = pte_pfn_to_mfn(pgd);
400 return native_make_pgd(pgd);
401}
402PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
403
404__visible pmdval_t xen_pmd_val(pmd_t pmd)
405{
406 return pte_mfn_to_pfn(pmd.pmd);
407}
408PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
409
410static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
411{
412 struct mmu_update u;
413
414 preempt_disable();
415
416 xen_mc_batch();
417
418
419 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
420 u.val = pud_val_ma(val);
421 xen_extend_mmu_update(&u);
422
423 xen_mc_issue(PARAVIRT_LAZY_MMU);
424
425 preempt_enable();
426}
427
428static void xen_set_pud(pud_t *ptr, pud_t val)
429{
430 trace_xen_mmu_set_pud(ptr, val);
431
432
433
434 if (!xen_page_pinned(ptr)) {
435 *ptr = val;
436 return;
437 }
438
439 xen_set_pud_hyper(ptr, val);
440}
441
442#ifdef CONFIG_X86_PAE
443static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
444{
445 trace_xen_mmu_set_pte_atomic(ptep, pte);
446 __xen_set_pte(ptep, pte);
447}
448
449static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
450{
451 trace_xen_mmu_pte_clear(mm, addr, ptep);
452 __xen_set_pte(ptep, native_make_pte(0));
453}
454
455static void xen_pmd_clear(pmd_t *pmdp)
456{
457 trace_xen_mmu_pmd_clear(pmdp);
458 set_pmd(pmdp, __pmd(0));
459}
460#endif
461
462__visible pmd_t xen_make_pmd(pmdval_t pmd)
463{
464 pmd = pte_pfn_to_mfn(pmd);
465 return native_make_pmd(pmd);
466}
467PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
468
469#ifdef CONFIG_X86_64
470__visible pudval_t xen_pud_val(pud_t pud)
471{
472 return pte_mfn_to_pfn(pud.pud);
473}
474PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
475
476__visible pud_t xen_make_pud(pudval_t pud)
477{
478 pud = pte_pfn_to_mfn(pud);
479
480 return native_make_pud(pud);
481}
482PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
483
484static pgd_t *xen_get_user_pgd(pgd_t *pgd)
485{
486 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
487 unsigned offset = pgd - pgd_page;
488 pgd_t *user_ptr = NULL;
489
490 if (offset < pgd_index(USER_LIMIT)) {
491 struct page *page = virt_to_page(pgd_page);
492 user_ptr = (pgd_t *)page->private;
493 if (user_ptr)
494 user_ptr += offset;
495 }
496
497 return user_ptr;
498}
499
500static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
501{
502 struct mmu_update u;
503
504 u.ptr = virt_to_machine(ptr).maddr;
505 u.val = p4d_val_ma(val);
506 xen_extend_mmu_update(&u);
507}
508
509
510
511
512
513
514
515
516static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
517{
518 preempt_disable();
519
520 xen_mc_batch();
521
522 __xen_set_p4d_hyper(ptr, val);
523
524 xen_mc_issue(PARAVIRT_LAZY_MMU);
525
526 preempt_enable();
527}
528
529static void xen_set_p4d(p4d_t *ptr, p4d_t val)
530{
531 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
532 pgd_t pgd_val;
533
534 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
535
536
537
538 if (!xen_page_pinned(ptr)) {
539 *ptr = val;
540 if (user_ptr) {
541 WARN_ON(xen_page_pinned(user_ptr));
542 pgd_val.pgd = p4d_val_ma(val);
543 *user_ptr = pgd_val;
544 }
545 return;
546 }
547
548
549
550 xen_mc_batch();
551
552 __xen_set_p4d_hyper(ptr, val);
553 if (user_ptr)
554 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
555
556 xen_mc_issue(PARAVIRT_LAZY_MMU);
557}
558
559#if CONFIG_PGTABLE_LEVELS >= 5
560__visible p4dval_t xen_p4d_val(p4d_t p4d)
561{
562 return pte_mfn_to_pfn(p4d.p4d);
563}
564PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
565
566__visible p4d_t xen_make_p4d(p4dval_t p4d)
567{
568 p4d = pte_pfn_to_mfn(p4d);
569
570 return native_make_p4d(p4d);
571}
572PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
573#endif
574#endif
575
576static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
577 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
578 bool last, unsigned long limit)
579{
580 int i, nr, flush = 0;
581
582 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
583 for (i = 0; i < nr; i++) {
584 if (!pmd_none(pmd[i]))
585 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
586 }
587 return flush;
588}
589
590static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
591 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
592 bool last, unsigned long limit)
593{
594 int i, nr, flush = 0;
595
596 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
597 for (i = 0; i < nr; i++) {
598 pmd_t *pmd;
599
600 if (pud_none(pud[i]))
601 continue;
602
603 pmd = pmd_offset(&pud[i], 0);
604 if (PTRS_PER_PMD > 1)
605 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
606 flush |= xen_pmd_walk(mm, pmd, func,
607 last && i == nr - 1, limit);
608 }
609 return flush;
610}
611
612static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
613 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
614 bool last, unsigned long limit)
615{
616 int flush = 0;
617 pud_t *pud;
618
619
620 if (p4d_none(*p4d))
621 return flush;
622
623 pud = pud_offset(p4d, 0);
624 if (PTRS_PER_PUD > 1)
625 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
626 flush |= xen_pud_walk(mm, pud, func, last, limit);
627 return flush;
628}
629
630
631
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642
643
644
645static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
646 int (*func)(struct mm_struct *mm, struct page *,
647 enum pt_level),
648 unsigned long limit)
649{
650 int i, nr, flush = 0;
651 unsigned hole_low = 0, hole_high = 0;
652
653
654 limit--;
655 BUG_ON(limit >= FIXADDR_TOP);
656
657#ifdef CONFIG_X86_64
658
659
660
661
662 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
663 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
664#endif
665
666 nr = pgd_index(limit) + 1;
667 for (i = 0; i < nr; i++) {
668 p4d_t *p4d;
669
670 if (i >= hole_low && i < hole_high)
671 continue;
672
673 if (pgd_none(pgd[i]))
674 continue;
675
676 p4d = p4d_offset(&pgd[i], 0);
677 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
678 }
679
680
681
682 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
683
684 return flush;
685}
686
687static int xen_pgd_walk(struct mm_struct *mm,
688 int (*func)(struct mm_struct *mm, struct page *,
689 enum pt_level),
690 unsigned long limit)
691{
692 return __xen_pgd_walk(mm, mm->pgd, func, limit);
693}
694
695
696
697static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
698{
699 spinlock_t *ptl = NULL;
700
701#if USE_SPLIT_PTE_PTLOCKS
702 ptl = ptlock_ptr(page);
703 spin_lock_nest_lock(ptl, &mm->page_table_lock);
704#endif
705
706 return ptl;
707}
708
709static void xen_pte_unlock(void *v)
710{
711 spinlock_t *ptl = v;
712 spin_unlock(ptl);
713}
714
715static void xen_do_pin(unsigned level, unsigned long pfn)
716{
717 struct mmuext_op op;
718
719 op.cmd = level;
720 op.arg1.mfn = pfn_to_mfn(pfn);
721
722 xen_extend_mmuext_op(&op);
723}
724
725static int xen_pin_page(struct mm_struct *mm, struct page *page,
726 enum pt_level level)
727{
728 unsigned pgfl = TestSetPagePinned(page);
729 int flush;
730
731 if (pgfl)
732 flush = 0;
733 else if (PageHighMem(page))
734
735
736 flush = 1;
737 else {
738 void *pt = lowmem_page_address(page);
739 unsigned long pfn = page_to_pfn(page);
740 struct multicall_space mcs = __xen_mc_entry(0);
741 spinlock_t *ptl;
742
743 flush = 0;
744
745
746
747
748
749
750
751
752
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754
755
756
757
758
759
760
761
762
763
764
765 ptl = NULL;
766 if (level == PT_PTE)
767 ptl = xen_pte_lock(page, mm);
768
769 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
770 pfn_pte(pfn, PAGE_KERNEL_RO),
771 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
772
773 if (ptl) {
774 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
775
776
777
778 xen_mc_callback(xen_pte_unlock, ptl);
779 }
780 }
781
782 return flush;
783}
784
785
786
787
788static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
789{
790 trace_xen_mmu_pgd_pin(mm, pgd);
791
792 xen_mc_batch();
793
794 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
795
796 xen_mc_issue(0);
797
798 kmap_flush_unused();
799
800 xen_mc_batch();
801 }
802
803#ifdef CONFIG_X86_64
804 {
805 pgd_t *user_pgd = xen_get_user_pgd(pgd);
806
807 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
808
809 if (user_pgd) {
810 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
811 xen_do_pin(MMUEXT_PIN_L4_TABLE,
812 PFN_DOWN(__pa(user_pgd)));
813 }
814 }
815#else
816#ifdef CONFIG_X86_PAE
817
818 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
819 PT_PMD);
820#endif
821 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
822#endif
823 xen_mc_issue(0);
824}
825
826static void xen_pgd_pin(struct mm_struct *mm)
827{
828 __xen_pgd_pin(mm, mm->pgd);
829}
830
831
832
833
834
835
836
837
838
839
840
841void xen_mm_pin_all(void)
842{
843 struct page *page;
844
845 spin_lock(&pgd_lock);
846
847 list_for_each_entry(page, &pgd_list, lru) {
848 if (!PagePinned(page)) {
849 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
850 SetPageSavePinned(page);
851 }
852 }
853
854 spin_unlock(&pgd_lock);
855}
856
857static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
858 enum pt_level level)
859{
860 SetPagePinned(page);
861 return 0;
862}
863
864
865
866
867
868
869
870static void __init xen_after_bootmem(void)
871{
872 static_branch_enable(&xen_struct_pages_ready);
873#ifdef CONFIG_X86_64
874 SetPagePinned(virt_to_page(level3_user_vsyscall));
875#endif
876 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
877}
878
879static int xen_unpin_page(struct mm_struct *mm, struct page *page,
880 enum pt_level level)
881{
882 unsigned pgfl = TestClearPagePinned(page);
883
884 if (pgfl && !PageHighMem(page)) {
885 void *pt = lowmem_page_address(page);
886 unsigned long pfn = page_to_pfn(page);
887 spinlock_t *ptl = NULL;
888 struct multicall_space mcs;
889
890
891
892
893
894
895
896
897 if (level == PT_PTE) {
898 ptl = xen_pte_lock(page, mm);
899
900 if (ptl)
901 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
902 }
903
904 mcs = __xen_mc_entry(0);
905
906 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
907 pfn_pte(pfn, PAGE_KERNEL),
908 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
909
910 if (ptl) {
911
912 xen_mc_callback(xen_pte_unlock, ptl);
913 }
914 }
915
916 return 0;
917}
918
919
920static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
921{
922 trace_xen_mmu_pgd_unpin(mm, pgd);
923
924 xen_mc_batch();
925
926 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
927
928#ifdef CONFIG_X86_64
929 {
930 pgd_t *user_pgd = xen_get_user_pgd(pgd);
931
932 if (user_pgd) {
933 xen_do_pin(MMUEXT_UNPIN_TABLE,
934 PFN_DOWN(__pa(user_pgd)));
935 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
936 }
937 }
938#endif
939
940#ifdef CONFIG_X86_PAE
941
942 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
943 PT_PMD);
944#endif
945
946 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
947
948 xen_mc_issue(0);
949}
950
951static void xen_pgd_unpin(struct mm_struct *mm)
952{
953 __xen_pgd_unpin(mm, mm->pgd);
954}
955
956
957
958
959
960void xen_mm_unpin_all(void)
961{
962 struct page *page;
963
964 spin_lock(&pgd_lock);
965
966 list_for_each_entry(page, &pgd_list, lru) {
967 if (PageSavePinned(page)) {
968 BUG_ON(!PagePinned(page));
969 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
970 ClearPageSavePinned(page);
971 }
972 }
973
974 spin_unlock(&pgd_lock);
975}
976
977static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
978{
979 spin_lock(&next->page_table_lock);
980 xen_pgd_pin(next);
981 spin_unlock(&next->page_table_lock);
982}
983
984static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
985{
986 spin_lock(&mm->page_table_lock);
987 xen_pgd_pin(mm);
988 spin_unlock(&mm->page_table_lock);
989}
990
991static void drop_mm_ref_this_cpu(void *info)
992{
993 struct mm_struct *mm = info;
994
995 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
996 leave_mm(smp_processor_id());
997
998
999
1000
1001
1002 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
1003 xen_mc_flush();
1004}
1005
1006#ifdef CONFIG_SMP
1007
1008
1009
1010
1011static void xen_drop_mm_ref(struct mm_struct *mm)
1012{
1013 cpumask_var_t mask;
1014 unsigned cpu;
1015
1016 drop_mm_ref_this_cpu(mm);
1017
1018
1019 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1020 for_each_online_cpu(cpu) {
1021 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1022 continue;
1023 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
1024 }
1025 return;
1026 }
1027
1028
1029
1030
1031
1032
1033
1034
1035 cpumask_clear(mask);
1036 for_each_online_cpu(cpu) {
1037 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1038 cpumask_set_cpu(cpu, mask);
1039 }
1040
1041 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
1042 free_cpumask_var(mask);
1043}
1044#else
1045static void xen_drop_mm_ref(struct mm_struct *mm)
1046{
1047 drop_mm_ref_this_cpu(mm);
1048}
1049#endif
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065static void xen_exit_mmap(struct mm_struct *mm)
1066{
1067 get_cpu();
1068 xen_drop_mm_ref(mm);
1069 put_cpu();
1070
1071 spin_lock(&mm->page_table_lock);
1072
1073
1074 if (xen_page_pinned(mm->pgd))
1075 xen_pgd_unpin(mm);
1076
1077 spin_unlock(&mm->page_table_lock);
1078}
1079
1080static void xen_post_allocator_init(void);
1081
1082static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1083{
1084 struct mmuext_op op;
1085
1086 op.cmd = cmd;
1087 op.arg1.mfn = pfn_to_mfn(pfn);
1088 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1089 BUG();
1090}
1091
1092#ifdef CONFIG_X86_64
1093static void __init xen_cleanhighmap(unsigned long vaddr,
1094 unsigned long vaddr_end)
1095{
1096 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1097 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1098
1099
1100
1101 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1102 pmd++, vaddr += PMD_SIZE) {
1103 if (pmd_none(*pmd))
1104 continue;
1105 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1106 set_pmd(pmd, __pmd(0));
1107 }
1108
1109
1110 xen_mc_flush();
1111}
1112
1113
1114
1115
1116static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1117{
1118 void *vaddr = __va(paddr);
1119 void *vaddr_end = vaddr + size;
1120
1121 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1122 make_lowmem_page_readwrite(vaddr);
1123
1124 memblock_free(paddr, size);
1125}
1126
1127static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1128{
1129 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1130
1131 if (unpin)
1132 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1133 ClearPagePinned(virt_to_page(__va(pa)));
1134 xen_free_ro_pages(pa, PAGE_SIZE);
1135}
1136
1137static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1138{
1139 unsigned long pa;
1140 pte_t *pte_tbl;
1141 int i;
1142
1143 if (pmd_large(*pmd)) {
1144 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1145 xen_free_ro_pages(pa, PMD_SIZE);
1146 return;
1147 }
1148
1149 pte_tbl = pte_offset_kernel(pmd, 0);
1150 for (i = 0; i < PTRS_PER_PTE; i++) {
1151 if (pte_none(pte_tbl[i]))
1152 continue;
1153 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1154 xen_free_ro_pages(pa, PAGE_SIZE);
1155 }
1156 set_pmd(pmd, __pmd(0));
1157 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1158}
1159
1160static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1161{
1162 unsigned long pa;
1163 pmd_t *pmd_tbl;
1164 int i;
1165
1166 if (pud_large(*pud)) {
1167 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1168 xen_free_ro_pages(pa, PUD_SIZE);
1169 return;
1170 }
1171
1172 pmd_tbl = pmd_offset(pud, 0);
1173 for (i = 0; i < PTRS_PER_PMD; i++) {
1174 if (pmd_none(pmd_tbl[i]))
1175 continue;
1176 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1177 }
1178 set_pud(pud, __pud(0));
1179 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1180}
1181
1182static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1183{
1184 unsigned long pa;
1185 pud_t *pud_tbl;
1186 int i;
1187
1188 if (p4d_large(*p4d)) {
1189 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1190 xen_free_ro_pages(pa, P4D_SIZE);
1191 return;
1192 }
1193
1194 pud_tbl = pud_offset(p4d, 0);
1195 for (i = 0; i < PTRS_PER_PUD; i++) {
1196 if (pud_none(pud_tbl[i]))
1197 continue;
1198 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1199 }
1200 set_p4d(p4d, __p4d(0));
1201 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1202}
1203
1204
1205
1206
1207
1208static void __init xen_cleanmfnmap(unsigned long vaddr)
1209{
1210 pgd_t *pgd;
1211 p4d_t *p4d;
1212 bool unpin;
1213
1214 unpin = (vaddr == 2 * PGDIR_SIZE);
1215 vaddr &= PMD_MASK;
1216 pgd = pgd_offset_k(vaddr);
1217 p4d = p4d_offset(pgd, 0);
1218 if (!p4d_none(*p4d))
1219 xen_cleanmfnmap_p4d(p4d, unpin);
1220}
1221
1222static void __init xen_pagetable_p2m_free(void)
1223{
1224 unsigned long size;
1225 unsigned long addr;
1226
1227 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1228
1229
1230 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1231 return;
1232
1233
1234 memset((void *)xen_start_info->mfn_list, 0xff, size);
1235
1236 addr = xen_start_info->mfn_list;
1237
1238
1239
1240
1241
1242
1243
1244 size = roundup(size, PMD_SIZE);
1245
1246 if (addr >= __START_KERNEL_map) {
1247 xen_cleanhighmap(addr, addr + size);
1248 size = PAGE_ALIGN(xen_start_info->nr_pages *
1249 sizeof(unsigned long));
1250 memblock_free(__pa(addr), size);
1251 } else {
1252 xen_cleanmfnmap(addr);
1253 }
1254}
1255
1256static void __init xen_pagetable_cleanhighmap(void)
1257{
1258 unsigned long size;
1259 unsigned long addr;
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270 addr = xen_start_info->pt_base;
1271 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1272
1273 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1274 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1275}
1276#endif
1277
1278static void __init xen_pagetable_p2m_setup(void)
1279{
1280 xen_vmalloc_p2m_tree();
1281
1282#ifdef CONFIG_X86_64
1283 xen_pagetable_p2m_free();
1284
1285 xen_pagetable_cleanhighmap();
1286#endif
1287
1288 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1289}
1290
1291static void __init xen_pagetable_init(void)
1292{
1293 paging_init();
1294 xen_post_allocator_init();
1295
1296 xen_pagetable_p2m_setup();
1297
1298
1299 xen_build_mfn_list_list();
1300
1301
1302 xen_remap_memory();
1303 xen_setup_mfn_list_list();
1304}
1305static void xen_write_cr2(unsigned long cr2)
1306{
1307 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1308}
1309
1310static unsigned long xen_read_cr2(void)
1311{
1312 return this_cpu_read(xen_vcpu)->arch.cr2;
1313}
1314
1315unsigned long xen_read_cr2_direct(void)
1316{
1317 return this_cpu_read(xen_vcpu_info.arch.cr2);
1318}
1319
1320static noinline void xen_flush_tlb(void)
1321{
1322 struct mmuext_op *op;
1323 struct multicall_space mcs;
1324
1325 preempt_disable();
1326
1327 mcs = xen_mc_entry(sizeof(*op));
1328
1329 op = mcs.args;
1330 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1331 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1332
1333 xen_mc_issue(PARAVIRT_LAZY_MMU);
1334
1335 preempt_enable();
1336}
1337
1338static void xen_flush_tlb_one_user(unsigned long addr)
1339{
1340 struct mmuext_op *op;
1341 struct multicall_space mcs;
1342
1343 trace_xen_mmu_flush_tlb_one_user(addr);
1344
1345 preempt_disable();
1346
1347 mcs = xen_mc_entry(sizeof(*op));
1348 op = mcs.args;
1349 op->cmd = MMUEXT_INVLPG_LOCAL;
1350 op->arg1.linear_addr = addr & PAGE_MASK;
1351 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1352
1353 xen_mc_issue(PARAVIRT_LAZY_MMU);
1354
1355 preempt_enable();
1356}
1357
1358static void xen_flush_tlb_others(const struct cpumask *cpus,
1359 const struct flush_tlb_info *info)
1360{
1361 struct {
1362 struct mmuext_op op;
1363 DECLARE_BITMAP(mask, NR_CPUS);
1364 } *args;
1365 struct multicall_space mcs;
1366 const size_t mc_entry_size = sizeof(args->op) +
1367 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1368
1369 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
1370
1371 if (cpumask_empty(cpus))
1372 return;
1373
1374 mcs = xen_mc_entry(mc_entry_size);
1375 args = mcs.args;
1376 args->op.arg2.vcpumask = to_cpumask(args->mask);
1377
1378
1379 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1380 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1381
1382 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1383 if (info->end != TLB_FLUSH_ALL &&
1384 (info->end - info->start) <= PAGE_SIZE) {
1385 args->op.cmd = MMUEXT_INVLPG_MULTI;
1386 args->op.arg1.linear_addr = info->start;
1387 }
1388
1389 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1390
1391 xen_mc_issue(PARAVIRT_LAZY_MMU);
1392}
1393
1394static unsigned long xen_read_cr3(void)
1395{
1396 return this_cpu_read(xen_cr3);
1397}
1398
1399static void set_current_cr3(void *v)
1400{
1401 this_cpu_write(xen_current_cr3, (unsigned long)v);
1402}
1403
1404static void __xen_write_cr3(bool kernel, unsigned long cr3)
1405{
1406 struct mmuext_op op;
1407 unsigned long mfn;
1408
1409 trace_xen_mmu_write_cr3(kernel, cr3);
1410
1411 if (cr3)
1412 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1413 else
1414 mfn = 0;
1415
1416 WARN_ON(mfn == 0 && kernel);
1417
1418 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1419 op.arg1.mfn = mfn;
1420
1421 xen_extend_mmuext_op(&op);
1422
1423 if (kernel) {
1424 this_cpu_write(xen_cr3, cr3);
1425
1426
1427
1428 xen_mc_callback(set_current_cr3, (void *)cr3);
1429 }
1430}
1431static void xen_write_cr3(unsigned long cr3)
1432{
1433 BUG_ON(preemptible());
1434
1435 xen_mc_batch();
1436
1437
1438
1439 this_cpu_write(xen_cr3, cr3);
1440
1441 __xen_write_cr3(true, cr3);
1442
1443#ifdef CONFIG_X86_64
1444 {
1445 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1446 if (user_pgd)
1447 __xen_write_cr3(false, __pa(user_pgd));
1448 else
1449 __xen_write_cr3(false, 0);
1450 }
1451#endif
1452
1453 xen_mc_issue(PARAVIRT_LAZY_CPU);
1454}
1455
1456#ifdef CONFIG_X86_64
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477static void __init xen_write_cr3_init(unsigned long cr3)
1478{
1479 BUG_ON(preemptible());
1480
1481 xen_mc_batch();
1482
1483
1484
1485 this_cpu_write(xen_cr3, cr3);
1486
1487 __xen_write_cr3(true, cr3);
1488
1489 xen_mc_issue(PARAVIRT_LAZY_CPU);
1490}
1491#endif
1492
1493static int xen_pgd_alloc(struct mm_struct *mm)
1494{
1495 pgd_t *pgd = mm->pgd;
1496 int ret = 0;
1497
1498 BUG_ON(PagePinned(virt_to_page(pgd)));
1499
1500#ifdef CONFIG_X86_64
1501 {
1502 struct page *page = virt_to_page(pgd);
1503 pgd_t *user_pgd;
1504
1505 BUG_ON(page->private != 0);
1506
1507 ret = -ENOMEM;
1508
1509 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1510 page->private = (unsigned long)user_pgd;
1511
1512 if (user_pgd != NULL) {
1513#ifdef CONFIG_X86_VSYSCALL_EMULATION
1514 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1515 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1516#endif
1517 ret = 0;
1518 }
1519
1520 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1521 }
1522#endif
1523 return ret;
1524}
1525
1526static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1527{
1528#ifdef CONFIG_X86_64
1529 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1530
1531 if (user_pgd)
1532 free_page((unsigned long)user_pgd);
1533#endif
1534}
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550__visible pte_t xen_make_pte_init(pteval_t pte)
1551{
1552#ifdef CONFIG_X86_64
1553 unsigned long pfn;
1554
1555
1556
1557
1558
1559
1560
1561 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1562 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1563 pfn >= xen_start_info->first_p2m_pfn &&
1564 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1565 pte &= ~_PAGE_RW;
1566#endif
1567 pte = pte_pfn_to_mfn(pte);
1568 return native_make_pte(pte);
1569}
1570PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1571
1572static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1573{
1574#ifdef CONFIG_X86_32
1575
1576 if (pte_mfn(pte) != INVALID_P2M_ENTRY
1577 && pte_val_ma(*ptep) & _PAGE_PRESENT)
1578 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1579 pte_val_ma(pte));
1580#endif
1581 __xen_set_pte(ptep, pte);
1582}
1583
1584
1585
1586static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1587{
1588#ifdef CONFIG_FLATMEM
1589 BUG_ON(mem_map);
1590#endif
1591 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1592 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1593}
1594
1595
1596static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1597{
1598#ifdef CONFIG_FLATMEM
1599 BUG_ON(mem_map);
1600#endif
1601 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1602}
1603
1604
1605
1606static void __init xen_release_pte_init(unsigned long pfn)
1607{
1608 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1609 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1610}
1611
1612static void __init xen_release_pmd_init(unsigned long pfn)
1613{
1614 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1615}
1616
1617static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1618{
1619 struct multicall_space mcs;
1620 struct mmuext_op *op;
1621
1622 mcs = __xen_mc_entry(sizeof(*op));
1623 op = mcs.args;
1624 op->cmd = cmd;
1625 op->arg1.mfn = pfn_to_mfn(pfn);
1626
1627 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1628}
1629
1630static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1631{
1632 struct multicall_space mcs;
1633 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1634
1635 mcs = __xen_mc_entry(0);
1636 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1637 pfn_pte(pfn, prot), 0);
1638}
1639
1640
1641
1642static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1643 unsigned level)
1644{
1645 bool pinned = xen_page_pinned(mm->pgd);
1646
1647 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1648
1649 if (pinned) {
1650 struct page *page = pfn_to_page(pfn);
1651
1652 if (static_branch_likely(&xen_struct_pages_ready))
1653 SetPagePinned(page);
1654
1655 if (!PageHighMem(page)) {
1656 xen_mc_batch();
1657
1658 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1659
1660 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1661 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1662
1663 xen_mc_issue(PARAVIRT_LAZY_MMU);
1664 } else {
1665
1666
1667 kmap_flush_unused();
1668 }
1669 }
1670}
1671
1672static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1673{
1674 xen_alloc_ptpage(mm, pfn, PT_PTE);
1675}
1676
1677static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1678{
1679 xen_alloc_ptpage(mm, pfn, PT_PMD);
1680}
1681
1682
1683static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1684{
1685 struct page *page = pfn_to_page(pfn);
1686 bool pinned = PagePinned(page);
1687
1688 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1689
1690 if (pinned) {
1691 if (!PageHighMem(page)) {
1692 xen_mc_batch();
1693
1694 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1695 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1696
1697 __set_pfn_prot(pfn, PAGE_KERNEL);
1698
1699 xen_mc_issue(PARAVIRT_LAZY_MMU);
1700 }
1701 ClearPagePinned(page);
1702 }
1703}
1704
1705static void xen_release_pte(unsigned long pfn)
1706{
1707 xen_release_ptpage(pfn, PT_PTE);
1708}
1709
1710static void xen_release_pmd(unsigned long pfn)
1711{
1712 xen_release_ptpage(pfn, PT_PMD);
1713}
1714
1715#ifdef CONFIG_X86_64
1716static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1717{
1718 xen_alloc_ptpage(mm, pfn, PT_PUD);
1719}
1720
1721static void xen_release_pud(unsigned long pfn)
1722{
1723 xen_release_ptpage(pfn, PT_PUD);
1724}
1725#endif
1726
1727void __init xen_reserve_top(void)
1728{
1729#ifdef CONFIG_X86_32
1730 unsigned long top = HYPERVISOR_VIRT_START;
1731 struct xen_platform_parameters pp;
1732
1733 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1734 top = pp.virt_start;
1735
1736 reserve_top_address(-top);
1737#endif
1738}
1739
1740
1741
1742
1743
1744static void * __init __ka(phys_addr_t paddr)
1745{
1746#ifdef CONFIG_X86_64
1747 return (void *)(paddr + __START_KERNEL_map);
1748#else
1749 return __va(paddr);
1750#endif
1751}
1752
1753
1754static unsigned long __init m2p(phys_addr_t maddr)
1755{
1756 phys_addr_t paddr;
1757
1758 maddr &= XEN_PTE_MFN_MASK;
1759 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1760
1761 return paddr;
1762}
1763
1764
1765static void * __init m2v(phys_addr_t maddr)
1766{
1767 return __ka(m2p(maddr));
1768}
1769
1770
1771static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1772 unsigned long flags)
1773{
1774 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1775 pte_t pte = pfn_pte(pfn, prot);
1776
1777 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1778 BUG();
1779}
1780static void __init set_page_prot(void *addr, pgprot_t prot)
1781{
1782 return set_page_prot_flags(addr, prot, UVMF_NONE);
1783}
1784#ifdef CONFIG_X86_32
1785static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1786{
1787 unsigned pmdidx, pteidx;
1788 unsigned ident_pte;
1789 unsigned long pfn;
1790
1791 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1792 PAGE_SIZE);
1793
1794 ident_pte = 0;
1795 pfn = 0;
1796 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1797 pte_t *pte_page;
1798
1799
1800 if (pmd_present(pmd[pmdidx]))
1801 pte_page = m2v(pmd[pmdidx].pmd);
1802 else {
1803
1804 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1805 break;
1806
1807 pte_page = &level1_ident_pgt[ident_pte];
1808 ident_pte += PTRS_PER_PTE;
1809
1810 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1811 }
1812
1813
1814 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1815 pte_t pte;
1816
1817 if (pfn > max_pfn_mapped)
1818 max_pfn_mapped = pfn;
1819
1820 if (!pte_none(pte_page[pteidx]))
1821 continue;
1822
1823 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1824 pte_page[pteidx] = pte;
1825 }
1826 }
1827
1828 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1829 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1830
1831 set_page_prot(pmd, PAGE_KERNEL_RO);
1832}
1833#endif
1834void __init xen_setup_machphys_mapping(void)
1835{
1836 struct xen_machphys_mapping mapping;
1837
1838 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1839 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1840 machine_to_phys_nr = mapping.max_mfn + 1;
1841 } else {
1842 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1843 }
1844#ifdef CONFIG_X86_32
1845 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1846 < machine_to_phys_mapping);
1847#endif
1848}
1849
1850#ifdef CONFIG_X86_64
1851static void __init convert_pfn_mfn(void *v)
1852{
1853 pte_t *pte = v;
1854 int i;
1855
1856
1857
1858 for (i = 0; i < PTRS_PER_PTE; i++)
1859 pte[i] = xen_make_pte(pte[i].pte);
1860}
1861static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1862 unsigned long addr)
1863{
1864 if (*pt_base == PFN_DOWN(__pa(addr))) {
1865 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1866 clear_page((void *)addr);
1867 (*pt_base)++;
1868 }
1869 if (*pt_end == PFN_DOWN(__pa(addr))) {
1870 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1871 clear_page((void *)addr);
1872 (*pt_end)--;
1873 }
1874}
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1886{
1887 pud_t *l3;
1888 pmd_t *l2;
1889 unsigned long addr[3];
1890 unsigned long pt_base, pt_end;
1891 unsigned i;
1892
1893
1894
1895
1896
1897 if (xen_start_info->mfn_list < __START_KERNEL_map)
1898 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1899 else
1900 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1901
1902 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1903 pt_end = pt_base + xen_start_info->nr_pt_frames;
1904
1905
1906 init_top_pgt[0] = __pgd(0);
1907
1908
1909
1910
1911 convert_pfn_mfn(init_top_pgt);
1912
1913
1914 convert_pfn_mfn(level3_ident_pgt);
1915
1916
1917 convert_pfn_mfn(level3_kernel_pgt);
1918
1919
1920 convert_pfn_mfn(level2_fixmap_pgt);
1921
1922
1923 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1924 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1925
1926 addr[0] = (unsigned long)pgd;
1927 addr[1] = (unsigned long)l3;
1928 addr[2] = (unsigned long)l2;
1929
1930
1931
1932
1933
1934
1935 copy_page(level2_ident_pgt, l2);
1936
1937 copy_page(level2_kernel_pgt, l2);
1938
1939
1940
1941
1942
1943 if (__supported_pte_mask & _PAGE_NX) {
1944 for (i = 0; i < PTRS_PER_PMD; ++i) {
1945 if (pmd_none(level2_ident_pgt[i]))
1946 continue;
1947 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1948 }
1949 }
1950
1951
1952 i = pgd_index(xen_start_info->mfn_list);
1953 if (i && i < pgd_index(__START_KERNEL_map))
1954 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1955
1956
1957 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1958 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1959 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1960 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1961 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1962 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1963 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1964
1965 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1966 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1967 PAGE_KERNEL_RO);
1968 }
1969
1970
1971 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1972 PFN_DOWN(__pa_symbol(init_top_pgt)));
1973
1974
1975 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1976
1977
1978
1979
1980
1981 xen_mc_batch();
1982 __xen_write_cr3(true, __pa(init_top_pgt));
1983 xen_mc_issue(PARAVIRT_LAZY_CPU);
1984
1985
1986
1987
1988
1989
1990
1991 for (i = 0; i < ARRAY_SIZE(addr); i++)
1992 check_pt_base(&pt_base, &pt_end, addr[i]);
1993
1994
1995 xen_pt_base = PFN_PHYS(pt_base);
1996 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1997 memblock_reserve(xen_pt_base, xen_pt_size);
1998
1999
2000 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
2001}
2002
2003
2004
2005
2006static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
2007{
2008 unsigned long *vaddr;
2009 unsigned long val;
2010
2011 vaddr = early_memremap_ro(addr, sizeof(val));
2012 val = *vaddr;
2013 early_memunmap(vaddr, sizeof(val));
2014 return val;
2015}
2016
2017
2018
2019
2020
2021
2022static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
2023{
2024 phys_addr_t pa;
2025 pgd_t pgd;
2026 pud_t pud;
2027 pmd_t pmd;
2028 pte_t pte;
2029
2030 pa = read_cr3_pa();
2031 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
2032 sizeof(pgd)));
2033 if (!pgd_present(pgd))
2034 return 0;
2035
2036 pa = pgd_val(pgd) & PTE_PFN_MASK;
2037 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
2038 sizeof(pud)));
2039 if (!pud_present(pud))
2040 return 0;
2041 pa = pud_val(pud) & PTE_PFN_MASK;
2042 if (pud_large(pud))
2043 return pa + (vaddr & ~PUD_MASK);
2044
2045 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
2046 sizeof(pmd)));
2047 if (!pmd_present(pmd))
2048 return 0;
2049 pa = pmd_val(pmd) & PTE_PFN_MASK;
2050 if (pmd_large(pmd))
2051 return pa + (vaddr & ~PMD_MASK);
2052
2053 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
2054 sizeof(pte)));
2055 if (!pte_present(pte))
2056 return 0;
2057 pa = pte_pfn(pte) << PAGE_SHIFT;
2058
2059 return pa | (vaddr & ~PAGE_MASK);
2060}
2061
2062
2063
2064
2065
2066void __init xen_relocate_p2m(void)
2067{
2068 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
2069 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
2070 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
2071 pte_t *pt;
2072 pmd_t *pmd;
2073 pud_t *pud;
2074 pgd_t *pgd;
2075 unsigned long *new_p2m;
2076
2077 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
2078 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
2079 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
2080 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
2081 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
2082 n_frames = n_pte + n_pt + n_pmd + n_pud;
2083
2084 new_area = xen_find_free_area(PFN_PHYS(n_frames));
2085 if (!new_area) {
2086 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
2087 BUG();
2088 }
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098 pud_phys = new_area;
2099 pmd_phys = pud_phys + PFN_PHYS(n_pud);
2100 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
2101 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
2102
2103 pgd = __va(read_cr3_pa());
2104 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
2105 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2106 pud = early_memremap(pud_phys, PAGE_SIZE);
2107 clear_page(pud);
2108 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2109 idx_pmd++) {
2110 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2111 clear_page(pmd);
2112 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2113 idx_pt++) {
2114 pt = early_memremap(pt_phys, PAGE_SIZE);
2115 clear_page(pt);
2116 for (idx_pte = 0;
2117 idx_pte < min(n_pte, PTRS_PER_PTE);
2118 idx_pte++) {
2119 pt[idx_pte] = pfn_pte(p2m_pfn,
2120 PAGE_KERNEL);
2121 p2m_pfn++;
2122 }
2123 n_pte -= PTRS_PER_PTE;
2124 early_memunmap(pt, PAGE_SIZE);
2125 make_lowmem_page_readonly(__va(pt_phys));
2126 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2127 PFN_DOWN(pt_phys));
2128 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
2129 pt_phys += PAGE_SIZE;
2130 }
2131 n_pt -= PTRS_PER_PMD;
2132 early_memunmap(pmd, PAGE_SIZE);
2133 make_lowmem_page_readonly(__va(pmd_phys));
2134 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2135 PFN_DOWN(pmd_phys));
2136 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
2137 pmd_phys += PAGE_SIZE;
2138 }
2139 n_pmd -= PTRS_PER_PUD;
2140 early_memunmap(pud, PAGE_SIZE);
2141 make_lowmem_page_readonly(__va(pud_phys));
2142 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2143 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2144 pud_phys += PAGE_SIZE;
2145 }
2146
2147
2148 memcpy(new_p2m, xen_p2m_addr, size);
2149 xen_p2m_addr = new_p2m;
2150
2151
2152 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2153 BUG_ON(!p2m_pfn);
2154 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2155
2156 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2157 pfn = xen_start_info->first_p2m_pfn;
2158 pfn_end = xen_start_info->first_p2m_pfn +
2159 xen_start_info->nr_p2m_frames;
2160 set_pgd(pgd + 1, __pgd(0));
2161 } else {
2162 pfn = p2m_pfn;
2163 pfn_end = p2m_pfn_end;
2164 }
2165
2166 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2167 while (pfn < pfn_end) {
2168 if (pfn == p2m_pfn) {
2169 pfn = p2m_pfn_end;
2170 continue;
2171 }
2172 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2173 pfn++;
2174 }
2175
2176 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2177 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2178 xen_start_info->nr_p2m_frames = n_frames;
2179}
2180
2181#else
2182static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
2183static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
2184RESERVE_BRK(fixup_kernel_pmd, PAGE_SIZE);
2185RESERVE_BRK(fixup_kernel_pte, PAGE_SIZE);
2186
2187static void __init xen_write_cr3_init(unsigned long cr3)
2188{
2189 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
2190
2191 BUG_ON(read_cr3_pa() != __pa(initial_page_table));
2192 BUG_ON(cr3 != __pa(swapper_pg_dir));
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204 swapper_kernel_pmd =
2205 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2206 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
2207 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
2208 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
2209 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
2210
2211 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
2212 xen_write_cr3(cr3);
2213 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
2214
2215 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
2216 PFN_DOWN(__pa(initial_page_table)));
2217 set_page_prot(initial_page_table, PAGE_KERNEL);
2218 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
2219
2220 pv_ops.mmu.write_cr3 = &xen_write_cr3;
2221}
2222
2223
2224
2225
2226
2227
2228static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
2229{
2230 phys_addr_t pt_base, paddr;
2231 unsigned pmdidx;
2232
2233 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
2234
2235 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
2236 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
2237 paddr = m2p(pmd[pmdidx].pmd);
2238 pt_base = min(pt_base, paddr);
2239 }
2240
2241 return pt_base;
2242}
2243
2244void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
2245{
2246 pmd_t *kernel_pmd;
2247
2248 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
2249
2250 xen_pt_base = xen_find_pt_base(kernel_pmd);
2251 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
2252
2253 initial_kernel_pmd =
2254 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2255
2256 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
2257
2258 copy_page(initial_kernel_pmd, kernel_pmd);
2259
2260 xen_map_identity_early(initial_kernel_pmd, max_pfn);
2261
2262 copy_page(initial_page_table, pgd);
2263 initial_page_table[KERNEL_PGD_BOUNDARY] =
2264 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
2265
2266 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
2267 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
2268 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
2269
2270 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
2271
2272 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
2273 PFN_DOWN(__pa(initial_page_table)));
2274 xen_write_cr3(__pa(initial_page_table));
2275
2276 memblock_reserve(xen_pt_base, xen_pt_size);
2277}
2278#endif
2279
2280void __init xen_reserve_special_pages(void)
2281{
2282 phys_addr_t paddr;
2283
2284 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2285 if (xen_start_info->store_mfn) {
2286 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2287 memblock_reserve(paddr, PAGE_SIZE);
2288 }
2289 if (!xen_initial_domain()) {
2290 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2291 memblock_reserve(paddr, PAGE_SIZE);
2292 }
2293}
2294
2295void __init xen_pt_check_e820(void)
2296{
2297 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
2298 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
2299 BUG();
2300 }
2301}
2302
2303static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2304
2305static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2306{
2307 pte_t pte;
2308
2309 phys >>= PAGE_SHIFT;
2310
2311 switch (idx) {
2312 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2313#ifdef CONFIG_X86_32
2314 case FIX_WP_TEST:
2315# ifdef CONFIG_HIGHMEM
2316 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
2317# endif
2318#elif defined(CONFIG_X86_VSYSCALL_EMULATION)
2319 case VSYSCALL_PAGE:
2320#endif
2321
2322 pte = pfn_pte(phys, prot);
2323 break;
2324
2325#ifdef CONFIG_X86_LOCAL_APIC
2326 case FIX_APIC_BASE:
2327 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2328 break;
2329#endif
2330
2331#ifdef CONFIG_X86_IO_APIC
2332 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2333
2334
2335
2336
2337 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2338 break;
2339#endif
2340
2341 case FIX_PARAVIRT_BOOTMAP:
2342
2343
2344 pte = mfn_pte(phys, prot);
2345 break;
2346
2347 default:
2348
2349 pte = mfn_pte(phys, prot);
2350 break;
2351 }
2352
2353 __native_set_fixmap(idx, pte);
2354
2355#ifdef CONFIG_X86_VSYSCALL_EMULATION
2356
2357
2358 if (idx == VSYSCALL_PAGE) {
2359 unsigned long vaddr = __fix_to_virt(idx);
2360 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2361 }
2362#endif
2363}
2364
2365static void __init xen_post_allocator_init(void)
2366{
2367 pv_ops.mmu.set_pte = xen_set_pte;
2368 pv_ops.mmu.set_pmd = xen_set_pmd;
2369 pv_ops.mmu.set_pud = xen_set_pud;
2370#ifdef CONFIG_X86_64
2371 pv_ops.mmu.set_p4d = xen_set_p4d;
2372#endif
2373
2374
2375
2376 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2377 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2378 pv_ops.mmu.release_pte = xen_release_pte;
2379 pv_ops.mmu.release_pmd = xen_release_pmd;
2380#ifdef CONFIG_X86_64
2381 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2382 pv_ops.mmu.release_pud = xen_release_pud;
2383#endif
2384 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2385
2386#ifdef CONFIG_X86_64
2387 pv_ops.mmu.write_cr3 = &xen_write_cr3;
2388#endif
2389}
2390
2391static void xen_leave_lazy_mmu(void)
2392{
2393 preempt_disable();
2394 xen_mc_flush();
2395 paravirt_leave_lazy_mmu();
2396 preempt_enable();
2397}
2398
2399static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2400 .read_cr2 = xen_read_cr2,
2401 .write_cr2 = xen_write_cr2,
2402
2403 .read_cr3 = xen_read_cr3,
2404 .write_cr3 = xen_write_cr3_init,
2405
2406 .flush_tlb_user = xen_flush_tlb,
2407 .flush_tlb_kernel = xen_flush_tlb,
2408 .flush_tlb_one_user = xen_flush_tlb_one_user,
2409 .flush_tlb_others = xen_flush_tlb_others,
2410 .tlb_remove_table = tlb_remove_table,
2411
2412 .pgd_alloc = xen_pgd_alloc,
2413 .pgd_free = xen_pgd_free,
2414
2415 .alloc_pte = xen_alloc_pte_init,
2416 .release_pte = xen_release_pte_init,
2417 .alloc_pmd = xen_alloc_pmd_init,
2418 .release_pmd = xen_release_pmd_init,
2419
2420 .set_pte = xen_set_pte_init,
2421 .set_pte_at = xen_set_pte_at,
2422 .set_pmd = xen_set_pmd_hyper,
2423
2424 .ptep_modify_prot_start = __ptep_modify_prot_start,
2425 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2426
2427 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2428 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2429
2430 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2431 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2432
2433#ifdef CONFIG_X86_PAE
2434 .set_pte_atomic = xen_set_pte_atomic,
2435 .pte_clear = xen_pte_clear,
2436 .pmd_clear = xen_pmd_clear,
2437#endif
2438 .set_pud = xen_set_pud_hyper,
2439
2440 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2441 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2442
2443#ifdef CONFIG_X86_64
2444 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2445 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2446 .set_p4d = xen_set_p4d_hyper,
2447
2448 .alloc_pud = xen_alloc_pmd_init,
2449 .release_pud = xen_release_pmd_init,
2450
2451#if CONFIG_PGTABLE_LEVELS >= 5
2452 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2453 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2454#endif
2455#endif
2456
2457 .activate_mm = xen_activate_mm,
2458 .dup_mmap = xen_dup_mmap,
2459 .exit_mmap = xen_exit_mmap,
2460
2461 .lazy_mode = {
2462 .enter = paravirt_enter_lazy_mmu,
2463 .leave = xen_leave_lazy_mmu,
2464 .flush = paravirt_flush_lazy_mmu,
2465 },
2466
2467 .set_fixmap = xen_set_fixmap,
2468};
2469
2470void __init xen_init_mmu_ops(void)
2471{
2472 x86_init.paging.pagetable_init = xen_pagetable_init;
2473 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2474
2475 pv_ops.mmu = xen_mmu_ops;
2476
2477 memset(dummy_mapping, 0xff, PAGE_SIZE);
2478}
2479
2480
2481#define MAX_CONTIG_ORDER 9
2482static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2483
2484#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2485static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2486 unsigned long *in_frames,
2487 unsigned long *out_frames)
2488{
2489 int i;
2490 struct multicall_space mcs;
2491
2492 xen_mc_batch();
2493 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2494 mcs = __xen_mc_entry(0);
2495
2496 if (in_frames)
2497 in_frames[i] = virt_to_mfn(vaddr);
2498
2499 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2500 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2501
2502 if (out_frames)
2503 out_frames[i] = virt_to_pfn(vaddr);
2504 }
2505 xen_mc_issue(0);
2506}
2507
2508
2509
2510
2511
2512
2513static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2514 unsigned long *mfns,
2515 unsigned long first_mfn)
2516{
2517 unsigned i, limit;
2518 unsigned long mfn;
2519
2520 xen_mc_batch();
2521
2522 limit = 1u << order;
2523 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2524 struct multicall_space mcs;
2525 unsigned flags;
2526
2527 mcs = __xen_mc_entry(0);
2528 if (mfns)
2529 mfn = mfns[i];
2530 else
2531 mfn = first_mfn + i;
2532
2533 if (i < (limit - 1))
2534 flags = 0;
2535 else {
2536 if (order == 0)
2537 flags = UVMF_INVLPG | UVMF_ALL;
2538 else
2539 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2540 }
2541
2542 MULTI_update_va_mapping(mcs.mc, vaddr,
2543 mfn_pte(mfn, PAGE_KERNEL), flags);
2544
2545 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2546 }
2547
2548 xen_mc_issue(0);
2549}
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2560 unsigned long *pfns_in,
2561 unsigned long extents_out,
2562 unsigned int order_out,
2563 unsigned long *mfns_out,
2564 unsigned int address_bits)
2565{
2566 long rc;
2567 int success;
2568
2569 struct xen_memory_exchange exchange = {
2570 .in = {
2571 .nr_extents = extents_in,
2572 .extent_order = order_in,
2573 .extent_start = pfns_in,
2574 .domid = DOMID_SELF
2575 },
2576 .out = {
2577 .nr_extents = extents_out,
2578 .extent_order = order_out,
2579 .extent_start = mfns_out,
2580 .address_bits = address_bits,
2581 .domid = DOMID_SELF
2582 }
2583 };
2584
2585 BUG_ON(extents_in << order_in != extents_out << order_out);
2586
2587 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2588 success = (exchange.nr_exchanged == extents_in);
2589
2590 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2591 BUG_ON(success && (rc != 0));
2592
2593 return success;
2594}
2595
2596int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2597 unsigned int address_bits,
2598 dma_addr_t *dma_handle)
2599{
2600 unsigned long *in_frames = discontig_frames, out_frame;
2601 unsigned long flags;
2602 int success;
2603 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2604
2605
2606
2607
2608
2609
2610
2611 if (unlikely(order > MAX_CONTIG_ORDER))
2612 return -ENOMEM;
2613
2614 memset((void *) vstart, 0, PAGE_SIZE << order);
2615
2616 spin_lock_irqsave(&xen_reservation_lock, flags);
2617
2618
2619 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2620
2621
2622 out_frame = virt_to_pfn(vstart);
2623 success = xen_exchange_memory(1UL << order, 0, in_frames,
2624 1, order, &out_frame,
2625 address_bits);
2626
2627
2628 if (success)
2629 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2630 else
2631 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2632
2633 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2634
2635 *dma_handle = virt_to_machine(vstart).maddr;
2636 return success ? 0 : -ENOMEM;
2637}
2638EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2639
2640void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2641{
2642 unsigned long *out_frames = discontig_frames, in_frame;
2643 unsigned long flags;
2644 int success;
2645 unsigned long vstart;
2646
2647 if (unlikely(order > MAX_CONTIG_ORDER))
2648 return;
2649
2650 vstart = (unsigned long)phys_to_virt(pstart);
2651 memset((void *) vstart, 0, PAGE_SIZE << order);
2652
2653 spin_lock_irqsave(&xen_reservation_lock, flags);
2654
2655
2656 in_frame = virt_to_mfn(vstart);
2657
2658
2659 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2660
2661
2662 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2663 0, out_frames, 0);
2664
2665
2666 if (success)
2667 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2668 else
2669 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2670
2671 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2672}
2673EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2674
2675static noinline void xen_flush_tlb_all(void)
2676{
2677 struct mmuext_op *op;
2678 struct multicall_space mcs;
2679
2680 preempt_disable();
2681
2682 mcs = xen_mc_entry(sizeof(*op));
2683
2684 op = mcs.args;
2685 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2686 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2687
2688 xen_mc_issue(PARAVIRT_LAZY_MMU);
2689
2690 preempt_enable();
2691}
2692
2693#define REMAP_BATCH_SIZE 16
2694
2695struct remap_data {
2696 xen_pfn_t *pfn;
2697 bool contiguous;
2698 bool no_translate;
2699 pgprot_t prot;
2700 struct mmu_update *mmu_update;
2701};
2702
2703static int remap_area_pfn_pte_fn(pte_t *ptep, pgtable_t token,
2704 unsigned long addr, void *data)
2705{
2706 struct remap_data *rmd = data;
2707 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2708
2709
2710
2711
2712
2713 if (rmd->contiguous)
2714 (*rmd->pfn)++;
2715 else
2716 rmd->pfn++;
2717
2718 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2719 rmd->mmu_update->ptr |= rmd->no_translate ?
2720 MMU_PT_UPDATE_NO_TRANSLATE :
2721 MMU_NORMAL_PT_UPDATE;
2722 rmd->mmu_update->val = pte_val_ma(pte);
2723 rmd->mmu_update++;
2724
2725 return 0;
2726}
2727
2728int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2729 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2730 unsigned int domid, bool no_translate, struct page **pages)
2731{
2732 int err = 0;
2733 struct remap_data rmd;
2734 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2735 unsigned long range;
2736 int mapped = 0;
2737
2738 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2739
2740 rmd.pfn = pfn;
2741 rmd.prot = prot;
2742
2743
2744
2745
2746 rmd.contiguous = !err_ptr;
2747 rmd.no_translate = no_translate;
2748
2749 while (nr) {
2750 int index = 0;
2751 int done = 0;
2752 int batch = min(REMAP_BATCH_SIZE, nr);
2753 int batch_left = batch;
2754
2755 range = (unsigned long)batch << PAGE_SHIFT;
2756
2757 rmd.mmu_update = mmu_update;
2758 err = apply_to_page_range(vma->vm_mm, addr, range,
2759 remap_area_pfn_pte_fn, &rmd);
2760 if (err)
2761 goto out;
2762
2763
2764
2765
2766
2767 do {
2768 int i;
2769
2770 err = HYPERVISOR_mmu_update(&mmu_update[index],
2771 batch_left, &done, domid);
2772
2773
2774
2775
2776
2777
2778 if (err_ptr) {
2779 for (i = index; i < index + done; i++)
2780 err_ptr[i] = 0;
2781 }
2782 if (err < 0) {
2783 if (!err_ptr)
2784 goto out;
2785 err_ptr[i] = err;
2786 done++;
2787 } else
2788 mapped += done;
2789 batch_left -= done;
2790 index += done;
2791 } while (batch_left);
2792
2793 nr -= batch;
2794 addr += range;
2795 if (err_ptr)
2796 err_ptr += batch;
2797 cond_resched();
2798 }
2799out:
2800
2801 xen_flush_tlb_all();
2802
2803 return err < 0 ? err : mapped;
2804}
2805EXPORT_SYMBOL_GPL(xen_remap_pfn);
2806
2807#ifdef CONFIG_KEXEC_CORE
2808phys_addr_t paddr_vmcoreinfo_note(void)
2809{
2810 if (xen_pv_domain())
2811 return virt_to_machine(vmcoreinfo_note).maddr;
2812 else
2813 return __pa(vmcoreinfo_note);
2814}
2815#endif
2816