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19#include <linux/kernel.h>
20#include <linux/gfp.h>
21#include <linux/pci.h>
22#include <linux/module.h>
23#include <linux/libata.h>
24#include <linux/highmem.h>
25
26#include "libata.h"
27
28static struct workqueue_struct *ata_sff_wq;
29
30const struct ata_port_operations ata_sff_port_ops = {
31 .inherits = &ata_base_port_ops,
32
33 .qc_prep = ata_noop_qc_prep,
34 .qc_issue = ata_sff_qc_issue,
35 .qc_fill_rtf = ata_sff_qc_fill_rtf,
36
37 .freeze = ata_sff_freeze,
38 .thaw = ata_sff_thaw,
39 .prereset = ata_sff_prereset,
40 .softreset = ata_sff_softreset,
41 .hardreset = sata_sff_hardreset,
42 .postreset = ata_sff_postreset,
43 .error_handler = ata_sff_error_handler,
44
45 .sff_dev_select = ata_sff_dev_select,
46 .sff_check_status = ata_sff_check_status,
47 .sff_tf_load = ata_sff_tf_load,
48 .sff_tf_read = ata_sff_tf_read,
49 .sff_exec_command = ata_sff_exec_command,
50 .sff_data_xfer = ata_sff_data_xfer,
51 .sff_drain_fifo = ata_sff_drain_fifo,
52
53 .lost_interrupt = ata_sff_lost_interrupt,
54};
55EXPORT_SYMBOL_GPL(ata_sff_port_ops);
56
57
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62
63
64
65
66
67
68u8 ata_sff_check_status(struct ata_port *ap)
69{
70 return ioread8(ap->ioaddr.status_addr);
71}
72EXPORT_SYMBOL_GPL(ata_sff_check_status);
73
74
75
76
77
78
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83
84
85
86
87static u8 ata_sff_altstatus(struct ata_port *ap)
88{
89 if (ap->ops->sff_check_altstatus)
90 return ap->ops->sff_check_altstatus(ap);
91
92 return ioread8(ap->ioaddr.altstatus_addr);
93}
94
95
96
97
98
99
100
101
102
103
104
105
106
107static u8 ata_sff_irq_status(struct ata_port *ap)
108{
109 u8 status;
110
111 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
112 status = ata_sff_altstatus(ap);
113
114 if (status & ATA_BUSY)
115 return status;
116 }
117
118 status = ap->ops->sff_check_status(ap);
119 return status;
120}
121
122
123
124
125
126
127
128
129
130
131
132
133
134static void ata_sff_sync(struct ata_port *ap)
135{
136 if (ap->ops->sff_check_altstatus)
137 ap->ops->sff_check_altstatus(ap);
138 else if (ap->ioaddr.altstatus_addr)
139 ioread8(ap->ioaddr.altstatus_addr);
140}
141
142
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149
150
151
152
153
154void ata_sff_pause(struct ata_port *ap)
155{
156 ata_sff_sync(ap);
157 ndelay(400);
158}
159EXPORT_SYMBOL_GPL(ata_sff_pause);
160
161
162
163
164
165
166
167
168
169void ata_sff_dma_pause(struct ata_port *ap)
170{
171 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
172
173
174 ata_sff_altstatus(ap);
175 return;
176 }
177
178
179
180 BUG();
181}
182EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
183
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197
198
199int ata_sff_busy_sleep(struct ata_port *ap,
200 unsigned long tmout_pat, unsigned long tmout)
201{
202 unsigned long timer_start, timeout;
203 u8 status;
204
205 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
206 timer_start = jiffies;
207 timeout = ata_deadline(timer_start, tmout_pat);
208 while (status != 0xff && (status & ATA_BUSY) &&
209 time_before(jiffies, timeout)) {
210 ata_msleep(ap, 50);
211 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
212 }
213
214 if (status != 0xff && (status & ATA_BUSY))
215 ata_port_warn(ap,
216 "port is slow to respond, please be patient (Status 0x%x)\n",
217 status);
218
219 timeout = ata_deadline(timer_start, tmout);
220 while (status != 0xff && (status & ATA_BUSY) &&
221 time_before(jiffies, timeout)) {
222 ata_msleep(ap, 50);
223 status = ap->ops->sff_check_status(ap);
224 }
225
226 if (status == 0xff)
227 return -ENODEV;
228
229 if (status & ATA_BUSY) {
230 ata_port_err(ap,
231 "port failed to respond (%lu secs, Status 0x%x)\n",
232 DIV_ROUND_UP(tmout, 1000), status);
233 return -EBUSY;
234 }
235
236 return 0;
237}
238EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
239
240static int ata_sff_check_ready(struct ata_link *link)
241{
242 u8 status = link->ap->ops->sff_check_status(link->ap);
243
244 return ata_check_ready(status);
245}
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259
260
261int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
262{
263 return ata_wait_ready(link, deadline, ata_sff_check_ready);
264}
265EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
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278
279
280static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
281{
282 if (ap->ops->sff_set_devctl)
283 ap->ops->sff_set_devctl(ap, ctl);
284 else
285 iowrite8(ctl, ap->ioaddr.ctl_addr);
286}
287
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299
300
301
302void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
303{
304 u8 tmp;
305
306 if (device == 0)
307 tmp = ATA_DEVICE_OBS;
308 else
309 tmp = ATA_DEVICE_OBS | ATA_DEV1;
310
311 iowrite8(tmp, ap->ioaddr.device_addr);
312 ata_sff_pause(ap);
313}
314EXPORT_SYMBOL_GPL(ata_sff_dev_select);
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333
334static void ata_dev_select(struct ata_port *ap, unsigned int device,
335 unsigned int wait, unsigned int can_sleep)
336{
337 if (ata_msg_probe(ap))
338 ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
339 device, wait);
340
341 if (wait)
342 ata_wait_idle(ap);
343
344 ap->ops->sff_dev_select(ap, device);
345
346 if (wait) {
347 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
348 ata_msleep(ap, 150);
349 ata_wait_idle(ap);
350 }
351}
352
353
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356
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362
363
364
365
366void ata_sff_irq_on(struct ata_port *ap)
367{
368 struct ata_ioports *ioaddr = &ap->ioaddr;
369
370 if (ap->ops->sff_irq_on) {
371 ap->ops->sff_irq_on(ap);
372 return;
373 }
374
375 ap->ctl &= ~ATA_NIEN;
376 ap->last_ctl = ap->ctl;
377
378 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
379 ata_sff_set_devctl(ap, ap->ctl);
380 ata_wait_idle(ap);
381
382 if (ap->ops->sff_irq_clear)
383 ap->ops->sff_irq_clear(ap);
384}
385EXPORT_SYMBOL_GPL(ata_sff_irq_on);
386
387
388
389
390
391
392
393
394
395
396
397void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
398{
399 struct ata_ioports *ioaddr = &ap->ioaddr;
400 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
401
402 if (tf->ctl != ap->last_ctl) {
403 if (ioaddr->ctl_addr)
404 iowrite8(tf->ctl, ioaddr->ctl_addr);
405 ap->last_ctl = tf->ctl;
406 ata_wait_idle(ap);
407 }
408
409 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
410 WARN_ON_ONCE(!ioaddr->ctl_addr);
411 iowrite8(tf->hob_feature, ioaddr->feature_addr);
412 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
413 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
414 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
415 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
416 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
417 tf->hob_feature,
418 tf->hob_nsect,
419 tf->hob_lbal,
420 tf->hob_lbam,
421 tf->hob_lbah);
422 }
423
424 if (is_addr) {
425 iowrite8(tf->feature, ioaddr->feature_addr);
426 iowrite8(tf->nsect, ioaddr->nsect_addr);
427 iowrite8(tf->lbal, ioaddr->lbal_addr);
428 iowrite8(tf->lbam, ioaddr->lbam_addr);
429 iowrite8(tf->lbah, ioaddr->lbah_addr);
430 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
431 tf->feature,
432 tf->nsect,
433 tf->lbal,
434 tf->lbam,
435 tf->lbah);
436 }
437
438 if (tf->flags & ATA_TFLAG_DEVICE) {
439 iowrite8(tf->device, ioaddr->device_addr);
440 VPRINTK("device 0x%X\n", tf->device);
441 }
442
443 ata_wait_idle(ap);
444}
445EXPORT_SYMBOL_GPL(ata_sff_tf_load);
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
461{
462 struct ata_ioports *ioaddr = &ap->ioaddr;
463
464 tf->command = ata_sff_check_status(ap);
465 tf->feature = ioread8(ioaddr->error_addr);
466 tf->nsect = ioread8(ioaddr->nsect_addr);
467 tf->lbal = ioread8(ioaddr->lbal_addr);
468 tf->lbam = ioread8(ioaddr->lbam_addr);
469 tf->lbah = ioread8(ioaddr->lbah_addr);
470 tf->device = ioread8(ioaddr->device_addr);
471
472 if (tf->flags & ATA_TFLAG_LBA48) {
473 if (likely(ioaddr->ctl_addr)) {
474 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
475 tf->hob_feature = ioread8(ioaddr->error_addr);
476 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
477 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
478 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
479 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
480 iowrite8(tf->ctl, ioaddr->ctl_addr);
481 ap->last_ctl = tf->ctl;
482 } else
483 WARN_ON_ONCE(1);
484 }
485}
486EXPORT_SYMBOL_GPL(ata_sff_tf_read);
487
488
489
490
491
492
493
494
495
496
497
498
499void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
500{
501 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
502
503 iowrite8(tf->command, ap->ioaddr.command_addr);
504 ata_sff_pause(ap);
505}
506EXPORT_SYMBOL_GPL(ata_sff_exec_command);
507
508
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513
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515
516
517
518
519
520static inline void ata_tf_to_host(struct ata_port *ap,
521 const struct ata_taskfile *tf)
522{
523 ap->ops->sff_tf_load(ap, tf);
524 ap->ops->sff_exec_command(ap, tf);
525}
526
527
528
529
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531
532
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540
541
542unsigned int ata_sff_data_xfer(struct ata_queued_cmd *qc, unsigned char *buf,
543 unsigned int buflen, int rw)
544{
545 struct ata_port *ap = qc->dev->link->ap;
546 void __iomem *data_addr = ap->ioaddr.data_addr;
547 unsigned int words = buflen >> 1;
548
549
550 if (rw == READ)
551 ioread16_rep(data_addr, buf, words);
552 else
553 iowrite16_rep(data_addr, buf, words);
554
555
556 if (unlikely(buflen & 0x01)) {
557 unsigned char pad[2] = { };
558
559
560 buf += buflen - 1;
561
562
563
564
565
566 if (rw == READ) {
567 ioread16_rep(data_addr, pad, 1);
568 *buf = pad[0];
569 } else {
570 pad[0] = *buf;
571 iowrite16_rep(data_addr, pad, 1);
572 }
573 words++;
574 }
575
576 return words << 1;
577}
578EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
579
580
581
582
583
584
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587
588
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595
596
597unsigned int ata_sff_data_xfer32(struct ata_queued_cmd *qc, unsigned char *buf,
598 unsigned int buflen, int rw)
599{
600 struct ata_device *dev = qc->dev;
601 struct ata_port *ap = dev->link->ap;
602 void __iomem *data_addr = ap->ioaddr.data_addr;
603 unsigned int words = buflen >> 2;
604 int slop = buflen & 3;
605
606 if (!(ap->pflags & ATA_PFLAG_PIO32))
607 return ata_sff_data_xfer(qc, buf, buflen, rw);
608
609
610 if (rw == READ)
611 ioread32_rep(data_addr, buf, words);
612 else
613 iowrite32_rep(data_addr, buf, words);
614
615
616 if (unlikely(slop)) {
617 unsigned char pad[4] = { };
618
619
620 buf += buflen - slop;
621
622
623
624
625
626 if (rw == READ) {
627 if (slop < 3)
628 ioread16_rep(data_addr, pad, 1);
629 else
630 ioread32_rep(data_addr, pad, 1);
631 memcpy(buf, pad, slop);
632 } else {
633 memcpy(pad, buf, slop);
634 if (slop < 3)
635 iowrite16_rep(data_addr, pad, 1);
636 else
637 iowrite32_rep(data_addr, pad, 1);
638 }
639 }
640 return (buflen + 1) & ~1;
641}
642EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
643
644
645
646
647
648
649
650
651
652
653static void ata_pio_sector(struct ata_queued_cmd *qc)
654{
655 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
656 struct ata_port *ap = qc->ap;
657 struct page *page;
658 unsigned int offset;
659 unsigned char *buf;
660
661 if (qc->curbytes == qc->nbytes - qc->sect_size)
662 ap->hsm_task_state = HSM_ST_LAST;
663
664 page = sg_page(qc->cursg);
665 offset = qc->cursg->offset + qc->cursg_ofs;
666
667
668 page = nth_page(page, (offset >> PAGE_SHIFT));
669 offset %= PAGE_SIZE;
670
671 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
672
673
674 buf = kmap_atomic(page);
675 ap->ops->sff_data_xfer(qc, buf + offset, qc->sect_size, do_write);
676 kunmap_atomic(buf);
677
678 if (!do_write && !PageSlab(page))
679 flush_dcache_page(page);
680
681 qc->curbytes += qc->sect_size;
682 qc->cursg_ofs += qc->sect_size;
683
684 if (qc->cursg_ofs == qc->cursg->length) {
685 qc->cursg = sg_next(qc->cursg);
686 qc->cursg_ofs = 0;
687 }
688}
689
690
691
692
693
694
695
696
697
698
699
700static void ata_pio_sectors(struct ata_queued_cmd *qc)
701{
702 if (is_multi_taskfile(&qc->tf)) {
703
704 unsigned int nsect;
705
706 WARN_ON_ONCE(qc->dev->multi_count == 0);
707
708 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
709 qc->dev->multi_count);
710 while (nsect--)
711 ata_pio_sector(qc);
712 } else
713 ata_pio_sector(qc);
714
715 ata_sff_sync(qc->ap);
716}
717
718
719
720
721
722
723
724
725
726
727
728
729static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
730{
731
732 DPRINTK("send cdb\n");
733 WARN_ON_ONCE(qc->dev->cdb_len < 12);
734
735 ap->ops->sff_data_xfer(qc, qc->cdb, qc->dev->cdb_len, 1);
736 ata_sff_sync(ap);
737
738
739 switch (qc->tf.protocol) {
740 case ATAPI_PROT_PIO:
741 ap->hsm_task_state = HSM_ST;
742 break;
743 case ATAPI_PROT_NODATA:
744 ap->hsm_task_state = HSM_ST_LAST;
745 break;
746#ifdef CONFIG_ATA_BMDMA
747 case ATAPI_PROT_DMA:
748 ap->hsm_task_state = HSM_ST_LAST;
749
750 ap->ops->bmdma_start(qc);
751 break;
752#endif
753 default:
754 BUG();
755 }
756}
757
758
759
760
761
762
763
764
765
766
767
768
769static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
770{
771 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
772 struct ata_port *ap = qc->ap;
773 struct ata_device *dev = qc->dev;
774 struct ata_eh_info *ehi = &dev->link->eh_info;
775 struct scatterlist *sg;
776 struct page *page;
777 unsigned char *buf;
778 unsigned int offset, count, consumed;
779
780next_sg:
781 sg = qc->cursg;
782 if (unlikely(!sg)) {
783 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
784 "buf=%u cur=%u bytes=%u",
785 qc->nbytes, qc->curbytes, bytes);
786 return -1;
787 }
788
789 page = sg_page(sg);
790 offset = sg->offset + qc->cursg_ofs;
791
792
793 page = nth_page(page, (offset >> PAGE_SHIFT));
794 offset %= PAGE_SIZE;
795
796
797 count = min(sg->length - qc->cursg_ofs, bytes);
798
799
800 count = min(count, (unsigned int)PAGE_SIZE - offset);
801
802 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
803
804
805 buf = kmap_atomic(page);
806 consumed = ap->ops->sff_data_xfer(qc, buf + offset, count, rw);
807 kunmap_atomic(buf);
808
809 bytes -= min(bytes, consumed);
810 qc->curbytes += count;
811 qc->cursg_ofs += count;
812
813 if (qc->cursg_ofs == sg->length) {
814 qc->cursg = sg_next(qc->cursg);
815 qc->cursg_ofs = 0;
816 }
817
818
819
820
821
822
823
824 if (bytes)
825 goto next_sg;
826 return 0;
827}
828
829
830
831
832
833
834
835
836
837
838static void atapi_pio_bytes(struct ata_queued_cmd *qc)
839{
840 struct ata_port *ap = qc->ap;
841 struct ata_device *dev = qc->dev;
842 struct ata_eh_info *ehi = &dev->link->eh_info;
843 unsigned int ireason, bc_lo, bc_hi, bytes;
844 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
845
846
847
848
849
850
851
852 ap->ops->sff_tf_read(ap, &qc->result_tf);
853 ireason = qc->result_tf.nsect;
854 bc_lo = qc->result_tf.lbam;
855 bc_hi = qc->result_tf.lbah;
856 bytes = (bc_hi << 8) | bc_lo;
857
858
859 if (unlikely(ireason & ATAPI_COD))
860 goto atapi_check;
861
862
863 i_write = ((ireason & ATAPI_IO) == 0) ? 1 : 0;
864 if (unlikely(do_write != i_write))
865 goto atapi_check;
866
867 if (unlikely(!bytes))
868 goto atapi_check;
869
870 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
871
872 if (unlikely(__atapi_pio_bytes(qc, bytes)))
873 goto err_out;
874 ata_sff_sync(ap);
875
876 return;
877
878 atapi_check:
879 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
880 ireason, bytes);
881 err_out:
882 qc->err_mask |= AC_ERR_HSM;
883 ap->hsm_task_state = HSM_ST_ERR;
884}
885
886
887
888
889
890
891
892
893
894static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
895 struct ata_queued_cmd *qc)
896{
897 if (qc->tf.flags & ATA_TFLAG_POLLING)
898 return 1;
899
900 if (ap->hsm_task_state == HSM_ST_FIRST) {
901 if (qc->tf.protocol == ATA_PROT_PIO &&
902 (qc->tf.flags & ATA_TFLAG_WRITE))
903 return 1;
904
905 if (ata_is_atapi(qc->tf.protocol) &&
906 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
907 return 1;
908 }
909
910 return 0;
911}
912
913
914
915
916
917
918
919
920
921
922
923
924static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
925{
926 struct ata_port *ap = qc->ap;
927
928 if (ap->ops->error_handler) {
929 if (in_wq) {
930
931
932
933 qc = ata_qc_from_tag(ap, qc->tag);
934 if (qc) {
935 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
936 ata_sff_irq_on(ap);
937 ata_qc_complete(qc);
938 } else
939 ata_port_freeze(ap);
940 }
941 } else {
942 if (likely(!(qc->err_mask & AC_ERR_HSM)))
943 ata_qc_complete(qc);
944 else
945 ata_port_freeze(ap);
946 }
947 } else {
948 if (in_wq) {
949 ata_sff_irq_on(ap);
950 ata_qc_complete(qc);
951 } else
952 ata_qc_complete(qc);
953 }
954}
955
956
957
958
959
960
961
962
963
964
965
966int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
967 u8 status, int in_wq)
968{
969 struct ata_link *link = qc->dev->link;
970 struct ata_eh_info *ehi = &link->eh_info;
971 int poll_next;
972
973 lockdep_assert_held(ap->lock);
974
975 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
976
977
978
979
980
981 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
982
983fsm_start:
984 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
985 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
986
987 switch (ap->hsm_task_state) {
988 case HSM_ST_FIRST:
989
990
991
992
993
994
995 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
996
997
998 if (unlikely((status & ATA_DRQ) == 0)) {
999
1000 if (likely(status & (ATA_ERR | ATA_DF)))
1001
1002 qc->err_mask |= AC_ERR_DEV;
1003 else {
1004
1005 ata_ehi_push_desc(ehi,
1006 "ST_FIRST: !(DRQ|ERR|DF)");
1007 qc->err_mask |= AC_ERR_HSM;
1008 }
1009
1010 ap->hsm_task_state = HSM_ST_ERR;
1011 goto fsm_start;
1012 }
1013
1014
1015
1016
1017
1018
1019
1020 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1021
1022
1023
1024
1025
1026 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
1027 ata_ehi_push_desc(ehi, "ST_FIRST: "
1028 "DRQ=1 with device error, "
1029 "dev_stat 0x%X", status);
1030 qc->err_mask |= AC_ERR_HSM;
1031 ap->hsm_task_state = HSM_ST_ERR;
1032 goto fsm_start;
1033 }
1034 }
1035
1036 if (qc->tf.protocol == ATA_PROT_PIO) {
1037
1038
1039
1040
1041
1042
1043
1044
1045 ap->hsm_task_state = HSM_ST;
1046 ata_pio_sectors(qc);
1047 } else
1048
1049 atapi_send_cdb(ap, qc);
1050
1051
1052
1053
1054 break;
1055
1056 case HSM_ST:
1057
1058 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1059
1060 if ((status & ATA_DRQ) == 0) {
1061
1062
1063
1064 ap->hsm_task_state = HSM_ST_LAST;
1065 goto fsm_start;
1066 }
1067
1068
1069
1070
1071
1072
1073
1074 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1075 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1076 "DRQ=1 with device error, "
1077 "dev_stat 0x%X", status);
1078 qc->err_mask |= AC_ERR_HSM;
1079 ap->hsm_task_state = HSM_ST_ERR;
1080 goto fsm_start;
1081 }
1082
1083 atapi_pio_bytes(qc);
1084
1085 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1086
1087 goto fsm_start;
1088
1089 } else {
1090
1091 if (unlikely((status & ATA_DRQ) == 0)) {
1092
1093 if (likely(status & (ATA_ERR | ATA_DF))) {
1094
1095 qc->err_mask |= AC_ERR_DEV;
1096
1097
1098
1099
1100
1101 if (qc->dev->horkage &
1102 ATA_HORKAGE_DIAGNOSTIC)
1103 qc->err_mask |=
1104 AC_ERR_NODEV_HINT;
1105 } else {
1106
1107
1108
1109
1110 ata_ehi_push_desc(ehi, "ST-ATA: "
1111 "DRQ=0 without device error, "
1112 "dev_stat 0x%X", status);
1113 qc->err_mask |= AC_ERR_HSM |
1114 AC_ERR_NODEV_HINT;
1115 }
1116
1117 ap->hsm_task_state = HSM_ST_ERR;
1118 goto fsm_start;
1119 }
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1132
1133 qc->err_mask |= AC_ERR_DEV;
1134
1135 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1136 ata_pio_sectors(qc);
1137 status = ata_wait_idle(ap);
1138 }
1139
1140 if (status & (ATA_BUSY | ATA_DRQ)) {
1141 ata_ehi_push_desc(ehi, "ST-ATA: "
1142 "BUSY|DRQ persists on ERR|DF, "
1143 "dev_stat 0x%X", status);
1144 qc->err_mask |= AC_ERR_HSM;
1145 }
1146
1147
1148
1149
1150
1151
1152
1153
1154 if (status == 0x7f)
1155 qc->err_mask |= AC_ERR_NODEV_HINT;
1156
1157
1158
1159
1160
1161 ap->hsm_task_state = HSM_ST_ERR;
1162 goto fsm_start;
1163 }
1164
1165 ata_pio_sectors(qc);
1166
1167 if (ap->hsm_task_state == HSM_ST_LAST &&
1168 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1169
1170 status = ata_wait_idle(ap);
1171 goto fsm_start;
1172 }
1173 }
1174
1175 poll_next = 1;
1176 break;
1177
1178 case HSM_ST_LAST:
1179 if (unlikely(!ata_ok(status))) {
1180 qc->err_mask |= __ac_err_mask(status);
1181 ap->hsm_task_state = HSM_ST_ERR;
1182 goto fsm_start;
1183 }
1184
1185
1186 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1187 ap->print_id, qc->dev->devno, status);
1188
1189 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
1190
1191 ap->hsm_task_state = HSM_ST_IDLE;
1192
1193
1194 ata_hsm_qc_complete(qc, in_wq);
1195
1196 poll_next = 0;
1197 break;
1198
1199 case HSM_ST_ERR:
1200 ap->hsm_task_state = HSM_ST_IDLE;
1201
1202
1203 ata_hsm_qc_complete(qc, in_wq);
1204
1205 poll_next = 0;
1206 break;
1207 default:
1208 poll_next = 0;
1209 WARN(true, "ata%d: SFF host state machine in invalid state %d",
1210 ap->print_id, ap->hsm_task_state);
1211 }
1212
1213 return poll_next;
1214}
1215EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
1216
1217void ata_sff_queue_work(struct work_struct *work)
1218{
1219 queue_work(ata_sff_wq, work);
1220}
1221EXPORT_SYMBOL_GPL(ata_sff_queue_work);
1222
1223void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay)
1224{
1225 queue_delayed_work(ata_sff_wq, dwork, delay);
1226}
1227EXPORT_SYMBOL_GPL(ata_sff_queue_delayed_work);
1228
1229void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay)
1230{
1231 struct ata_port *ap = link->ap;
1232
1233 WARN_ON((ap->sff_pio_task_link != NULL) &&
1234 (ap->sff_pio_task_link != link));
1235 ap->sff_pio_task_link = link;
1236
1237
1238 ata_sff_queue_delayed_work(&ap->sff_pio_task, msecs_to_jiffies(delay));
1239}
1240EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1241
1242void ata_sff_flush_pio_task(struct ata_port *ap)
1243{
1244 DPRINTK("ENTER\n");
1245
1246 cancel_delayed_work_sync(&ap->sff_pio_task);
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256 spin_lock_irq(ap->lock);
1257 ap->hsm_task_state = HSM_ST_IDLE;
1258 spin_unlock_irq(ap->lock);
1259
1260 ap->sff_pio_task_link = NULL;
1261
1262 if (ata_msg_ctl(ap))
1263 ata_port_dbg(ap, "%s: EXIT\n", __func__);
1264}
1265
1266static void ata_sff_pio_task(struct work_struct *work)
1267{
1268 struct ata_port *ap =
1269 container_of(work, struct ata_port, sff_pio_task.work);
1270 struct ata_link *link = ap->sff_pio_task_link;
1271 struct ata_queued_cmd *qc;
1272 u8 status;
1273 int poll_next;
1274
1275 spin_lock_irq(ap->lock);
1276
1277 BUG_ON(ap->sff_pio_task_link == NULL);
1278
1279 qc = ata_qc_from_tag(ap, link->active_tag);
1280 if (!qc) {
1281 ap->sff_pio_task_link = NULL;
1282 goto out_unlock;
1283 }
1284
1285fsm_start:
1286 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
1287
1288
1289
1290
1291
1292
1293
1294
1295 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
1296 if (status & ATA_BUSY) {
1297 spin_unlock_irq(ap->lock);
1298 ata_msleep(ap, 2);
1299 spin_lock_irq(ap->lock);
1300
1301 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
1302 if (status & ATA_BUSY) {
1303 ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE);
1304 goto out_unlock;
1305 }
1306 }
1307
1308
1309
1310
1311
1312 ap->sff_pio_task_link = NULL;
1313
1314 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
1315
1316
1317
1318
1319 if (poll_next)
1320 goto fsm_start;
1321out_unlock:
1322 spin_unlock_irq(ap->lock);
1323}
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
1339{
1340 struct ata_port *ap = qc->ap;
1341 struct ata_link *link = qc->dev->link;
1342
1343
1344
1345
1346 if (ap->flags & ATA_FLAG_PIO_POLLING)
1347 qc->tf.flags |= ATA_TFLAG_POLLING;
1348
1349
1350 ata_dev_select(ap, qc->dev->devno, 1, 0);
1351
1352
1353 switch (qc->tf.protocol) {
1354 case ATA_PROT_NODATA:
1355 if (qc->tf.flags & ATA_TFLAG_POLLING)
1356 ata_qc_set_polling(qc);
1357
1358 ata_tf_to_host(ap, &qc->tf);
1359 ap->hsm_task_state = HSM_ST_LAST;
1360
1361 if (qc->tf.flags & ATA_TFLAG_POLLING)
1362 ata_sff_queue_pio_task(link, 0);
1363
1364 break;
1365
1366 case ATA_PROT_PIO:
1367 if (qc->tf.flags & ATA_TFLAG_POLLING)
1368 ata_qc_set_polling(qc);
1369
1370 ata_tf_to_host(ap, &qc->tf);
1371
1372 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1373
1374 ap->hsm_task_state = HSM_ST_FIRST;
1375 ata_sff_queue_pio_task(link, 0);
1376
1377
1378
1379
1380 } else {
1381
1382 ap->hsm_task_state = HSM_ST;
1383
1384 if (qc->tf.flags & ATA_TFLAG_POLLING)
1385 ata_sff_queue_pio_task(link, 0);
1386
1387
1388
1389
1390
1391 }
1392
1393 break;
1394
1395 case ATAPI_PROT_PIO:
1396 case ATAPI_PROT_NODATA:
1397 if (qc->tf.flags & ATA_TFLAG_POLLING)
1398 ata_qc_set_polling(qc);
1399
1400 ata_tf_to_host(ap, &qc->tf);
1401
1402 ap->hsm_task_state = HSM_ST_FIRST;
1403
1404
1405 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1406 (qc->tf.flags & ATA_TFLAG_POLLING))
1407 ata_sff_queue_pio_task(link, 0);
1408 break;
1409
1410 default:
1411 return AC_ERR_SYSTEM;
1412 }
1413
1414 return 0;
1415}
1416EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1432{
1433 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1434 return true;
1435}
1436EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
1437
1438static unsigned int ata_sff_idle_irq(struct ata_port *ap)
1439{
1440 ap->stats.idle_irq++;
1441
1442#ifdef ATA_IRQ_TRAP
1443 if ((ap->stats.idle_irq % 1000) == 0) {
1444 ap->ops->sff_check_status(ap);
1445 if (ap->ops->sff_irq_clear)
1446 ap->ops->sff_irq_clear(ap);
1447 ata_port_warn(ap, "irq trap\n");
1448 return 1;
1449 }
1450#endif
1451 return 0;
1452}
1453
1454static unsigned int __ata_sff_port_intr(struct ata_port *ap,
1455 struct ata_queued_cmd *qc,
1456 bool hsmv_on_idle)
1457{
1458 u8 status;
1459
1460 VPRINTK("ata%u: protocol %d task_state %d\n",
1461 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1462
1463
1464 switch (ap->hsm_task_state) {
1465 case HSM_ST_FIRST:
1466
1467
1468
1469
1470
1471
1472
1473
1474 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1475 return ata_sff_idle_irq(ap);
1476 break;
1477 case HSM_ST_IDLE:
1478 return ata_sff_idle_irq(ap);
1479 default:
1480 break;
1481 }
1482
1483
1484 status = ata_sff_irq_status(ap);
1485 if (status & ATA_BUSY) {
1486 if (hsmv_on_idle) {
1487
1488 qc->err_mask |= AC_ERR_HSM;
1489 ap->hsm_task_state = HSM_ST_ERR;
1490 } else
1491 return ata_sff_idle_irq(ap);
1492 }
1493
1494
1495 if (ap->ops->sff_irq_clear)
1496 ap->ops->sff_irq_clear(ap);
1497
1498 ata_sff_hsm_move(ap, qc, status, 0);
1499
1500 return 1;
1501}
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1517{
1518 return __ata_sff_port_intr(ap, qc, false);
1519}
1520EXPORT_SYMBOL_GPL(ata_sff_port_intr);
1521
1522static inline irqreturn_t __ata_sff_interrupt(int irq, void *dev_instance,
1523 unsigned int (*port_intr)(struct ata_port *, struct ata_queued_cmd *))
1524{
1525 struct ata_host *host = dev_instance;
1526 bool retried = false;
1527 unsigned int i;
1528 unsigned int handled, idle, polling;
1529 unsigned long flags;
1530
1531
1532 spin_lock_irqsave(&host->lock, flags);
1533
1534retry:
1535 handled = idle = polling = 0;
1536 for (i = 0; i < host->n_ports; i++) {
1537 struct ata_port *ap = host->ports[i];
1538 struct ata_queued_cmd *qc;
1539
1540 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1541 if (qc) {
1542 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1543 handled |= port_intr(ap, qc);
1544 else
1545 polling |= 1 << i;
1546 } else
1547 idle |= 1 << i;
1548 }
1549
1550
1551
1552
1553
1554
1555 if (!handled && !retried) {
1556 bool retry = false;
1557
1558 for (i = 0; i < host->n_ports; i++) {
1559 struct ata_port *ap = host->ports[i];
1560
1561 if (polling & (1 << i))
1562 continue;
1563
1564 if (!ap->ops->sff_irq_check ||
1565 !ap->ops->sff_irq_check(ap))
1566 continue;
1567
1568 if (idle & (1 << i)) {
1569 ap->ops->sff_check_status(ap);
1570 if (ap->ops->sff_irq_clear)
1571 ap->ops->sff_irq_clear(ap);
1572 } else {
1573
1574 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1575 retry |= true;
1576
1577
1578
1579
1580 }
1581 }
1582
1583 if (retry) {
1584 retried = true;
1585 goto retry;
1586 }
1587 }
1588
1589 spin_unlock_irqrestore(&host->lock, flags);
1590
1591 return IRQ_RETVAL(handled);
1592}
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1609{
1610 return __ata_sff_interrupt(irq, dev_instance, ata_sff_port_intr);
1611}
1612EXPORT_SYMBOL_GPL(ata_sff_interrupt);
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627void ata_sff_lost_interrupt(struct ata_port *ap)
1628{
1629 u8 status;
1630 struct ata_queued_cmd *qc;
1631
1632
1633 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1634
1635 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
1636 return;
1637
1638
1639 status = ata_sff_altstatus(ap);
1640 if (status & ATA_BUSY)
1641 return;
1642
1643
1644
1645 ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
1646 status);
1647
1648
1649 ata_sff_port_intr(ap, qc);
1650}
1651EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662void ata_sff_freeze(struct ata_port *ap)
1663{
1664 ap->ctl |= ATA_NIEN;
1665 ap->last_ctl = ap->ctl;
1666
1667 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1668 ata_sff_set_devctl(ap, ap->ctl);
1669
1670
1671
1672
1673
1674 ap->ops->sff_check_status(ap);
1675
1676 if (ap->ops->sff_irq_clear)
1677 ap->ops->sff_irq_clear(ap);
1678}
1679EXPORT_SYMBOL_GPL(ata_sff_freeze);
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690void ata_sff_thaw(struct ata_port *ap)
1691{
1692
1693 ap->ops->sff_check_status(ap);
1694 if (ap->ops->sff_irq_clear)
1695 ap->ops->sff_irq_clear(ap);
1696 ata_sff_irq_on(ap);
1697}
1698EXPORT_SYMBOL_GPL(ata_sff_thaw);
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1716{
1717 struct ata_eh_context *ehc = &link->eh_context;
1718 int rc;
1719
1720 rc = ata_std_prereset(link, deadline);
1721 if (rc)
1722 return rc;
1723
1724
1725 if (ehc->i.action & ATA_EH_HARDRESET)
1726 return 0;
1727
1728
1729 if (!ata_link_offline(link)) {
1730 rc = ata_sff_wait_ready(link, deadline);
1731 if (rc && rc != -ENODEV) {
1732 ata_link_warn(link,
1733 "device not ready (errno=%d), forcing hardreset\n",
1734 rc);
1735 ehc->i.action |= ATA_EH_HARDRESET;
1736 }
1737 }
1738
1739 return 0;
1740}
1741EXPORT_SYMBOL_GPL(ata_sff_prereset);
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1761{
1762 struct ata_ioports *ioaddr = &ap->ioaddr;
1763 u8 nsect, lbal;
1764
1765 ap->ops->sff_dev_select(ap, device);
1766
1767 iowrite8(0x55, ioaddr->nsect_addr);
1768 iowrite8(0xaa, ioaddr->lbal_addr);
1769
1770 iowrite8(0xaa, ioaddr->nsect_addr);
1771 iowrite8(0x55, ioaddr->lbal_addr);
1772
1773 iowrite8(0x55, ioaddr->nsect_addr);
1774 iowrite8(0xaa, ioaddr->lbal_addr);
1775
1776 nsect = ioread8(ioaddr->nsect_addr);
1777 lbal = ioread8(ioaddr->lbal_addr);
1778
1779 if ((nsect == 0x55) && (lbal == 0xaa))
1780 return 1;
1781
1782 return 0;
1783}
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
1807 u8 *r_err)
1808{
1809 struct ata_port *ap = dev->link->ap;
1810 struct ata_taskfile tf;
1811 unsigned int class;
1812 u8 err;
1813
1814 ap->ops->sff_dev_select(ap, dev->devno);
1815
1816 memset(&tf, 0, sizeof(tf));
1817
1818 ap->ops->sff_tf_read(ap, &tf);
1819 err = tf.feature;
1820 if (r_err)
1821 *r_err = err;
1822
1823
1824 if (err == 0)
1825
1826 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1827 else if (err == 1)
1828 ;
1829 else if ((dev->devno == 0) && (err == 0x81))
1830 ;
1831 else
1832 return ATA_DEV_NONE;
1833
1834
1835 class = ata_dev_classify(&tf);
1836
1837 if (class == ATA_DEV_UNKNOWN) {
1838
1839
1840
1841
1842
1843
1844 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1845 class = ATA_DEV_ATA;
1846 else
1847 class = ATA_DEV_NONE;
1848 } else if ((class == ATA_DEV_ATA) &&
1849 (ap->ops->sff_check_status(ap) == 0))
1850 class = ATA_DEV_NONE;
1851
1852 return class;
1853}
1854EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1874 unsigned long deadline)
1875{
1876 struct ata_port *ap = link->ap;
1877 struct ata_ioports *ioaddr = &ap->ioaddr;
1878 unsigned int dev0 = devmask & (1 << 0);
1879 unsigned int dev1 = devmask & (1 << 1);
1880 int rc, ret = 0;
1881
1882 ata_msleep(ap, ATA_WAIT_AFTER_RESET);
1883
1884
1885 rc = ata_sff_wait_ready(link, deadline);
1886
1887
1888
1889 if (rc)
1890 return rc;
1891
1892
1893
1894
1895 if (dev1) {
1896 int i;
1897
1898 ap->ops->sff_dev_select(ap, 1);
1899
1900
1901
1902
1903
1904 for (i = 0; i < 2; i++) {
1905 u8 nsect, lbal;
1906
1907 nsect = ioread8(ioaddr->nsect_addr);
1908 lbal = ioread8(ioaddr->lbal_addr);
1909 if ((nsect == 1) && (lbal == 1))
1910 break;
1911 ata_msleep(ap, 50);
1912 }
1913
1914 rc = ata_sff_wait_ready(link, deadline);
1915 if (rc) {
1916 if (rc != -ENODEV)
1917 return rc;
1918 ret = rc;
1919 }
1920 }
1921
1922
1923 ap->ops->sff_dev_select(ap, 0);
1924 if (dev1)
1925 ap->ops->sff_dev_select(ap, 1);
1926 if (dev0)
1927 ap->ops->sff_dev_select(ap, 0);
1928
1929 return ret;
1930}
1931EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
1932
1933static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1934 unsigned long deadline)
1935{
1936 struct ata_ioports *ioaddr = &ap->ioaddr;
1937
1938 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
1939
1940 if (ap->ioaddr.ctl_addr) {
1941
1942 iowrite8(ap->ctl, ioaddr->ctl_addr);
1943 udelay(20);
1944 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1945 udelay(20);
1946 iowrite8(ap->ctl, ioaddr->ctl_addr);
1947 ap->last_ctl = ap->ctl;
1948 }
1949
1950
1951 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
1952}
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
1969 unsigned long deadline)
1970{
1971 struct ata_port *ap = link->ap;
1972 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1973 unsigned int devmask = 0;
1974 int rc;
1975 u8 err;
1976
1977 DPRINTK("ENTER\n");
1978
1979
1980 if (ata_devchk(ap, 0))
1981 devmask |= (1 << 0);
1982 if (slave_possible && ata_devchk(ap, 1))
1983 devmask |= (1 << 1);
1984
1985
1986 ap->ops->sff_dev_select(ap, 0);
1987
1988
1989 DPRINTK("about to softreset, devmask=%x\n", devmask);
1990 rc = ata_bus_softreset(ap, devmask, deadline);
1991
1992 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
1993 ata_link_err(link, "SRST failed (errno=%d)\n", rc);
1994 return rc;
1995 }
1996
1997
1998 classes[0] = ata_sff_dev_classify(&link->device[0],
1999 devmask & (1 << 0), &err);
2000 if (slave_possible && err != 0x81)
2001 classes[1] = ata_sff_dev_classify(&link->device[1],
2002 devmask & (1 << 1), &err);
2003
2004 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2005 return 0;
2006}
2007EXPORT_SYMBOL_GPL(ata_sff_softreset);
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
2025 unsigned long deadline)
2026{
2027 struct ata_eh_context *ehc = &link->eh_context;
2028 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2029 bool online;
2030 int rc;
2031
2032 rc = sata_link_hardreset(link, timing, deadline, &online,
2033 ata_sff_check_ready);
2034 if (online)
2035 *class = ata_sff_dev_classify(link->device, 1, NULL);
2036
2037 DPRINTK("EXIT, class=%u\n", *class);
2038 return rc;
2039}
2040EXPORT_SYMBOL_GPL(sata_sff_hardreset);
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2055{
2056 struct ata_port *ap = link->ap;
2057
2058 ata_std_postreset(link, classes);
2059
2060
2061 if (classes[0] != ATA_DEV_NONE)
2062 ap->ops->sff_dev_select(ap, 1);
2063 if (classes[1] != ATA_DEV_NONE)
2064 ap->ops->sff_dev_select(ap, 0);
2065
2066
2067 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2068 DPRINTK("EXIT, no device\n");
2069 return;
2070 }
2071
2072
2073 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2074 ata_sff_set_devctl(ap, ap->ctl);
2075 ap->last_ctl = ap->ctl;
2076 }
2077}
2078EXPORT_SYMBOL_GPL(ata_sff_postreset);
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2091{
2092 int count;
2093 struct ata_port *ap;
2094
2095
2096 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2097 return;
2098
2099 ap = qc->ap;
2100
2101 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
2102 && count < 65536; count += 2)
2103 ioread16(ap->ioaddr.data_addr);
2104
2105
2106 if (count)
2107 ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
2108
2109}
2110EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124void ata_sff_error_handler(struct ata_port *ap)
2125{
2126 ata_reset_fn_t softreset = ap->ops->softreset;
2127 ata_reset_fn_t hardreset = ap->ops->hardreset;
2128 struct ata_queued_cmd *qc;
2129 unsigned long flags;
2130
2131 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2132 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2133 qc = NULL;
2134
2135 spin_lock_irqsave(ap->lock, flags);
2136
2137
2138
2139
2140
2141
2142
2143
2144 if (ap->ops->sff_drain_fifo)
2145 ap->ops->sff_drain_fifo(qc);
2146
2147 spin_unlock_irqrestore(ap->lock, flags);
2148
2149
2150 if ((hardreset == sata_std_hardreset ||
2151 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
2152 hardreset = NULL;
2153
2154 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2155 ap->ops->postreset);
2156}
2157EXPORT_SYMBOL_GPL(ata_sff_error_handler);
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170void ata_sff_std_ports(struct ata_ioports *ioaddr)
2171{
2172 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2173 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2174 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2175 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2176 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2177 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2178 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2179 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2180 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2181 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2182}
2183EXPORT_SYMBOL_GPL(ata_sff_std_ports);
2184
2185#ifdef CONFIG_PCI
2186
2187static int ata_resources_present(struct pci_dev *pdev, int port)
2188{
2189 int i;
2190
2191
2192 port = port * 2;
2193 for (i = 0; i < 2; i++) {
2194 if (pci_resource_start(pdev, port + i) == 0 ||
2195 pci_resource_len(pdev, port + i) == 0)
2196 return 0;
2197 }
2198 return 1;
2199}
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220int ata_pci_sff_init_host(struct ata_host *host)
2221{
2222 struct device *gdev = host->dev;
2223 struct pci_dev *pdev = to_pci_dev(gdev);
2224 unsigned int mask = 0;
2225 int i, rc;
2226
2227
2228 for (i = 0; i < 2; i++) {
2229 struct ata_port *ap = host->ports[i];
2230 int base = i * 2;
2231 void __iomem * const *iomap;
2232
2233 if (ata_port_is_dummy(ap))
2234 continue;
2235
2236
2237
2238
2239
2240 if (!ata_resources_present(pdev, i)) {
2241 ap->ops = &ata_dummy_port_ops;
2242 continue;
2243 }
2244
2245 rc = pcim_iomap_regions(pdev, 0x3 << base,
2246 dev_driver_string(gdev));
2247 if (rc) {
2248 dev_warn(gdev,
2249 "failed to request/iomap BARs for port %d (errno=%d)\n",
2250 i, rc);
2251 if (rc == -EBUSY)
2252 pcim_pin_device(pdev);
2253 ap->ops = &ata_dummy_port_ops;
2254 continue;
2255 }
2256 host->iomap = iomap = pcim_iomap_table(pdev);
2257
2258 ap->ioaddr.cmd_addr = iomap[base];
2259 ap->ioaddr.altstatus_addr =
2260 ap->ioaddr.ctl_addr = (void __iomem *)
2261 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
2262 ata_sff_std_ports(&ap->ioaddr);
2263
2264 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2265 (unsigned long long)pci_resource_start(pdev, base),
2266 (unsigned long long)pci_resource_start(pdev, base + 1));
2267
2268 mask |= 1 << i;
2269 }
2270
2271 if (!mask) {
2272 dev_err(gdev, "no available native port\n");
2273 return -ENODEV;
2274 }
2275
2276 return 0;
2277}
2278EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295int ata_pci_sff_prepare_host(struct pci_dev *pdev,
2296 const struct ata_port_info * const *ppi,
2297 struct ata_host **r_host)
2298{
2299 struct ata_host *host;
2300 int rc;
2301
2302 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2303 return -ENOMEM;
2304
2305 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2306 if (!host) {
2307 dev_err(&pdev->dev, "failed to allocate ATA host\n");
2308 rc = -ENOMEM;
2309 goto err_out;
2310 }
2311
2312 rc = ata_pci_sff_init_host(host);
2313 if (rc)
2314 goto err_out;
2315
2316 devres_remove_group(&pdev->dev, NULL);
2317 *r_host = host;
2318 return 0;
2319
2320err_out:
2321 devres_release_group(&pdev->dev, NULL);
2322 return rc;
2323}
2324EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342int ata_pci_sff_activate_host(struct ata_host *host,
2343 irq_handler_t irq_handler,
2344 struct scsi_host_template *sht)
2345{
2346 struct device *dev = host->dev;
2347 struct pci_dev *pdev = to_pci_dev(dev);
2348 const char *drv_name = dev_driver_string(host->dev);
2349 int legacy_mode = 0, rc;
2350
2351 rc = ata_host_start(host);
2352 if (rc)
2353 return rc;
2354
2355 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2356 u8 tmp8, mask = 0;
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2367 if (!ata_port_is_dummy(host->ports[0]))
2368 mask |= (1 << 0);
2369 if (!ata_port_is_dummy(host->ports[1]))
2370 mask |= (1 << 2);
2371 if ((tmp8 & mask) != mask)
2372 legacy_mode = 1;
2373 }
2374
2375 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2376 return -ENOMEM;
2377
2378 if (!legacy_mode && pdev->irq) {
2379 int i;
2380
2381 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2382 IRQF_SHARED, drv_name, host);
2383 if (rc)
2384 goto out;
2385
2386 for (i = 0; i < 2; i++) {
2387 if (ata_port_is_dummy(host->ports[i]))
2388 continue;
2389 ata_port_desc(host->ports[i], "irq %d", pdev->irq);
2390 }
2391 } else if (legacy_mode) {
2392 if (!ata_port_is_dummy(host->ports[0])) {
2393 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2394 irq_handler, IRQF_SHARED,
2395 drv_name, host);
2396 if (rc)
2397 goto out;
2398
2399 ata_port_desc(host->ports[0], "irq %d",
2400 ATA_PRIMARY_IRQ(pdev));
2401 }
2402
2403 if (!ata_port_is_dummy(host->ports[1])) {
2404 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2405 irq_handler, IRQF_SHARED,
2406 drv_name, host);
2407 if (rc)
2408 goto out;
2409
2410 ata_port_desc(host->ports[1], "irq %d",
2411 ATA_SECONDARY_IRQ(pdev));
2412 }
2413 }
2414
2415 rc = ata_host_register(host, sht);
2416out:
2417 if (rc == 0)
2418 devres_remove_group(dev, NULL);
2419 else
2420 devres_release_group(dev, NULL);
2421
2422 return rc;
2423}
2424EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
2425
2426static const struct ata_port_info *ata_sff_find_valid_pi(
2427 const struct ata_port_info * const *ppi)
2428{
2429 int i;
2430
2431
2432 for (i = 0; i < 2 && ppi[i]; i++)
2433 if (ppi[i]->port_ops != &ata_dummy_port_ops)
2434 return ppi[i];
2435
2436 return NULL;
2437}
2438
2439static int ata_pci_init_one(struct pci_dev *pdev,
2440 const struct ata_port_info * const *ppi,
2441 struct scsi_host_template *sht, void *host_priv,
2442 int hflags, bool bmdma)
2443{
2444 struct device *dev = &pdev->dev;
2445 const struct ata_port_info *pi;
2446 struct ata_host *host = NULL;
2447 int rc;
2448
2449 DPRINTK("ENTER\n");
2450
2451 pi = ata_sff_find_valid_pi(ppi);
2452 if (!pi) {
2453 dev_err(&pdev->dev, "no valid port_info specified\n");
2454 return -EINVAL;
2455 }
2456
2457 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2458 return -ENOMEM;
2459
2460 rc = pcim_enable_device(pdev);
2461 if (rc)
2462 goto out;
2463
2464#ifdef CONFIG_ATA_BMDMA
2465 if (bmdma)
2466
2467 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
2468 else
2469#endif
2470
2471 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
2472 if (rc)
2473 goto out;
2474 host->private_data = host_priv;
2475 host->flags |= hflags;
2476
2477#ifdef CONFIG_ATA_BMDMA
2478 if (bmdma) {
2479 pci_set_master(pdev);
2480 rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
2481 } else
2482#endif
2483 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
2484out:
2485 if (rc == 0)
2486 devres_remove_group(&pdev->dev, NULL);
2487 else
2488 devres_release_group(&pdev->dev, NULL);
2489
2490 return rc;
2491}
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515int ata_pci_sff_init_one(struct pci_dev *pdev,
2516 const struct ata_port_info * const *ppi,
2517 struct scsi_host_template *sht, void *host_priv, int hflag)
2518{
2519 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflag, 0);
2520}
2521EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
2522
2523#endif
2524
2525
2526
2527
2528
2529#ifdef CONFIG_ATA_BMDMA
2530
2531const struct ata_port_operations ata_bmdma_port_ops = {
2532 .inherits = &ata_sff_port_ops,
2533
2534 .error_handler = ata_bmdma_error_handler,
2535 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2536
2537 .qc_prep = ata_bmdma_qc_prep,
2538 .qc_issue = ata_bmdma_qc_issue,
2539
2540 .sff_irq_clear = ata_bmdma_irq_clear,
2541 .bmdma_setup = ata_bmdma_setup,
2542 .bmdma_start = ata_bmdma_start,
2543 .bmdma_stop = ata_bmdma_stop,
2544 .bmdma_status = ata_bmdma_status,
2545
2546 .port_start = ata_bmdma_port_start,
2547};
2548EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2549
2550const struct ata_port_operations ata_bmdma32_port_ops = {
2551 .inherits = &ata_bmdma_port_ops,
2552
2553 .sff_data_xfer = ata_sff_data_xfer32,
2554 .port_start = ata_bmdma_port_start32,
2555};
2556EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2570{
2571 struct ata_port *ap = qc->ap;
2572 struct ata_bmdma_prd *prd = ap->bmdma_prd;
2573 struct scatterlist *sg;
2574 unsigned int si, pi;
2575
2576 pi = 0;
2577 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2578 u32 addr, offset;
2579 u32 sg_len, len;
2580
2581
2582
2583
2584
2585 addr = (u32) sg_dma_address(sg);
2586 sg_len = sg_dma_len(sg);
2587
2588 while (sg_len) {
2589 offset = addr & 0xffff;
2590 len = sg_len;
2591 if ((offset + sg_len) > 0x10000)
2592 len = 0x10000 - offset;
2593
2594 prd[pi].addr = cpu_to_le32(addr);
2595 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
2596 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2597
2598 pi++;
2599 sg_len -= len;
2600 addr += len;
2601 }
2602 }
2603
2604 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2605}
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2621{
2622 struct ata_port *ap = qc->ap;
2623 struct ata_bmdma_prd *prd = ap->bmdma_prd;
2624 struct scatterlist *sg;
2625 unsigned int si, pi;
2626
2627 pi = 0;
2628 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2629 u32 addr, offset;
2630 u32 sg_len, len, blen;
2631
2632
2633
2634
2635
2636 addr = (u32) sg_dma_address(sg);
2637 sg_len = sg_dma_len(sg);
2638
2639 while (sg_len) {
2640 offset = addr & 0xffff;
2641 len = sg_len;
2642 if ((offset + sg_len) > 0x10000)
2643 len = 0x10000 - offset;
2644
2645 blen = len & 0xffff;
2646 prd[pi].addr = cpu_to_le32(addr);
2647 if (blen == 0) {
2648
2649
2650
2651 prd[pi].flags_len = cpu_to_le32(0x8000);
2652 blen = 0x8000;
2653 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
2654 }
2655 prd[pi].flags_len = cpu_to_le32(blen);
2656 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2657
2658 pi++;
2659 sg_len -= len;
2660 addr += len;
2661 }
2662 }
2663
2664 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2665}
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2677{
2678 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2679 return;
2680
2681 ata_bmdma_fill_sg(qc);
2682}
2683EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2695{
2696 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2697 return;
2698
2699 ata_bmdma_fill_sg_dumb(qc);
2700}
2701EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2718{
2719 struct ata_port *ap = qc->ap;
2720 struct ata_link *link = qc->dev->link;
2721
2722
2723 if (!ata_is_dma(qc->tf.protocol))
2724 return ata_sff_qc_issue(qc);
2725
2726
2727 ata_dev_select(ap, qc->dev->devno, 1, 0);
2728
2729
2730 switch (qc->tf.protocol) {
2731 case ATA_PROT_DMA:
2732 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2733
2734 ap->ops->sff_tf_load(ap, &qc->tf);
2735 ap->ops->bmdma_setup(qc);
2736 ap->ops->bmdma_start(qc);
2737 ap->hsm_task_state = HSM_ST_LAST;
2738 break;
2739
2740 case ATAPI_PROT_DMA:
2741 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2742
2743 ap->ops->sff_tf_load(ap, &qc->tf);
2744 ap->ops->bmdma_setup(qc);
2745 ap->hsm_task_state = HSM_ST_FIRST;
2746
2747
2748 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
2749 ata_sff_queue_pio_task(link, 0);
2750 break;
2751
2752 default:
2753 WARN_ON(1);
2754 return AC_ERR_SYSTEM;
2755 }
2756
2757 return 0;
2758}
2759EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
2775{
2776 struct ata_eh_info *ehi = &ap->link.eh_info;
2777 u8 host_stat = 0;
2778 bool bmdma_stopped = false;
2779 unsigned int handled;
2780
2781 if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
2782
2783 host_stat = ap->ops->bmdma_status(ap);
2784 VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat);
2785
2786
2787 if (!(host_stat & ATA_DMA_INTR))
2788 return ata_sff_idle_irq(ap);
2789
2790
2791 ap->ops->bmdma_stop(qc);
2792 bmdma_stopped = true;
2793
2794 if (unlikely(host_stat & ATA_DMA_ERR)) {
2795
2796 qc->err_mask |= AC_ERR_HOST_BUS;
2797 ap->hsm_task_state = HSM_ST_ERR;
2798 }
2799 }
2800
2801 handled = __ata_sff_port_intr(ap, qc, bmdma_stopped);
2802
2803 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol))
2804 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
2805
2806 return handled;
2807}
2808EXPORT_SYMBOL_GPL(ata_bmdma_port_intr);
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance)
2825{
2826 return __ata_sff_interrupt(irq, dev_instance, ata_bmdma_port_intr);
2827}
2828EXPORT_SYMBOL_GPL(ata_bmdma_interrupt);
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842void ata_bmdma_error_handler(struct ata_port *ap)
2843{
2844 struct ata_queued_cmd *qc;
2845 unsigned long flags;
2846 bool thaw = false;
2847
2848 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2849 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2850 qc = NULL;
2851
2852
2853 spin_lock_irqsave(ap->lock, flags);
2854
2855 if (qc && ata_is_dma(qc->tf.protocol)) {
2856 u8 host_stat;
2857
2858 host_stat = ap->ops->bmdma_status(ap);
2859
2860
2861
2862
2863
2864
2865 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2866 qc->err_mask = AC_ERR_HOST_BUS;
2867 thaw = true;
2868 }
2869
2870 ap->ops->bmdma_stop(qc);
2871
2872
2873 if (thaw) {
2874 ap->ops->sff_check_status(ap);
2875 if (ap->ops->sff_irq_clear)
2876 ap->ops->sff_irq_clear(ap);
2877 }
2878 }
2879
2880 spin_unlock_irqrestore(ap->lock, flags);
2881
2882 if (thaw)
2883 ata_eh_thaw_port(ap);
2884
2885 ata_sff_error_handler(ap);
2886}
2887EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2888
2889
2890
2891
2892
2893
2894
2895
2896void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2897{
2898 struct ata_port *ap = qc->ap;
2899 unsigned long flags;
2900
2901 if (ata_is_dma(qc->tf.protocol)) {
2902 spin_lock_irqsave(ap->lock, flags);
2903 ap->ops->bmdma_stop(qc);
2904 spin_unlock_irqrestore(ap->lock, flags);
2905 }
2906}
2907EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920void ata_bmdma_irq_clear(struct ata_port *ap)
2921{
2922 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2923
2924 if (!mmio)
2925 return;
2926
2927 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
2928}
2929EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
2930
2931
2932
2933
2934
2935
2936
2937
2938void ata_bmdma_setup(struct ata_queued_cmd *qc)
2939{
2940 struct ata_port *ap = qc->ap;
2941 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2942 u8 dmactl;
2943
2944
2945 mb();
2946 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2947
2948
2949 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2950 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2951 if (!rw)
2952 dmactl |= ATA_DMA_WR;
2953 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2954
2955
2956 ap->ops->sff_exec_command(ap, &qc->tf);
2957}
2958EXPORT_SYMBOL_GPL(ata_bmdma_setup);
2959
2960
2961
2962
2963
2964
2965
2966
2967void ata_bmdma_start(struct ata_queued_cmd *qc)
2968{
2969 struct ata_port *ap = qc->ap;
2970 u8 dmactl;
2971
2972
2973 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2974 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990}
2991EXPORT_SYMBOL_GPL(ata_bmdma_start);
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004void ata_bmdma_stop(struct ata_queued_cmd *qc)
3005{
3006 struct ata_port *ap = qc->ap;
3007 void __iomem *mmio = ap->ioaddr.bmdma_addr;
3008
3009
3010 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3011 mmio + ATA_DMA_CMD);
3012
3013
3014 ata_sff_dma_pause(ap);
3015}
3016EXPORT_SYMBOL_GPL(ata_bmdma_stop);
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029u8 ata_bmdma_status(struct ata_port *ap)
3030{
3031 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3032}
3033EXPORT_SYMBOL_GPL(ata_bmdma_status);
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048int ata_bmdma_port_start(struct ata_port *ap)
3049{
3050 if (ap->mwdma_mask || ap->udma_mask) {
3051 ap->bmdma_prd =
3052 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3053 &ap->bmdma_prd_dma, GFP_KERNEL);
3054 if (!ap->bmdma_prd)
3055 return -ENOMEM;
3056 }
3057
3058 return 0;
3059}
3060EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076int ata_bmdma_port_start32(struct ata_port *ap)
3077{
3078 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3079 return ata_bmdma_port_start(ap);
3080}
3081EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3082
3083#ifdef CONFIG_PCI
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3095{
3096 unsigned long bmdma = pci_resource_start(pdev, 4);
3097 u8 simplex;
3098
3099 if (bmdma == 0)
3100 return -ENOENT;
3101
3102 simplex = inb(bmdma + 0x02);
3103 outb(simplex & 0x60, bmdma + 0x02);
3104 simplex = inb(bmdma + 0x02);
3105 if (simplex & 0x80)
3106 return -EOPNOTSUPP;
3107 return 0;
3108}
3109EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3110
3111static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3112{
3113 int i;
3114
3115 dev_err(host->dev, "BMDMA: %s, falling back to PIO\n", reason);
3116
3117 for (i = 0; i < 2; i++) {
3118 host->ports[i]->mwdma_mask = 0;
3119 host->ports[i]->udma_mask = 0;
3120 }
3121}
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132void ata_pci_bmdma_init(struct ata_host *host)
3133{
3134 struct device *gdev = host->dev;
3135 struct pci_dev *pdev = to_pci_dev(gdev);
3136 int i, rc;
3137
3138
3139 if (pci_resource_start(pdev, 4) == 0) {
3140 ata_bmdma_nodma(host, "BAR4 is zero");
3141 return;
3142 }
3143
3144
3145
3146
3147
3148
3149
3150 rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
3151 if (rc)
3152 ata_bmdma_nodma(host, "failed to set dma mask");
3153 if (!rc) {
3154 rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
3155 if (rc)
3156 ata_bmdma_nodma(host,
3157 "failed to set consistent dma mask");
3158 }
3159
3160
3161 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3162 if (rc) {
3163 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3164 return;
3165 }
3166 host->iomap = pcim_iomap_table(pdev);
3167
3168 for (i = 0; i < 2; i++) {
3169 struct ata_port *ap = host->ports[i];
3170 void __iomem *bmdma = host->iomap[4] + 8 * i;
3171
3172 if (ata_port_is_dummy(ap))
3173 continue;
3174
3175 ap->ioaddr.bmdma_addr = bmdma;
3176 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3177 (ioread8(bmdma + 2) & 0x80))
3178 host->flags |= ATA_HOST_SIMPLEX;
3179
3180 ata_port_desc(ap, "bmdma 0x%llx",
3181 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3182 }
3183}
3184EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201int ata_pci_bmdma_prepare_host(struct pci_dev *pdev,
3202 const struct ata_port_info * const * ppi,
3203 struct ata_host **r_host)
3204{
3205 int rc;
3206
3207 rc = ata_pci_sff_prepare_host(pdev, ppi, r_host);
3208 if (rc)
3209 return rc;
3210
3211 ata_pci_bmdma_init(*r_host);
3212 return 0;
3213}
3214EXPORT_SYMBOL_GPL(ata_pci_bmdma_prepare_host);
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233int ata_pci_bmdma_init_one(struct pci_dev *pdev,
3234 const struct ata_port_info * const * ppi,
3235 struct scsi_host_template *sht, void *host_priv,
3236 int hflags)
3237{
3238 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflags, 1);
3239}
3240EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one);
3241
3242#endif
3243#endif
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255void ata_sff_port_init(struct ata_port *ap)
3256{
3257 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
3258 ap->ctl = ATA_DEVCTL_OBS;
3259 ap->last_ctl = 0xFF;
3260}
3261
3262int __init ata_sff_init(void)
3263{
3264 ata_sff_wq = alloc_workqueue("ata_sff", WQ_MEM_RECLAIM, WQ_MAX_ACTIVE);
3265 if (!ata_sff_wq)
3266 return -ENOMEM;
3267
3268 return 0;
3269}
3270
3271void ata_sff_exit(void)
3272{
3273 destroy_workqueue(ata_sff_wq);
3274}
3275