LXR linux/drivers/gpu/drm/i915/intel

   1/*
   2 * Copyright © 2013 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21 * DEALINGS IN THE SOFTWARE.
  22 */
  23
  24#ifndef _INTEL_DSI_H
  25#define _INTEL_DSI_H
  26
  27#include <drm/drm_crtc.h>
  28#include <drm/drm_mipi_dsi.h>
  29#include "intel_drv.h"
  30
  31/* Dual Link support */
  32#define DSI_DUAL_LINK_NONE              0
  33#define DSI_DUAL_LINK_FRONT_BACK        1
  34#define DSI_DUAL_LINK_PIXEL_ALT         2
  35
  36struct intel_dsi_host;
  37
  38struct intel_dsi {
  39        struct intel_encoder base;
  40
  41        struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
  42        intel_wakeref_t io_wakeref[I915_MAX_PORTS];
  43
  44        /* GPIO Desc for CRC based Panel control */
  45        struct gpio_desc *gpio_panel;
  46
  47        struct intel_connector *attached_connector;
  48
  49        /* bit mask of ports being driven */
  50        u16 ports;
  51
  52        /* if true, use HS mode, otherwise LP */
  53        bool hs;
  54
  55        /* virtual channel */
  56        int channel;
  57
  58        /* Video mode or command mode */
  59        u16 operation_mode;
  60
  61        /* number of DSI lanes */
  62        unsigned int lane_count;
  63
  64        /*
  65         * video mode pixel format
  66         *
  67         * XXX: consolidate on .format in struct mipi_dsi_device.
  68         */
  69        enum mipi_dsi_pixel_format pixel_format;
  70
  71        /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
  72        u32 video_mode_format;
  73
  74        /* eot for MIPI_EOT_DISABLE register */
  75        u8 eotp_pkt;
  76        u8 clock_stop;
  77
  78        u8 escape_clk_div;
  79        u8 dual_link;
  80
  81        u16 dcs_backlight_ports;
  82        u16 dcs_cabc_ports;
  83
  84        /* RGB or BGR */
  85        bool bgr_enabled;
  86
  87        u8 pixel_overlap;
  88        u32 port_bits;
  89        u32 bw_timer;
  90        u32 dphy_reg;
  91
  92        /* data lanes dphy timing */
  93        u32 dphy_data_lane_reg;
  94        u32 video_frmt_cfg_bits;
  95        u16 lp_byte_clk;
  96
  97        /* timeouts in byte clocks */
  98        u16 hs_tx_timeout;
  99        u16 lp_rx_timeout;
 100        u16 turn_arnd_val;
 101        u16 rst_timer_val;
 102        u16 hs_to_lp_count;
 103        u16 clk_lp_to_hs_count;
 104        u16 clk_hs_to_lp_count;
 105
 106        u16 init_count;
 107        u32 pclk;
 108        u16 burst_mode_ratio;
 109
 110        /* all delays in ms */
 111        u16 backlight_off_delay;
 112        u16 backlight_on_delay;
 113        u16 panel_on_delay;
 114        u16 panel_off_delay;
 115        u16 panel_pwr_cycle_delay;
 116};
 117
 118struct intel_dsi_host {
 119        struct mipi_dsi_host base;
 120        struct intel_dsi *intel_dsi;
 121        enum port port;
 122
 123        /* our little hack */
 124        struct mipi_dsi_device *device;
 125};
 126
 127static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
 128{
 129        return container_of(h, struct intel_dsi_host, base);
 130}
 131
 132#define for_each_dsi_port(__port, __ports_mask) for_each_port_masked(__port, __ports_mask)
 133
 134static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 135{
 136        return container_of(encoder, struct intel_dsi, base.base);
 137}
 138
 139static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
 140{
 141        return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE;
 142}
 143
 144static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
 145{
 146        return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE;
 147}
 148
 149static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
 150{
 151        return enc_to_intel_dsi(&encoder->base)->ports;
 152}
 153
 154/* intel_dsi.c */
 155int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
 156int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
 157enum drm_panel_orientation
 158intel_dsi_get_panel_orientation(struct intel_connector *connector);
 159
 160/* vlv_dsi.c */
 161void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 162enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 163int intel_dsi_get_modes(struct drm_connector *connector);
 164enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
 165                                          struct drm_display_mode *mode);
 166struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
 167                                           const struct mipi_dsi_host_ops *funcs,
 168                                           enum port port);
 169
 170/* vlv_dsi_pll.c */
 171int vlv_dsi_pll_compute(struct intel_encoder *encoder,
 172                        struct intel_crtc_state *config);
 173void vlv_dsi_pll_enable(struct intel_encoder *encoder,
 174                        const struct intel_crtc_state *config);
 175void vlv_dsi_pll_disable(struct intel_encoder *encoder);
 176u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
 177                     struct intel_crtc_state *config);
 178void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 179
 180bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 181int bxt_dsi_pll_compute(struct intel_encoder *encoder,
 182                        struct intel_crtc_state *config);
 183void bxt_dsi_pll_enable(struct intel_encoder *encoder,
 184                        const struct intel_crtc_state *config);
 185void bxt_dsi_pll_disable(struct intel_encoder *encoder);
 186u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
 187                     struct intel_crtc_state *config);
 188void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 189
 190/* intel_dsi_vbt.c */
 191bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
 192void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
 193                                 enum mipi_seq seq_id);
 194void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
 195
 196#endif /* _INTEL_DSI_H */
 197