linux/drivers/gpu/drm/i915/intel_dvo.c
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   1/*
   2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3 * Copyright © 2006-2007 Intel Corporation
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice (including the next
  13 * paragraph) shall be included in all copies or substantial portions of the
  14 * Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22 * DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors:
  25 *      Eric Anholt <eric@anholt.net>
  26 */
  27
  28#include <linux/i2c.h>
  29#include <linux/slab.h>
  30
  31#include <drm/drm_atomic_helper.h>
  32#include <drm/drm_crtc.h>
  33#include <drm/i915_drm.h>
  34
  35#include "dvo.h"
  36#include "i915_drv.h"
  37#include "intel_connector.h"
  38#include "intel_drv.h"
  39#include "intel_dvo.h"
  40#include "intel_panel.h"
  41
  42#define SIL164_ADDR     0x38
  43#define CH7xxx_ADDR     0x76
  44#define TFP410_ADDR     0x38
  45#define NS2501_ADDR     0x38
  46
  47static const struct intel_dvo_device intel_dvo_devices[] = {
  48        {
  49                .type = INTEL_DVO_CHIP_TMDS,
  50                .name = "sil164",
  51                .dvo_reg = DVOC,
  52                .dvo_srcdim_reg = DVOC_SRCDIM,
  53                .slave_addr = SIL164_ADDR,
  54                .dev_ops = &sil164_ops,
  55        },
  56        {
  57                .type = INTEL_DVO_CHIP_TMDS,
  58                .name = "ch7xxx",
  59                .dvo_reg = DVOC,
  60                .dvo_srcdim_reg = DVOC_SRCDIM,
  61                .slave_addr = CH7xxx_ADDR,
  62                .dev_ops = &ch7xxx_ops,
  63        },
  64        {
  65                .type = INTEL_DVO_CHIP_TMDS,
  66                .name = "ch7xxx",
  67                .dvo_reg = DVOC,
  68                .dvo_srcdim_reg = DVOC_SRCDIM,
  69                .slave_addr = 0x75, /* For some ch7010 */
  70                .dev_ops = &ch7xxx_ops,
  71        },
  72        {
  73                .type = INTEL_DVO_CHIP_LVDS,
  74                .name = "ivch",
  75                .dvo_reg = DVOA,
  76                .dvo_srcdim_reg = DVOA_SRCDIM,
  77                .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  78                .dev_ops = &ivch_ops,
  79        },
  80        {
  81                .type = INTEL_DVO_CHIP_TMDS,
  82                .name = "tfp410",
  83                .dvo_reg = DVOC,
  84                .dvo_srcdim_reg = DVOC_SRCDIM,
  85                .slave_addr = TFP410_ADDR,
  86                .dev_ops = &tfp410_ops,
  87        },
  88        {
  89                .type = INTEL_DVO_CHIP_LVDS,
  90                .name = "ch7017",
  91                .dvo_reg = DVOC,
  92                .dvo_srcdim_reg = DVOC_SRCDIM,
  93                .slave_addr = 0x75,
  94                .gpio = GMBUS_PIN_DPB,
  95                .dev_ops = &ch7017_ops,
  96        },
  97        {
  98                .type = INTEL_DVO_CHIP_TMDS,
  99                .name = "ns2501",
 100                .dvo_reg = DVOB,
 101                .dvo_srcdim_reg = DVOB_SRCDIM,
 102                .slave_addr = NS2501_ADDR,
 103                .dev_ops = &ns2501_ops,
 104       }
 105};
 106
 107struct intel_dvo {
 108        struct intel_encoder base;
 109
 110        struct intel_dvo_device dev;
 111
 112        struct intel_connector *attached_connector;
 113
 114        bool panel_wants_dither;
 115};
 116
 117static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 118{
 119        return container_of(encoder, struct intel_dvo, base);
 120}
 121
 122static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 123{
 124        return enc_to_dvo(intel_attached_encoder(connector));
 125}
 126
 127static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 128{
 129        struct drm_device *dev = connector->base.dev;
 130        struct drm_i915_private *dev_priv = to_i915(dev);
 131        struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 132        u32 tmp;
 133
 134        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 135
 136        if (!(tmp & DVO_ENABLE))
 137                return false;
 138
 139        return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 140}
 141
 142static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 143                                   enum pipe *pipe)
 144{
 145        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 146        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 147        u32 tmp;
 148
 149        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 150
 151        *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
 152
 153        return tmp & DVO_ENABLE;
 154}
 155
 156static void intel_dvo_get_config(struct intel_encoder *encoder,
 157                                 struct intel_crtc_state *pipe_config)
 158{
 159        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 160        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 161        u32 tmp, flags = 0;
 162
 163        pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
 164
 165        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 166        if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 167                flags |= DRM_MODE_FLAG_PHSYNC;
 168        else
 169                flags |= DRM_MODE_FLAG_NHSYNC;
 170        if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 171                flags |= DRM_MODE_FLAG_PVSYNC;
 172        else
 173                flags |= DRM_MODE_FLAG_NVSYNC;
 174
 175        pipe_config->base.adjusted_mode.flags |= flags;
 176
 177        pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 178}
 179
 180static void intel_disable_dvo(struct intel_encoder *encoder,
 181                              const struct intel_crtc_state *old_crtc_state,
 182                              const struct drm_connector_state *old_conn_state)
 183{
 184        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 185        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 186        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 187        u32 temp = I915_READ(dvo_reg);
 188
 189        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 190        I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 191        I915_READ(dvo_reg);
 192}
 193
 194static void intel_enable_dvo(struct intel_encoder *encoder,
 195                             const struct intel_crtc_state *pipe_config,
 196                             const struct drm_connector_state *conn_state)
 197{
 198        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 199        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 200        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 201        u32 temp = I915_READ(dvo_reg);
 202
 203        intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 204                                         &pipe_config->base.mode,
 205                                         &pipe_config->base.adjusted_mode);
 206
 207        I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 208        I915_READ(dvo_reg);
 209
 210        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 211}
 212
 213static enum drm_mode_status
 214intel_dvo_mode_valid(struct drm_connector *connector,
 215                     struct drm_display_mode *mode)
 216{
 217        struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 218        const struct drm_display_mode *fixed_mode =
 219                to_intel_connector(connector)->panel.fixed_mode;
 220        int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 221        int target_clock = mode->clock;
 222
 223        if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 224                return MODE_NO_DBLESCAN;
 225
 226        /* XXX: Validate clock range */
 227
 228        if (fixed_mode) {
 229                if (mode->hdisplay > fixed_mode->hdisplay)
 230                        return MODE_PANEL;
 231                if (mode->vdisplay > fixed_mode->vdisplay)
 232                        return MODE_PANEL;
 233
 234                target_clock = fixed_mode->clock;
 235        }
 236
 237        if (target_clock > max_dotclk)
 238                return MODE_CLOCK_HIGH;
 239
 240        return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 241}
 242
 243static int intel_dvo_compute_config(struct intel_encoder *encoder,
 244                                    struct intel_crtc_state *pipe_config,
 245                                    struct drm_connector_state *conn_state)
 246{
 247        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 248        const struct drm_display_mode *fixed_mode =
 249                intel_dvo->attached_connector->panel.fixed_mode;
 250        struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 251
 252        /*
 253         * If we have timings from the BIOS for the panel, put them in
 254         * to the adjusted mode.  The CRTC will be set up for this mode,
 255         * with the panel scaling set up to source from the H/VDisplay
 256         * of the original mode.
 257         */
 258        if (fixed_mode)
 259                intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 260
 261        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 262                return -EINVAL;
 263
 264        pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 265
 266        return 0;
 267}
 268
 269static void intel_dvo_pre_enable(struct intel_encoder *encoder,
 270                                 const struct intel_crtc_state *pipe_config,
 271                                 const struct drm_connector_state *conn_state)
 272{
 273        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 274        struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 275        const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 276        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 277        int pipe = crtc->pipe;
 278        u32 dvo_val;
 279        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 280        i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 281
 282        /* Save the data order, since I don't know what it should be set to. */
 283        dvo_val = I915_READ(dvo_reg) &
 284                  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 285        dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 286                   DVO_BLANK_ACTIVE_HIGH;
 287
 288        dvo_val |= DVO_PIPE_SEL(pipe);
 289        dvo_val |= DVO_PIPE_STALL;
 290        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 291                dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 292        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 293                dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 294
 295        /*I915_WRITE(DVOB_SRCDIM,
 296          (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 297          (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 298        I915_WRITE(dvo_srcdim_reg,
 299                   (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 300                   (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 301        /*I915_WRITE(DVOB, dvo_val);*/
 302        I915_WRITE(dvo_reg, dvo_val);
 303}
 304
 305static enum drm_connector_status
 306intel_dvo_detect(struct drm_connector *connector, bool force)
 307{
 308        struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 309        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 310                      connector->base.id, connector->name);
 311        return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 312}
 313
 314static int intel_dvo_get_modes(struct drm_connector *connector)
 315{
 316        struct drm_i915_private *dev_priv = to_i915(connector->dev);
 317        const struct drm_display_mode *fixed_mode =
 318                to_intel_connector(connector)->panel.fixed_mode;
 319
 320        /*
 321         * We should probably have an i2c driver get_modes function for those
 322         * devices which will have a fixed set of modes determined by the chip
 323         * (TV-out, for example), but for now with just TMDS and LVDS,
 324         * that's not the case.
 325         */
 326        intel_ddc_get_modes(connector,
 327                            intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 328        if (!list_empty(&connector->probed_modes))
 329                return 1;
 330
 331        if (fixed_mode) {
 332                struct drm_display_mode *mode;
 333                mode = drm_mode_duplicate(connector->dev, fixed_mode);
 334                if (mode) {
 335                        drm_mode_probed_add(connector, mode);
 336                        return 1;
 337                }
 338        }
 339
 340        return 0;
 341}
 342
 343static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 344        .detect = intel_dvo_detect,
 345        .late_register = intel_connector_register,
 346        .early_unregister = intel_connector_unregister,
 347        .destroy = intel_connector_destroy,
 348        .fill_modes = drm_helper_probe_single_connector_modes,
 349        .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 350        .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 351};
 352
 353static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 354        .mode_valid = intel_dvo_mode_valid,
 355        .get_modes = intel_dvo_get_modes,
 356};
 357
 358static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 359{
 360        struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 361
 362        if (intel_dvo->dev.dev_ops->destroy)
 363                intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 364
 365        intel_encoder_destroy(encoder);
 366}
 367
 368static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 369        .destroy = intel_dvo_enc_destroy,
 370};
 371
 372/*
 373 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 374 *
 375 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 376 * chip being on DVOB/C and having multiple pipes.
 377 */
 378static struct drm_display_mode *
 379intel_dvo_get_current_mode(struct intel_encoder *encoder)
 380{
 381        struct drm_display_mode *mode;
 382
 383        mode = intel_encoder_current_mode(encoder);
 384        if (mode) {
 385                DRM_DEBUG_KMS("using current (BIOS) mode: ");
 386                drm_mode_debug_printmodeline(mode);
 387                mode->type |= DRM_MODE_TYPE_PREFERRED;
 388        }
 389
 390        return mode;
 391}
 392
 393static enum port intel_dvo_port(i915_reg_t dvo_reg)
 394{
 395        if (i915_mmio_reg_equal(dvo_reg, DVOA))
 396                return PORT_A;
 397        else if (i915_mmio_reg_equal(dvo_reg, DVOB))
 398                return PORT_B;
 399        else
 400                return PORT_C;
 401}
 402
 403void intel_dvo_init(struct drm_i915_private *dev_priv)
 404{
 405        struct intel_encoder *intel_encoder;
 406        struct intel_dvo *intel_dvo;
 407        struct intel_connector *intel_connector;
 408        int i;
 409        int encoder_type = DRM_MODE_ENCODER_NONE;
 410
 411        intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 412        if (!intel_dvo)
 413                return;
 414
 415        intel_connector = intel_connector_alloc();
 416        if (!intel_connector) {
 417                kfree(intel_dvo);
 418                return;
 419        }
 420
 421        intel_dvo->attached_connector = intel_connector;
 422
 423        intel_encoder = &intel_dvo->base;
 424
 425        intel_encoder->disable = intel_disable_dvo;
 426        intel_encoder->enable = intel_enable_dvo;
 427        intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 428        intel_encoder->get_config = intel_dvo_get_config;
 429        intel_encoder->compute_config = intel_dvo_compute_config;
 430        intel_encoder->pre_enable = intel_dvo_pre_enable;
 431        intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 432
 433        /* Now, try to find a controller */
 434        for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 435                struct drm_connector *connector = &intel_connector->base;
 436                const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 437                struct i2c_adapter *i2c;
 438                int gpio;
 439                bool dvoinit;
 440                enum pipe pipe;
 441                u32 dpll[I915_MAX_PIPES];
 442                enum port port;
 443
 444                /*
 445                 * Allow the I2C driver info to specify the GPIO to be used in
 446                 * special cases, but otherwise default to what's defined
 447                 * in the spec.
 448                 */
 449                if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 450                        gpio = dvo->gpio;
 451                else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 452                        gpio = GMBUS_PIN_SSC;
 453                else
 454                        gpio = GMBUS_PIN_DPB;
 455
 456                /*
 457                 * Set up the I2C bus necessary for the chip we're probing.
 458                 * It appears that everything is on GPIOE except for panels
 459                 * on i830 laptops, which are on GPIOB (DVOA).
 460                 */
 461                i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 462
 463                intel_dvo->dev = *dvo;
 464
 465                /*
 466                 * GMBUS NAK handling seems to be unstable, hence let the
 467                 * transmitter detection run in bit banging mode for now.
 468                 */
 469                intel_gmbus_force_bit(i2c, true);
 470
 471                /*
 472                 * ns2501 requires the DVO 2x clock before it will
 473                 * respond to i2c accesses, so make sure we have
 474                 * have the clock enabled before we attempt to
 475                 * initialize the device.
 476                 */
 477                for_each_pipe(dev_priv, pipe) {
 478                        dpll[pipe] = I915_READ(DPLL(pipe));
 479                        I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 480                }
 481
 482                dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 483
 484                /* restore the DVO 2x clock state to original */
 485                for_each_pipe(dev_priv, pipe) {
 486                        I915_WRITE(DPLL(pipe), dpll[pipe]);
 487                }
 488
 489                intel_gmbus_force_bit(i2c, false);
 490
 491                if (!dvoinit)
 492                        continue;
 493
 494                port = intel_dvo_port(dvo->dvo_reg);
 495                drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
 496                                 &intel_dvo_enc_funcs, encoder_type,
 497                                 "DVO %c", port_name(port));
 498
 499                intel_encoder->type = INTEL_OUTPUT_DVO;
 500                intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 501                intel_encoder->port = port;
 502                intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 503
 504                switch (dvo->type) {
 505                case INTEL_DVO_CHIP_TMDS:
 506                        intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 507                                (1 << INTEL_OUTPUT_DVO);
 508                        drm_connector_init(&dev_priv->drm, connector,
 509                                           &intel_dvo_connector_funcs,
 510                                           DRM_MODE_CONNECTOR_DVII);
 511                        encoder_type = DRM_MODE_ENCODER_TMDS;
 512                        break;
 513                case INTEL_DVO_CHIP_LVDS:
 514                        intel_encoder->cloneable = 0;
 515                        drm_connector_init(&dev_priv->drm, connector,
 516                                           &intel_dvo_connector_funcs,
 517                                           DRM_MODE_CONNECTOR_LVDS);
 518                        encoder_type = DRM_MODE_ENCODER_LVDS;
 519                        break;
 520                }
 521
 522                drm_connector_helper_add(connector,
 523                                         &intel_dvo_connector_helper_funcs);
 524                connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 525                connector->interlace_allowed = false;
 526                connector->doublescan_allowed = false;
 527
 528                intel_connector_attach_encoder(intel_connector, intel_encoder);
 529                if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 530                        /*
 531                         * For our LVDS chipsets, we should hopefully be able
 532                         * to dig the fixed panel mode out of the BIOS data.
 533                         * However, it's in a different format from the BIOS
 534                         * data on chipsets with integrated LVDS (stored in AIM
 535                         * headers, likely), so for now, just get the current
 536                         * mode being output through DVO.
 537                         */
 538                        intel_panel_init(&intel_connector->panel,
 539                                         intel_dvo_get_current_mode(intel_encoder),
 540                                         NULL);
 541                        intel_dvo->panel_wants_dither = true;
 542                }
 543
 544                return;
 545        }
 546
 547        kfree(intel_dvo);
 548        kfree(intel_connector);
 549}
 550