linux/drivers/power/reset/keystone-reset.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * TI keystone reboot driver
   4 *
   5 * Copyright (C) 2014 Texas Instruments Incorporated. http://www.ti.com/
   6 *
   7 * Author: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
   8 */
   9
  10#include <linux/io.h>
  11#include <linux/module.h>
  12#include <linux/notifier.h>
  13#include <linux/reboot.h>
  14#include <linux/regmap.h>
  15#include <linux/mfd/syscon.h>
  16#include <linux/of_platform.h>
  17
  18#define RSTYPE_RG                       0x0
  19#define RSCTRL_RG                       0x4
  20#define RSCFG_RG                        0x8
  21#define RSISO_RG                        0xc
  22
  23#define RSCTRL_KEY_MASK                 0x0000ffff
  24#define RSCTRL_RESET_MASK               BIT(16)
  25#define RSCTRL_KEY                      0x5a69
  26
  27#define RSMUX_OMODE_MASK                0xe
  28#define RSMUX_OMODE_RESET_ON            0xa
  29#define RSMUX_OMODE_RESET_OFF           0x0
  30#define RSMUX_LOCK_MASK                 0x1
  31#define RSMUX_LOCK_SET                  0x1
  32
  33#define RSCFG_RSTYPE_SOFT               0x300f
  34#define RSCFG_RSTYPE_HARD               0x0
  35
  36#define WDT_MUX_NUMBER                  0x4
  37
  38static int rspll_offset;
  39static struct regmap *pllctrl_regs;
  40
  41/**
  42 * rsctrl_enable_rspll_write - enable access to RSCTRL, RSCFG
  43 * To be able to access to RSCTRL, RSCFG registers
  44 * we have to write a key before
  45 */
  46static inline int rsctrl_enable_rspll_write(void)
  47{
  48        return regmap_update_bits(pllctrl_regs, rspll_offset + RSCTRL_RG,
  49                                  RSCTRL_KEY_MASK, RSCTRL_KEY);
  50}
  51
  52static int rsctrl_restart_handler(struct notifier_block *this,
  53                                  unsigned long mode, void *cmd)
  54{
  55        /* enable write access to RSTCTRL */
  56        rsctrl_enable_rspll_write();
  57
  58        /* reset the SOC */
  59        regmap_update_bits(pllctrl_regs, rspll_offset + RSCTRL_RG,
  60                           RSCTRL_RESET_MASK, 0);
  61
  62        return NOTIFY_DONE;
  63}
  64
  65static struct notifier_block rsctrl_restart_nb = {
  66        .notifier_call = rsctrl_restart_handler,
  67        .priority = 128,
  68};
  69
  70static const struct of_device_id rsctrl_of_match[] = {
  71        {.compatible = "ti,keystone-reset", },
  72        {},
  73};
  74
  75static int rsctrl_probe(struct platform_device *pdev)
  76{
  77        int i;
  78        int ret;
  79        u32 val;
  80        unsigned int rg;
  81        u32 rsmux_offset;
  82        struct regmap *devctrl_regs;
  83        struct device *dev = &pdev->dev;
  84        struct device_node *np = dev->of_node;
  85
  86        if (!np)
  87                return -ENODEV;
  88
  89        /* get regmaps */
  90        pllctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pll");
  91        if (IS_ERR(pllctrl_regs))
  92                return PTR_ERR(pllctrl_regs);
  93
  94        devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev");
  95        if (IS_ERR(devctrl_regs))
  96                return PTR_ERR(devctrl_regs);
  97
  98        ret = of_property_read_u32_index(np, "ti,syscon-pll", 1, &rspll_offset);
  99        if (ret) {
 100                dev_err(dev, "couldn't read the reset pll offset!\n");
 101                return -EINVAL;
 102        }
 103
 104        ret = of_property_read_u32_index(np, "ti,syscon-dev", 1, &rsmux_offset);
 105        if (ret) {
 106                dev_err(dev, "couldn't read the rsmux offset!\n");
 107                return -EINVAL;
 108        }
 109
 110        /* set soft/hard reset */
 111        val = of_property_read_bool(np, "ti,soft-reset");
 112        val = val ? RSCFG_RSTYPE_SOFT : RSCFG_RSTYPE_HARD;
 113
 114        ret = rsctrl_enable_rspll_write();
 115        if (ret)
 116                return ret;
 117
 118        ret = regmap_write(pllctrl_regs, rspll_offset + RSCFG_RG, val);
 119        if (ret)
 120                return ret;
 121
 122        /* disable a reset isolation for all module clocks */
 123        ret = regmap_write(pllctrl_regs, rspll_offset + RSISO_RG, 0);
 124        if (ret)
 125                return ret;
 126
 127        /* enable a reset for watchdogs from wdt-list */
 128        for (i = 0; i < WDT_MUX_NUMBER; i++) {
 129                ret = of_property_read_u32_index(np, "ti,wdt-list", i, &val);
 130                if (ret == -EOVERFLOW && !i) {
 131                        dev_err(dev, "ti,wdt-list property has to contain at"
 132                                "least one entry\n");
 133                        return -EINVAL;
 134                } else if (ret) {
 135                        break;
 136                }
 137
 138                if (val >= WDT_MUX_NUMBER) {
 139                        dev_err(dev, "ti,wdt-list property can contain "
 140                                "only numbers < 4\n");
 141                        return -EINVAL;
 142                }
 143
 144                rg = rsmux_offset + val * 4;
 145
 146                ret = regmap_update_bits(devctrl_regs, rg, RSMUX_OMODE_MASK,
 147                                         RSMUX_OMODE_RESET_ON |
 148                                         RSMUX_LOCK_SET);
 149                if (ret)
 150                        return ret;
 151        }
 152
 153        ret = register_restart_handler(&rsctrl_restart_nb);
 154        if (ret)
 155                dev_err(dev, "cannot register restart handler (err=%d)\n", ret);
 156
 157        return ret;
 158}
 159
 160static struct platform_driver rsctrl_driver = {
 161        .probe = rsctrl_probe,
 162        .driver = {
 163                .name = KBUILD_MODNAME,
 164                .of_match_table = rsctrl_of_match,
 165        },
 166};
 167module_platform_driver(rsctrl_driver);
 168
 169MODULE_AUTHOR("Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>");
 170MODULE_DESCRIPTION("Texas Instruments keystone reset driver");
 171MODULE_LICENSE("GPL v2");
 172MODULE_ALIAS("platform:" KBUILD_MODNAME);
 173