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20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/pci-aspm.h>
25#include <linux/kernel.h>
26#include <linux/slab.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/timer.h>
30#include <linux/init.h>
31#include <linux/spinlock.h>
32#include <linux/compat.h>
33#include <linux/blktrace_api.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/completion.h>
38#include <linux/moduleparam.h>
39#include <scsi/scsi.h>
40#include <scsi/scsi_cmnd.h>
41#include <scsi/scsi_device.h>
42#include <scsi/scsi_host.h>
43#include <scsi/scsi_tcq.h>
44#include <scsi/scsi_eh.h>
45#include <scsi/scsi_transport_sas.h>
46#include <scsi/scsi_dbg.h>
47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
50#include <linux/atomic.h>
51#include <linux/jiffies.h>
52#include <linux/percpu-defs.h>
53#include <linux/percpu.h>
54#include <asm/unaligned.h>
55#include <asm/div64.h>
56#include "hpsa_cmd.h"
57#include "hpsa.h"
58
59
60
61
62
63#define HPSA_DRIVER_VERSION "3.4.20-160"
64#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65#define HPSA "hpsa"
66
67
68#define CLEAR_EVENT_WAIT_INTERVAL 20
69#define MODE_CHANGE_WAIT_INTERVAL 10
70#define MAX_CLEAR_EVENT_WAIT 30000
71#define MAX_MODE_CHANGE_WAIT 2000
72#define MAX_IOCTL_CONFIG_WAIT 1000
73
74
75#define MAX_CMD_RETRIES 3
76
77
78MODULE_AUTHOR("Hewlett-Packard Company");
79MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82MODULE_VERSION(HPSA_DRIVER_VERSION);
83MODULE_LICENSE("GPL");
84MODULE_ALIAS("cciss");
85
86static int hpsa_simple_mode;
87module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88MODULE_PARM_DESC(hpsa_simple_mode,
89 "Use 'simple mode' rather than 'performant mode'");
90
91
92static const struct pci_device_id hpsa_pci_device_id[] = {
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150 {0,}
151};
152
153MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
154
155
156
157
158
159static struct board_type products[] = {
160 {0x40700E11, "Smart Array 5300", &SA5A_access},
161 {0x40800E11, "Smart Array 5i", &SA5B_access},
162 {0x40820E11, "Smart Array 532", &SA5B_access},
163 {0x40830E11, "Smart Array 5312", &SA5B_access},
164 {0x409A0E11, "Smart Array 641", &SA5A_access},
165 {0x409B0E11, "Smart Array 642", &SA5A_access},
166 {0x409C0E11, "Smart Array 6400", &SA5A_access},
167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168 {0x40910E11, "Smart Array 6i", &SA5A_access},
169 {0x3225103C, "Smart Array P600", &SA5A_access},
170 {0x3223103C, "Smart Array P800", &SA5A_access},
171 {0x3234103C, "Smart Array P400", &SA5A_access},
172 {0x3235103C, "Smart Array P400i", &SA5A_access},
173 {0x3211103C, "Smart Array E200i", &SA5A_access},
174 {0x3212103C, "Smart Array E200", &SA5A_access},
175 {0x3213103C, "Smart Array E200i", &SA5A_access},
176 {0x3214103C, "Smart Array E200i", &SA5A_access},
177 {0x3215103C, "Smart Array E200i", &SA5A_access},
178 {0x3237103C, "Smart Array E500", &SA5A_access},
179 {0x323D103C, "Smart Array P700m", &SA5A_access},
180 {0x3241103C, "Smart Array P212", &SA5_access},
181 {0x3243103C, "Smart Array P410", &SA5_access},
182 {0x3245103C, "Smart Array P410i", &SA5_access},
183 {0x3247103C, "Smart Array P411", &SA5_access},
184 {0x3249103C, "Smart Array P812", &SA5_access},
185 {0x324A103C, "Smart Array P712m", &SA5_access},
186 {0x324B103C, "Smart Array P711m", &SA5_access},
187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access},
188 {0x3350103C, "Smart Array P222", &SA5_access},
189 {0x3351103C, "Smart Array P420", &SA5_access},
190 {0x3352103C, "Smart Array P421", &SA5_access},
191 {0x3353103C, "Smart Array P822", &SA5_access},
192 {0x3354103C, "Smart Array P420i", &SA5_access},
193 {0x3355103C, "Smart Array P220i", &SA5_access},
194 {0x3356103C, "Smart Array P721m", &SA5_access},
195 {0x1920103C, "Smart Array P430i", &SA5_access},
196 {0x1921103C, "Smart Array P830i", &SA5_access},
197 {0x1922103C, "Smart Array P430", &SA5_access},
198 {0x1923103C, "Smart Array P431", &SA5_access},
199 {0x1924103C, "Smart Array P830", &SA5_access},
200 {0x1925103C, "Smart Array P831", &SA5_access},
201 {0x1926103C, "Smart Array P731m", &SA5_access},
202 {0x1928103C, "Smart Array P230i", &SA5_access},
203 {0x1929103C, "Smart Array P530", &SA5_access},
204 {0x21BD103C, "Smart Array P244br", &SA5_access},
205 {0x21BE103C, "Smart Array P741m", &SA5_access},
206 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207 {0x21C0103C, "Smart Array P440ar", &SA5_access},
208 {0x21C1103C, "Smart Array P840ar", &SA5_access},
209 {0x21C2103C, "Smart Array P440", &SA5_access},
210 {0x21C3103C, "Smart Array P441", &SA5_access},
211 {0x21C4103C, "Smart Array", &SA5_access},
212 {0x21C5103C, "Smart Array P841", &SA5_access},
213 {0x21C6103C, "Smart HBA H244br", &SA5_access},
214 {0x21C7103C, "Smart HBA H240", &SA5_access},
215 {0x21C8103C, "Smart HBA H241", &SA5_access},
216 {0x21C9103C, "Smart Array", &SA5_access},
217 {0x21CA103C, "Smart Array P246br", &SA5_access},
218 {0x21CB103C, "Smart Array P840", &SA5_access},
219 {0x21CC103C, "Smart Array", &SA5_access},
220 {0x21CD103C, "Smart Array", &SA5_access},
221 {0x21CE103C, "Smart HBA", &SA5_access},
222 {0x05809005, "SmartHBA-SA", &SA5_access},
223 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
234};
235
236static struct scsi_transport_template *hpsa_sas_transport_template;
237static int hpsa_add_sas_host(struct ctlr_info *h);
238static void hpsa_delete_sas_host(struct ctlr_info *h);
239static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240 struct hpsa_scsi_dev_t *device);
241static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242static struct hpsa_scsi_dev_t
243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244 struct sas_rphy *rphy);
245
246#define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247static const struct scsi_cmnd hpsa_cmd_busy;
248#define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249static const struct scsi_cmnd hpsa_cmd_idle;
250static int number_of_controllers;
251
252static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
255 void __user *arg);
256
257#ifdef CONFIG_COMPAT
258static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
259 void __user *arg);
260#endif
261
262static void cmd_free(struct ctlr_info *h, struct CommandList *c);
263static struct CommandList *cmd_alloc(struct ctlr_info *h);
264static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
265static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
266 struct scsi_cmnd *scmd);
267static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
268 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
269 int cmd_type);
270static void hpsa_free_cmd_pool(struct ctlr_info *h);
271#define VPD_PAGE (1 << 8)
272#define HPSA_SIMPLE_ERROR_BITS 0x03
273
274static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
275static void hpsa_scan_start(struct Scsi_Host *);
276static int hpsa_scan_finished(struct Scsi_Host *sh,
277 unsigned long elapsed_time);
278static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
279
280static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
281static int hpsa_slave_alloc(struct scsi_device *sdev);
282static int hpsa_slave_configure(struct scsi_device *sdev);
283static void hpsa_slave_destroy(struct scsi_device *sdev);
284
285static void hpsa_update_scsi_devices(struct ctlr_info *h);
286static int check_for_unit_attention(struct ctlr_info *h,
287 struct CommandList *c);
288static void check_ioctl_unit_attention(struct ctlr_info *h,
289 struct CommandList *c);
290
291static void calc_bucket_map(int *bucket, int num_buckets,
292 int nsgs, int min_blocks, u32 *bucket_map);
293static void hpsa_free_performant_mode(struct ctlr_info *h);
294static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
295static inline u32 next_command(struct ctlr_info *h, u8 q);
296static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
297 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
298 u64 *cfg_offset);
299static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
300 unsigned long *memory_bar);
301static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
302 bool *legacy_board);
303static int wait_for_device_to_become_ready(struct ctlr_info *h,
304 unsigned char lunaddr[],
305 int reply_queue);
306static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
307 int wait_for_ready);
308static inline void finish_cmd(struct CommandList *c);
309static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
310#define BOARD_NOT_READY 0
311#define BOARD_READY 1
312static void hpsa_drain_accel_commands(struct ctlr_info *h);
313static void hpsa_flush_cache(struct ctlr_info *h);
314static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
315 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
316 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
317static void hpsa_command_resubmit_worker(struct work_struct *work);
318static u32 lockup_detected(struct ctlr_info *h);
319static int detect_controller_lockup(struct ctlr_info *h);
320static void hpsa_disable_rld_caching(struct ctlr_info *h);
321static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
322 struct ReportExtendedLUNdata *buf, int bufsize);
323static bool hpsa_vpd_page_supported(struct ctlr_info *h,
324 unsigned char scsi3addr[], u8 page);
325static int hpsa_luns_changed(struct ctlr_info *h);
326static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
327 struct hpsa_scsi_dev_t *dev,
328 unsigned char *scsi3addr);
329
330static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
331{
332 unsigned long *priv = shost_priv(sdev->host);
333 return (struct ctlr_info *) *priv;
334}
335
336static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
337{
338 unsigned long *priv = shost_priv(sh);
339 return (struct ctlr_info *) *priv;
340}
341
342static inline bool hpsa_is_cmd_idle(struct CommandList *c)
343{
344 return c->scsi_cmd == SCSI_CMD_IDLE;
345}
346
347static inline bool hpsa_is_pending_event(struct CommandList *c)
348{
349 return c->reset_pending;
350}
351
352
353static void decode_sense_data(const u8 *sense_data, int sense_data_len,
354 u8 *sense_key, u8 *asc, u8 *ascq)
355{
356 struct scsi_sense_hdr sshdr;
357 bool rc;
358
359 *sense_key = -1;
360 *asc = -1;
361 *ascq = -1;
362
363 if (sense_data_len < 1)
364 return;
365
366 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
367 if (rc) {
368 *sense_key = sshdr.sense_key;
369 *asc = sshdr.asc;
370 *ascq = sshdr.ascq;
371 }
372}
373
374static int check_for_unit_attention(struct ctlr_info *h,
375 struct CommandList *c)
376{
377 u8 sense_key, asc, ascq;
378 int sense_len;
379
380 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
381 sense_len = sizeof(c->err_info->SenseInfo);
382 else
383 sense_len = c->err_info->SenseLen;
384
385 decode_sense_data(c->err_info->SenseInfo, sense_len,
386 &sense_key, &asc, &ascq);
387 if (sense_key != UNIT_ATTENTION || asc == 0xff)
388 return 0;
389
390 switch (asc) {
391 case STATE_CHANGED:
392 dev_warn(&h->pdev->dev,
393 "%s: a state change detected, command retried\n",
394 h->devname);
395 break;
396 case LUN_FAILED:
397 dev_warn(&h->pdev->dev,
398 "%s: LUN failure detected\n", h->devname);
399 break;
400 case REPORT_LUNS_CHANGED:
401 dev_warn(&h->pdev->dev,
402 "%s: report LUN data changed\n", h->devname);
403
404
405
406
407 break;
408 case POWER_OR_RESET:
409 dev_warn(&h->pdev->dev,
410 "%s: a power on or device reset detected\n",
411 h->devname);
412 break;
413 case UNIT_ATTENTION_CLEARED:
414 dev_warn(&h->pdev->dev,
415 "%s: unit attention cleared by another initiator\n",
416 h->devname);
417 break;
418 default:
419 dev_warn(&h->pdev->dev,
420 "%s: unknown unit attention detected\n",
421 h->devname);
422 break;
423 }
424 return 1;
425}
426
427static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428{
429 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
430 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
431 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432 return 0;
433 dev_warn(&h->pdev->dev, HPSA "device busy");
434 return 1;
435}
436
437static u32 lockup_detected(struct ctlr_info *h);
438static ssize_t host_show_lockup_detected(struct device *dev,
439 struct device_attribute *attr, char *buf)
440{
441 int ld;
442 struct ctlr_info *h;
443 struct Scsi_Host *shost = class_to_shost(dev);
444
445 h = shost_to_hba(shost);
446 ld = lockup_detected(h);
447
448 return sprintf(buf, "ld=%d\n", ld);
449}
450
451static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count)
454{
455 int status, len;
456 struct ctlr_info *h;
457 struct Scsi_Host *shost = class_to_shost(dev);
458 char tmpbuf[10];
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463 strncpy(tmpbuf, buf, len);
464 tmpbuf[len] = '\0';
465 if (sscanf(tmpbuf, "%d", &status) != 1)
466 return -EINVAL;
467 h = shost_to_hba(shost);
468 h->acciopath_status = !!status;
469 dev_warn(&h->pdev->dev,
470 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
471 h->acciopath_status ? "enabled" : "disabled");
472 return count;
473}
474
475static ssize_t host_store_raid_offload_debug(struct device *dev,
476 struct device_attribute *attr,
477 const char *buf, size_t count)
478{
479 int debug_level, len;
480 struct ctlr_info *h;
481 struct Scsi_Host *shost = class_to_shost(dev);
482 char tmpbuf[10];
483
484 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
485 return -EACCES;
486 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
487 strncpy(tmpbuf, buf, len);
488 tmpbuf[len] = '\0';
489 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
490 return -EINVAL;
491 if (debug_level < 0)
492 debug_level = 0;
493 h = shost_to_hba(shost);
494 h->raid_offload_debug = debug_level;
495 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
496 h->raid_offload_debug);
497 return count;
498}
499
500static ssize_t host_store_rescan(struct device *dev,
501 struct device_attribute *attr,
502 const char *buf, size_t count)
503{
504 struct ctlr_info *h;
505 struct Scsi_Host *shost = class_to_shost(dev);
506 h = shost_to_hba(shost);
507 hpsa_scan_start(h->scsi_host);
508 return count;
509}
510
511static ssize_t host_show_firmware_revision(struct device *dev,
512 struct device_attribute *attr, char *buf)
513{
514 struct ctlr_info *h;
515 struct Scsi_Host *shost = class_to_shost(dev);
516 unsigned char *fwrev;
517
518 h = shost_to_hba(shost);
519 if (!h->hba_inquiry_data)
520 return 0;
521 fwrev = &h->hba_inquiry_data[32];
522 return snprintf(buf, 20, "%c%c%c%c\n",
523 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
524}
525
526static ssize_t host_show_commands_outstanding(struct device *dev,
527 struct device_attribute *attr, char *buf)
528{
529 struct Scsi_Host *shost = class_to_shost(dev);
530 struct ctlr_info *h = shost_to_hba(shost);
531
532 return snprintf(buf, 20, "%d\n",
533 atomic_read(&h->commands_outstanding));
534}
535
536static ssize_t host_show_transport_mode(struct device *dev,
537 struct device_attribute *attr, char *buf)
538{
539 struct ctlr_info *h;
540 struct Scsi_Host *shost = class_to_shost(dev);
541
542 h = shost_to_hba(shost);
543 return snprintf(buf, 20, "%s\n",
544 h->transMethod & CFGTBL_Trans_Performant ?
545 "performant" : "simple");
546}
547
548static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
549 struct device_attribute *attr, char *buf)
550{
551 struct ctlr_info *h;
552 struct Scsi_Host *shost = class_to_shost(dev);
553
554 h = shost_to_hba(shost);
555 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
556 (h->acciopath_status == 1) ? "enabled" : "disabled");
557}
558
559
560static u32 unresettable_controller[] = {
561 0x324a103C,
562 0x324b103C,
563 0x3223103C,
564 0x3234103C,
565 0x3235103C,
566 0x3211103C,
567 0x3212103C,
568 0x3213103C,
569 0x3214103C,
570 0x3215103C,
571 0x3237103C,
572 0x323D103C,
573 0x40800E11,
574 0x409C0E11,
575 0x409D0E11,
576 0x40700E11,
577 0x40820E11,
578 0x40830E11,
579 0x409A0E11,
580 0x409B0E11,
581 0x40910E11,
582};
583
584
585static u32 soft_unresettable_controller[] = {
586 0x40800E11,
587 0x40700E11,
588 0x40820E11,
589 0x40830E11,
590 0x409A0E11,
591 0x409B0E11,
592 0x40910E11,
593
594
595
596
597
598
599
600 0x409C0E11,
601 0x409D0E11,
602};
603
604static int board_id_in_array(u32 a[], int nelems, u32 board_id)
605{
606 int i;
607
608 for (i = 0; i < nelems; i++)
609 if (a[i] == board_id)
610 return 1;
611 return 0;
612}
613
614static int ctlr_is_hard_resettable(u32 board_id)
615{
616 return !board_id_in_array(unresettable_controller,
617 ARRAY_SIZE(unresettable_controller), board_id);
618}
619
620static int ctlr_is_soft_resettable(u32 board_id)
621{
622 return !board_id_in_array(soft_unresettable_controller,
623 ARRAY_SIZE(soft_unresettable_controller), board_id);
624}
625
626static int ctlr_is_resettable(u32 board_id)
627{
628 return ctlr_is_hard_resettable(board_id) ||
629 ctlr_is_soft_resettable(board_id);
630}
631
632static ssize_t host_show_resettable(struct device *dev,
633 struct device_attribute *attr, char *buf)
634{
635 struct ctlr_info *h;
636 struct Scsi_Host *shost = class_to_shost(dev);
637
638 h = shost_to_hba(shost);
639 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
640}
641
642static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
643{
644 return (scsi3addr[3] & 0xC0) == 0x40;
645}
646
647static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
648 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
649};
650#define HPSA_RAID_0 0
651#define HPSA_RAID_4 1
652#define HPSA_RAID_1 2
653#define HPSA_RAID_5 3
654#define HPSA_RAID_51 4
655#define HPSA_RAID_6 5
656#define HPSA_RAID_ADM 6
657#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
658#define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
659
660static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
661{
662 return !device->physical_device;
663}
664
665static ssize_t raid_level_show(struct device *dev,
666 struct device_attribute *attr, char *buf)
667{
668 ssize_t l = 0;
669 unsigned char rlevel;
670 struct ctlr_info *h;
671 struct scsi_device *sdev;
672 struct hpsa_scsi_dev_t *hdev;
673 unsigned long flags;
674
675 sdev = to_scsi_device(dev);
676 h = sdev_to_hba(sdev);
677 spin_lock_irqsave(&h->lock, flags);
678 hdev = sdev->hostdata;
679 if (!hdev) {
680 spin_unlock_irqrestore(&h->lock, flags);
681 return -ENODEV;
682 }
683
684
685 if (!is_logical_device(hdev)) {
686 spin_unlock_irqrestore(&h->lock, flags);
687 l = snprintf(buf, PAGE_SIZE, "N/A\n");
688 return l;
689 }
690
691 rlevel = hdev->raid_level;
692 spin_unlock_irqrestore(&h->lock, flags);
693 if (rlevel > RAID_UNKNOWN)
694 rlevel = RAID_UNKNOWN;
695 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
696 return l;
697}
698
699static ssize_t lunid_show(struct device *dev,
700 struct device_attribute *attr, char *buf)
701{
702 struct ctlr_info *h;
703 struct scsi_device *sdev;
704 struct hpsa_scsi_dev_t *hdev;
705 unsigned long flags;
706 unsigned char lunid[8];
707
708 sdev = to_scsi_device(dev);
709 h = sdev_to_hba(sdev);
710 spin_lock_irqsave(&h->lock, flags);
711 hdev = sdev->hostdata;
712 if (!hdev) {
713 spin_unlock_irqrestore(&h->lock, flags);
714 return -ENODEV;
715 }
716 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
717 spin_unlock_irqrestore(&h->lock, flags);
718 return snprintf(buf, 20, "0x%8phN\n", lunid);
719}
720
721static ssize_t unique_id_show(struct device *dev,
722 struct device_attribute *attr, char *buf)
723{
724 struct ctlr_info *h;
725 struct scsi_device *sdev;
726 struct hpsa_scsi_dev_t *hdev;
727 unsigned long flags;
728 unsigned char sn[16];
729
730 sdev = to_scsi_device(dev);
731 h = sdev_to_hba(sdev);
732 spin_lock_irqsave(&h->lock, flags);
733 hdev = sdev->hostdata;
734 if (!hdev) {
735 spin_unlock_irqrestore(&h->lock, flags);
736 return -ENODEV;
737 }
738 memcpy(sn, hdev->device_id, sizeof(sn));
739 spin_unlock_irqrestore(&h->lock, flags);
740 return snprintf(buf, 16 * 2 + 2,
741 "%02X%02X%02X%02X%02X%02X%02X%02X"
742 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
743 sn[0], sn[1], sn[2], sn[3],
744 sn[4], sn[5], sn[6], sn[7],
745 sn[8], sn[9], sn[10], sn[11],
746 sn[12], sn[13], sn[14], sn[15]);
747}
748
749static ssize_t sas_address_show(struct device *dev,
750 struct device_attribute *attr, char *buf)
751{
752 struct ctlr_info *h;
753 struct scsi_device *sdev;
754 struct hpsa_scsi_dev_t *hdev;
755 unsigned long flags;
756 u64 sas_address;
757
758 sdev = to_scsi_device(dev);
759 h = sdev_to_hba(sdev);
760 spin_lock_irqsave(&h->lock, flags);
761 hdev = sdev->hostdata;
762 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
763 spin_unlock_irqrestore(&h->lock, flags);
764 return -ENODEV;
765 }
766 sas_address = hdev->sas_address;
767 spin_unlock_irqrestore(&h->lock, flags);
768
769 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
770}
771
772static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
773 struct device_attribute *attr, char *buf)
774{
775 struct ctlr_info *h;
776 struct scsi_device *sdev;
777 struct hpsa_scsi_dev_t *hdev;
778 unsigned long flags;
779 int offload_enabled;
780
781 sdev = to_scsi_device(dev);
782 h = sdev_to_hba(sdev);
783 spin_lock_irqsave(&h->lock, flags);
784 hdev = sdev->hostdata;
785 if (!hdev) {
786 spin_unlock_irqrestore(&h->lock, flags);
787 return -ENODEV;
788 }
789 offload_enabled = hdev->offload_enabled;
790 spin_unlock_irqrestore(&h->lock, flags);
791
792 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
793 return snprintf(buf, 20, "%d\n", offload_enabled);
794 else
795 return snprintf(buf, 40, "%s\n",
796 "Not applicable for a controller");
797}
798
799#define MAX_PATHS 8
800static ssize_t path_info_show(struct device *dev,
801 struct device_attribute *attr, char *buf)
802{
803 struct ctlr_info *h;
804 struct scsi_device *sdev;
805 struct hpsa_scsi_dev_t *hdev;
806 unsigned long flags;
807 int i;
808 int output_len = 0;
809 u8 box;
810 u8 bay;
811 u8 path_map_index = 0;
812 char *active;
813 unsigned char phys_connector[2];
814
815 sdev = to_scsi_device(dev);
816 h = sdev_to_hba(sdev);
817 spin_lock_irqsave(&h->devlock, flags);
818 hdev = sdev->hostdata;
819 if (!hdev) {
820 spin_unlock_irqrestore(&h->devlock, flags);
821 return -ENODEV;
822 }
823
824 bay = hdev->bay;
825 for (i = 0; i < MAX_PATHS; i++) {
826 path_map_index = 1<<i;
827 if (i == hdev->active_path_index)
828 active = "Active";
829 else if (hdev->path_map & path_map_index)
830 active = "Inactive";
831 else
832 continue;
833
834 output_len += scnprintf(buf + output_len,
835 PAGE_SIZE - output_len,
836 "[%d:%d:%d:%d] %20.20s ",
837 h->scsi_host->host_no,
838 hdev->bus, hdev->target, hdev->lun,
839 scsi_device_type(hdev->devtype));
840
841 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
842 output_len += scnprintf(buf + output_len,
843 PAGE_SIZE - output_len,
844 "%s\n", active);
845 continue;
846 }
847
848 box = hdev->box[i];
849 memcpy(&phys_connector, &hdev->phys_connector[i],
850 sizeof(phys_connector));
851 if (phys_connector[0] < '0')
852 phys_connector[0] = '0';
853 if (phys_connector[1] < '0')
854 phys_connector[1] = '0';
855 output_len += scnprintf(buf + output_len,
856 PAGE_SIZE - output_len,
857 "PORT: %.2s ",
858 phys_connector);
859 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
860 hdev->expose_device) {
861 if (box == 0 || box == 0xFF) {
862 output_len += scnprintf(buf + output_len,
863 PAGE_SIZE - output_len,
864 "BAY: %hhu %s\n",
865 bay, active);
866 } else {
867 output_len += scnprintf(buf + output_len,
868 PAGE_SIZE - output_len,
869 "BOX: %hhu BAY: %hhu %s\n",
870 box, bay, active);
871 }
872 } else if (box != 0 && box != 0xFF) {
873 output_len += scnprintf(buf + output_len,
874 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
875 box, active);
876 } else
877 output_len += scnprintf(buf + output_len,
878 PAGE_SIZE - output_len, "%s\n", active);
879 }
880
881 spin_unlock_irqrestore(&h->devlock, flags);
882 return output_len;
883}
884
885static ssize_t host_show_ctlr_num(struct device *dev,
886 struct device_attribute *attr, char *buf)
887{
888 struct ctlr_info *h;
889 struct Scsi_Host *shost = class_to_shost(dev);
890
891 h = shost_to_hba(shost);
892 return snprintf(buf, 20, "%d\n", h->ctlr);
893}
894
895static ssize_t host_show_legacy_board(struct device *dev,
896 struct device_attribute *attr, char *buf)
897{
898 struct ctlr_info *h;
899 struct Scsi_Host *shost = class_to_shost(dev);
900
901 h = shost_to_hba(shost);
902 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
903}
904
905static DEVICE_ATTR_RO(raid_level);
906static DEVICE_ATTR_RO(lunid);
907static DEVICE_ATTR_RO(unique_id);
908static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
909static DEVICE_ATTR_RO(sas_address);
910static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
911 host_show_hp_ssd_smart_path_enabled, NULL);
912static DEVICE_ATTR_RO(path_info);
913static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
914 host_show_hp_ssd_smart_path_status,
915 host_store_hp_ssd_smart_path_status);
916static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
917 host_store_raid_offload_debug);
918static DEVICE_ATTR(firmware_revision, S_IRUGO,
919 host_show_firmware_revision, NULL);
920static DEVICE_ATTR(commands_outstanding, S_IRUGO,
921 host_show_commands_outstanding, NULL);
922static DEVICE_ATTR(transport_mode, S_IRUGO,
923 host_show_transport_mode, NULL);
924static DEVICE_ATTR(resettable, S_IRUGO,
925 host_show_resettable, NULL);
926static DEVICE_ATTR(lockup_detected, S_IRUGO,
927 host_show_lockup_detected, NULL);
928static DEVICE_ATTR(ctlr_num, S_IRUGO,
929 host_show_ctlr_num, NULL);
930static DEVICE_ATTR(legacy_board, S_IRUGO,
931 host_show_legacy_board, NULL);
932
933static struct device_attribute *hpsa_sdev_attrs[] = {
934 &dev_attr_raid_level,
935 &dev_attr_lunid,
936 &dev_attr_unique_id,
937 &dev_attr_hp_ssd_smart_path_enabled,
938 &dev_attr_path_info,
939 &dev_attr_sas_address,
940 NULL,
941};
942
943static struct device_attribute *hpsa_shost_attrs[] = {
944 &dev_attr_rescan,
945 &dev_attr_firmware_revision,
946 &dev_attr_commands_outstanding,
947 &dev_attr_transport_mode,
948 &dev_attr_resettable,
949 &dev_attr_hp_ssd_smart_path_status,
950 &dev_attr_raid_offload_debug,
951 &dev_attr_lockup_detected,
952 &dev_attr_ctlr_num,
953 &dev_attr_legacy_board,
954 NULL,
955};
956
957#define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
958 HPSA_MAX_CONCURRENT_PASSTHRUS)
959
960static struct scsi_host_template hpsa_driver_template = {
961 .module = THIS_MODULE,
962 .name = HPSA,
963 .proc_name = HPSA,
964 .queuecommand = hpsa_scsi_queue_command,
965 .scan_start = hpsa_scan_start,
966 .scan_finished = hpsa_scan_finished,
967 .change_queue_depth = hpsa_change_queue_depth,
968 .this_id = -1,
969 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
970 .ioctl = hpsa_ioctl,
971 .slave_alloc = hpsa_slave_alloc,
972 .slave_configure = hpsa_slave_configure,
973 .slave_destroy = hpsa_slave_destroy,
974#ifdef CONFIG_COMPAT
975 .compat_ioctl = hpsa_compat_ioctl,
976#endif
977 .sdev_attrs = hpsa_sdev_attrs,
978 .shost_attrs = hpsa_shost_attrs,
979 .max_sectors = 2048,
980 .no_write_same = 1,
981};
982
983static inline u32 next_command(struct ctlr_info *h, u8 q)
984{
985 u32 a;
986 struct reply_queue_buffer *rq = &h->reply_queue[q];
987
988 if (h->transMethod & CFGTBL_Trans_io_accel1)
989 return h->access.command_completed(h, q);
990
991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
992 return h->access.command_completed(h, q);
993
994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
995 a = rq->head[rq->current_entry];
996 rq->current_entry++;
997 atomic_dec(&h->commands_outstanding);
998 } else {
999 a = FIFO_EMPTY;
1000 }
1001
1002 if (rq->current_entry == h->max_commands) {
1003 rq->current_entry = 0;
1004 rq->wraparound ^= 1;
1005 }
1006 return a;
1007}
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040#define DEFAULT_REPLY_QUEUE (-1)
1041static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1042 int reply_queue)
1043{
1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1046 if (unlikely(!h->msix_vectors))
1047 return;
1048 c->Header.ReplyQueue = reply_queue;
1049 }
1050}
1051
1052static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1053 struct CommandList *c,
1054 int reply_queue)
1055{
1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1057
1058
1059
1060
1061
1062 cp->ReplyQueue = reply_queue;
1063
1064
1065
1066
1067
1068
1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1070 IOACCEL1_BUSADDR_CMDTYPE;
1071}
1072
1073static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1074 struct CommandList *c,
1075 int reply_queue)
1076{
1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1078 &h->ioaccel2_cmd_pool[c->cmdindex];
1079
1080
1081
1082
1083 cp->reply_queue = reply_queue;
1084
1085
1086
1087
1088
1089 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1090}
1091
1092static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1093 struct CommandList *c,
1094 int reply_queue)
1095{
1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1097
1098
1099
1100
1101
1102 cp->reply_queue = reply_queue;
1103
1104
1105
1106
1107
1108
1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1110}
1111
1112static int is_firmware_flash_cmd(u8 *cdb)
1113{
1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1115}
1116
1117
1118
1119
1120
1121
1122#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1123#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1124#define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1125static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1126 struct CommandList *c)
1127{
1128 if (!is_firmware_flash_cmd(c->Request.CDB))
1129 return;
1130 atomic_inc(&h->firmware_flash_in_progress);
1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1132}
1133
1134static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1135 struct CommandList *c)
1136{
1137 if (is_firmware_flash_cmd(c->Request.CDB) &&
1138 atomic_dec_and_test(&h->firmware_flash_in_progress))
1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1140}
1141
1142static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1143 struct CommandList *c, int reply_queue)
1144{
1145 dial_down_lockup_detection_during_fw_flash(h, c);
1146 atomic_inc(&h->commands_outstanding);
1147
1148 reply_queue = h->reply_map[raw_smp_processor_id()];
1149 switch (c->cmd_type) {
1150 case CMD_IOACCEL1:
1151 set_ioaccel1_performant_mode(h, c, reply_queue);
1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1153 break;
1154 case CMD_IOACCEL2:
1155 set_ioaccel2_performant_mode(h, c, reply_queue);
1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1157 break;
1158 case IOACCEL2_TMF:
1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1161 break;
1162 default:
1163 set_performant_mode(h, c, reply_queue);
1164 h->access.submit_command(h, c);
1165 }
1166}
1167
1168static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1169{
1170 if (unlikely(hpsa_is_pending_event(c)))
1171 return finish_cmd(c);
1172
1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1174}
1175
1176static inline int is_hba_lunid(unsigned char scsi3addr[])
1177{
1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1179}
1180
1181static inline int is_scsi_rev_5(struct ctlr_info *h)
1182{
1183 if (!h->hba_inquiry_data)
1184 return 0;
1185 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1186 return 1;
1187 return 0;
1188}
1189
1190static int hpsa_find_target_lun(struct ctlr_info *h,
1191 unsigned char scsi3addr[], int bus, int *target, int *lun)
1192{
1193
1194
1195
1196 int i, found = 0;
1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1198
1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1200
1201 for (i = 0; i < h->ndevices; i++) {
1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1203 __set_bit(h->dev[i]->target, lun_taken);
1204 }
1205
1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1207 if (i < HPSA_MAX_DEVICES) {
1208
1209 *target = i;
1210 *lun = 0;
1211 found = 1;
1212 }
1213 return !found;
1214}
1215
1216static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1217 struct hpsa_scsi_dev_t *dev, char *description)
1218{
1219#define LABEL_SIZE 25
1220 char label[LABEL_SIZE];
1221
1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1223 return;
1224
1225 switch (dev->devtype) {
1226 case TYPE_RAID:
1227 snprintf(label, LABEL_SIZE, "controller");
1228 break;
1229 case TYPE_ENCLOSURE:
1230 snprintf(label, LABEL_SIZE, "enclosure");
1231 break;
1232 case TYPE_DISK:
1233 case TYPE_ZBC:
1234 if (dev->external)
1235 snprintf(label, LABEL_SIZE, "external");
1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1237 snprintf(label, LABEL_SIZE, "%s",
1238 raid_label[PHYSICAL_DRIVE]);
1239 else
1240 snprintf(label, LABEL_SIZE, "RAID-%s",
1241 dev->raid_level > RAID_UNKNOWN ? "?" :
1242 raid_label[dev->raid_level]);
1243 break;
1244 case TYPE_ROM:
1245 snprintf(label, LABEL_SIZE, "rom");
1246 break;
1247 case TYPE_TAPE:
1248 snprintf(label, LABEL_SIZE, "tape");
1249 break;
1250 case TYPE_MEDIUM_CHANGER:
1251 snprintf(label, LABEL_SIZE, "changer");
1252 break;
1253 default:
1254 snprintf(label, LABEL_SIZE, "UNKNOWN");
1255 break;
1256 }
1257
1258 dev_printk(level, &h->pdev->dev,
1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1261 description,
1262 scsi_device_type(dev->devtype),
1263 dev->vendor,
1264 dev->model,
1265 label,
1266 dev->offload_config ? '+' : '-',
1267 dev->offload_to_be_enabled ? '+' : '-',
1268 dev->expose_device);
1269}
1270
1271
1272static int hpsa_scsi_add_entry(struct ctlr_info *h,
1273 struct hpsa_scsi_dev_t *device,
1274 struct hpsa_scsi_dev_t *added[], int *nadded)
1275{
1276
1277 int n = h->ndevices;
1278 int i;
1279 unsigned char addr1[8], addr2[8];
1280 struct hpsa_scsi_dev_t *sd;
1281
1282 if (n >= HPSA_MAX_DEVICES) {
1283 dev_err(&h->pdev->dev, "too many devices, some will be "
1284 "inaccessible.\n");
1285 return -1;
1286 }
1287
1288
1289 if (device->lun != -1)
1290
1291 goto lun_assigned;
1292
1293
1294
1295
1296
1297 if (device->scsi3addr[4] == 0) {
1298
1299 if (hpsa_find_target_lun(h, device->scsi3addr,
1300 device->bus, &device->target, &device->lun) != 0)
1301 return -1;
1302 goto lun_assigned;
1303 }
1304
1305
1306
1307
1308
1309
1310
1311 memcpy(addr1, device->scsi3addr, 8);
1312 addr1[4] = 0;
1313 addr1[5] = 0;
1314 for (i = 0; i < n; i++) {
1315 sd = h->dev[i];
1316 memcpy(addr2, sd->scsi3addr, 8);
1317 addr2[4] = 0;
1318 addr2[5] = 0;
1319
1320 if (memcmp(addr1, addr2, 8) == 0) {
1321 device->bus = sd->bus;
1322 device->target = sd->target;
1323 device->lun = device->scsi3addr[4];
1324 break;
1325 }
1326 }
1327 if (device->lun == -1) {
1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1329 " suspect firmware bug or unsupported hardware "
1330 "configuration.\n");
1331 return -1;
1332 }
1333
1334lun_assigned:
1335
1336 h->dev[n] = device;
1337 h->ndevices++;
1338 added[*nadded] = device;
1339 (*nadded)++;
1340 hpsa_show_dev_msg(KERN_INFO, h, device,
1341 device->expose_device ? "added" : "masked");
1342 return 0;
1343}
1344
1345
1346
1347
1348
1349
1350static void hpsa_scsi_update_entry(struct ctlr_info *h,
1351 int entry, struct hpsa_scsi_dev_t *new_entry)
1352{
1353
1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1355
1356
1357 h->dev[entry]->raid_level = new_entry->raid_level;
1358
1359
1360
1361
1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1363
1364
1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1366
1367
1368
1369
1370
1371
1372
1373
1374 h->dev[entry]->raid_map = new_entry->raid_map;
1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1376 }
1377 if (new_entry->offload_to_be_enabled) {
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1379 wmb();
1380 }
1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1382 h->dev[entry]->offload_config = new_entry->offload_config;
1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1384 h->dev[entry]->queue_depth = new_entry->queue_depth;
1385
1386
1387
1388
1389
1390
1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1392
1393
1394
1395
1396 if (!new_entry->offload_to_be_enabled)
1397 h->dev[entry]->offload_enabled = 0;
1398
1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1400}
1401
1402
1403static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1404 int entry, struct hpsa_scsi_dev_t *new_entry,
1405 struct hpsa_scsi_dev_t *added[], int *nadded,
1406 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1407{
1408
1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1410 removed[*nremoved] = h->dev[entry];
1411 (*nremoved)++;
1412
1413
1414
1415
1416
1417 if (new_entry->target == -1) {
1418 new_entry->target = h->dev[entry]->target;
1419 new_entry->lun = h->dev[entry]->lun;
1420 }
1421
1422 h->dev[entry] = new_entry;
1423 added[*nadded] = new_entry;
1424 (*nadded)++;
1425
1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1427}
1428
1429
1430static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1431 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1432{
1433
1434 int i;
1435 struct hpsa_scsi_dev_t *sd;
1436
1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1438
1439 sd = h->dev[entry];
1440 removed[*nremoved] = h->dev[entry];
1441 (*nremoved)++;
1442
1443 for (i = entry; i < h->ndevices-1; i++)
1444 h->dev[i] = h->dev[i+1];
1445 h->ndevices--;
1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1447}
1448
1449#define SCSI3ADDR_EQ(a, b) ( \
1450 (a)[7] == (b)[7] && \
1451 (a)[6] == (b)[6] && \
1452 (a)[5] == (b)[5] && \
1453 (a)[4] == (b)[4] && \
1454 (a)[3] == (b)[3] && \
1455 (a)[2] == (b)[2] && \
1456 (a)[1] == (b)[1] && \
1457 (a)[0] == (b)[0])
1458
1459static void fixup_botched_add(struct ctlr_info *h,
1460 struct hpsa_scsi_dev_t *added)
1461{
1462
1463
1464
1465 unsigned long flags;
1466 int i, j;
1467
1468 spin_lock_irqsave(&h->lock, flags);
1469 for (i = 0; i < h->ndevices; i++) {
1470 if (h->dev[i] == added) {
1471 for (j = i; j < h->ndevices-1; j++)
1472 h->dev[j] = h->dev[j+1];
1473 h->ndevices--;
1474 break;
1475 }
1476 }
1477 spin_unlock_irqrestore(&h->lock, flags);
1478 kfree(added);
1479}
1480
1481static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1482 struct hpsa_scsi_dev_t *dev2)
1483{
1484
1485
1486
1487
1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1489 sizeof(dev1->scsi3addr)) != 0)
1490 return 0;
1491 if (memcmp(dev1->device_id, dev2->device_id,
1492 sizeof(dev1->device_id)) != 0)
1493 return 0;
1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1495 return 0;
1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1497 return 0;
1498 if (dev1->devtype != dev2->devtype)
1499 return 0;
1500 if (dev1->bus != dev2->bus)
1501 return 0;
1502 return 1;
1503}
1504
1505static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1506 struct hpsa_scsi_dev_t *dev2)
1507{
1508
1509
1510
1511
1512 if (dev1->raid_level != dev2->raid_level)
1513 return 1;
1514 if (dev1->offload_config != dev2->offload_config)
1515 return 1;
1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1517 return 1;
1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1519 if (dev1->queue_depth != dev2->queue_depth)
1520 return 1;
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1531 return 1;
1532 return 0;
1533}
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1545 int *index)
1546{
1547 int i;
1548#define DEVICE_NOT_FOUND 0
1549#define DEVICE_CHANGED 1
1550#define DEVICE_SAME 2
1551#define DEVICE_UPDATED 3
1552 if (needle == NULL)
1553 return DEVICE_NOT_FOUND;
1554
1555 for (i = 0; i < haystack_size; i++) {
1556 if (haystack[i] == NULL)
1557 continue;
1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1559 *index = i;
1560 if (device_is_the_same(needle, haystack[i])) {
1561 if (device_updated(needle, haystack[i]))
1562 return DEVICE_UPDATED;
1563 return DEVICE_SAME;
1564 } else {
1565
1566 if (needle->volume_offline)
1567 return DEVICE_NOT_FOUND;
1568 return DEVICE_CHANGED;
1569 }
1570 }
1571 }
1572 *index = -1;
1573 return DEVICE_NOT_FOUND;
1574}
1575
1576static void hpsa_monitor_offline_device(struct ctlr_info *h,
1577 unsigned char scsi3addr[])
1578{
1579 struct offline_device_entry *device;
1580 unsigned long flags;
1581
1582
1583 spin_lock_irqsave(&h->offline_device_lock, flags);
1584 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1585 if (memcmp(device->scsi3addr, scsi3addr,
1586 sizeof(device->scsi3addr)) == 0) {
1587 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1588 return;
1589 }
1590 }
1591 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1592
1593
1594 device = kmalloc(sizeof(*device), GFP_KERNEL);
1595 if (!device)
1596 return;
1597
1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1599 spin_lock_irqsave(&h->offline_device_lock, flags);
1600 list_add_tail(&device->offline_list, &h->offline_device_list);
1601 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1602}
1603
1604
1605static void hpsa_show_volume_status(struct ctlr_info *h,
1606 struct hpsa_scsi_dev_t *sd)
1607{
1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1613 switch (sd->volume_offline) {
1614 case HPSA_LV_OK:
1615 break;
1616 case HPSA_LV_UNDERGOING_ERASE:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_NOT_AVAILABLE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_UNDERGOING_RPI:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_PENDING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_ENCRYPTED_NO_KEY:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_UNDERGOING_ENCRYPTION:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_PENDING_ENCRYPTION:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 }
1683}
1684
1685
1686
1687
1688
1689static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1690 struct hpsa_scsi_dev_t *dev[], int ndevices,
1691 struct hpsa_scsi_dev_t *logical_drive)
1692{
1693 struct raid_map_data *map = &logical_drive->raid_map;
1694 struct raid_map_disk_data *dd = &map->data[0];
1695 int i, j;
1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1697 le16_to_cpu(map->metadata_disks_per_row);
1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1699 le16_to_cpu(map->layout_map_count) *
1700 total_disks_per_row;
1701 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1702 total_disks_per_row;
1703 int qdepth;
1704
1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1707
1708 logical_drive->nphysical_disks = nraid_map_entries;
1709
1710 qdepth = 0;
1711 for (i = 0; i < nraid_map_entries; i++) {
1712 logical_drive->phys_disk[i] = NULL;
1713 if (!logical_drive->offload_config)
1714 continue;
1715 for (j = 0; j < ndevices; j++) {
1716 if (dev[j] == NULL)
1717 continue;
1718 if (dev[j]->devtype != TYPE_DISK &&
1719 dev[j]->devtype != TYPE_ZBC)
1720 continue;
1721 if (is_logical_device(dev[j]))
1722 continue;
1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1724 continue;
1725
1726 logical_drive->phys_disk[i] = dev[j];
1727 if (i < nphys_disk)
1728 qdepth = min(h->nr_cmds, qdepth +
1729 logical_drive->phys_disk[i]->queue_depth);
1730 break;
1731 }
1732
1733
1734
1735
1736
1737
1738
1739
1740 if (!logical_drive->phys_disk[i]) {
1741 dev_warn(&h->pdev->dev,
1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1743 __func__,
1744 h->scsi_host->host_no, logical_drive->bus,
1745 logical_drive->target, logical_drive->lun);
1746 logical_drive->offload_enabled = 0;
1747 logical_drive->offload_to_be_enabled = 0;
1748 logical_drive->queue_depth = 8;
1749 }
1750 }
1751 if (nraid_map_entries)
1752
1753
1754
1755
1756 logical_drive->queue_depth = qdepth;
1757 else {
1758 if (logical_drive->external)
1759 logical_drive->queue_depth = EXTERNAL_QD;
1760 else
1761 logical_drive->queue_depth = h->nr_cmds;
1762 }
1763}
1764
1765static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1766 struct hpsa_scsi_dev_t *dev[], int ndevices)
1767{
1768 int i;
1769
1770 for (i = 0; i < ndevices; i++) {
1771 if (dev[i] == NULL)
1772 continue;
1773 if (dev[i]->devtype != TYPE_DISK &&
1774 dev[i]->devtype != TYPE_ZBC)
1775 continue;
1776 if (!is_logical_device(dev[i]))
1777 continue;
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1800 }
1801}
1802
1803static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1804{
1805 int rc = 0;
1806
1807 if (!h->scsi_host)
1808 return 1;
1809
1810 if (is_logical_device(device))
1811 rc = scsi_add_device(h->scsi_host, device->bus,
1812 device->target, device->lun);
1813 else
1814 rc = hpsa_add_sas_device(h->sas_host, device);
1815
1816 return rc;
1817}
1818
1819static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1820 struct hpsa_scsi_dev_t *dev)
1821{
1822 int i;
1823 int count = 0;
1824
1825 for (i = 0; i < h->nr_cmds; i++) {
1826 struct CommandList *c = h->cmd_pool + i;
1827 int refcount = atomic_inc_return(&c->refcount);
1828
1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1830 dev->scsi3addr)) {
1831 unsigned long flags;
1832
1833 spin_lock_irqsave(&h->lock, flags);
1834 if (!hpsa_is_cmd_idle(c))
1835 ++count;
1836 spin_unlock_irqrestore(&h->lock, flags);
1837 }
1838
1839 cmd_free(h, c);
1840 }
1841
1842 return count;
1843}
1844
1845static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1846 struct hpsa_scsi_dev_t *device)
1847{
1848 int cmds = 0;
1849 int waits = 0;
1850
1851 while (1) {
1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1853 if (cmds == 0)
1854 break;
1855 if (++waits > 20)
1856 break;
1857 msleep(1000);
1858 }
1859
1860 if (waits > 20)
1861 dev_warn(&h->pdev->dev,
1862 "%s: removing device with %d outstanding commands!\n",
1863 __func__, cmds);
1864}
1865
1866static void hpsa_remove_device(struct ctlr_info *h,
1867 struct hpsa_scsi_dev_t *device)
1868{
1869 struct scsi_device *sdev = NULL;
1870
1871 if (!h->scsi_host)
1872 return;
1873
1874
1875
1876
1877 device->removed = 1;
1878 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1879
1880 if (is_logical_device(device)) {
1881 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1882 device->target, device->lun);
1883 if (sdev) {
1884 scsi_remove_device(sdev);
1885 scsi_device_put(sdev);
1886 } else {
1887
1888
1889
1890
1891
1892 hpsa_show_dev_msg(KERN_WARNING, h, device,
1893 "didn't find device for removal.");
1894 }
1895 } else {
1896
1897 hpsa_remove_sas_device(device);
1898 }
1899}
1900
1901static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1902 struct hpsa_scsi_dev_t *sd[], int nsds)
1903{
1904
1905
1906
1907
1908 int i, entry, device_change, changes = 0;
1909 struct hpsa_scsi_dev_t *csd;
1910 unsigned long flags;
1911 struct hpsa_scsi_dev_t **added, **removed;
1912 int nadded, nremoved;
1913
1914
1915
1916
1917
1918 spin_lock_irqsave(&h->reset_lock, flags);
1919 if (h->reset_in_progress) {
1920 h->drv_req_rescan = 1;
1921 spin_unlock_irqrestore(&h->reset_lock, flags);
1922 return;
1923 }
1924 spin_unlock_irqrestore(&h->reset_lock, flags);
1925
1926 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1927 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1928
1929 if (!added || !removed) {
1930 dev_warn(&h->pdev->dev, "out of memory in "
1931 "adjust_hpsa_scsi_table\n");
1932 goto free_and_out;
1933 }
1934
1935 spin_lock_irqsave(&h->devlock, flags);
1936
1937
1938
1939
1940
1941
1942
1943
1944 i = 0;
1945 nremoved = 0;
1946 nadded = 0;
1947 while (i < h->ndevices) {
1948 csd = h->dev[i];
1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1950 if (device_change == DEVICE_NOT_FOUND) {
1951 changes++;
1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1953 continue;
1954 } else if (device_change == DEVICE_CHANGED) {
1955 changes++;
1956 hpsa_scsi_replace_entry(h, i, sd[entry],
1957 added, &nadded, removed, &nremoved);
1958
1959
1960
1961 sd[entry] = NULL;
1962 } else if (device_change == DEVICE_UPDATED) {
1963 hpsa_scsi_update_entry(h, i, sd[entry]);
1964 }
1965 i++;
1966 }
1967
1968
1969
1970
1971
1972 for (i = 0; i < nsds; i++) {
1973 if (!sd[i])
1974 continue;
1975
1976
1977
1978
1979
1980
1981 if (sd[i]->volume_offline) {
1982 hpsa_show_volume_status(h, sd[i]);
1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1984 continue;
1985 }
1986
1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1988 h->ndevices, &entry);
1989 if (device_change == DEVICE_NOT_FOUND) {
1990 changes++;
1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1992 break;
1993 sd[i] = NULL;
1994 } else if (device_change == DEVICE_CHANGED) {
1995
1996 changes++;
1997 dev_warn(&h->pdev->dev,
1998 "device unexpectedly changed.\n");
1999
2000 }
2001 }
2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012 for (i = 0; i < h->ndevices; i++) {
2013 if (h->dev[i] == NULL)
2014 continue;
2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2016 }
2017
2018 spin_unlock_irqrestore(&h->devlock, flags);
2019
2020
2021
2022
2023
2024 for (i = 0; i < nsds; i++) {
2025 if (!sd[i])
2026 continue;
2027 if (sd[i]->volume_offline)
2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2029 }
2030
2031
2032
2033
2034
2035 if (!changes)
2036 goto free_and_out;
2037
2038
2039 for (i = 0; i < nremoved; i++) {
2040 if (removed[i] == NULL)
2041 continue;
2042 if (removed[i]->expose_device)
2043 hpsa_remove_device(h, removed[i]);
2044 kfree(removed[i]);
2045 removed[i] = NULL;
2046 }
2047
2048
2049 for (i = 0; i < nadded; i++) {
2050 int rc = 0;
2051
2052 if (added[i] == NULL)
2053 continue;
2054 if (!(added[i]->expose_device))
2055 continue;
2056 rc = hpsa_add_device(h, added[i]);
2057 if (!rc)
2058 continue;
2059 dev_warn(&h->pdev->dev,
2060 "addition failed %d, device not added.", rc);
2061
2062
2063
2064 fixup_botched_add(h, added[i]);
2065 h->drv_req_rescan = 1;
2066 }
2067
2068free_and_out:
2069 kfree(added);
2070 kfree(removed);
2071}
2072
2073
2074
2075
2076
2077static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2078 int bus, int target, int lun)
2079{
2080 int i;
2081 struct hpsa_scsi_dev_t *sd;
2082
2083 for (i = 0; i < h->ndevices; i++) {
2084 sd = h->dev[i];
2085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2086 return sd;
2087 }
2088 return NULL;
2089}
2090
2091static int hpsa_slave_alloc(struct scsi_device *sdev)
2092{
2093 struct hpsa_scsi_dev_t *sd = NULL;
2094 unsigned long flags;
2095 struct ctlr_info *h;
2096
2097 h = sdev_to_hba(sdev);
2098 spin_lock_irqsave(&h->devlock, flags);
2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2100 struct scsi_target *starget;
2101 struct sas_rphy *rphy;
2102
2103 starget = scsi_target(sdev);
2104 rphy = target_to_rphy(starget);
2105 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2106 if (sd) {
2107 sd->target = sdev_id(sdev);
2108 sd->lun = sdev->lun;
2109 }
2110 }
2111 if (!sd)
2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2113 sdev_id(sdev), sdev->lun);
2114
2115 if (sd && sd->expose_device) {
2116 atomic_set(&sd->ioaccel_cmds_out, 0);
2117 sdev->hostdata = sd;
2118 } else
2119 sdev->hostdata = NULL;
2120 spin_unlock_irqrestore(&h->devlock, flags);
2121 return 0;
2122}
2123
2124
2125static int hpsa_slave_configure(struct scsi_device *sdev)
2126{
2127 struct hpsa_scsi_dev_t *sd;
2128 int queue_depth;
2129
2130 sd = sdev->hostdata;
2131 sdev->no_uld_attach = !sd || !sd->expose_device;
2132
2133 if (sd) {
2134 if (sd->external)
2135 queue_depth = EXTERNAL_QD;
2136 else
2137 queue_depth = sd->queue_depth != 0 ?
2138 sd->queue_depth : sdev->host->can_queue;
2139 } else
2140 queue_depth = sdev->host->can_queue;
2141
2142 scsi_change_queue_depth(sdev, queue_depth);
2143
2144 return 0;
2145}
2146
2147static void hpsa_slave_destroy(struct scsi_device *sdev)
2148{
2149
2150}
2151
2152static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2153{
2154 int i;
2155
2156 if (!h->ioaccel2_cmd_sg_list)
2157 return;
2158 for (i = 0; i < h->nr_cmds; i++) {
2159 kfree(h->ioaccel2_cmd_sg_list[i]);
2160 h->ioaccel2_cmd_sg_list[i] = NULL;
2161 }
2162 kfree(h->ioaccel2_cmd_sg_list);
2163 h->ioaccel2_cmd_sg_list = NULL;
2164}
2165
2166static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2167{
2168 int i;
2169
2170 if (h->chainsize <= 0)
2171 return 0;
2172
2173 h->ioaccel2_cmd_sg_list =
2174 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2175 GFP_KERNEL);
2176 if (!h->ioaccel2_cmd_sg_list)
2177 return -ENOMEM;
2178 for (i = 0; i < h->nr_cmds; i++) {
2179 h->ioaccel2_cmd_sg_list[i] =
2180 kmalloc_array(h->maxsgentries,
2181 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2182 GFP_KERNEL);
2183 if (!h->ioaccel2_cmd_sg_list[i])
2184 goto clean;
2185 }
2186 return 0;
2187
2188clean:
2189 hpsa_free_ioaccel2_sg_chain_blocks(h);
2190 return -ENOMEM;
2191}
2192
2193static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2194{
2195 int i;
2196
2197 if (!h->cmd_sg_list)
2198 return;
2199 for (i = 0; i < h->nr_cmds; i++) {
2200 kfree(h->cmd_sg_list[i]);
2201 h->cmd_sg_list[i] = NULL;
2202 }
2203 kfree(h->cmd_sg_list);
2204 h->cmd_sg_list = NULL;
2205}
2206
2207static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2208{
2209 int i;
2210
2211 if (h->chainsize <= 0)
2212 return 0;
2213
2214 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2215 GFP_KERNEL);
2216 if (!h->cmd_sg_list)
2217 return -ENOMEM;
2218
2219 for (i = 0; i < h->nr_cmds; i++) {
2220 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2221 sizeof(*h->cmd_sg_list[i]),
2222 GFP_KERNEL);
2223 if (!h->cmd_sg_list[i])
2224 goto clean;
2225
2226 }
2227 return 0;
2228
2229clean:
2230 hpsa_free_sg_chain_blocks(h);
2231 return -ENOMEM;
2232}
2233
2234static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2235 struct io_accel2_cmd *cp, struct CommandList *c)
2236{
2237 struct ioaccel2_sg_element *chain_block;
2238 u64 temp64;
2239 u32 chain_size;
2240
2241 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2242 chain_size = le32_to_cpu(cp->sg[0].length);
2243 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2244 DMA_TO_DEVICE);
2245 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2246
2247 cp->sg->address = 0;
2248 return -1;
2249 }
2250 cp->sg->address = cpu_to_le64(temp64);
2251 return 0;
2252}
2253
2254static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2255 struct io_accel2_cmd *cp)
2256{
2257 struct ioaccel2_sg_element *chain_sg;
2258 u64 temp64;
2259 u32 chain_size;
2260
2261 chain_sg = cp->sg;
2262 temp64 = le64_to_cpu(chain_sg->address);
2263 chain_size = le32_to_cpu(cp->sg[0].length);
2264 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2265}
2266
2267static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2268 struct CommandList *c)
2269{
2270 struct SGDescriptor *chain_sg, *chain_block;
2271 u64 temp64;
2272 u32 chain_len;
2273
2274 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2275 chain_block = h->cmd_sg_list[c->cmdindex];
2276 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2277 chain_len = sizeof(*chain_sg) *
2278 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2279 chain_sg->Len = cpu_to_le32(chain_len);
2280 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2281 DMA_TO_DEVICE);
2282 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2283
2284 chain_sg->Addr = cpu_to_le64(0);
2285 return -1;
2286 }
2287 chain_sg->Addr = cpu_to_le64(temp64);
2288 return 0;
2289}
2290
2291static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2292 struct CommandList *c)
2293{
2294 struct SGDescriptor *chain_sg;
2295
2296 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2297 return;
2298
2299 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2300 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2301 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2302}
2303
2304
2305
2306
2307
2308
2309static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2310 struct CommandList *c,
2311 struct scsi_cmnd *cmd,
2312 struct io_accel2_cmd *c2,
2313 struct hpsa_scsi_dev_t *dev)
2314{
2315 int data_len;
2316 int retry = 0;
2317 u32 ioaccel2_resid = 0;
2318
2319 switch (c2->error_data.serv_response) {
2320 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2321 switch (c2->error_data.status) {
2322 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2323 break;
2324 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2325 cmd->result |= SAM_STAT_CHECK_CONDITION;
2326 if (c2->error_data.data_present !=
2327 IOACCEL2_SENSE_DATA_PRESENT) {
2328 memset(cmd->sense_buffer, 0,
2329 SCSI_SENSE_BUFFERSIZE);
2330 break;
2331 }
2332
2333 data_len = c2->error_data.sense_data_len;
2334 if (data_len > SCSI_SENSE_BUFFERSIZE)
2335 data_len = SCSI_SENSE_BUFFERSIZE;
2336 if (data_len > sizeof(c2->error_data.sense_data_buff))
2337 data_len =
2338 sizeof(c2->error_data.sense_data_buff);
2339 memcpy(cmd->sense_buffer,
2340 c2->error_data.sense_data_buff, data_len);
2341 retry = 1;
2342 break;
2343 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2344 retry = 1;
2345 break;
2346 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2347 retry = 1;
2348 break;
2349 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2350 retry = 1;
2351 break;
2352 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2353 retry = 1;
2354 break;
2355 default:
2356 retry = 1;
2357 break;
2358 }
2359 break;
2360 case IOACCEL2_SERV_RESPONSE_FAILURE:
2361 switch (c2->error_data.status) {
2362 case IOACCEL2_STATUS_SR_IO_ERROR:
2363 case IOACCEL2_STATUS_SR_IO_ABORTED:
2364 case IOACCEL2_STATUS_SR_OVERRUN:
2365 retry = 1;
2366 break;
2367 case IOACCEL2_STATUS_SR_UNDERRUN:
2368 cmd->result = (DID_OK << 16);
2369 cmd->result |= (COMMAND_COMPLETE << 8);
2370 ioaccel2_resid = get_unaligned_le32(
2371 &c2->error_data.resid_cnt[0]);
2372 scsi_set_resid(cmd, ioaccel2_resid);
2373 break;
2374 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2375 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2376 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2377
2378
2379
2380
2381
2382
2383
2384
2385 if (dev->physical_device && dev->expose_device) {
2386 cmd->result = DID_NO_CONNECT << 16;
2387 dev->removed = 1;
2388 h->drv_req_rescan = 1;
2389 dev_warn(&h->pdev->dev,
2390 "%s: device is gone!\n", __func__);
2391 } else
2392
2393
2394
2395
2396
2397 retry = 1;
2398 break;
2399 default:
2400 retry = 1;
2401 }
2402 break;
2403 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2404 break;
2405 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2406 break;
2407 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2408 retry = 1;
2409 break;
2410 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2411 break;
2412 default:
2413 retry = 1;
2414 break;
2415 }
2416
2417 return retry;
2418}
2419
2420static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2421 struct CommandList *c)
2422{
2423 bool do_wake = false;
2424
2425
2426
2427
2428
2429
2430 c->scsi_cmd = SCSI_CMD_IDLE;
2431 mb();
2432 if (c->reset_pending) {
2433 unsigned long flags;
2434 struct hpsa_scsi_dev_t *dev;
2435
2436
2437
2438
2439
2440
2441 spin_lock_irqsave(&h->lock, flags);
2442 dev = c->reset_pending;
2443 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2444 do_wake = true;
2445 c->reset_pending = NULL;
2446 spin_unlock_irqrestore(&h->lock, flags);
2447 }
2448
2449 if (do_wake)
2450 wake_up_all(&h->event_sync_wait_queue);
2451}
2452
2453static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2454 struct CommandList *c)
2455{
2456 hpsa_cmd_resolve_events(h, c);
2457 cmd_tagged_free(h, c);
2458}
2459
2460static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2461 struct CommandList *c, struct scsi_cmnd *cmd)
2462{
2463 hpsa_cmd_resolve_and_free(h, c);
2464 if (cmd && cmd->scsi_done)
2465 cmd->scsi_done(cmd);
2466}
2467
2468static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2469{
2470 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2471 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2472}
2473
2474static void process_ioaccel2_completion(struct ctlr_info *h,
2475 struct CommandList *c, struct scsi_cmnd *cmd,
2476 struct hpsa_scsi_dev_t *dev)
2477{
2478 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2479
2480
2481 if (likely(c2->error_data.serv_response == 0 &&
2482 c2->error_data.status == 0))
2483 return hpsa_cmd_free_and_done(h, c, cmd);
2484
2485
2486
2487
2488
2489
2490 if (is_logical_device(dev) &&
2491 c2->error_data.serv_response ==
2492 IOACCEL2_SERV_RESPONSE_FAILURE) {
2493 if (c2->error_data.status ==
2494 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2495 dev->offload_enabled = 0;
2496 dev->offload_to_be_enabled = 0;
2497 }
2498
2499 return hpsa_retry_cmd(h, c);
2500 }
2501
2502 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2503 return hpsa_retry_cmd(h, c);
2504
2505 return hpsa_cmd_free_and_done(h, c, cmd);
2506}
2507
2508
2509static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2510 struct CommandList *cp)
2511{
2512 u8 tmf_status = cp->err_info->ScsiStatus;
2513
2514 switch (tmf_status) {
2515 case CISS_TMF_COMPLETE:
2516
2517
2518
2519
2520 case CISS_TMF_SUCCESS:
2521 return 0;
2522 case CISS_TMF_INVALID_FRAME:
2523 case CISS_TMF_NOT_SUPPORTED:
2524 case CISS_TMF_FAILED:
2525 case CISS_TMF_WRONG_LUN:
2526 case CISS_TMF_OVERLAPPED_TAG:
2527 break;
2528 default:
2529 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2530 tmf_status);
2531 break;
2532 }
2533 return -tmf_status;
2534}
2535
2536static void complete_scsi_command(struct CommandList *cp)
2537{
2538 struct scsi_cmnd *cmd;
2539 struct ctlr_info *h;
2540 struct ErrorInfo *ei;
2541 struct hpsa_scsi_dev_t *dev;
2542 struct io_accel2_cmd *c2;
2543
2544 u8 sense_key;
2545 u8 asc;
2546 u8 ascq;
2547 unsigned long sense_data_size;
2548
2549 ei = cp->err_info;
2550 cmd = cp->scsi_cmd;
2551 h = cp->h;
2552
2553 if (!cmd->device) {
2554 cmd->result = DID_NO_CONNECT << 16;
2555 return hpsa_cmd_free_and_done(h, cp, cmd);
2556 }
2557
2558 dev = cmd->device->hostdata;
2559 if (!dev) {
2560 cmd->result = DID_NO_CONNECT << 16;
2561 return hpsa_cmd_free_and_done(h, cp, cmd);
2562 }
2563 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2564
2565 scsi_dma_unmap(cmd);
2566 if ((cp->cmd_type == CMD_SCSI) &&
2567 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2568 hpsa_unmap_sg_chain_block(h, cp);
2569
2570 if ((cp->cmd_type == CMD_IOACCEL2) &&
2571 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2572 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2573
2574 cmd->result = (DID_OK << 16);
2575 cmd->result |= (COMMAND_COMPLETE << 8);
2576
2577 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2578 if (dev->physical_device && dev->expose_device &&
2579 dev->removed) {
2580 cmd->result = DID_NO_CONNECT << 16;
2581 return hpsa_cmd_free_and_done(h, cp, cmd);
2582 }
2583 if (likely(cp->phys_disk != NULL))
2584 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2585 }
2586
2587
2588
2589
2590
2591
2592 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2593
2594 cmd->result = DID_NO_CONNECT << 16;
2595 return hpsa_cmd_free_and_done(h, cp, cmd);
2596 }
2597
2598 if ((unlikely(hpsa_is_pending_event(cp))))
2599 if (cp->reset_pending)
2600 return hpsa_cmd_free_and_done(h, cp, cmd);
2601
2602 if (cp->cmd_type == CMD_IOACCEL2)
2603 return process_ioaccel2_completion(h, cp, cmd, dev);
2604
2605 scsi_set_resid(cmd, ei->ResidualCnt);
2606 if (ei->CommandStatus == 0)
2607 return hpsa_cmd_free_and_done(h, cp, cmd);
2608
2609
2610
2611
2612 if (cp->cmd_type == CMD_IOACCEL1) {
2613 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2614 cp->Header.SGList = scsi_sg_count(cmd);
2615 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2616 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2617 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2618 cp->Header.tag = c->tag;
2619 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2620 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2621
2622
2623
2624
2625
2626 if (is_logical_device(dev)) {
2627 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2628 dev->offload_enabled = 0;
2629 return hpsa_retry_cmd(h, cp);
2630 }
2631 }
2632
2633
2634 switch (ei->CommandStatus) {
2635
2636 case CMD_TARGET_STATUS:
2637 cmd->result |= ei->ScsiStatus;
2638
2639 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2640 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2641 else
2642 sense_data_size = sizeof(ei->SenseInfo);
2643 if (ei->SenseLen < sense_data_size)
2644 sense_data_size = ei->SenseLen;
2645 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2646 if (ei->ScsiStatus)
2647 decode_sense_data(ei->SenseInfo, sense_data_size,
2648 &sense_key, &asc, &ascq);
2649 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2650 switch (sense_key) {
2651 case ABORTED_COMMAND:
2652 cmd->result |= DID_SOFT_ERROR << 16;
2653 break;
2654 case UNIT_ATTENTION:
2655 if (asc == 0x3F && ascq == 0x0E)
2656 h->drv_req_rescan = 1;
2657 break;
2658 case ILLEGAL_REQUEST:
2659 if (asc == 0x25 && ascq == 0x00) {
2660 dev->removed = 1;
2661 cmd->result = DID_NO_CONNECT << 16;
2662 }
2663 break;
2664 }
2665 break;
2666 }
2667
2668
2669
2670 if (ei->ScsiStatus) {
2671 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2672 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2673 "Returning result: 0x%x\n",
2674 cp, ei->ScsiStatus,
2675 sense_key, asc, ascq,
2676 cmd->result);
2677 } else {
2678 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2679 "Returning no connection.\n", cp),
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693 cmd->result = DID_NO_CONNECT << 16;
2694 }
2695 break;
2696
2697 case CMD_DATA_UNDERRUN:
2698 break;
2699 case CMD_DATA_OVERRUN:
2700 dev_warn(&h->pdev->dev,
2701 "CDB %16phN data overrun\n", cp->Request.CDB);
2702 break;
2703 case CMD_INVALID: {
2704
2705
2706
2707
2708
2709
2710
2711
2712 cmd->result = DID_NO_CONNECT << 16;
2713 }
2714 break;
2715 case CMD_PROTOCOL_ERR:
2716 cmd->result = DID_ERROR << 16;
2717 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2718 cp->Request.CDB);
2719 break;
2720 case CMD_HARDWARE_ERR:
2721 cmd->result = DID_ERROR << 16;
2722 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2723 cp->Request.CDB);
2724 break;
2725 case CMD_CONNECTION_LOST:
2726 cmd->result = DID_ERROR << 16;
2727 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2728 cp->Request.CDB);
2729 break;
2730 case CMD_ABORTED:
2731 cmd->result = DID_ABORT << 16;
2732 break;
2733 case CMD_ABORT_FAILED:
2734 cmd->result = DID_ERROR << 16;
2735 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2736 cp->Request.CDB);
2737 break;
2738 case CMD_UNSOLICITED_ABORT:
2739 cmd->result = DID_SOFT_ERROR << 16;
2740 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2741 cp->Request.CDB);
2742 break;
2743 case CMD_TIMEOUT:
2744 cmd->result = DID_TIME_OUT << 16;
2745 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2746 cp->Request.CDB);
2747 break;
2748 case CMD_UNABORTABLE:
2749 cmd->result = DID_ERROR << 16;
2750 dev_warn(&h->pdev->dev, "Command unabortable\n");
2751 break;
2752 case CMD_TMF_STATUS:
2753 if (hpsa_evaluate_tmf_status(h, cp))
2754 cmd->result = DID_ERROR << 16;
2755 break;
2756 case CMD_IOACCEL_DISABLED:
2757
2758
2759
2760 cmd->result = DID_SOFT_ERROR << 16;
2761 dev_warn(&h->pdev->dev,
2762 "cp %p had HP SSD Smart Path error\n", cp);
2763 break;
2764 default:
2765 cmd->result = DID_ERROR << 16;
2766 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2767 cp, ei->CommandStatus);
2768 }
2769
2770 return hpsa_cmd_free_and_done(h, cp, cmd);
2771}
2772
2773static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2774 int sg_used, enum dma_data_direction data_direction)
2775{
2776 int i;
2777
2778 for (i = 0; i < sg_used; i++)
2779 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2780 le32_to_cpu(c->SG[i].Len),
2781 data_direction);
2782}
2783
2784static int hpsa_map_one(struct pci_dev *pdev,
2785 struct CommandList *cp,
2786 unsigned char *buf,
2787 size_t buflen,
2788 enum dma_data_direction data_direction)
2789{
2790 u64 addr64;
2791
2792 if (buflen == 0 || data_direction == DMA_NONE) {
2793 cp->Header.SGList = 0;
2794 cp->Header.SGTotal = cpu_to_le16(0);
2795 return 0;
2796 }
2797
2798 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2799 if (dma_mapping_error(&pdev->dev, addr64)) {
2800
2801 cp->Header.SGList = 0;
2802 cp->Header.SGTotal = cpu_to_le16(0);
2803 return -1;
2804 }
2805 cp->SG[0].Addr = cpu_to_le64(addr64);
2806 cp->SG[0].Len = cpu_to_le32(buflen);
2807 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST);
2808 cp->Header.SGList = 1;
2809 cp->Header.SGTotal = cpu_to_le16(1);
2810 return 0;
2811}
2812
2813#define NO_TIMEOUT ((unsigned long) -1)
2814#define DEFAULT_TIMEOUT 30000
2815static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2816 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2817{
2818 DECLARE_COMPLETION_ONSTACK(wait);
2819
2820 c->waiting = &wait;
2821 __enqueue_cmd_and_start_io(h, c, reply_queue);
2822 if (timeout_msecs == NO_TIMEOUT) {
2823
2824 wait_for_completion_io(&wait);
2825 return IO_OK;
2826 }
2827 if (!wait_for_completion_io_timeout(&wait,
2828 msecs_to_jiffies(timeout_msecs))) {
2829 dev_warn(&h->pdev->dev, "Command timed out.\n");
2830 return -ETIMEDOUT;
2831 }
2832 return IO_OK;
2833}
2834
2835static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2836 int reply_queue, unsigned long timeout_msecs)
2837{
2838 if (unlikely(lockup_detected(h))) {
2839 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2840 return IO_OK;
2841 }
2842 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2843}
2844
2845static u32 lockup_detected(struct ctlr_info *h)
2846{
2847 int cpu;
2848 u32 rc, *lockup_detected;
2849
2850 cpu = get_cpu();
2851 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2852 rc = *lockup_detected;
2853 put_cpu();
2854 return rc;
2855}
2856
2857#define MAX_DRIVER_CMD_RETRIES 25
2858static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2859 struct CommandList *c, enum dma_data_direction data_direction,
2860 unsigned long timeout_msecs)
2861{
2862 int backoff_time = 10, retry_count = 0;
2863 int rc;
2864
2865 do {
2866 memset(c->err_info, 0, sizeof(*c->err_info));
2867 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2868 timeout_msecs);
2869 if (rc)
2870 break;
2871 retry_count++;
2872 if (retry_count > 3) {
2873 msleep(backoff_time);
2874 if (backoff_time < 1000)
2875 backoff_time *= 2;
2876 }
2877 } while ((check_for_unit_attention(h, c) ||
2878 check_for_busy(h, c)) &&
2879 retry_count <= MAX_DRIVER_CMD_RETRIES);
2880 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2881 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2882 rc = -EIO;
2883 return rc;
2884}
2885
2886static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2887 struct CommandList *c)
2888{
2889 const u8 *cdb = c->Request.CDB;
2890 const u8 *lun = c->Header.LUN.LunAddrBytes;
2891
2892 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2893 txt, lun, cdb);
2894}
2895
2896static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2897 struct CommandList *cp)
2898{
2899 const struct ErrorInfo *ei = cp->err_info;
2900 struct device *d = &cp->h->pdev->dev;
2901 u8 sense_key, asc, ascq;
2902 int sense_len;
2903
2904 switch (ei->CommandStatus) {
2905 case CMD_TARGET_STATUS:
2906 if (ei->SenseLen > sizeof(ei->SenseInfo))
2907 sense_len = sizeof(ei->SenseInfo);
2908 else
2909 sense_len = ei->SenseLen;
2910 decode_sense_data(ei->SenseInfo, sense_len,
2911 &sense_key, &asc, &ascq);
2912 hpsa_print_cmd(h, "SCSI status", cp);
2913 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2914 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2915 sense_key, asc, ascq);
2916 else
2917 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2918 if (ei->ScsiStatus == 0)
2919 dev_warn(d, "SCSI status is abnormally zero. "
2920 "(probably indicates selection timeout "
2921 "reported incorrectly due to a known "
2922 "firmware bug, circa July, 2001.)\n");
2923 break;
2924 case CMD_DATA_UNDERRUN:
2925 break;
2926 case CMD_DATA_OVERRUN:
2927 hpsa_print_cmd(h, "overrun condition", cp);
2928 break;
2929 case CMD_INVALID: {
2930
2931
2932
2933 hpsa_print_cmd(h, "invalid command", cp);
2934 dev_warn(d, "probably means device no longer present\n");
2935 }
2936 break;
2937 case CMD_PROTOCOL_ERR:
2938 hpsa_print_cmd(h, "protocol error", cp);
2939 break;
2940 case CMD_HARDWARE_ERR:
2941 hpsa_print_cmd(h, "hardware error", cp);
2942 break;
2943 case CMD_CONNECTION_LOST:
2944 hpsa_print_cmd(h, "connection lost", cp);
2945 break;
2946 case CMD_ABORTED:
2947 hpsa_print_cmd(h, "aborted", cp);
2948 break;
2949 case CMD_ABORT_FAILED:
2950 hpsa_print_cmd(h, "abort failed", cp);
2951 break;
2952 case CMD_UNSOLICITED_ABORT:
2953 hpsa_print_cmd(h, "unsolicited abort", cp);
2954 break;
2955 case CMD_TIMEOUT:
2956 hpsa_print_cmd(h, "timed out", cp);
2957 break;
2958 case CMD_UNABORTABLE:
2959 hpsa_print_cmd(h, "unabortable", cp);
2960 break;
2961 case CMD_CTLR_LOCKUP:
2962 hpsa_print_cmd(h, "controller lockup detected", cp);
2963 break;
2964 default:
2965 hpsa_print_cmd(h, "unknown status", cp);
2966 dev_warn(d, "Unknown command status %x\n",
2967 ei->CommandStatus);
2968 }
2969}
2970
2971static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2972 u8 page, u8 *buf, size_t bufsize)
2973{
2974 int rc = IO_OK;
2975 struct CommandList *c;
2976 struct ErrorInfo *ei;
2977
2978 c = cmd_alloc(h);
2979 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
2980 page, scsi3addr, TYPE_CMD)) {
2981 rc = -1;
2982 goto out;
2983 }
2984 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
2985 NO_TIMEOUT);
2986 if (rc)
2987 goto out;
2988 ei = c->err_info;
2989 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2990 hpsa_scsi_interpret_error(h, c);
2991 rc = -1;
2992 }
2993out:
2994 cmd_free(h, c);
2995 return rc;
2996}
2997
2998static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
2999 u8 *scsi3addr)
3000{
3001 u8 *buf;
3002 u64 sa = 0;
3003 int rc = 0;
3004
3005 buf = kzalloc(1024, GFP_KERNEL);
3006 if (!buf)
3007 return 0;
3008
3009 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3010 buf, 1024);
3011
3012 if (rc)
3013 goto out;
3014
3015 sa = get_unaligned_be64(buf+12);
3016
3017out:
3018 kfree(buf);
3019 return sa;
3020}
3021
3022static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3023 u16 page, unsigned char *buf,
3024 unsigned char bufsize)
3025{
3026 int rc = IO_OK;
3027 struct CommandList *c;
3028 struct ErrorInfo *ei;
3029
3030 c = cmd_alloc(h);
3031
3032 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3033 page, scsi3addr, TYPE_CMD)) {
3034 rc = -1;
3035 goto out;
3036 }
3037 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3038 NO_TIMEOUT);
3039 if (rc)
3040 goto out;
3041 ei = c->err_info;
3042 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3043 hpsa_scsi_interpret_error(h, c);
3044 rc = -1;
3045 }
3046out:
3047 cmd_free(h, c);
3048 return rc;
3049}
3050
3051static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3052 u8 reset_type, int reply_queue)
3053{
3054 int rc = IO_OK;
3055 struct CommandList *c;
3056 struct ErrorInfo *ei;
3057
3058 c = cmd_alloc(h);
3059
3060
3061
3062 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
3063 scsi3addr, TYPE_MSG);
3064 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3065 if (rc) {
3066 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3067 goto out;
3068 }
3069
3070
3071 ei = c->err_info;
3072 if (ei->CommandStatus != 0) {
3073 hpsa_scsi_interpret_error(h, c);
3074 rc = -1;
3075 }
3076out:
3077 cmd_free(h, c);
3078 return rc;
3079}
3080
3081static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3082 struct hpsa_scsi_dev_t *dev,
3083 unsigned char *scsi3addr)
3084{
3085 int i;
3086 bool match = false;
3087 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3088 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3089
3090 if (hpsa_is_cmd_idle(c))
3091 return false;
3092
3093 switch (c->cmd_type) {
3094 case CMD_SCSI:
3095 case CMD_IOCTL_PEND:
3096 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3097 sizeof(c->Header.LUN.LunAddrBytes));
3098 break;
3099
3100 case CMD_IOACCEL1:
3101 case CMD_IOACCEL2:
3102 if (c->phys_disk == dev) {
3103
3104 match = true;
3105 } else {
3106
3107
3108
3109
3110 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3111
3112
3113
3114
3115 match = dev->phys_disk[i] == c->phys_disk;
3116 }
3117 }
3118 break;
3119
3120 case IOACCEL2_TMF:
3121 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3122 match = dev->phys_disk[i]->ioaccel_handle ==
3123 le32_to_cpu(ac->it_nexus);
3124 }
3125 break;
3126
3127 case 0:
3128 match = false;
3129 break;
3130
3131 default:
3132 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3133 c->cmd_type);
3134 BUG();
3135 }
3136
3137 return match;
3138}
3139
3140static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3141 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3142{
3143 int i;
3144 int rc = 0;
3145
3146
3147 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3148 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3149 return -EINTR;
3150 }
3151
3152 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3153
3154 for (i = 0; i < h->nr_cmds; i++) {
3155 struct CommandList *c = h->cmd_pool + i;
3156 int refcount = atomic_inc_return(&c->refcount);
3157
3158 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3159 unsigned long flags;
3160
3161
3162
3163
3164
3165
3166
3167 c->reset_pending = dev;
3168 spin_lock_irqsave(&h->lock, flags);
3169 if (!hpsa_is_cmd_idle(c))
3170 atomic_inc(&dev->reset_cmds_out);
3171 else
3172 c->reset_pending = NULL;
3173 spin_unlock_irqrestore(&h->lock, flags);
3174 }
3175
3176 cmd_free(h, c);
3177 }
3178
3179 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3180 if (!rc)
3181 wait_event(h->event_sync_wait_queue,
3182 atomic_read(&dev->reset_cmds_out) == 0 ||
3183 lockup_detected(h));
3184
3185 if (unlikely(lockup_detected(h))) {
3186 dev_warn(&h->pdev->dev,
3187 "Controller lockup detected during reset wait\n");
3188 rc = -ENODEV;
3189 }
3190
3191 if (unlikely(rc))
3192 atomic_set(&dev->reset_cmds_out, 0);
3193 else
3194 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3195
3196 mutex_unlock(&h->reset_mutex);
3197 return rc;
3198}
3199
3200static void hpsa_get_raid_level(struct ctlr_info *h,
3201 unsigned char *scsi3addr, unsigned char *raid_level)
3202{
3203 int rc;
3204 unsigned char *buf;
3205
3206 *raid_level = RAID_UNKNOWN;
3207 buf = kzalloc(64, GFP_KERNEL);
3208 if (!buf)
3209 return;
3210
3211 if (!hpsa_vpd_page_supported(h, scsi3addr,
3212 HPSA_VPD_LV_DEVICE_GEOMETRY))
3213 goto exit;
3214
3215 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3216 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3217
3218 if (rc == 0)
3219 *raid_level = buf[8];
3220 if (*raid_level > RAID_UNKNOWN)
3221 *raid_level = RAID_UNKNOWN;
3222exit:
3223 kfree(buf);
3224 return;
3225}
3226
3227#define HPSA_MAP_DEBUG
3228#ifdef HPSA_MAP_DEBUG
3229static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3230 struct raid_map_data *map_buff)
3231{
3232 struct raid_map_disk_data *dd = &map_buff->data[0];
3233 int map, row, col;
3234 u16 map_cnt, row_cnt, disks_per_row;
3235
3236 if (rc != 0)
3237 return;
3238
3239
3240 if (h->raid_offload_debug < 2)
3241 return;
3242
3243 dev_info(&h->pdev->dev, "structure_size = %u\n",
3244 le32_to_cpu(map_buff->structure_size));
3245 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3246 le32_to_cpu(map_buff->volume_blk_size));
3247 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3248 le64_to_cpu(map_buff->volume_blk_cnt));
3249 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3250 map_buff->phys_blk_shift);
3251 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3252 map_buff->parity_rotation_shift);
3253 dev_info(&h->pdev->dev, "strip_size = %u\n",
3254 le16_to_cpu(map_buff->strip_size));
3255 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3256 le64_to_cpu(map_buff->disk_starting_blk));
3257 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3258 le64_to_cpu(map_buff->disk_blk_cnt));
3259 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3260 le16_to_cpu(map_buff->data_disks_per_row));
3261 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3262 le16_to_cpu(map_buff->metadata_disks_per_row));
3263 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3264 le16_to_cpu(map_buff->row_cnt));
3265 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3266 le16_to_cpu(map_buff->layout_map_count));
3267 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3268 le16_to_cpu(map_buff->flags));
3269 dev_info(&h->pdev->dev, "encryption = %s\n",
3270 le16_to_cpu(map_buff->flags) &
3271 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3272 dev_info(&h->pdev->dev, "dekindex = %u\n",
3273 le16_to_cpu(map_buff->dekindex));
3274 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3275 for (map = 0; map < map_cnt; map++) {
3276 dev_info(&h->pdev->dev, "Map%u:\n", map);
3277 row_cnt = le16_to_cpu(map_buff->row_cnt);
3278 for (row = 0; row < row_cnt; row++) {
3279 dev_info(&h->pdev->dev, " Row%u:\n", row);
3280 disks_per_row =
3281 le16_to_cpu(map_buff->data_disks_per_row);
3282 for (col = 0; col < disks_per_row; col++, dd++)
3283 dev_info(&h->pdev->dev,
3284 " D%02u: h=0x%04x xor=%u,%u\n",
3285 col, dd->ioaccel_handle,
3286 dd->xor_mult[0], dd->xor_mult[1]);
3287 disks_per_row =
3288 le16_to_cpu(map_buff->metadata_disks_per_row);
3289 for (col = 0; col < disks_per_row; col++, dd++)
3290 dev_info(&h->pdev->dev,
3291 " M%02u: h=0x%04x xor=%u,%u\n",
3292 col, dd->ioaccel_handle,
3293 dd->xor_mult[0], dd->xor_mult[1]);
3294 }
3295 }
3296}
3297#else
3298static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3299 __attribute__((unused)) int rc,
3300 __attribute__((unused)) struct raid_map_data *map_buff)
3301{
3302}
3303#endif
3304
3305static int hpsa_get_raid_map(struct ctlr_info *h,
3306 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3307{
3308 int rc = 0;
3309 struct CommandList *c;
3310 struct ErrorInfo *ei;
3311
3312 c = cmd_alloc(h);
3313
3314 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3315 sizeof(this_device->raid_map), 0,
3316 scsi3addr, TYPE_CMD)) {
3317 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3318 cmd_free(h, c);
3319 return -1;
3320 }
3321 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3322 NO_TIMEOUT);
3323 if (rc)
3324 goto out;
3325 ei = c->err_info;
3326 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3327 hpsa_scsi_interpret_error(h, c);
3328 rc = -1;
3329 goto out;
3330 }
3331 cmd_free(h, c);
3332
3333
3334 if (le32_to_cpu(this_device->raid_map.structure_size) >
3335 sizeof(this_device->raid_map)) {
3336 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3337 rc = -1;
3338 }
3339 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3340 return rc;
3341out:
3342 cmd_free(h, c);
3343 return rc;
3344}
3345
3346static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3347 unsigned char scsi3addr[], u16 bmic_device_index,
3348 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3349{
3350 int rc = IO_OK;
3351 struct CommandList *c;
3352 struct ErrorInfo *ei;
3353
3354 c = cmd_alloc(h);
3355
3356 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3357 0, RAID_CTLR_LUNID, TYPE_CMD);
3358 if (rc)
3359 goto out;
3360
3361 c->Request.CDB[2] = bmic_device_index & 0xff;
3362 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3363
3364 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3365 NO_TIMEOUT);
3366 if (rc)
3367 goto out;
3368 ei = c->err_info;
3369 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3370 hpsa_scsi_interpret_error(h, c);
3371 rc = -1;
3372 }
3373out:
3374 cmd_free(h, c);
3375 return rc;
3376}
3377
3378static int hpsa_bmic_id_controller(struct ctlr_info *h,
3379 struct bmic_identify_controller *buf, size_t bufsize)
3380{
3381 int rc = IO_OK;
3382 struct CommandList *c;
3383 struct ErrorInfo *ei;
3384
3385 c = cmd_alloc(h);
3386
3387 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3388 0, RAID_CTLR_LUNID, TYPE_CMD);
3389 if (rc)
3390 goto out;
3391
3392 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3393 NO_TIMEOUT);
3394 if (rc)
3395 goto out;
3396 ei = c->err_info;
3397 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3398 hpsa_scsi_interpret_error(h, c);
3399 rc = -1;
3400 }
3401out:
3402 cmd_free(h, c);
3403 return rc;
3404}
3405
3406static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3407 unsigned char scsi3addr[], u16 bmic_device_index,
3408 struct bmic_identify_physical_device *buf, size_t bufsize)
3409{
3410 int rc = IO_OK;
3411 struct CommandList *c;
3412 struct ErrorInfo *ei;
3413
3414 c = cmd_alloc(h);
3415 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3416 0, RAID_CTLR_LUNID, TYPE_CMD);
3417 if (rc)
3418 goto out;
3419
3420 c->Request.CDB[2] = bmic_device_index & 0xff;
3421 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3422
3423 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3424 NO_TIMEOUT);
3425 ei = c->err_info;
3426 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3427 hpsa_scsi_interpret_error(h, c);
3428 rc = -1;
3429 }
3430out:
3431 cmd_free(h, c);
3432
3433 return rc;
3434}
3435
3436
3437
3438
3439
3440
3441
3442static void hpsa_get_enclosure_info(struct ctlr_info *h,
3443 unsigned char *scsi3addr,
3444 struct ReportExtendedLUNdata *rlep, int rle_index,
3445 struct hpsa_scsi_dev_t *encl_dev)
3446{
3447 int rc = -1;
3448 struct CommandList *c = NULL;
3449 struct ErrorInfo *ei = NULL;
3450 struct bmic_sense_storage_box_params *bssbp = NULL;
3451 struct bmic_identify_physical_device *id_phys = NULL;
3452 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3453 u16 bmic_device_index = 0;
3454
3455 encl_dev->eli =
3456 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3457
3458 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3459
3460 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3461 rc = IO_OK;
3462 goto out;
3463 }
3464
3465 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3466 rc = IO_OK;
3467 goto out;
3468 }
3469
3470 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3471 if (!bssbp)
3472 goto out;
3473
3474 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3475 if (!id_phys)
3476 goto out;
3477
3478 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3479 id_phys, sizeof(*id_phys));
3480 if (rc) {
3481 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3482 __func__, encl_dev->external, bmic_device_index);
3483 goto out;
3484 }
3485
3486 c = cmd_alloc(h);
3487
3488 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3489 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3490
3491 if (rc)
3492 goto out;
3493
3494 if (id_phys->phys_connector[1] == 'E')
3495 c->Request.CDB[5] = id_phys->box_index;
3496 else
3497 c->Request.CDB[5] = 0;
3498
3499 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3500 NO_TIMEOUT);
3501 if (rc)
3502 goto out;
3503
3504 ei = c->err_info;
3505 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3506 rc = -1;
3507 goto out;
3508 }
3509
3510 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3511 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3512 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3513
3514 rc = IO_OK;
3515out:
3516 kfree(bssbp);
3517 kfree(id_phys);
3518
3519 if (c)
3520 cmd_free(h, c);
3521
3522 if (rc != IO_OK)
3523 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3524 "Error, could not get enclosure information");
3525}
3526
3527static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3528 unsigned char *scsi3addr)
3529{
3530 struct ReportExtendedLUNdata *physdev;
3531 u32 nphysicals;
3532 u64 sa = 0;
3533 int i;
3534
3535 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3536 if (!physdev)
3537 return 0;
3538
3539 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3540 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3541 kfree(physdev);
3542 return 0;
3543 }
3544 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3545
3546 for (i = 0; i < nphysicals; i++)
3547 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3548 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3549 break;
3550 }
3551
3552 kfree(physdev);
3553
3554 return sa;
3555}
3556
3557static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3558 struct hpsa_scsi_dev_t *dev)
3559{
3560 int rc;
3561 u64 sa = 0;
3562
3563 if (is_hba_lunid(scsi3addr)) {
3564 struct bmic_sense_subsystem_info *ssi;
3565
3566 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3567 if (!ssi)
3568 return;
3569
3570 rc = hpsa_bmic_sense_subsystem_information(h,
3571 scsi3addr, 0, ssi, sizeof(*ssi));
3572 if (rc == 0) {
3573 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3574 h->sas_address = sa;
3575 }
3576
3577 kfree(ssi);
3578 } else
3579 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3580
3581 dev->sas_address = sa;
3582}
3583
3584static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3585 struct ReportExtendedLUNdata *physdev)
3586{
3587 u32 nphysicals;
3588 int i;
3589
3590 if (h->discovery_polling)
3591 return;
3592
3593 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3594
3595 for (i = 0; i < nphysicals; i++) {
3596 if (physdev->LUN[i].device_type ==
3597 BMIC_DEVICE_TYPE_CONTROLLER
3598 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3599 dev_info(&h->pdev->dev,
3600 "External controller present, activate discovery polling and disable rld caching\n");
3601 hpsa_disable_rld_caching(h);
3602 h->discovery_polling = 1;
3603 break;
3604 }
3605 }
3606}
3607
3608
3609static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3610 unsigned char scsi3addr[], u8 page)
3611{
3612 int rc;
3613 int i;
3614 int pages;
3615 unsigned char *buf, bufsize;
3616
3617 buf = kzalloc(256, GFP_KERNEL);
3618 if (!buf)
3619 return false;
3620
3621
3622 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3623 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3624 buf, HPSA_VPD_HEADER_SZ);
3625 if (rc != 0)
3626 goto exit_unsupported;
3627 pages = buf[3];
3628 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3629 bufsize = pages + HPSA_VPD_HEADER_SZ;
3630 else
3631 bufsize = 255;
3632
3633
3634 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3635 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3636 buf, bufsize);
3637 if (rc != 0)
3638 goto exit_unsupported;
3639
3640 pages = buf[3];
3641 for (i = 1; i <= pages; i++)
3642 if (buf[3 + i] == page)
3643 goto exit_supported;
3644exit_unsupported:
3645 kfree(buf);
3646 return false;
3647exit_supported:
3648 kfree(buf);
3649 return true;
3650}
3651
3652
3653
3654
3655
3656
3657
3658
3659static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3660 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3661{
3662 int rc;
3663 unsigned char *buf;
3664 u8 ioaccel_status;
3665
3666 this_device->offload_config = 0;
3667 this_device->offload_enabled = 0;
3668 this_device->offload_to_be_enabled = 0;
3669
3670 buf = kzalloc(64, GFP_KERNEL);
3671 if (!buf)
3672 return;
3673 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3674 goto out;
3675 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3676 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3677 if (rc != 0)
3678 goto out;
3679
3680#define IOACCEL_STATUS_BYTE 4
3681#define OFFLOAD_CONFIGURED_BIT 0x01
3682#define OFFLOAD_ENABLED_BIT 0x02
3683 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3684 this_device->offload_config =
3685 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3686 if (this_device->offload_config) {
3687 this_device->offload_to_be_enabled =
3688 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3689 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3690 this_device->offload_to_be_enabled = 0;
3691 }
3692
3693out:
3694 kfree(buf);
3695 return;
3696}
3697
3698
3699static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3700 unsigned char *device_id, int index, int buflen)
3701{
3702 int rc;
3703 unsigned char *buf;
3704
3705
3706 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3707 return 1;
3708
3709 buf = kzalloc(64, GFP_KERNEL);
3710 if (!buf)
3711 return -ENOMEM;
3712
3713 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3714 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3715 if (rc == 0) {
3716 if (buflen > 16)
3717 buflen = 16;
3718 memcpy(device_id, &buf[8], buflen);
3719 }
3720
3721 kfree(buf);
3722
3723 return rc;
3724}
3725
3726static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3727 void *buf, int bufsize,
3728 int extended_response)
3729{
3730 int rc = IO_OK;
3731 struct CommandList *c;
3732 unsigned char scsi3addr[8];
3733 struct ErrorInfo *ei;
3734
3735 c = cmd_alloc(h);
3736
3737
3738 memset(scsi3addr, 0, sizeof(scsi3addr));
3739 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3740 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3741 rc = -EAGAIN;
3742 goto out;
3743 }
3744 if (extended_response)
3745 c->Request.CDB[1] = extended_response;
3746 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3747 NO_TIMEOUT);
3748 if (rc)
3749 goto out;
3750 ei = c->err_info;
3751 if (ei->CommandStatus != 0 &&
3752 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3753 hpsa_scsi_interpret_error(h, c);
3754 rc = -EIO;
3755 } else {
3756 struct ReportLUNdata *rld = buf;
3757
3758 if (rld->extended_response_flag != extended_response) {
3759 if (!h->legacy_board) {
3760 dev_err(&h->pdev->dev,
3761 "report luns requested format %u, got %u\n",
3762 extended_response,
3763 rld->extended_response_flag);
3764 rc = -EINVAL;
3765 } else
3766 rc = -EOPNOTSUPP;
3767 }
3768 }
3769out:
3770 cmd_free(h, c);
3771 return rc;
3772}
3773
3774static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3775 struct ReportExtendedLUNdata *buf, int bufsize)
3776{
3777 int rc;
3778 struct ReportLUNdata *lbuf;
3779
3780 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3781 HPSA_REPORT_PHYS_EXTENDED);
3782 if (!rc || rc != -EOPNOTSUPP)
3783 return rc;
3784
3785
3786 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3787 if (!lbuf)
3788 return -ENOMEM;
3789
3790 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3791 if (!rc) {
3792 int i;
3793 u32 nphys;
3794
3795
3796 memcpy(buf, lbuf, 8);
3797 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3798 for (i = 0; i < nphys; i++)
3799 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3800 }
3801 kfree(lbuf);
3802 return rc;
3803}
3804
3805static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3806 struct ReportLUNdata *buf, int bufsize)
3807{
3808 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3809}
3810
3811static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3812 int bus, int target, int lun)
3813{
3814 device->bus = bus;
3815 device->target = target;
3816 device->lun = lun;
3817}
3818
3819
3820static int hpsa_get_volume_status(struct ctlr_info *h,
3821 unsigned char scsi3addr[])
3822{
3823 int rc;
3824 int status;
3825 int size;
3826 unsigned char *buf;
3827
3828 buf = kzalloc(64, GFP_KERNEL);
3829 if (!buf)
3830 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3831
3832
3833 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3834 goto exit_failed;
3835
3836
3837 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3838 buf, HPSA_VPD_HEADER_SZ);
3839 if (rc != 0)
3840 goto exit_failed;
3841 size = buf[3];
3842
3843
3844 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3845 buf, size + HPSA_VPD_HEADER_SZ);
3846 if (rc != 0)
3847 goto exit_failed;
3848 status = buf[4];
3849
3850 kfree(buf);
3851 return status;
3852exit_failed:
3853 kfree(buf);
3854 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3855}
3856
3857
3858
3859
3860
3861
3862
3863
3864static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3865 unsigned char scsi3addr[])
3866{
3867 struct CommandList *c;
3868 unsigned char *sense;
3869 u8 sense_key, asc, ascq;
3870 int sense_len;
3871 int rc, ldstat = 0;
3872 u16 cmd_status;
3873 u8 scsi_status;
3874#define ASC_LUN_NOT_READY 0x04
3875#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3876#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3877
3878 c = cmd_alloc(h);
3879
3880 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3881 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3882 NO_TIMEOUT);
3883 if (rc) {
3884 cmd_free(h, c);
3885 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3886 }
3887 sense = c->err_info->SenseInfo;
3888 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3889 sense_len = sizeof(c->err_info->SenseInfo);
3890 else
3891 sense_len = c->err_info->SenseLen;
3892 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3893 cmd_status = c->err_info->CommandStatus;
3894 scsi_status = c->err_info->ScsiStatus;
3895 cmd_free(h, c);
3896
3897
3898 ldstat = hpsa_get_volume_status(h, scsi3addr);
3899
3900
3901 switch (ldstat) {
3902 case HPSA_LV_FAILED:
3903 case HPSA_LV_UNDERGOING_ERASE:
3904 case HPSA_LV_NOT_AVAILABLE:
3905 case HPSA_LV_UNDERGOING_RPI:
3906 case HPSA_LV_PENDING_RPI:
3907 case HPSA_LV_ENCRYPTED_NO_KEY:
3908 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3909 case HPSA_LV_UNDERGOING_ENCRYPTION:
3910 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3911 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3912 return ldstat;
3913 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3914
3915
3916
3917 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3918 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3919 return ldstat;
3920 break;
3921 default:
3922 break;
3923 }
3924 return HPSA_LV_OK;
3925}
3926
3927static int hpsa_update_device_info(struct ctlr_info *h,
3928 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3929 unsigned char *is_OBDR_device)
3930{
3931
3932#define OBDR_SIG_OFFSET 43
3933#define OBDR_TAPE_SIG "$DR-10"
3934#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3935#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3936
3937 unsigned char *inq_buff;
3938 unsigned char *obdr_sig;
3939 int rc = 0;
3940
3941 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3942 if (!inq_buff) {
3943 rc = -ENOMEM;
3944 goto bail_out;
3945 }
3946
3947
3948 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3949 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3950 dev_err(&h->pdev->dev,
3951 "%s: inquiry failed, device will be skipped.\n",
3952 __func__);
3953 rc = HPSA_INQUIRY_FAILED;
3954 goto bail_out;
3955 }
3956
3957 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3958 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3959
3960 this_device->devtype = (inq_buff[0] & 0x1f);
3961 memcpy(this_device->scsi3addr, scsi3addr, 8);
3962 memcpy(this_device->vendor, &inq_buff[8],
3963 sizeof(this_device->vendor));
3964 memcpy(this_device->model, &inq_buff[16],
3965 sizeof(this_device->model));
3966 this_device->rev = inq_buff[2];
3967 memset(this_device->device_id, 0,
3968 sizeof(this_device->device_id));
3969 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3970 sizeof(this_device->device_id)) < 0) {
3971 dev_err(&h->pdev->dev,
3972 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3973 h->ctlr, __func__,
3974 h->scsi_host->host_no,
3975 this_device->bus, this_device->target,
3976 this_device->lun,
3977 scsi_device_type(this_device->devtype),
3978 this_device->model);
3979 rc = HPSA_LV_FAILED;
3980 goto bail_out;
3981 }
3982
3983 if ((this_device->devtype == TYPE_DISK ||
3984 this_device->devtype == TYPE_ZBC) &&
3985 is_logical_dev_addr_mode(scsi3addr)) {
3986 unsigned char volume_offline;
3987
3988 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3989 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3990 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3991 volume_offline = hpsa_volume_offline(h, scsi3addr);
3992 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3993 h->legacy_board) {
3994
3995
3996
3997 dev_info(&h->pdev->dev,
3998 "C0:T%d:L%d Volume status not available, assuming online.\n",
3999 this_device->target, this_device->lun);
4000 volume_offline = 0;
4001 }
4002 this_device->volume_offline = volume_offline;
4003 if (volume_offline == HPSA_LV_FAILED) {
4004 rc = HPSA_LV_FAILED;
4005 dev_err(&h->pdev->dev,
4006 "%s: LV failed, device will be skipped.\n",
4007 __func__);
4008 goto bail_out;
4009 }
4010 } else {
4011 this_device->raid_level = RAID_UNKNOWN;
4012 this_device->offload_config = 0;
4013 this_device->offload_enabled = 0;
4014 this_device->offload_to_be_enabled = 0;
4015 this_device->hba_ioaccel_enabled = 0;
4016 this_device->volume_offline = 0;
4017 this_device->queue_depth = h->nr_cmds;
4018 }
4019
4020 if (this_device->external)
4021 this_device->queue_depth = EXTERNAL_QD;
4022
4023 if (is_OBDR_device) {
4024
4025
4026
4027 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4028 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4029 strncmp(obdr_sig, OBDR_TAPE_SIG,
4030 OBDR_SIG_LEN) == 0);
4031 }
4032 kfree(inq_buff);
4033 return 0;
4034
4035bail_out:
4036 kfree(inq_buff);
4037 return rc;
4038}
4039
4040
4041
4042
4043
4044
4045
4046static void figure_bus_target_lun(struct ctlr_info *h,
4047 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4048{
4049 u32 lunid = get_unaligned_le32(lunaddrbytes);
4050
4051 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4052
4053 if (is_hba_lunid(lunaddrbytes)) {
4054 int bus = HPSA_HBA_BUS;
4055
4056 if (!device->rev)
4057 bus = HPSA_LEGACY_HBA_BUS;
4058 hpsa_set_bus_target_lun(device,
4059 bus, 0, lunid & 0x3fff);
4060 } else
4061
4062 hpsa_set_bus_target_lun(device,
4063 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4064 return;
4065 }
4066
4067 if (device->external) {
4068 hpsa_set_bus_target_lun(device,
4069 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4070 lunid & 0x00ff);
4071 return;
4072 }
4073 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4074 0, lunid & 0x3fff);
4075}
4076
4077static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4078 int i, int nphysicals, int nlocal_logicals)
4079{
4080
4081
4082
4083 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4084
4085 if (i == raid_ctlr_position)
4086 return 0;
4087
4088 if (i < logicals_start)
4089 return 0;
4090
4091
4092 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4093 return 0;
4094
4095 return 1;
4096}
4097
4098
4099
4100
4101
4102
4103
4104static int hpsa_gather_lun_info(struct ctlr_info *h,
4105 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4106 struct ReportLUNdata *logdev, u32 *nlogicals)
4107{
4108 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4109 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4110 return -1;
4111 }
4112 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4113 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4114 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4115 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4116 *nphysicals = HPSA_MAX_PHYS_LUN;
4117 }
4118 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4119 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4120 return -1;
4121 }
4122 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4123
4124 if (*nlogicals > HPSA_MAX_LUN) {
4125 dev_warn(&h->pdev->dev,
4126 "maximum logical LUNs (%d) exceeded. "
4127 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4128 *nlogicals - HPSA_MAX_LUN);
4129 *nlogicals = HPSA_MAX_LUN;
4130 }
4131 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4132 dev_warn(&h->pdev->dev,
4133 "maximum logical + physical LUNs (%d) exceeded. "
4134 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4135 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4136 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4137 }
4138 return 0;
4139}
4140
4141static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4142 int i, int nphysicals, int nlogicals,
4143 struct ReportExtendedLUNdata *physdev_list,
4144 struct ReportLUNdata *logdev_list)
4145{
4146
4147
4148
4149
4150
4151 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4152 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4153
4154 if (i == raid_ctlr_position)
4155 return RAID_CTLR_LUNID;
4156
4157 if (i < logicals_start)
4158 return &physdev_list->LUN[i -
4159 (raid_ctlr_position == 0)].lunid[0];
4160
4161 if (i < last_device)
4162 return &logdev_list->LUN[i - nphysicals -
4163 (raid_ctlr_position == 0)][0];
4164 BUG();
4165 return NULL;
4166}
4167
4168
4169static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4170 struct hpsa_scsi_dev_t *dev,
4171 struct ReportExtendedLUNdata *rlep, int rle_index,
4172 struct bmic_identify_physical_device *id_phys)
4173{
4174 int rc;
4175 struct ext_report_lun_entry *rle;
4176
4177 rle = &rlep->LUN[rle_index];
4178
4179 dev->ioaccel_handle = rle->ioaccel_handle;
4180 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4181 dev->hba_ioaccel_enabled = 1;
4182 memset(id_phys, 0, sizeof(*id_phys));
4183 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4184 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4185 sizeof(*id_phys));
4186 if (!rc)
4187
4188#define DRIVE_CMDS_RESERVED_FOR_FW 2
4189#define DRIVE_QUEUE_DEPTH 7
4190 dev->queue_depth =
4191 le16_to_cpu(id_phys->current_queue_depth_limit) -
4192 DRIVE_CMDS_RESERVED_FOR_FW;
4193 else
4194 dev->queue_depth = DRIVE_QUEUE_DEPTH;
4195}
4196
4197static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4198 struct ReportExtendedLUNdata *rlep, int rle_index,
4199 struct bmic_identify_physical_device *id_phys)
4200{
4201 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4202
4203 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4204 this_device->hba_ioaccel_enabled = 1;
4205
4206 memcpy(&this_device->active_path_index,
4207 &id_phys->active_path_number,
4208 sizeof(this_device->active_path_index));
4209 memcpy(&this_device->path_map,
4210 &id_phys->redundant_path_present_map,
4211 sizeof(this_device->path_map));
4212 memcpy(&this_device->box,
4213 &id_phys->alternate_paths_phys_box_on_port,
4214 sizeof(this_device->box));
4215 memcpy(&this_device->phys_connector,
4216 &id_phys->alternate_paths_phys_connector,
4217 sizeof(this_device->phys_connector));
4218 memcpy(&this_device->bay,
4219 &id_phys->phys_bay_in_box,
4220 sizeof(this_device->bay));
4221}
4222
4223
4224static int hpsa_set_local_logical_count(struct ctlr_info *h,
4225 struct bmic_identify_controller *id_ctlr,
4226 u32 *nlocals)
4227{
4228 int rc;
4229
4230 if (!id_ctlr) {
4231 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4232 __func__);
4233 return -ENOMEM;
4234 }
4235 memset(id_ctlr, 0, sizeof(*id_ctlr));
4236 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4237 if (!rc)
4238 if (id_ctlr->configured_logical_drive_count < 255)
4239 *nlocals = id_ctlr->configured_logical_drive_count;
4240 else
4241 *nlocals = le16_to_cpu(
4242 id_ctlr->extended_logical_unit_count);
4243 else
4244 *nlocals = -1;
4245 return rc;
4246}
4247
4248static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4249{
4250 struct bmic_identify_physical_device *id_phys;
4251 bool is_spare = false;
4252 int rc;
4253
4254 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4255 if (!id_phys)
4256 return false;
4257
4258 rc = hpsa_bmic_id_physical_device(h,
4259 lunaddrbytes,
4260 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4261 id_phys, sizeof(*id_phys));
4262 if (rc == 0)
4263 is_spare = (id_phys->more_flags >> 6) & 0x01;
4264
4265 kfree(id_phys);
4266 return is_spare;
4267}
4268
4269#define RPL_DEV_FLAG_NON_DISK 0x1
4270#define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4271#define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4272
4273#define BMIC_DEVICE_TYPE_ENCLOSURE 6
4274
4275static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4276 struct ext_report_lun_entry *rle)
4277{
4278 u8 device_flags;
4279 u8 device_type;
4280
4281 if (!MASKED_DEVICE(lunaddrbytes))
4282 return false;
4283
4284 device_flags = rle->device_flags;
4285 device_type = rle->device_type;
4286
4287 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4288 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4289 return false;
4290 return true;
4291 }
4292
4293 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4294 return false;
4295
4296 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4297 return false;
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307 if (hpsa_is_disk_spare(h, lunaddrbytes))
4308 return true;
4309
4310 return false;
4311}
4312
4313static void hpsa_update_scsi_devices(struct ctlr_info *h)
4314{
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325 struct ReportExtendedLUNdata *physdev_list = NULL;
4326 struct ReportLUNdata *logdev_list = NULL;
4327 struct bmic_identify_physical_device *id_phys = NULL;
4328 struct bmic_identify_controller *id_ctlr = NULL;
4329 u32 nphysicals = 0;
4330 u32 nlogicals = 0;
4331 u32 nlocal_logicals = 0;
4332 u32 ndev_allocated = 0;
4333 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4334 int ncurrent = 0;
4335 int i, n_ext_target_devs, ndevs_to_allocate;
4336 int raid_ctlr_position;
4337 bool physical_device;
4338 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4339
4340 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4341 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4342 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4343 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4344 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4345 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4346
4347 if (!currentsd || !physdev_list || !logdev_list ||
4348 !tmpdevice || !id_phys || !id_ctlr) {
4349 dev_err(&h->pdev->dev, "out of memory\n");
4350 goto out;
4351 }
4352 memset(lunzerobits, 0, sizeof(lunzerobits));
4353
4354 h->drv_req_rescan = 0;
4355
4356 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4357 logdev_list, &nlogicals)) {
4358 h->drv_req_rescan = 1;
4359 goto out;
4360 }
4361
4362
4363 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4364 dev_warn(&h->pdev->dev,
4365 "%s: Can't determine number of local logical devices.\n",
4366 __func__);
4367 }
4368
4369
4370
4371
4372
4373 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4374
4375 hpsa_ext_ctrl_present(h, physdev_list);
4376
4377
4378 for (i = 0; i < ndevs_to_allocate; i++) {
4379 if (i >= HPSA_MAX_DEVICES) {
4380 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4381 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4382 ndevs_to_allocate - HPSA_MAX_DEVICES);
4383 break;
4384 }
4385
4386 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4387 if (!currentsd[i]) {
4388 h->drv_req_rescan = 1;
4389 goto out;
4390 }
4391 ndev_allocated++;
4392 }
4393
4394 if (is_scsi_rev_5(h))
4395 raid_ctlr_position = 0;
4396 else
4397 raid_ctlr_position = nphysicals + nlogicals;
4398
4399
4400 n_ext_target_devs = 0;
4401 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4402 u8 *lunaddrbytes, is_OBDR = 0;
4403 int rc = 0;
4404 int phys_dev_index = i - (raid_ctlr_position == 0);
4405 bool skip_device = false;
4406
4407 memset(tmpdevice, 0, sizeof(*tmpdevice));
4408
4409 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4410
4411
4412 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4413 i, nphysicals, nlogicals, physdev_list, logdev_list);
4414
4415
4416 tmpdevice->external =
4417 figure_external_status(h, raid_ctlr_position, i,
4418 nphysicals, nlocal_logicals);
4419
4420
4421
4422
4423 if (!tmpdevice->external && physical_device) {
4424 skip_device = hpsa_skip_device(h, lunaddrbytes,
4425 &physdev_list->LUN[phys_dev_index]);
4426 if (skip_device)
4427 continue;
4428 }
4429
4430
4431 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4432 &is_OBDR);
4433 if (rc == -ENOMEM) {
4434 dev_warn(&h->pdev->dev,
4435 "Out of memory, rescan deferred.\n");
4436 h->drv_req_rescan = 1;
4437 goto out;
4438 }
4439 if (rc) {
4440 h->drv_req_rescan = 1;
4441 continue;
4442 }
4443
4444 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4445 this_device = currentsd[ncurrent];
4446
4447 *this_device = *tmpdevice;
4448 this_device->physical_device = physical_device;
4449
4450
4451
4452
4453
4454 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4455 this_device->expose_device = 0;
4456 else
4457 this_device->expose_device = 1;
4458
4459
4460
4461
4462
4463 if (this_device->physical_device && this_device->expose_device)
4464 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4465
4466 switch (this_device->devtype) {
4467 case TYPE_ROM:
4468
4469
4470
4471
4472
4473
4474
4475 if (is_OBDR)
4476 ncurrent++;
4477 break;
4478 case TYPE_DISK:
4479 case TYPE_ZBC:
4480 if (this_device->physical_device) {
4481
4482
4483 this_device->offload_enabled = 0;
4484 hpsa_get_ioaccel_drive_info(h, this_device,
4485 physdev_list, phys_dev_index, id_phys);
4486 hpsa_get_path_info(this_device,
4487 physdev_list, phys_dev_index, id_phys);
4488 }
4489 ncurrent++;
4490 break;
4491 case TYPE_TAPE:
4492 case TYPE_MEDIUM_CHANGER:
4493 ncurrent++;
4494 break;
4495 case TYPE_ENCLOSURE:
4496 if (!this_device->external)
4497 hpsa_get_enclosure_info(h, lunaddrbytes,
4498 physdev_list, phys_dev_index,
4499 this_device);
4500 ncurrent++;
4501 break;
4502 case TYPE_RAID:
4503
4504
4505
4506
4507
4508 if (!is_hba_lunid(lunaddrbytes))
4509 break;
4510 ncurrent++;
4511 break;
4512 default:
4513 break;
4514 }
4515 if (ncurrent >= HPSA_MAX_DEVICES)
4516 break;
4517 }
4518
4519 if (h->sas_host == NULL) {
4520 int rc = 0;
4521
4522 rc = hpsa_add_sas_host(h);
4523 if (rc) {
4524 dev_warn(&h->pdev->dev,
4525 "Could not add sas host %d\n", rc);
4526 goto out;
4527 }
4528 }
4529
4530 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4531out:
4532 kfree(tmpdevice);
4533 for (i = 0; i < ndev_allocated; i++)
4534 kfree(currentsd[i]);
4535 kfree(currentsd);
4536 kfree(physdev_list);
4537 kfree(logdev_list);
4538 kfree(id_ctlr);
4539 kfree(id_phys);
4540}
4541
4542static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4543 struct scatterlist *sg)
4544{
4545 u64 addr64 = (u64) sg_dma_address(sg);
4546 unsigned int len = sg_dma_len(sg);
4547
4548 desc->Addr = cpu_to_le64(addr64);
4549 desc->Len = cpu_to_le32(len);
4550 desc->Ext = 0;
4551}
4552
4553
4554
4555
4556
4557
4558static int hpsa_scatter_gather(struct ctlr_info *h,
4559 struct CommandList *cp,
4560 struct scsi_cmnd *cmd)
4561{
4562 struct scatterlist *sg;
4563 int use_sg, i, sg_limit, chained, last_sg;
4564 struct SGDescriptor *curr_sg;
4565
4566 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4567
4568 use_sg = scsi_dma_map(cmd);
4569 if (use_sg < 0)
4570 return use_sg;
4571
4572 if (!use_sg)
4573 goto sglist_finished;
4574
4575
4576
4577
4578
4579
4580
4581
4582 curr_sg = cp->SG;
4583 chained = use_sg > h->max_cmd_sg_entries;
4584 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4585 last_sg = scsi_sg_count(cmd) - 1;
4586 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4587 hpsa_set_sg_descriptor(curr_sg, sg);
4588 curr_sg++;
4589 }
4590
4591 if (chained) {
4592
4593
4594
4595
4596
4597
4598 curr_sg = h->cmd_sg_list[cp->cmdindex];
4599 sg_limit = use_sg - sg_limit;
4600 for_each_sg(sg, sg, sg_limit, i) {
4601 hpsa_set_sg_descriptor(curr_sg, sg);
4602 curr_sg++;
4603 }
4604 }
4605
4606
4607 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4608
4609 if (use_sg + chained > h->maxSG)
4610 h->maxSG = use_sg + chained;
4611
4612 if (chained) {
4613 cp->Header.SGList = h->max_cmd_sg_entries;
4614 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4615 if (hpsa_map_sg_chain_block(h, cp)) {
4616 scsi_dma_unmap(cmd);
4617 return -1;
4618 }
4619 return 0;
4620 }
4621
4622sglist_finished:
4623
4624 cp->Header.SGList = (u8) use_sg;
4625 cp->Header.SGTotal = cpu_to_le16(use_sg);
4626 return 0;
4627}
4628
4629static inline void warn_zero_length_transfer(struct ctlr_info *h,
4630 u8 *cdb, int cdb_len,
4631 const char *func)
4632{
4633 dev_warn(&h->pdev->dev,
4634 "%s: Blocking zero-length request: CDB:%*phN\n",
4635 func, cdb_len, cdb);
4636}
4637
4638#define IO_ACCEL_INELIGIBLE 1
4639
4640static bool is_zero_length_transfer(u8 *cdb)
4641{
4642 u32 block_cnt;
4643
4644
4645 switch (cdb[0]) {
4646 case READ_10:
4647 case WRITE_10:
4648 case VERIFY:
4649 case WRITE_VERIFY:
4650 block_cnt = get_unaligned_be16(&cdb[7]);
4651 break;
4652 case READ_12:
4653 case WRITE_12:
4654 case VERIFY_12:
4655 case WRITE_VERIFY_12:
4656 block_cnt = get_unaligned_be32(&cdb[6]);
4657 break;
4658 case READ_16:
4659 case WRITE_16:
4660 case VERIFY_16:
4661 block_cnt = get_unaligned_be32(&cdb[10]);
4662 break;
4663 default:
4664 return false;
4665 }
4666
4667 return block_cnt == 0;
4668}
4669
4670static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4671{
4672 int is_write = 0;
4673 u32 block;
4674 u32 block_cnt;
4675
4676
4677 switch (cdb[0]) {
4678 case WRITE_6:
4679 case WRITE_12:
4680 is_write = 1;
4681
4682 case READ_6:
4683 case READ_12:
4684 if (*cdb_len == 6) {
4685 block = (((cdb[1] & 0x1F) << 16) |
4686 (cdb[2] << 8) |
4687 cdb[3]);
4688 block_cnt = cdb[4];
4689 if (block_cnt == 0)
4690 block_cnt = 256;
4691 } else {
4692 BUG_ON(*cdb_len != 12);
4693 block = get_unaligned_be32(&cdb[2]);
4694 block_cnt = get_unaligned_be32(&cdb[6]);
4695 }
4696 if (block_cnt > 0xffff)
4697 return IO_ACCEL_INELIGIBLE;
4698
4699 cdb[0] = is_write ? WRITE_10 : READ_10;
4700 cdb[1] = 0;
4701 cdb[2] = (u8) (block >> 24);
4702 cdb[3] = (u8) (block >> 16);
4703 cdb[4] = (u8) (block >> 8);
4704 cdb[5] = (u8) (block);
4705 cdb[6] = 0;
4706 cdb[7] = (u8) (block_cnt >> 8);
4707 cdb[8] = (u8) (block_cnt);
4708 cdb[9] = 0;
4709 *cdb_len = 10;
4710 break;
4711 }
4712 return 0;
4713}
4714
4715static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4716 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4717 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4718{
4719 struct scsi_cmnd *cmd = c->scsi_cmd;
4720 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4721 unsigned int len;
4722 unsigned int total_len = 0;
4723 struct scatterlist *sg;
4724 u64 addr64;
4725 int use_sg, i;
4726 struct SGDescriptor *curr_sg;
4727 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4728
4729
4730 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4731 atomic_dec(&phys_disk->ioaccel_cmds_out);
4732 return IO_ACCEL_INELIGIBLE;
4733 }
4734
4735 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4736
4737 if (is_zero_length_transfer(cdb)) {
4738 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4739 atomic_dec(&phys_disk->ioaccel_cmds_out);
4740 return IO_ACCEL_INELIGIBLE;
4741 }
4742
4743 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4744 atomic_dec(&phys_disk->ioaccel_cmds_out);
4745 return IO_ACCEL_INELIGIBLE;
4746 }
4747
4748 c->cmd_type = CMD_IOACCEL1;
4749
4750
4751 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4752 (c->cmdindex * sizeof(*cp));
4753 BUG_ON(c->busaddr & 0x0000007F);
4754
4755 use_sg = scsi_dma_map(cmd);
4756 if (use_sg < 0) {
4757 atomic_dec(&phys_disk->ioaccel_cmds_out);
4758 return use_sg;
4759 }
4760
4761 if (use_sg) {
4762 curr_sg = cp->SG;
4763 scsi_for_each_sg(cmd, sg, use_sg, i) {
4764 addr64 = (u64) sg_dma_address(sg);
4765 len = sg_dma_len(sg);
4766 total_len += len;
4767 curr_sg->Addr = cpu_to_le64(addr64);
4768 curr_sg->Len = cpu_to_le32(len);
4769 curr_sg->Ext = cpu_to_le32(0);
4770 curr_sg++;
4771 }
4772 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4773
4774 switch (cmd->sc_data_direction) {
4775 case DMA_TO_DEVICE:
4776 control |= IOACCEL1_CONTROL_DATA_OUT;
4777 break;
4778 case DMA_FROM_DEVICE:
4779 control |= IOACCEL1_CONTROL_DATA_IN;
4780 break;
4781 case DMA_NONE:
4782 control |= IOACCEL1_CONTROL_NODATAXFER;
4783 break;
4784 default:
4785 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4786 cmd->sc_data_direction);
4787 BUG();
4788 break;
4789 }
4790 } else {
4791 control |= IOACCEL1_CONTROL_NODATAXFER;
4792 }
4793
4794 c->Header.SGList = use_sg;
4795
4796 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4797 cp->transfer_len = cpu_to_le32(total_len);
4798 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4799 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4800 cp->control = cpu_to_le32(control);
4801 memcpy(cp->CDB, cdb, cdb_len);
4802 memcpy(cp->CISS_LUN, scsi3addr, 8);
4803
4804 enqueue_cmd_and_start_io(h, c);
4805 return 0;
4806}
4807
4808
4809
4810
4811
4812static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4813 struct CommandList *c)
4814{
4815 struct scsi_cmnd *cmd = c->scsi_cmd;
4816 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4817
4818 if (!dev)
4819 return -1;
4820
4821 c->phys_disk = dev;
4822
4823 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4824 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4825}
4826
4827
4828
4829
4830static void set_encrypt_ioaccel2(struct ctlr_info *h,
4831 struct CommandList *c, struct io_accel2_cmd *cp)
4832{
4833 struct scsi_cmnd *cmd = c->scsi_cmd;
4834 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4835 struct raid_map_data *map = &dev->raid_map;
4836 u64 first_block;
4837
4838
4839 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4840 return;
4841
4842 cp->dekindex = map->dekindex;
4843
4844
4845 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4846
4847
4848
4849
4850
4851 switch (cmd->cmnd[0]) {
4852
4853 case READ_6:
4854 case WRITE_6:
4855 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4856 (cmd->cmnd[2] << 8) |
4857 cmd->cmnd[3]);
4858 break;
4859 case WRITE_10:
4860 case READ_10:
4861
4862 case WRITE_12:
4863 case READ_12:
4864 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4865 break;
4866 case WRITE_16:
4867 case READ_16:
4868 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4869 break;
4870 default:
4871 dev_err(&h->pdev->dev,
4872 "ERROR: %s: size (0x%x) not supported for encryption\n",
4873 __func__, cmd->cmnd[0]);
4874 BUG();
4875 break;
4876 }
4877
4878 if (le32_to_cpu(map->volume_blk_size) != 512)
4879 first_block = first_block *
4880 le32_to_cpu(map->volume_blk_size)/512;
4881
4882 cp->tweak_lower = cpu_to_le32(first_block);
4883 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4884}
4885
4886static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4887 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4888 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4889{
4890 struct scsi_cmnd *cmd = c->scsi_cmd;
4891 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4892 struct ioaccel2_sg_element *curr_sg;
4893 int use_sg, i;
4894 struct scatterlist *sg;
4895 u64 addr64;
4896 u32 len;
4897 u32 total_len = 0;
4898
4899 if (!cmd->device)
4900 return -1;
4901
4902 if (!cmd->device->hostdata)
4903 return -1;
4904
4905 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4906
4907 if (is_zero_length_transfer(cdb)) {
4908 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4909 atomic_dec(&phys_disk->ioaccel_cmds_out);
4910 return IO_ACCEL_INELIGIBLE;
4911 }
4912
4913 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4914 atomic_dec(&phys_disk->ioaccel_cmds_out);
4915 return IO_ACCEL_INELIGIBLE;
4916 }
4917
4918 c->cmd_type = CMD_IOACCEL2;
4919
4920 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4921 (c->cmdindex * sizeof(*cp));
4922 BUG_ON(c->busaddr & 0x0000007F);
4923
4924 memset(cp, 0, sizeof(*cp));
4925 cp->IU_type = IOACCEL2_IU_TYPE;
4926
4927 use_sg = scsi_dma_map(cmd);
4928 if (use_sg < 0) {
4929 atomic_dec(&phys_disk->ioaccel_cmds_out);
4930 return use_sg;
4931 }
4932
4933 if (use_sg) {
4934 curr_sg = cp->sg;
4935 if (use_sg > h->ioaccel_maxsg) {
4936 addr64 = le64_to_cpu(
4937 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4938 curr_sg->address = cpu_to_le64(addr64);
4939 curr_sg->length = 0;
4940 curr_sg->reserved[0] = 0;
4941 curr_sg->reserved[1] = 0;
4942 curr_sg->reserved[2] = 0;
4943 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4944
4945 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4946 }
4947 scsi_for_each_sg(cmd, sg, use_sg, i) {
4948 addr64 = (u64) sg_dma_address(sg);
4949 len = sg_dma_len(sg);
4950 total_len += len;
4951 curr_sg->address = cpu_to_le64(addr64);
4952 curr_sg->length = cpu_to_le32(len);
4953 curr_sg->reserved[0] = 0;
4954 curr_sg->reserved[1] = 0;
4955 curr_sg->reserved[2] = 0;
4956 curr_sg->chain_indicator = 0;
4957 curr_sg++;
4958 }
4959
4960
4961
4962
4963 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4964
4965 switch (cmd->sc_data_direction) {
4966 case DMA_TO_DEVICE:
4967 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4968 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4969 break;
4970 case DMA_FROM_DEVICE:
4971 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4972 cp->direction |= IOACCEL2_DIR_DATA_IN;
4973 break;
4974 case DMA_NONE:
4975 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4976 cp->direction |= IOACCEL2_DIR_NO_DATA;
4977 break;
4978 default:
4979 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4980 cmd->sc_data_direction);
4981 BUG();
4982 break;
4983 }
4984 } else {
4985 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4986 cp->direction |= IOACCEL2_DIR_NO_DATA;
4987 }
4988
4989
4990 set_encrypt_ioaccel2(h, c, cp);
4991
4992 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4993 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4994 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4995
4996 cp->data_len = cpu_to_le32(total_len);
4997 cp->err_ptr = cpu_to_le64(c->busaddr +
4998 offsetof(struct io_accel2_cmd, error_data));
4999 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5000
5001
5002 if (use_sg > h->ioaccel_maxsg) {
5003 cp->sg_count = 1;
5004 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5005 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5006 atomic_dec(&phys_disk->ioaccel_cmds_out);
5007 scsi_dma_unmap(cmd);
5008 return -1;
5009 }
5010 } else
5011 cp->sg_count = (u8) use_sg;
5012
5013 enqueue_cmd_and_start_io(h, c);
5014 return 0;
5015}
5016
5017
5018
5019
5020static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5021 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5022 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5023{
5024 if (!c->scsi_cmd->device)
5025 return -1;
5026
5027 if (!c->scsi_cmd->device->hostdata)
5028 return -1;
5029
5030
5031 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5032 phys_disk->queue_depth) {
5033 atomic_dec(&phys_disk->ioaccel_cmds_out);
5034 return IO_ACCEL_INELIGIBLE;
5035 }
5036 if (h->transMethod & CFGTBL_Trans_io_accel1)
5037 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5038 cdb, cdb_len, scsi3addr,
5039 phys_disk);
5040 else
5041 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5042 cdb, cdb_len, scsi3addr,
5043 phys_disk);
5044}
5045
5046static void raid_map_helper(struct raid_map_data *map,
5047 int offload_to_mirror, u32 *map_index, u32 *current_group)
5048{
5049 if (offload_to_mirror == 0) {
5050
5051 *map_index %= le16_to_cpu(map->data_disks_per_row);
5052 return;
5053 }
5054 do {
5055
5056 *current_group = *map_index /
5057 le16_to_cpu(map->data_disks_per_row);
5058 if (offload_to_mirror == *current_group)
5059 continue;
5060 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5061
5062 *map_index += le16_to_cpu(map->data_disks_per_row);
5063 (*current_group)++;
5064 } else {
5065
5066 *map_index %= le16_to_cpu(map->data_disks_per_row);
5067 *current_group = 0;
5068 }
5069 } while (offload_to_mirror != *current_group);
5070}
5071
5072
5073
5074
5075static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5076 struct CommandList *c)
5077{
5078 struct scsi_cmnd *cmd = c->scsi_cmd;
5079 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5080 struct raid_map_data *map = &dev->raid_map;
5081 struct raid_map_disk_data *dd = &map->data[0];
5082 int is_write = 0;
5083 u32 map_index;
5084 u64 first_block, last_block;
5085 u32 block_cnt;
5086 u32 blocks_per_row;
5087 u64 first_row, last_row;
5088 u32 first_row_offset, last_row_offset;
5089 u32 first_column, last_column;
5090 u64 r0_first_row, r0_last_row;
5091 u32 r5or6_blocks_per_row;
5092 u64 r5or6_first_row, r5or6_last_row;
5093 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5094 u32 r5or6_first_column, r5or6_last_column;
5095 u32 total_disks_per_row;
5096 u32 stripesize;
5097 u32 first_group, last_group, current_group;
5098 u32 map_row;
5099 u32 disk_handle;
5100 u64 disk_block;
5101 u32 disk_block_cnt;
5102 u8 cdb[16];
5103 u8 cdb_len;
5104 u16 strip_size;
5105#if BITS_PER_LONG == 32
5106 u64 tmpdiv;
5107#endif
5108 int offload_to_mirror;
5109
5110 if (!dev)
5111 return -1;
5112
5113
5114 switch (cmd->cmnd[0]) {
5115 case WRITE_6:
5116 is_write = 1;
5117
5118 case READ_6:
5119 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5120 (cmd->cmnd[2] << 8) |
5121 cmd->cmnd[3]);
5122 block_cnt = cmd->cmnd[4];
5123 if (block_cnt == 0)
5124 block_cnt = 256;
5125 break;
5126 case WRITE_10:
5127 is_write = 1;
5128
5129 case READ_10:
5130 first_block =
5131 (((u64) cmd->cmnd[2]) << 24) |
5132 (((u64) cmd->cmnd[3]) << 16) |
5133 (((u64) cmd->cmnd[4]) << 8) |
5134 cmd->cmnd[5];
5135 block_cnt =
5136 (((u32) cmd->cmnd[7]) << 8) |
5137 cmd->cmnd[8];
5138 break;
5139 case WRITE_12:
5140 is_write = 1;
5141
5142 case READ_12:
5143 first_block =
5144 (((u64) cmd->cmnd[2]) << 24) |
5145 (((u64) cmd->cmnd[3]) << 16) |
5146 (((u64) cmd->cmnd[4]) << 8) |
5147 cmd->cmnd[5];
5148 block_cnt =
5149 (((u32) cmd->cmnd[6]) << 24) |
5150 (((u32) cmd->cmnd[7]) << 16) |
5151 (((u32) cmd->cmnd[8]) << 8) |
5152 cmd->cmnd[9];
5153 break;
5154 case WRITE_16:
5155 is_write = 1;
5156
5157 case READ_16:
5158 first_block =
5159 (((u64) cmd->cmnd[2]) << 56) |
5160 (((u64) cmd->cmnd[3]) << 48) |
5161 (((u64) cmd->cmnd[4]) << 40) |
5162 (((u64) cmd->cmnd[5]) << 32) |
5163 (((u64) cmd->cmnd[6]) << 24) |
5164 (((u64) cmd->cmnd[7]) << 16) |
5165 (((u64) cmd->cmnd[8]) << 8) |
5166 cmd->cmnd[9];
5167 block_cnt =
5168 (((u32) cmd->cmnd[10]) << 24) |
5169 (((u32) cmd->cmnd[11]) << 16) |
5170 (((u32) cmd->cmnd[12]) << 8) |
5171 cmd->cmnd[13];
5172 break;
5173 default:
5174 return IO_ACCEL_INELIGIBLE;
5175 }
5176 last_block = first_block + block_cnt - 1;
5177
5178
5179 if (is_write && dev->raid_level != 0)
5180 return IO_ACCEL_INELIGIBLE;
5181
5182
5183 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5184 last_block < first_block)
5185 return IO_ACCEL_INELIGIBLE;
5186
5187
5188 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5189 le16_to_cpu(map->strip_size);
5190 strip_size = le16_to_cpu(map->strip_size);
5191#if BITS_PER_LONG == 32
5192 tmpdiv = first_block;
5193 (void) do_div(tmpdiv, blocks_per_row);
5194 first_row = tmpdiv;
5195 tmpdiv = last_block;
5196 (void) do_div(tmpdiv, blocks_per_row);
5197 last_row = tmpdiv;
5198 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5199 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5200 tmpdiv = first_row_offset;
5201 (void) do_div(tmpdiv, strip_size);
5202 first_column = tmpdiv;
5203 tmpdiv = last_row_offset;
5204 (void) do_div(tmpdiv, strip_size);
5205 last_column = tmpdiv;
5206#else
5207 first_row = first_block / blocks_per_row;
5208 last_row = last_block / blocks_per_row;
5209 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5210 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5211 first_column = first_row_offset / strip_size;
5212 last_column = last_row_offset / strip_size;
5213#endif
5214
5215
5216 if ((first_row != last_row) || (first_column != last_column))
5217 return IO_ACCEL_INELIGIBLE;
5218
5219
5220 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5221 le16_to_cpu(map->metadata_disks_per_row);
5222 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5223 le16_to_cpu(map->row_cnt);
5224 map_index = (map_row * total_disks_per_row) + first_column;
5225
5226 switch (dev->raid_level) {
5227 case HPSA_RAID_0:
5228 break;
5229 case HPSA_RAID_1:
5230
5231
5232
5233
5234 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5235 if (dev->offload_to_mirror)
5236 map_index += le16_to_cpu(map->data_disks_per_row);
5237 dev->offload_to_mirror = !dev->offload_to_mirror;
5238 break;
5239 case HPSA_RAID_ADM:
5240
5241
5242
5243 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5244
5245 offload_to_mirror = dev->offload_to_mirror;
5246 raid_map_helper(map, offload_to_mirror,
5247 &map_index, ¤t_group);
5248
5249 offload_to_mirror =
5250 (offload_to_mirror >=
5251 le16_to_cpu(map->layout_map_count) - 1)
5252 ? 0 : offload_to_mirror + 1;
5253 dev->offload_to_mirror = offload_to_mirror;
5254
5255
5256
5257
5258 break;
5259 case HPSA_RAID_5:
5260 case HPSA_RAID_6:
5261 if (le16_to_cpu(map->layout_map_count) <= 1)
5262 break;
5263
5264
5265 r5or6_blocks_per_row =
5266 le16_to_cpu(map->strip_size) *
5267 le16_to_cpu(map->data_disks_per_row);
5268 BUG_ON(r5or6_blocks_per_row == 0);
5269 stripesize = r5or6_blocks_per_row *
5270 le16_to_cpu(map->layout_map_count);
5271#if BITS_PER_LONG == 32
5272 tmpdiv = first_block;
5273 first_group = do_div(tmpdiv, stripesize);
5274 tmpdiv = first_group;
5275 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5276 first_group = tmpdiv;
5277 tmpdiv = last_block;
5278 last_group = do_div(tmpdiv, stripesize);
5279 tmpdiv = last_group;
5280 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5281 last_group = tmpdiv;
5282#else
5283 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5284 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5285#endif
5286 if (first_group != last_group)
5287 return IO_ACCEL_INELIGIBLE;
5288
5289
5290#if BITS_PER_LONG == 32
5291 tmpdiv = first_block;
5292 (void) do_div(tmpdiv, stripesize);
5293 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5294 tmpdiv = last_block;
5295 (void) do_div(tmpdiv, stripesize);
5296 r5or6_last_row = r0_last_row = tmpdiv;
5297#else
5298 first_row = r5or6_first_row = r0_first_row =
5299 first_block / stripesize;
5300 r5or6_last_row = r0_last_row = last_block / stripesize;
5301#endif
5302 if (r5or6_first_row != r5or6_last_row)
5303 return IO_ACCEL_INELIGIBLE;
5304
5305
5306
5307#if BITS_PER_LONG == 32
5308 tmpdiv = first_block;
5309 first_row_offset = do_div(tmpdiv, stripesize);
5310 tmpdiv = first_row_offset;
5311 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5312 r5or6_first_row_offset = first_row_offset;
5313 tmpdiv = last_block;
5314 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5315 tmpdiv = r5or6_last_row_offset;
5316 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5317 tmpdiv = r5or6_first_row_offset;
5318 (void) do_div(tmpdiv, map->strip_size);
5319 first_column = r5or6_first_column = tmpdiv;
5320 tmpdiv = r5or6_last_row_offset;
5321 (void) do_div(tmpdiv, map->strip_size);
5322 r5or6_last_column = tmpdiv;
5323#else
5324 first_row_offset = r5or6_first_row_offset =
5325 (u32)((first_block % stripesize) %
5326 r5or6_blocks_per_row);
5327
5328 r5or6_last_row_offset =
5329 (u32)((last_block % stripesize) %
5330 r5or6_blocks_per_row);
5331
5332 first_column = r5or6_first_column =
5333 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5334 r5or6_last_column =
5335 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5336#endif
5337 if (r5or6_first_column != r5or6_last_column)
5338 return IO_ACCEL_INELIGIBLE;
5339
5340
5341 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5342 le16_to_cpu(map->row_cnt);
5343
5344 map_index = (first_group *
5345 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5346 (map_row * total_disks_per_row) + first_column;
5347 break;
5348 default:
5349 return IO_ACCEL_INELIGIBLE;
5350 }
5351
5352 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5353 return IO_ACCEL_INELIGIBLE;
5354
5355 c->phys_disk = dev->phys_disk[map_index];
5356 if (!c->phys_disk)
5357 return IO_ACCEL_INELIGIBLE;
5358
5359 disk_handle = dd[map_index].ioaccel_handle;
5360 disk_block = le64_to_cpu(map->disk_starting_blk) +
5361 first_row * le16_to_cpu(map->strip_size) +
5362 (first_row_offset - first_column *
5363 le16_to_cpu(map->strip_size));
5364 disk_block_cnt = block_cnt;
5365
5366
5367 if (map->phys_blk_shift) {
5368 disk_block <<= map->phys_blk_shift;
5369 disk_block_cnt <<= map->phys_blk_shift;
5370 }
5371 BUG_ON(disk_block_cnt > 0xffff);
5372
5373
5374 if (disk_block > 0xffffffff) {
5375 cdb[0] = is_write ? WRITE_16 : READ_16;
5376 cdb[1] = 0;
5377 cdb[2] = (u8) (disk_block >> 56);
5378 cdb[3] = (u8) (disk_block >> 48);
5379 cdb[4] = (u8) (disk_block >> 40);
5380 cdb[5] = (u8) (disk_block >> 32);
5381 cdb[6] = (u8) (disk_block >> 24);
5382 cdb[7] = (u8) (disk_block >> 16);
5383 cdb[8] = (u8) (disk_block >> 8);
5384 cdb[9] = (u8) (disk_block);
5385 cdb[10] = (u8) (disk_block_cnt >> 24);
5386 cdb[11] = (u8) (disk_block_cnt >> 16);
5387 cdb[12] = (u8) (disk_block_cnt >> 8);
5388 cdb[13] = (u8) (disk_block_cnt);
5389 cdb[14] = 0;
5390 cdb[15] = 0;
5391 cdb_len = 16;
5392 } else {
5393 cdb[0] = is_write ? WRITE_10 : READ_10;
5394 cdb[1] = 0;
5395 cdb[2] = (u8) (disk_block >> 24);
5396 cdb[3] = (u8) (disk_block >> 16);
5397 cdb[4] = (u8) (disk_block >> 8);
5398 cdb[5] = (u8) (disk_block);
5399 cdb[6] = 0;
5400 cdb[7] = (u8) (disk_block_cnt >> 8);
5401 cdb[8] = (u8) (disk_block_cnt);
5402 cdb[9] = 0;
5403 cdb_len = 10;
5404 }
5405 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5406 dev->scsi3addr,
5407 dev->phys_disk[map_index]);
5408}
5409
5410
5411
5412
5413
5414
5415static int hpsa_ciss_submit(struct ctlr_info *h,
5416 struct CommandList *c, struct scsi_cmnd *cmd,
5417 unsigned char scsi3addr[])
5418{
5419 cmd->host_scribble = (unsigned char *) c;
5420 c->cmd_type = CMD_SCSI;
5421 c->scsi_cmd = cmd;
5422 c->Header.ReplyQueue = 0;
5423 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5424 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5425
5426
5427
5428 c->Request.Timeout = 0;
5429 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5430 c->Request.CDBLen = cmd->cmd_len;
5431 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5432 switch (cmd->sc_data_direction) {
5433 case DMA_TO_DEVICE:
5434 c->Request.type_attr_dir =
5435 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5436 break;
5437 case DMA_FROM_DEVICE:
5438 c->Request.type_attr_dir =
5439 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5440 break;
5441 case DMA_NONE:
5442 c->Request.type_attr_dir =
5443 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5444 break;
5445 case DMA_BIDIRECTIONAL:
5446
5447
5448
5449
5450
5451 c->Request.type_attr_dir =
5452 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5453
5454
5455
5456
5457
5458
5459
5460
5461 break;
5462
5463 default:
5464 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5465 cmd->sc_data_direction);
5466 BUG();
5467 break;
5468 }
5469
5470 if (hpsa_scatter_gather(h, c, cmd) < 0) {
5471 hpsa_cmd_resolve_and_free(h, c);
5472 return SCSI_MLQUEUE_HOST_BUSY;
5473 }
5474 enqueue_cmd_and_start_io(h, c);
5475
5476 return 0;
5477}
5478
5479static void hpsa_cmd_init(struct ctlr_info *h, int index,
5480 struct CommandList *c)
5481{
5482 dma_addr_t cmd_dma_handle, err_dma_handle;
5483
5484
5485 memset(c, 0, offsetof(struct CommandList, refcount));
5486 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5487 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5488 c->err_info = h->errinfo_pool + index;
5489 memset(c->err_info, 0, sizeof(*c->err_info));
5490 err_dma_handle = h->errinfo_pool_dhandle
5491 + index * sizeof(*c->err_info);
5492 c->cmdindex = index;
5493 c->busaddr = (u32) cmd_dma_handle;
5494 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5495 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5496 c->h = h;
5497 c->scsi_cmd = SCSI_CMD_IDLE;
5498}
5499
5500static void hpsa_preinitialize_commands(struct ctlr_info *h)
5501{
5502 int i;
5503
5504 for (i = 0; i < h->nr_cmds; i++) {
5505 struct CommandList *c = h->cmd_pool + i;
5506
5507 hpsa_cmd_init(h, i, c);
5508 atomic_set(&c->refcount, 0);
5509 }
5510}
5511
5512static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5513 struct CommandList *c)
5514{
5515 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5516
5517 BUG_ON(c->cmdindex != index);
5518
5519 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5520 memset(c->err_info, 0, sizeof(*c->err_info));
5521 c->busaddr = (u32) cmd_dma_handle;
5522}
5523
5524static int hpsa_ioaccel_submit(struct ctlr_info *h,
5525 struct CommandList *c, struct scsi_cmnd *cmd,
5526 unsigned char *scsi3addr)
5527{
5528 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5529 int rc = IO_ACCEL_INELIGIBLE;
5530
5531 if (!dev)
5532 return SCSI_MLQUEUE_HOST_BUSY;
5533
5534 cmd->host_scribble = (unsigned char *) c;
5535
5536 if (dev->offload_enabled) {
5537 hpsa_cmd_init(h, c->cmdindex, c);
5538 c->cmd_type = CMD_SCSI;
5539 c->scsi_cmd = cmd;
5540 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5541 if (rc < 0)
5542 rc = SCSI_MLQUEUE_HOST_BUSY;
5543 } else if (dev->hba_ioaccel_enabled) {
5544 hpsa_cmd_init(h, c->cmdindex, c);
5545 c->cmd_type = CMD_SCSI;
5546 c->scsi_cmd = cmd;
5547 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5548 if (rc < 0)
5549 rc = SCSI_MLQUEUE_HOST_BUSY;
5550 }
5551 return rc;
5552}
5553
5554static void hpsa_command_resubmit_worker(struct work_struct *work)
5555{
5556 struct scsi_cmnd *cmd;
5557 struct hpsa_scsi_dev_t *dev;
5558 struct CommandList *c = container_of(work, struct CommandList, work);
5559
5560 cmd = c->scsi_cmd;
5561 dev = cmd->device->hostdata;
5562 if (!dev) {
5563 cmd->result = DID_NO_CONNECT << 16;
5564 return hpsa_cmd_free_and_done(c->h, c, cmd);
5565 }
5566 if (c->reset_pending)
5567 return hpsa_cmd_free_and_done(c->h, c, cmd);
5568 if (c->cmd_type == CMD_IOACCEL2) {
5569 struct ctlr_info *h = c->h;
5570 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5571 int rc;
5572
5573 if (c2->error_data.serv_response ==
5574 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5575 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5576 if (rc == 0)
5577 return;
5578 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5579
5580
5581
5582
5583
5584 cmd->result = DID_IMM_RETRY << 16;
5585 return hpsa_cmd_free_and_done(h, c, cmd);
5586 }
5587
5588 }
5589 }
5590 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5591 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5592
5593
5594
5595
5596
5597
5598
5599
5600 cmd->result = DID_IMM_RETRY << 16;
5601 cmd->scsi_done(cmd);
5602 }
5603}
5604
5605
5606static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5607{
5608 struct ctlr_info *h;
5609 struct hpsa_scsi_dev_t *dev;
5610 unsigned char scsi3addr[8];
5611 struct CommandList *c;
5612 int rc = 0;
5613
5614
5615 h = sdev_to_hba(cmd->device);
5616
5617 BUG_ON(cmd->request->tag < 0);
5618
5619 dev = cmd->device->hostdata;
5620 if (!dev) {
5621 cmd->result = DID_NO_CONNECT << 16;
5622 cmd->scsi_done(cmd);
5623 return 0;
5624 }
5625
5626 if (dev->removed) {
5627 cmd->result = DID_NO_CONNECT << 16;
5628 cmd->scsi_done(cmd);
5629 return 0;
5630 }
5631
5632 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5633
5634 if (unlikely(lockup_detected(h))) {
5635 cmd->result = DID_NO_CONNECT << 16;
5636 cmd->scsi_done(cmd);
5637 return 0;
5638 }
5639 c = cmd_tagged_alloc(h, cmd);
5640
5641
5642
5643
5644
5645 if (likely(cmd->retries == 0 &&
5646 !blk_rq_is_passthrough(cmd->request) &&
5647 h->acciopath_status)) {
5648 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5649 if (rc == 0)
5650 return 0;
5651 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5652 hpsa_cmd_resolve_and_free(h, c);
5653 return SCSI_MLQUEUE_HOST_BUSY;
5654 }
5655 }
5656 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5657}
5658
5659static void hpsa_scan_complete(struct ctlr_info *h)
5660{
5661 unsigned long flags;
5662
5663 spin_lock_irqsave(&h->scan_lock, flags);
5664 h->scan_finished = 1;
5665 wake_up(&h->scan_wait_queue);
5666 spin_unlock_irqrestore(&h->scan_lock, flags);
5667}
5668
5669static void hpsa_scan_start(struct Scsi_Host *sh)
5670{
5671 struct ctlr_info *h = shost_to_hba(sh);
5672 unsigned long flags;
5673
5674
5675
5676
5677
5678
5679
5680 if (unlikely(lockup_detected(h)))
5681 return hpsa_scan_complete(h);
5682
5683
5684
5685
5686 spin_lock_irqsave(&h->scan_lock, flags);
5687 if (h->scan_waiting) {
5688 spin_unlock_irqrestore(&h->scan_lock, flags);
5689 return;
5690 }
5691
5692 spin_unlock_irqrestore(&h->scan_lock, flags);
5693
5694
5695 while (1) {
5696 spin_lock_irqsave(&h->scan_lock, flags);
5697 if (h->scan_finished)
5698 break;
5699 h->scan_waiting = 1;
5700 spin_unlock_irqrestore(&h->scan_lock, flags);
5701 wait_event(h->scan_wait_queue, h->scan_finished);
5702
5703
5704
5705
5706
5707 }
5708 h->scan_finished = 0;
5709 h->scan_waiting = 0;
5710 spin_unlock_irqrestore(&h->scan_lock, flags);
5711
5712 if (unlikely(lockup_detected(h)))
5713 return hpsa_scan_complete(h);
5714
5715
5716
5717
5718 spin_lock_irqsave(&h->reset_lock, flags);
5719 if (h->reset_in_progress) {
5720 h->drv_req_rescan = 1;
5721 spin_unlock_irqrestore(&h->reset_lock, flags);
5722 hpsa_scan_complete(h);
5723 return;
5724 }
5725 spin_unlock_irqrestore(&h->reset_lock, flags);
5726
5727 hpsa_update_scsi_devices(h);
5728
5729 hpsa_scan_complete(h);
5730}
5731
5732static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5733{
5734 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5735
5736 if (!logical_drive)
5737 return -ENODEV;
5738
5739 if (qdepth < 1)
5740 qdepth = 1;
5741 else if (qdepth > logical_drive->queue_depth)
5742 qdepth = logical_drive->queue_depth;
5743
5744 return scsi_change_queue_depth(sdev, qdepth);
5745}
5746
5747static int hpsa_scan_finished(struct Scsi_Host *sh,
5748 unsigned long elapsed_time)
5749{
5750 struct ctlr_info *h = shost_to_hba(sh);
5751 unsigned long flags;
5752 int finished;
5753
5754 spin_lock_irqsave(&h->scan_lock, flags);
5755 finished = h->scan_finished;
5756 spin_unlock_irqrestore(&h->scan_lock, flags);
5757 return finished;
5758}
5759
5760static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5761{
5762 struct Scsi_Host *sh;
5763
5764 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5765 if (sh == NULL) {
5766 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5767 return -ENOMEM;
5768 }
5769
5770 sh->io_port = 0;
5771 sh->n_io_port = 0;
5772 sh->this_id = -1;
5773 sh->max_channel = 3;
5774 sh->max_cmd_len = MAX_COMMAND_SIZE;
5775 sh->max_lun = HPSA_MAX_LUN;
5776 sh->max_id = HPSA_MAX_LUN;
5777 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5778 sh->cmd_per_lun = sh->can_queue;
5779 sh->sg_tablesize = h->maxsgentries;
5780 sh->transportt = hpsa_sas_transport_template;
5781 sh->hostdata[0] = (unsigned long) h;
5782 sh->irq = pci_irq_vector(h->pdev, 0);
5783 sh->unique_id = sh->irq;
5784
5785 h->scsi_host = sh;
5786 return 0;
5787}
5788
5789static int hpsa_scsi_add_host(struct ctlr_info *h)
5790{
5791 int rv;
5792
5793 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5794 if (rv) {
5795 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5796 return rv;
5797 }
5798 scsi_scan_host(h->scsi_host);
5799 return 0;
5800}
5801
5802
5803
5804
5805
5806
5807
5808static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5809{
5810 int idx = scmd->request->tag;
5811
5812 if (idx < 0)
5813 return idx;
5814
5815
5816 return idx += HPSA_NRESERVED_CMDS;
5817}
5818
5819
5820
5821
5822
5823static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5824 struct CommandList *c, unsigned char lunaddr[],
5825 int reply_queue)
5826{
5827 int rc;
5828
5829
5830 (void) fill_cmd(c, TEST_UNIT_READY, h,
5831 NULL, 0, 0, lunaddr, TYPE_CMD);
5832 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5833 if (rc)
5834 return rc;
5835
5836
5837
5838 if (c->err_info->CommandStatus == CMD_SUCCESS)
5839 return 0;
5840
5841
5842
5843
5844
5845
5846 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5847 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5848 (c->err_info->SenseInfo[2] == NO_SENSE ||
5849 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5850 return 0;
5851
5852 return 1;
5853}
5854
5855
5856
5857
5858
5859static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5860 struct CommandList *c,
5861 unsigned char lunaddr[], int reply_queue)
5862{
5863 int rc;
5864 int count = 0;
5865 int waittime = 1;
5866
5867
5868 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5869
5870
5871
5872
5873
5874 msleep(1000 * waittime);
5875
5876 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5877 if (!rc)
5878 break;
5879
5880
5881 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5882 waittime *= 2;
5883
5884 dev_warn(&h->pdev->dev,
5885 "waiting %d secs for device to become ready.\n",
5886 waittime);
5887 }
5888
5889 return rc;
5890}
5891
5892static int wait_for_device_to_become_ready(struct ctlr_info *h,
5893 unsigned char lunaddr[],
5894 int reply_queue)
5895{
5896 int first_queue;
5897 int last_queue;
5898 int rq;
5899 int rc = 0;
5900 struct CommandList *c;
5901
5902 c = cmd_alloc(h);
5903
5904
5905
5906
5907
5908
5909 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5910 first_queue = 0;
5911 last_queue = h->nreply_queues - 1;
5912 } else {
5913 first_queue = reply_queue;
5914 last_queue = reply_queue;
5915 }
5916
5917 for (rq = first_queue; rq <= last_queue; rq++) {
5918 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5919 if (rc)
5920 break;
5921 }
5922
5923 if (rc)
5924 dev_warn(&h->pdev->dev, "giving up on device.\n");
5925 else
5926 dev_warn(&h->pdev->dev, "device is ready.\n");
5927
5928 cmd_free(h, c);
5929 return rc;
5930}
5931
5932
5933
5934
5935static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5936{
5937 int rc = SUCCESS;
5938 struct ctlr_info *h;
5939 struct hpsa_scsi_dev_t *dev;
5940 u8 reset_type;
5941 char msg[48];
5942 unsigned long flags;
5943
5944
5945 h = sdev_to_hba(scsicmd->device);
5946 if (h == NULL)
5947 return FAILED;
5948
5949 spin_lock_irqsave(&h->reset_lock, flags);
5950 h->reset_in_progress = 1;
5951 spin_unlock_irqrestore(&h->reset_lock, flags);
5952
5953 if (lockup_detected(h)) {
5954 rc = FAILED;
5955 goto return_reset_status;
5956 }
5957
5958 dev = scsicmd->device->hostdata;
5959 if (!dev) {
5960 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5961 rc = FAILED;
5962 goto return_reset_status;
5963 }
5964
5965 if (dev->devtype == TYPE_ENCLOSURE) {
5966 rc = SUCCESS;
5967 goto return_reset_status;
5968 }
5969
5970
5971 if (lockup_detected(h)) {
5972 snprintf(msg, sizeof(msg),
5973 "cmd %d RESET FAILED, lockup detected",
5974 hpsa_get_cmd_index(scsicmd));
5975 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5976 rc = FAILED;
5977 goto return_reset_status;
5978 }
5979
5980
5981 if (detect_controller_lockup(h)) {
5982 snprintf(msg, sizeof(msg),
5983 "cmd %d RESET FAILED, new lockup detected",
5984 hpsa_get_cmd_index(scsicmd));
5985 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5986 rc = FAILED;
5987 goto return_reset_status;
5988 }
5989
5990
5991 if (is_hba_lunid(dev->scsi3addr)) {
5992 rc = SUCCESS;
5993 goto return_reset_status;
5994 }
5995
5996 if (is_logical_dev_addr_mode(dev->scsi3addr))
5997 reset_type = HPSA_DEVICE_RESET_MSG;
5998 else
5999 reset_type = HPSA_PHYS_TARGET_RESET;
6000
6001 sprintf(msg, "resetting %s",
6002 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6003 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6004
6005
6006 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
6007 DEFAULT_REPLY_QUEUE);
6008 if (rc == 0)
6009 rc = SUCCESS;
6010 else
6011 rc = FAILED;
6012
6013 sprintf(msg, "reset %s %s",
6014 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6015 rc == SUCCESS ? "completed successfully" : "failed");
6016 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6017
6018return_reset_status:
6019 spin_lock_irqsave(&h->reset_lock, flags);
6020 h->reset_in_progress = 0;
6021 spin_unlock_irqrestore(&h->reset_lock, flags);
6022 return rc;
6023}
6024
6025
6026
6027
6028
6029
6030
6031static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6032 struct scsi_cmnd *scmd)
6033{
6034 int idx = hpsa_get_cmd_index(scmd);
6035 struct CommandList *c = h->cmd_pool + idx;
6036
6037 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6038 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6039 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6040
6041
6042
6043 BUG();
6044 }
6045
6046 atomic_inc(&c->refcount);
6047 if (unlikely(!hpsa_is_cmd_idle(c))) {
6048
6049
6050
6051
6052
6053
6054 dev_err(&h->pdev->dev,
6055 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6056 idx);
6057 if (c->scsi_cmd != NULL)
6058 scsi_print_command(c->scsi_cmd);
6059 scsi_print_command(scmd);
6060 }
6061
6062 hpsa_cmd_partial_init(h, idx, c);
6063 return c;
6064}
6065
6066static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6067{
6068
6069
6070
6071
6072 (void)atomic_dec(&c->refcount);
6073}
6074
6075
6076
6077
6078
6079
6080
6081
6082
6083
6084static struct CommandList *cmd_alloc(struct ctlr_info *h)
6085{
6086 struct CommandList *c;
6087 int refcount, i;
6088 int offset = 0;
6089
6090
6091
6092
6093
6094
6095
6096
6097
6098
6099
6100
6101
6102
6103
6104
6105
6106
6107
6108
6109 for (;;) {
6110 i = find_next_zero_bit(h->cmd_pool_bits,
6111 HPSA_NRESERVED_CMDS,
6112 offset);
6113 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6114 offset = 0;
6115 continue;
6116 }
6117 c = h->cmd_pool + i;
6118 refcount = atomic_inc_return(&c->refcount);
6119 if (unlikely(refcount > 1)) {
6120 cmd_free(h, c);
6121 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6122 continue;
6123 }
6124 set_bit(i & (BITS_PER_LONG - 1),
6125 h->cmd_pool_bits + (i / BITS_PER_LONG));
6126 break;
6127 }
6128 hpsa_cmd_partial_init(h, i, c);
6129 return c;
6130}
6131
6132
6133
6134
6135
6136
6137
6138static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6139{
6140 if (atomic_dec_and_test(&c->refcount)) {
6141 int i;
6142
6143 i = c - h->cmd_pool;
6144 clear_bit(i & (BITS_PER_LONG - 1),
6145 h->cmd_pool_bits + (i / BITS_PER_LONG));
6146 }
6147}
6148
6149#ifdef CONFIG_COMPAT
6150
6151static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6152 void __user *arg)
6153{
6154 IOCTL32_Command_struct __user *arg32 =
6155 (IOCTL32_Command_struct __user *) arg;
6156 IOCTL_Command_struct arg64;
6157 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6158 int err;
6159 u32 cp;
6160
6161 memset(&arg64, 0, sizeof(arg64));
6162 err = 0;
6163 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6164 sizeof(arg64.LUN_info));
6165 err |= copy_from_user(&arg64.Request, &arg32->Request,
6166 sizeof(arg64.Request));
6167 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6168 sizeof(arg64.error_info));
6169 err |= get_user(arg64.buf_size, &arg32->buf_size);
6170 err |= get_user(cp, &arg32->buf);
6171 arg64.buf = compat_ptr(cp);
6172 err |= copy_to_user(p, &arg64, sizeof(arg64));
6173
6174 if (err)
6175 return -EFAULT;
6176
6177 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6178 if (err)
6179 return err;
6180 err |= copy_in_user(&arg32->error_info, &p->error_info,
6181 sizeof(arg32->error_info));
6182 if (err)
6183 return -EFAULT;
6184 return err;
6185}
6186
6187static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6188 unsigned int cmd, void __user *arg)
6189{
6190 BIG_IOCTL32_Command_struct __user *arg32 =
6191 (BIG_IOCTL32_Command_struct __user *) arg;
6192 BIG_IOCTL_Command_struct arg64;
6193 BIG_IOCTL_Command_struct __user *p =
6194 compat_alloc_user_space(sizeof(arg64));
6195 int err;
6196 u32 cp;
6197
6198 memset(&arg64, 0, sizeof(arg64));
6199 err = 0;
6200 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6201 sizeof(arg64.LUN_info));
6202 err |= copy_from_user(&arg64.Request, &arg32->Request,
6203 sizeof(arg64.Request));
6204 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6205 sizeof(arg64.error_info));
6206 err |= get_user(arg64.buf_size, &arg32->buf_size);
6207 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6208 err |= get_user(cp, &arg32->buf);
6209 arg64.buf = compat_ptr(cp);
6210 err |= copy_to_user(p, &arg64, sizeof(arg64));
6211
6212 if (err)
6213 return -EFAULT;
6214
6215 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6216 if (err)
6217 return err;
6218 err |= copy_in_user(&arg32->error_info, &p->error_info,
6219 sizeof(arg32->error_info));
6220 if (err)
6221 return -EFAULT;
6222 return err;
6223}
6224
6225static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6226 void __user *arg)
6227{
6228 switch (cmd) {
6229 case CCISS_GETPCIINFO:
6230 case CCISS_GETINTINFO:
6231 case CCISS_SETINTINFO:
6232 case CCISS_GETNODENAME:
6233 case CCISS_SETNODENAME:
6234 case CCISS_GETHEARTBEAT:
6235 case CCISS_GETBUSTYPES:
6236 case CCISS_GETFIRMVER:
6237 case CCISS_GETDRIVVER:
6238 case CCISS_REVALIDVOLS:
6239 case CCISS_DEREGDISK:
6240 case CCISS_REGNEWDISK:
6241 case CCISS_REGNEWD:
6242 case CCISS_RESCANDISK:
6243 case CCISS_GETLUNINFO:
6244 return hpsa_ioctl(dev, cmd, arg);
6245
6246 case CCISS_PASSTHRU32:
6247 return hpsa_ioctl32_passthru(dev, cmd, arg);
6248 case CCISS_BIG_PASSTHRU32:
6249 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6250
6251 default:
6252 return -ENOIOCTLCMD;
6253 }
6254}
6255#endif
6256
6257static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6258{
6259 struct hpsa_pci_info pciinfo;
6260
6261 if (!argp)
6262 return -EINVAL;
6263 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6264 pciinfo.bus = h->pdev->bus->number;
6265 pciinfo.dev_fn = h->pdev->devfn;
6266 pciinfo.board_id = h->board_id;
6267 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6268 return -EFAULT;
6269 return 0;
6270}
6271
6272static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6273{
6274 DriverVer_type DriverVer;
6275 unsigned char vmaj, vmin, vsubmin;
6276 int rc;
6277
6278 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6279 &vmaj, &vmin, &vsubmin);
6280 if (rc != 3) {
6281 dev_info(&h->pdev->dev, "driver version string '%s' "
6282 "unrecognized.", HPSA_DRIVER_VERSION);
6283 vmaj = 0;
6284 vmin = 0;
6285 vsubmin = 0;
6286 }
6287 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6288 if (!argp)
6289 return -EINVAL;
6290 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6291 return -EFAULT;
6292 return 0;
6293}
6294
6295static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6296{
6297 IOCTL_Command_struct iocommand;
6298 struct CommandList *c;
6299 char *buff = NULL;
6300 u64 temp64;
6301 int rc = 0;
6302
6303 if (!argp)
6304 return -EINVAL;
6305 if (!capable(CAP_SYS_RAWIO))
6306 return -EPERM;
6307 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6308 return -EFAULT;
6309 if ((iocommand.buf_size < 1) &&
6310 (iocommand.Request.Type.Direction != XFER_NONE)) {
6311 return -EINVAL;
6312 }
6313 if (iocommand.buf_size > 0) {
6314 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6315 if (buff == NULL)
6316 return -ENOMEM;
6317 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6318
6319 if (copy_from_user(buff, iocommand.buf,
6320 iocommand.buf_size)) {
6321 rc = -EFAULT;
6322 goto out_kfree;
6323 }
6324 } else {
6325 memset(buff, 0, iocommand.buf_size);
6326 }
6327 }
6328 c = cmd_alloc(h);
6329
6330
6331 c->cmd_type = CMD_IOCTL_PEND;
6332 c->scsi_cmd = SCSI_CMD_BUSY;
6333
6334 c->Header.ReplyQueue = 0;
6335 if (iocommand.buf_size > 0) {
6336 c->Header.SGList = 1;
6337 c->Header.SGTotal = cpu_to_le16(1);
6338 } else {
6339 c->Header.SGList = 0;
6340 c->Header.SGTotal = cpu_to_le16(0);
6341 }
6342 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6343
6344
6345 memcpy(&c->Request, &iocommand.Request,
6346 sizeof(c->Request));
6347
6348
6349 if (iocommand.buf_size > 0) {
6350 temp64 = dma_map_single(&h->pdev->dev, buff,
6351 iocommand.buf_size, DMA_BIDIRECTIONAL);
6352 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6353 c->SG[0].Addr = cpu_to_le64(0);
6354 c->SG[0].Len = cpu_to_le32(0);
6355 rc = -ENOMEM;
6356 goto out;
6357 }
6358 c->SG[0].Addr = cpu_to_le64(temp64);
6359 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6360 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST);
6361 }
6362 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6363 NO_TIMEOUT);
6364 if (iocommand.buf_size > 0)
6365 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6366 check_ioctl_unit_attention(h, c);
6367 if (rc) {
6368 rc = -EIO;
6369 goto out;
6370 }
6371
6372
6373 memcpy(&iocommand.error_info, c->err_info,
6374 sizeof(iocommand.error_info));
6375 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6376 rc = -EFAULT;
6377 goto out;
6378 }
6379 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6380 iocommand.buf_size > 0) {
6381
6382 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6383 rc = -EFAULT;
6384 goto out;
6385 }
6386 }
6387out:
6388 cmd_free(h, c);
6389out_kfree:
6390 kfree(buff);
6391 return rc;
6392}
6393
6394static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6395{
6396 BIG_IOCTL_Command_struct *ioc;
6397 struct CommandList *c;
6398 unsigned char **buff = NULL;
6399 int *buff_size = NULL;
6400 u64 temp64;
6401 BYTE sg_used = 0;
6402 int status = 0;
6403 u32 left;
6404 u32 sz;
6405 BYTE __user *data_ptr;
6406
6407 if (!argp)
6408 return -EINVAL;
6409 if (!capable(CAP_SYS_RAWIO))
6410 return -EPERM;
6411 ioc = vmemdup_user(argp, sizeof(*ioc));
6412 if (IS_ERR(ioc)) {
6413 status = PTR_ERR(ioc);
6414 goto cleanup1;
6415 }
6416 if ((ioc->buf_size < 1) &&
6417 (ioc->Request.Type.Direction != XFER_NONE)) {
6418 status = -EINVAL;
6419 goto cleanup1;
6420 }
6421
6422 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6423 status = -EINVAL;
6424 goto cleanup1;
6425 }
6426 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6427 status = -EINVAL;
6428 goto cleanup1;
6429 }
6430 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6431 if (!buff) {
6432 status = -ENOMEM;
6433 goto cleanup1;
6434 }
6435 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6436 if (!buff_size) {
6437 status = -ENOMEM;
6438 goto cleanup1;
6439 }
6440 left = ioc->buf_size;
6441 data_ptr = ioc->buf;
6442 while (left) {
6443 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6444 buff_size[sg_used] = sz;
6445 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6446 if (buff[sg_used] == NULL) {
6447 status = -ENOMEM;
6448 goto cleanup1;
6449 }
6450 if (ioc->Request.Type.Direction & XFER_WRITE) {
6451 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6452 status = -EFAULT;
6453 goto cleanup1;
6454 }
6455 } else
6456 memset(buff[sg_used], 0, sz);
6457 left -= sz;
6458 data_ptr += sz;
6459 sg_used++;
6460 }
6461 c = cmd_alloc(h);
6462
6463 c->cmd_type = CMD_IOCTL_PEND;
6464 c->scsi_cmd = SCSI_CMD_BUSY;
6465 c->Header.ReplyQueue = 0;
6466 c->Header.SGList = (u8) sg_used;
6467 c->Header.SGTotal = cpu_to_le16(sg_used);
6468 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6469 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6470 if (ioc->buf_size > 0) {
6471 int i;
6472 for (i = 0; i < sg_used; i++) {
6473 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6474 buff_size[i], DMA_BIDIRECTIONAL);
6475 if (dma_mapping_error(&h->pdev->dev,
6476 (dma_addr_t) temp64)) {
6477 c->SG[i].Addr = cpu_to_le64(0);
6478 c->SG[i].Len = cpu_to_le32(0);
6479 hpsa_pci_unmap(h->pdev, c, i,
6480 DMA_BIDIRECTIONAL);
6481 status = -ENOMEM;
6482 goto cleanup0;
6483 }
6484 c->SG[i].Addr = cpu_to_le64(temp64);
6485 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6486 c->SG[i].Ext = cpu_to_le32(0);
6487 }
6488 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6489 }
6490 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6491 NO_TIMEOUT);
6492 if (sg_used)
6493 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6494 check_ioctl_unit_attention(h, c);
6495 if (status) {
6496 status = -EIO;
6497 goto cleanup0;
6498 }
6499
6500
6501 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6502 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6503 status = -EFAULT;
6504 goto cleanup0;
6505 }
6506 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6507 int i;
6508
6509
6510 BYTE __user *ptr = ioc->buf;
6511 for (i = 0; i < sg_used; i++) {
6512 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6513 status = -EFAULT;
6514 goto cleanup0;
6515 }
6516 ptr += buff_size[i];
6517 }
6518 }
6519 status = 0;
6520cleanup0:
6521 cmd_free(h, c);
6522cleanup1:
6523 if (buff) {
6524 int i;
6525
6526 for (i = 0; i < sg_used; i++)
6527 kfree(buff[i]);
6528 kfree(buff);
6529 }
6530 kfree(buff_size);
6531 kvfree(ioc);
6532 return status;
6533}
6534
6535static void check_ioctl_unit_attention(struct ctlr_info *h,
6536 struct CommandList *c)
6537{
6538 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6539 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6540 (void) check_for_unit_attention(h, c);
6541}
6542
6543
6544
6545
6546static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6547 void __user *arg)
6548{
6549 struct ctlr_info *h;
6550 void __user *argp = (void __user *)arg;
6551 int rc;
6552
6553 h = sdev_to_hba(dev);
6554
6555 switch (cmd) {
6556 case CCISS_DEREGDISK:
6557 case CCISS_REGNEWDISK:
6558 case CCISS_REGNEWD:
6559 hpsa_scan_start(h->scsi_host);
6560 return 0;
6561 case CCISS_GETPCIINFO:
6562 return hpsa_getpciinfo_ioctl(h, argp);
6563 case CCISS_GETDRIVVER:
6564 return hpsa_getdrivver_ioctl(h, argp);
6565 case CCISS_PASSTHRU:
6566 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6567 return -EAGAIN;
6568 rc = hpsa_passthru_ioctl(h, argp);
6569 atomic_inc(&h->passthru_cmds_avail);
6570 return rc;
6571 case CCISS_BIG_PASSTHRU:
6572 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6573 return -EAGAIN;
6574 rc = hpsa_big_passthru_ioctl(h, argp);
6575 atomic_inc(&h->passthru_cmds_avail);
6576 return rc;
6577 default:
6578 return -ENOTTY;
6579 }
6580}
6581
6582static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6583 u8 reset_type)
6584{
6585 struct CommandList *c;
6586
6587 c = cmd_alloc(h);
6588
6589
6590 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6591 RAID_CTLR_LUNID, TYPE_MSG);
6592 c->Request.CDB[1] = reset_type;
6593 c->waiting = NULL;
6594 enqueue_cmd_and_start_io(h, c);
6595
6596
6597
6598
6599 return;
6600}
6601
6602static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6603 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6604 int cmd_type)
6605{
6606 enum dma_data_direction dir = DMA_NONE;
6607
6608 c->cmd_type = CMD_IOCTL_PEND;
6609 c->scsi_cmd = SCSI_CMD_BUSY;
6610 c->Header.ReplyQueue = 0;
6611 if (buff != NULL && size > 0) {
6612 c->Header.SGList = 1;
6613 c->Header.SGTotal = cpu_to_le16(1);
6614 } else {
6615 c->Header.SGList = 0;
6616 c->Header.SGTotal = cpu_to_le16(0);
6617 }
6618 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6619
6620 if (cmd_type == TYPE_CMD) {
6621 switch (cmd) {
6622 case HPSA_INQUIRY:
6623
6624 if (page_code & VPD_PAGE) {
6625 c->Request.CDB[1] = 0x01;
6626 c->Request.CDB[2] = (page_code & 0xff);
6627 }
6628 c->Request.CDBLen = 6;
6629 c->Request.type_attr_dir =
6630 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6631 c->Request.Timeout = 0;
6632 c->Request.CDB[0] = HPSA_INQUIRY;
6633 c->Request.CDB[4] = size & 0xFF;
6634 break;
6635 case RECEIVE_DIAGNOSTIC:
6636 c->Request.CDBLen = 6;
6637 c->Request.type_attr_dir =
6638 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6639 c->Request.Timeout = 0;
6640 c->Request.CDB[0] = cmd;
6641 c->Request.CDB[1] = 1;
6642 c->Request.CDB[2] = 1;
6643 c->Request.CDB[3] = (size >> 8) & 0xFF;
6644 c->Request.CDB[4] = size & 0xFF;
6645 break;
6646 case HPSA_REPORT_LOG:
6647 case HPSA_REPORT_PHYS:
6648
6649
6650
6651 c->Request.CDBLen = 12;
6652 c->Request.type_attr_dir =
6653 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6654 c->Request.Timeout = 0;
6655 c->Request.CDB[0] = cmd;
6656 c->Request.CDB[6] = (size >> 24) & 0xFF;
6657 c->Request.CDB[7] = (size >> 16) & 0xFF;
6658 c->Request.CDB[8] = (size >> 8) & 0xFF;
6659 c->Request.CDB[9] = size & 0xFF;
6660 break;
6661 case BMIC_SENSE_DIAG_OPTIONS:
6662 c->Request.CDBLen = 16;
6663 c->Request.type_attr_dir =
6664 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6665 c->Request.Timeout = 0;
6666
6667 c->Request.CDB[0] = BMIC_READ;
6668 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6669 break;
6670 case BMIC_SET_DIAG_OPTIONS:
6671 c->Request.CDBLen = 16;
6672 c->Request.type_attr_dir =
6673 TYPE_ATTR_DIR(cmd_type,
6674 ATTR_SIMPLE, XFER_WRITE);
6675 c->Request.Timeout = 0;
6676 c->Request.CDB[0] = BMIC_WRITE;
6677 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6678 break;
6679 case HPSA_CACHE_FLUSH:
6680 c->Request.CDBLen = 12;
6681 c->Request.type_attr_dir =
6682 TYPE_ATTR_DIR(cmd_type,
6683 ATTR_SIMPLE, XFER_WRITE);
6684 c->Request.Timeout = 0;
6685 c->Request.CDB[0] = BMIC_WRITE;
6686 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6687 c->Request.CDB[7] = (size >> 8) & 0xFF;
6688 c->Request.CDB[8] = size & 0xFF;
6689 break;
6690 case TEST_UNIT_READY:
6691 c->Request.CDBLen = 6;
6692 c->Request.type_attr_dir =
6693 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6694 c->Request.Timeout = 0;
6695 break;
6696 case HPSA_GET_RAID_MAP:
6697 c->Request.CDBLen = 12;
6698 c->Request.type_attr_dir =
6699 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6700 c->Request.Timeout = 0;
6701 c->Request.CDB[0] = HPSA_CISS_READ;
6702 c->Request.CDB[1] = cmd;
6703 c->Request.CDB[6] = (size >> 24) & 0xFF;
6704 c->Request.CDB[7] = (size >> 16) & 0xFF;
6705 c->Request.CDB[8] = (size >> 8) & 0xFF;
6706 c->Request.CDB[9] = size & 0xFF;
6707 break;
6708 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6709 c->Request.CDBLen = 10;
6710 c->Request.type_attr_dir =
6711 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6712 c->Request.Timeout = 0;
6713 c->Request.CDB[0] = BMIC_READ;
6714 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6715 c->Request.CDB[7] = (size >> 16) & 0xFF;
6716 c->Request.CDB[8] = (size >> 8) & 0xFF;
6717 break;
6718 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6719 c->Request.CDBLen = 10;
6720 c->Request.type_attr_dir =
6721 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6722 c->Request.Timeout = 0;
6723 c->Request.CDB[0] = BMIC_READ;
6724 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6725 c->Request.CDB[7] = (size >> 16) & 0xFF;
6726 c->Request.CDB[8] = (size >> 8) & 0XFF;
6727 break;
6728 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6729 c->Request.CDBLen = 10;
6730 c->Request.type_attr_dir =
6731 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6732 c->Request.Timeout = 0;
6733 c->Request.CDB[0] = BMIC_READ;
6734 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6735 c->Request.CDB[7] = (size >> 16) & 0xFF;
6736 c->Request.CDB[8] = (size >> 8) & 0XFF;
6737 break;
6738 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6739 c->Request.CDBLen = 10;
6740 c->Request.type_attr_dir =
6741 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6742 c->Request.Timeout = 0;
6743 c->Request.CDB[0] = BMIC_READ;
6744 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6745 c->Request.CDB[7] = (size >> 16) & 0xFF;
6746 c->Request.CDB[8] = (size >> 8) & 0XFF;
6747 break;
6748 case BMIC_IDENTIFY_CONTROLLER:
6749 c->Request.CDBLen = 10;
6750 c->Request.type_attr_dir =
6751 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6752 c->Request.Timeout = 0;
6753 c->Request.CDB[0] = BMIC_READ;
6754 c->Request.CDB[1] = 0;
6755 c->Request.CDB[2] = 0;
6756 c->Request.CDB[3] = 0;
6757 c->Request.CDB[4] = 0;
6758 c->Request.CDB[5] = 0;
6759 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6760 c->Request.CDB[7] = (size >> 16) & 0xFF;
6761 c->Request.CDB[8] = (size >> 8) & 0XFF;
6762 c->Request.CDB[9] = 0;
6763 break;
6764 default:
6765 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6766 BUG();
6767 }
6768 } else if (cmd_type == TYPE_MSG) {
6769 switch (cmd) {
6770
6771 case HPSA_PHYS_TARGET_RESET:
6772 c->Request.CDBLen = 16;
6773 c->Request.type_attr_dir =
6774 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6775 c->Request.Timeout = 0;
6776 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6777 c->Request.CDB[0] = HPSA_RESET;
6778 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6779
6780 c->Request.CDB[4] = 0x00;
6781 c->Request.CDB[5] = 0x00;
6782 c->Request.CDB[6] = 0x00;
6783 c->Request.CDB[7] = 0x00;
6784 break;
6785 case HPSA_DEVICE_RESET_MSG:
6786 c->Request.CDBLen = 16;
6787 c->Request.type_attr_dir =
6788 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6789 c->Request.Timeout = 0;
6790 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6791 c->Request.CDB[0] = cmd;
6792 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6793
6794
6795 c->Request.CDB[4] = 0x00;
6796 c->Request.CDB[5] = 0x00;
6797 c->Request.CDB[6] = 0x00;
6798 c->Request.CDB[7] = 0x00;
6799 break;
6800 default:
6801 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6802 cmd);
6803 BUG();
6804 }
6805 } else {
6806 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6807 BUG();
6808 }
6809
6810 switch (GET_DIR(c->Request.type_attr_dir)) {
6811 case XFER_READ:
6812 dir = DMA_FROM_DEVICE;
6813 break;
6814 case XFER_WRITE:
6815 dir = DMA_TO_DEVICE;
6816 break;
6817 case XFER_NONE:
6818 dir = DMA_NONE;
6819 break;
6820 default:
6821 dir = DMA_BIDIRECTIONAL;
6822 }
6823 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6824 return -1;
6825 return 0;
6826}
6827
6828
6829
6830
6831static void __iomem *remap_pci_mem(ulong base, ulong size)
6832{
6833 ulong page_base = ((ulong) base) & PAGE_MASK;
6834 ulong page_offs = ((ulong) base) - page_base;
6835 void __iomem *page_remapped = ioremap_nocache(page_base,
6836 page_offs + size);
6837
6838 return page_remapped ? (page_remapped + page_offs) : NULL;
6839}
6840
6841static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6842{
6843 return h->access.command_completed(h, q);
6844}
6845
6846static inline bool interrupt_pending(struct ctlr_info *h)
6847{
6848 return h->access.intr_pending(h);
6849}
6850
6851static inline long interrupt_not_for_us(struct ctlr_info *h)
6852{
6853 return (h->access.intr_pending(h) == 0) ||
6854 (h->interrupts_enabled == 0);
6855}
6856
6857static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6858 u32 raw_tag)
6859{
6860 if (unlikely(tag_index >= h->nr_cmds)) {
6861 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6862 return 1;
6863 }
6864 return 0;
6865}
6866
6867static inline void finish_cmd(struct CommandList *c)
6868{
6869 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6870 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6871 || c->cmd_type == CMD_IOACCEL2))
6872 complete_scsi_command(c);
6873 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6874 complete(c->waiting);
6875}
6876
6877
6878static inline void process_indexed_cmd(struct ctlr_info *h,
6879 u32 raw_tag)
6880{
6881 u32 tag_index;
6882 struct CommandList *c;
6883
6884 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6885 if (!bad_tag(h, tag_index, raw_tag)) {
6886 c = h->cmd_pool + tag_index;
6887 finish_cmd(c);
6888 }
6889}
6890
6891
6892
6893
6894
6895
6896static int ignore_bogus_interrupt(struct ctlr_info *h)
6897{
6898 if (likely(!reset_devices))
6899 return 0;
6900
6901 if (likely(h->interrupts_enabled))
6902 return 0;
6903
6904 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6905 "(known firmware bug.) Ignoring.\n");
6906
6907 return 1;
6908}
6909
6910
6911
6912
6913
6914
6915static struct ctlr_info *queue_to_hba(u8 *queue)
6916{
6917 return container_of((queue - *queue), struct ctlr_info, q[0]);
6918}
6919
6920static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6921{
6922 struct ctlr_info *h = queue_to_hba(queue);
6923 u8 q = *(u8 *) queue;
6924 u32 raw_tag;
6925
6926 if (ignore_bogus_interrupt(h))
6927 return IRQ_NONE;
6928
6929 if (interrupt_not_for_us(h))
6930 return IRQ_NONE;
6931 h->last_intr_timestamp = get_jiffies_64();
6932 while (interrupt_pending(h)) {
6933 raw_tag = get_next_completion(h, q);
6934 while (raw_tag != FIFO_EMPTY)
6935 raw_tag = next_command(h, q);
6936 }
6937 return IRQ_HANDLED;
6938}
6939
6940static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6941{
6942 struct ctlr_info *h = queue_to_hba(queue);
6943 u32 raw_tag;
6944 u8 q = *(u8 *) queue;
6945
6946 if (ignore_bogus_interrupt(h))
6947 return IRQ_NONE;
6948
6949 h->last_intr_timestamp = get_jiffies_64();
6950 raw_tag = get_next_completion(h, q);
6951 while (raw_tag != FIFO_EMPTY)
6952 raw_tag = next_command(h, q);
6953 return IRQ_HANDLED;
6954}
6955
6956static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6957{
6958 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6959 u32 raw_tag;
6960 u8 q = *(u8 *) queue;
6961
6962 if (interrupt_not_for_us(h))
6963 return IRQ_NONE;
6964 h->last_intr_timestamp = get_jiffies_64();
6965 while (interrupt_pending(h)) {
6966 raw_tag = get_next_completion(h, q);
6967 while (raw_tag != FIFO_EMPTY) {
6968 process_indexed_cmd(h, raw_tag);
6969 raw_tag = next_command(h, q);
6970 }
6971 }
6972 return IRQ_HANDLED;
6973}
6974
6975static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6976{
6977 struct ctlr_info *h = queue_to_hba(queue);
6978 u32 raw_tag;
6979 u8 q = *(u8 *) queue;
6980
6981 h->last_intr_timestamp = get_jiffies_64();
6982 raw_tag = get_next_completion(h, q);
6983 while (raw_tag != FIFO_EMPTY) {
6984 process_indexed_cmd(h, raw_tag);
6985 raw_tag = next_command(h, q);
6986 }
6987 return IRQ_HANDLED;
6988}
6989
6990
6991
6992
6993
6994static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6995 unsigned char type)
6996{
6997 struct Command {
6998 struct CommandListHeader CommandHeader;
6999 struct RequestBlock Request;
7000 struct ErrDescriptor ErrorDescriptor;
7001 };
7002 struct Command *cmd;
7003 static const size_t cmd_sz = sizeof(*cmd) +
7004 sizeof(cmd->ErrorDescriptor);
7005 dma_addr_t paddr64;
7006 __le32 paddr32;
7007 u32 tag;
7008 void __iomem *vaddr;
7009 int i, err;
7010
7011 vaddr = pci_ioremap_bar(pdev, 0);
7012 if (vaddr == NULL)
7013 return -ENOMEM;
7014
7015
7016
7017
7018
7019 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7020 if (err) {
7021 iounmap(vaddr);
7022 return err;
7023 }
7024
7025 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7026 if (cmd == NULL) {
7027 iounmap(vaddr);
7028 return -ENOMEM;
7029 }
7030
7031
7032
7033
7034
7035 paddr32 = cpu_to_le32(paddr64);
7036
7037 cmd->CommandHeader.ReplyQueue = 0;
7038 cmd->CommandHeader.SGList = 0;
7039 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7040 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7041 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7042
7043 cmd->Request.CDBLen = 16;
7044 cmd->Request.type_attr_dir =
7045 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7046 cmd->Request.Timeout = 0;
7047 cmd->Request.CDB[0] = opcode;
7048 cmd->Request.CDB[1] = type;
7049 memset(&cmd->Request.CDB[2], 0, 14);
7050 cmd->ErrorDescriptor.Addr =
7051 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7052 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7053
7054 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7055
7056 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7057 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7058 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7059 break;
7060 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7061 }
7062
7063 iounmap(vaddr);
7064
7065
7066
7067
7068 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7069 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7070 opcode, type);
7071 return -ETIMEDOUT;
7072 }
7073
7074 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7075
7076 if (tag & HPSA_ERROR_BIT) {
7077 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7078 opcode, type);
7079 return -EIO;
7080 }
7081
7082 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7083 opcode, type);
7084 return 0;
7085}
7086
7087#define hpsa_noop(p) hpsa_message(p, 3, 0)
7088
7089static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7090 void __iomem *vaddr, u32 use_doorbell)
7091{
7092
7093 if (use_doorbell) {
7094
7095
7096
7097
7098 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7099 writel(use_doorbell, vaddr + SA5_DOORBELL);
7100
7101
7102
7103
7104
7105
7106 msleep(10000);
7107 } else {
7108
7109
7110
7111
7112
7113
7114
7115
7116
7117 int rc = 0;
7118
7119 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7120
7121
7122 rc = pci_set_power_state(pdev, PCI_D3hot);
7123 if (rc)
7124 return rc;
7125
7126 msleep(500);
7127
7128
7129 rc = pci_set_power_state(pdev, PCI_D0);
7130 if (rc)
7131 return rc;
7132
7133
7134
7135
7136
7137
7138 msleep(500);
7139 }
7140 return 0;
7141}
7142
7143static void init_driver_version(char *driver_version, int len)
7144{
7145 memset(driver_version, 0, len);
7146 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7147}
7148
7149static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7150{
7151 char *driver_version;
7152 int i, size = sizeof(cfgtable->driver_version);
7153
7154 driver_version = kmalloc(size, GFP_KERNEL);
7155 if (!driver_version)
7156 return -ENOMEM;
7157
7158 init_driver_version(driver_version, size);
7159 for (i = 0; i < size; i++)
7160 writeb(driver_version[i], &cfgtable->driver_version[i]);
7161 kfree(driver_version);
7162 return 0;
7163}
7164
7165static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7166 unsigned char *driver_ver)
7167{
7168 int i;
7169
7170 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7171 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7172}
7173
7174static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7175{
7176
7177 char *driver_ver, *old_driver_ver;
7178 int rc, size = sizeof(cfgtable->driver_version);
7179
7180 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7181 if (!old_driver_ver)
7182 return -ENOMEM;
7183 driver_ver = old_driver_ver + size;
7184
7185
7186
7187
7188 init_driver_version(old_driver_ver, size);
7189 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7190 rc = !memcmp(driver_ver, old_driver_ver, size);
7191 kfree(old_driver_ver);
7192 return rc;
7193}
7194
7195
7196
7197static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7198{
7199 u64 cfg_offset;
7200 u32 cfg_base_addr;
7201 u64 cfg_base_addr_index;
7202 void __iomem *vaddr;
7203 unsigned long paddr;
7204 u32 misc_fw_support;
7205 int rc;
7206 struct CfgTable __iomem *cfgtable;
7207 u32 use_doorbell;
7208 u16 command_register;
7209
7210
7211
7212
7213
7214
7215
7216
7217
7218
7219
7220
7221
7222
7223 if (!ctlr_is_resettable(board_id)) {
7224 dev_warn(&pdev->dev, "Controller not resettable\n");
7225 return -ENODEV;
7226 }
7227
7228
7229 if (!ctlr_is_hard_resettable(board_id))
7230 return -ENOTSUPP;
7231
7232
7233 pci_read_config_word(pdev, 4, &command_register);
7234 pci_save_state(pdev);
7235
7236
7237 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7238 if (rc)
7239 return rc;
7240 vaddr = remap_pci_mem(paddr, 0x250);
7241 if (!vaddr)
7242 return -ENOMEM;
7243
7244
7245 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7246 &cfg_base_addr_index, &cfg_offset);
7247 if (rc)
7248 goto unmap_vaddr;
7249 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7250 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7251 if (!cfgtable) {
7252 rc = -ENOMEM;
7253 goto unmap_vaddr;
7254 }
7255 rc = write_driver_ver_to_cfgtable(cfgtable);
7256 if (rc)
7257 goto unmap_cfgtable;
7258
7259
7260
7261
7262 misc_fw_support = readl(&cfgtable->misc_fw_support);
7263 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7264 if (use_doorbell) {
7265 use_doorbell = DOORBELL_CTLR_RESET2;
7266 } else {
7267 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7268 if (use_doorbell) {
7269 dev_warn(&pdev->dev,
7270 "Soft reset not supported. Firmware update is required.\n");
7271 rc = -ENOTSUPP;
7272 goto unmap_cfgtable;
7273 }
7274 }
7275
7276 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7277 if (rc)
7278 goto unmap_cfgtable;
7279
7280 pci_restore_state(pdev);
7281 pci_write_config_word(pdev, 4, command_register);
7282
7283
7284
7285 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7286
7287 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7288 if (rc) {
7289 dev_warn(&pdev->dev,
7290 "Failed waiting for board to become ready after hard reset\n");
7291 goto unmap_cfgtable;
7292 }
7293
7294 rc = controller_reset_failed(vaddr);
7295 if (rc < 0)
7296 goto unmap_cfgtable;
7297 if (rc) {
7298 dev_warn(&pdev->dev, "Unable to successfully reset "
7299 "controller. Will try soft reset.\n");
7300 rc = -ENOTSUPP;
7301 } else {
7302 dev_info(&pdev->dev, "board ready after hard reset.\n");
7303 }
7304
7305unmap_cfgtable:
7306 iounmap(cfgtable);
7307
7308unmap_vaddr:
7309 iounmap(vaddr);
7310 return rc;
7311}
7312
7313
7314
7315
7316
7317
7318static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7319{
7320#ifdef HPSA_DEBUG
7321 int i;
7322 char temp_name[17];
7323
7324 dev_info(dev, "Controller Configuration information\n");
7325 dev_info(dev, "------------------------------------\n");
7326 for (i = 0; i < 4; i++)
7327 temp_name[i] = readb(&(tb->Signature[i]));
7328 temp_name[4] = '\0';
7329 dev_info(dev, " Signature = %s\n", temp_name);
7330 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7331 dev_info(dev, " Transport methods supported = 0x%x\n",
7332 readl(&(tb->TransportSupport)));
7333 dev_info(dev, " Transport methods active = 0x%x\n",
7334 readl(&(tb->TransportActive)));
7335 dev_info(dev, " Requested transport Method = 0x%x\n",
7336 readl(&(tb->HostWrite.TransportRequest)));
7337 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7338 readl(&(tb->HostWrite.CoalIntDelay)));
7339 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7340 readl(&(tb->HostWrite.CoalIntCount)));
7341 dev_info(dev, " Max outstanding commands = %d\n",
7342 readl(&(tb->CmdsOutMax)));
7343 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7344 for (i = 0; i < 16; i++)
7345 temp_name[i] = readb(&(tb->ServerName[i]));
7346 temp_name[16] = '\0';
7347 dev_info(dev, " Server Name = %s\n", temp_name);
7348 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7349 readl(&(tb->HeartBeat)));
7350#endif
7351}
7352
7353static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7354{
7355 int i, offset, mem_type, bar_type;
7356
7357 if (pci_bar_addr == PCI_BASE_ADDRESS_0)
7358 return 0;
7359 offset = 0;
7360 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7361 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7362 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7363 offset += 4;
7364 else {
7365 mem_type = pci_resource_flags(pdev, i) &
7366 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7367 switch (mem_type) {
7368 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7369 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7370 offset += 4;
7371 break;
7372 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7373 offset += 8;
7374 break;
7375 default:
7376 dev_warn(&pdev->dev,
7377 "base address is invalid\n");
7378 return -1;
7379 break;
7380 }
7381 }
7382 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7383 return i + 1;
7384 }
7385 return -1;
7386}
7387
7388static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7389{
7390 pci_free_irq_vectors(h->pdev);
7391 h->msix_vectors = 0;
7392}
7393
7394static void hpsa_setup_reply_map(struct ctlr_info *h)
7395{
7396 const struct cpumask *mask;
7397 unsigned int queue, cpu;
7398
7399 for (queue = 0; queue < h->msix_vectors; queue++) {
7400 mask = pci_irq_get_affinity(h->pdev, queue);
7401 if (!mask)
7402 goto fallback;
7403
7404 for_each_cpu(cpu, mask)
7405 h->reply_map[cpu] = queue;
7406 }
7407 return;
7408
7409fallback:
7410 for_each_possible_cpu(cpu)
7411 h->reply_map[cpu] = 0;
7412}
7413
7414
7415
7416
7417static int hpsa_interrupt_mode(struct ctlr_info *h)
7418{
7419 unsigned int flags = PCI_IRQ_LEGACY;
7420 int ret;
7421
7422
7423 switch (h->board_id) {
7424 case 0x40700E11:
7425 case 0x40800E11:
7426 case 0x40820E11:
7427 case 0x40830E11:
7428 break;
7429 default:
7430 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7431 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7432 if (ret > 0) {
7433 h->msix_vectors = ret;
7434 return 0;
7435 }
7436
7437 flags |= PCI_IRQ_MSI;
7438 break;
7439 }
7440
7441 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7442 if (ret < 0)
7443 return ret;
7444 return 0;
7445}
7446
7447static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7448 bool *legacy_board)
7449{
7450 int i;
7451 u32 subsystem_vendor_id, subsystem_device_id;
7452
7453 subsystem_vendor_id = pdev->subsystem_vendor;
7454 subsystem_device_id = pdev->subsystem_device;
7455 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7456 subsystem_vendor_id;
7457
7458 if (legacy_board)
7459 *legacy_board = false;
7460 for (i = 0; i < ARRAY_SIZE(products); i++)
7461 if (*board_id == products[i].board_id) {
7462 if (products[i].access != &SA5A_access &&
7463 products[i].access != &SA5B_access)
7464 return i;
7465 dev_warn(&pdev->dev,
7466 "legacy board ID: 0x%08x\n",
7467 *board_id);
7468 if (legacy_board)
7469 *legacy_board = true;
7470 return i;
7471 }
7472
7473 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7474 if (legacy_board)
7475 *legacy_board = true;
7476 return ARRAY_SIZE(products) - 1;
7477}
7478
7479static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7480 unsigned long *memory_bar)
7481{
7482 int i;
7483
7484 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7485 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7486
7487 *memory_bar = pci_resource_start(pdev, i);
7488 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7489 *memory_bar);
7490 return 0;
7491 }
7492 dev_warn(&pdev->dev, "no memory BAR found\n");
7493 return -ENODEV;
7494}
7495
7496static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7497 int wait_for_ready)
7498{
7499 int i, iterations;
7500 u32 scratchpad;
7501 if (wait_for_ready)
7502 iterations = HPSA_BOARD_READY_ITERATIONS;
7503 else
7504 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7505
7506 for (i = 0; i < iterations; i++) {
7507 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7508 if (wait_for_ready) {
7509 if (scratchpad == HPSA_FIRMWARE_READY)
7510 return 0;
7511 } else {
7512 if (scratchpad != HPSA_FIRMWARE_READY)
7513 return 0;
7514 }
7515 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7516 }
7517 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7518 return -ENODEV;
7519}
7520
7521static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7522 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7523 u64 *cfg_offset)
7524{
7525 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7526 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7527 *cfg_base_addr &= (u32) 0x0000ffff;
7528 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7529 if (*cfg_base_addr_index == -1) {
7530 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7531 return -ENODEV;
7532 }
7533 return 0;
7534}
7535
7536static void hpsa_free_cfgtables(struct ctlr_info *h)
7537{
7538 if (h->transtable) {
7539 iounmap(h->transtable);
7540 h->transtable = NULL;
7541 }
7542 if (h->cfgtable) {
7543 iounmap(h->cfgtable);
7544 h->cfgtable = NULL;
7545 }
7546}
7547
7548
7549
7550
7551static int hpsa_find_cfgtables(struct ctlr_info *h)
7552{
7553 u64 cfg_offset;
7554 u32 cfg_base_addr;
7555 u64 cfg_base_addr_index;
7556 u32 trans_offset;
7557 int rc;
7558
7559 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7560 &cfg_base_addr_index, &cfg_offset);
7561 if (rc)
7562 return rc;
7563 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7564 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7565 if (!h->cfgtable) {
7566 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7567 return -ENOMEM;
7568 }
7569 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7570 if (rc)
7571 return rc;
7572
7573 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7574 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7575 cfg_base_addr_index)+cfg_offset+trans_offset,
7576 sizeof(*h->transtable));
7577 if (!h->transtable) {
7578 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7579 hpsa_free_cfgtables(h);
7580 return -ENOMEM;
7581 }
7582 return 0;
7583}
7584
7585static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7586{
7587#define MIN_MAX_COMMANDS 16
7588 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7589
7590 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7591
7592
7593 if (reset_devices && h->max_commands > 32)
7594 h->max_commands = 32;
7595
7596 if (h->max_commands < MIN_MAX_COMMANDS) {
7597 dev_warn(&h->pdev->dev,
7598 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7599 h->max_commands,
7600 MIN_MAX_COMMANDS);
7601 h->max_commands = MIN_MAX_COMMANDS;
7602 }
7603}
7604
7605
7606
7607
7608
7609static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7610{
7611 return h->maxsgentries > 512;
7612}
7613
7614
7615
7616
7617
7618static void hpsa_find_board_params(struct ctlr_info *h)
7619{
7620 hpsa_get_max_perf_mode_cmds(h);
7621 h->nr_cmds = h->max_commands;
7622 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7623 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7624 if (hpsa_supports_chained_sg_blocks(h)) {
7625
7626 h->max_cmd_sg_entries = 32;
7627 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7628 h->maxsgentries--;
7629 } else {
7630
7631
7632
7633
7634
7635 h->max_cmd_sg_entries = 31;
7636 h->maxsgentries = 31;
7637 h->chainsize = 0;
7638 }
7639
7640
7641 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7642 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7643 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7644 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7645 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7646 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7647 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7648}
7649
7650static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7651{
7652 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7653 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7654 return false;
7655 }
7656 return true;
7657}
7658
7659static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7660{
7661 u32 driver_support;
7662
7663 driver_support = readl(&(h->cfgtable->driver_support));
7664
7665#ifdef CONFIG_X86
7666 driver_support |= ENABLE_SCSI_PREFETCH;
7667#endif
7668 driver_support |= ENABLE_UNIT_ATTN;
7669 writel(driver_support, &(h->cfgtable->driver_support));
7670}
7671
7672
7673
7674
7675static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7676{
7677 u32 dma_prefetch;
7678
7679 if (h->board_id != 0x3225103C)
7680 return;
7681 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7682 dma_prefetch |= 0x8000;
7683 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7684}
7685
7686static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7687{
7688 int i;
7689 u32 doorbell_value;
7690 unsigned long flags;
7691
7692 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7693 spin_lock_irqsave(&h->lock, flags);
7694 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7695 spin_unlock_irqrestore(&h->lock, flags);
7696 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7697 goto done;
7698
7699 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7700 }
7701 return -ENODEV;
7702done:
7703 return 0;
7704}
7705
7706static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7707{
7708 int i;
7709 u32 doorbell_value;
7710 unsigned long flags;
7711
7712
7713
7714
7715
7716 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7717 if (h->remove_in_progress)
7718 goto done;
7719 spin_lock_irqsave(&h->lock, flags);
7720 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7721 spin_unlock_irqrestore(&h->lock, flags);
7722 if (!(doorbell_value & CFGTBL_ChangeReq))
7723 goto done;
7724
7725 msleep(MODE_CHANGE_WAIT_INTERVAL);
7726 }
7727 return -ENODEV;
7728done:
7729 return 0;
7730}
7731
7732
7733static int hpsa_enter_simple_mode(struct ctlr_info *h)
7734{
7735 u32 trans_support;
7736
7737 trans_support = readl(&(h->cfgtable->TransportSupport));
7738 if (!(trans_support & SIMPLE_MODE))
7739 return -ENOTSUPP;
7740
7741 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7742
7743
7744 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7745 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7746 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7747 if (hpsa_wait_for_mode_change_ack(h))
7748 goto error;
7749 print_cfg_table(&h->pdev->dev, h->cfgtable);
7750 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7751 goto error;
7752 h->transMethod = CFGTBL_Trans_Simple;
7753 return 0;
7754error:
7755 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7756 return -ENODEV;
7757}
7758
7759
7760static void hpsa_free_pci_init(struct ctlr_info *h)
7761{
7762 hpsa_free_cfgtables(h);
7763 iounmap(h->vaddr);
7764 h->vaddr = NULL;
7765 hpsa_disable_interrupt_mode(h);
7766
7767
7768
7769
7770 pci_disable_device(h->pdev);
7771 pci_release_regions(h->pdev);
7772}
7773
7774
7775static int hpsa_pci_init(struct ctlr_info *h)
7776{
7777 int prod_index, err;
7778 bool legacy_board;
7779
7780 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7781 if (prod_index < 0)
7782 return prod_index;
7783 h->product_name = products[prod_index].product_name;
7784 h->access = *(products[prod_index].access);
7785 h->legacy_board = legacy_board;
7786 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7787 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7788
7789 err = pci_enable_device(h->pdev);
7790 if (err) {
7791 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7792 pci_disable_device(h->pdev);
7793 return err;
7794 }
7795
7796 err = pci_request_regions(h->pdev, HPSA);
7797 if (err) {
7798 dev_err(&h->pdev->dev,
7799 "failed to obtain PCI resources\n");
7800 pci_disable_device(h->pdev);
7801 return err;
7802 }
7803
7804 pci_set_master(h->pdev);
7805
7806 err = hpsa_interrupt_mode(h);
7807 if (err)
7808 goto clean1;
7809
7810
7811 hpsa_setup_reply_map(h);
7812
7813 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7814 if (err)
7815 goto clean2;
7816 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7817 if (!h->vaddr) {
7818 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7819 err = -ENOMEM;
7820 goto clean2;
7821 }
7822 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7823 if (err)
7824 goto clean3;
7825 err = hpsa_find_cfgtables(h);
7826 if (err)
7827 goto clean3;
7828 hpsa_find_board_params(h);
7829
7830 if (!hpsa_CISS_signature_present(h)) {
7831 err = -ENODEV;
7832 goto clean4;
7833 }
7834 hpsa_set_driver_support_bits(h);
7835 hpsa_p600_dma_prefetch_quirk(h);
7836 err = hpsa_enter_simple_mode(h);
7837 if (err)
7838 goto clean4;
7839 return 0;
7840
7841clean4:
7842 hpsa_free_cfgtables(h);
7843clean3:
7844 iounmap(h->vaddr);
7845 h->vaddr = NULL;
7846clean2:
7847 hpsa_disable_interrupt_mode(h);
7848clean1:
7849
7850
7851
7852
7853 pci_disable_device(h->pdev);
7854 pci_release_regions(h->pdev);
7855 return err;
7856}
7857
7858static void hpsa_hba_inquiry(struct ctlr_info *h)
7859{
7860 int rc;
7861
7862#define HBA_INQUIRY_BYTE_COUNT 64
7863 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7864 if (!h->hba_inquiry_data)
7865 return;
7866 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7867 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7868 if (rc != 0) {
7869 kfree(h->hba_inquiry_data);
7870 h->hba_inquiry_data = NULL;
7871 }
7872}
7873
7874static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7875{
7876 int rc, i;
7877 void __iomem *vaddr;
7878
7879 if (!reset_devices)
7880 return 0;
7881
7882
7883
7884
7885
7886 rc = pci_enable_device(pdev);
7887 if (rc) {
7888 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7889 return -ENODEV;
7890 }
7891 pci_disable_device(pdev);
7892 msleep(260);
7893 rc = pci_enable_device(pdev);
7894 if (rc) {
7895 dev_warn(&pdev->dev, "failed to enable device.\n");
7896 return -ENODEV;
7897 }
7898
7899 pci_set_master(pdev);
7900
7901 vaddr = pci_ioremap_bar(pdev, 0);
7902 if (vaddr == NULL) {
7903 rc = -ENOMEM;
7904 goto out_disable;
7905 }
7906 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7907 iounmap(vaddr);
7908
7909
7910 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7911
7912
7913
7914
7915
7916
7917 if (rc)
7918 goto out_disable;
7919
7920
7921 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7922 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7923 if (hpsa_noop(pdev) == 0)
7924 break;
7925 else
7926 dev_warn(&pdev->dev, "no-op failed%s\n",
7927 (i < 11 ? "; re-trying" : ""));
7928 }
7929
7930out_disable:
7931
7932 pci_disable_device(pdev);
7933 return rc;
7934}
7935
7936static void hpsa_free_cmd_pool(struct ctlr_info *h)
7937{
7938 kfree(h->cmd_pool_bits);
7939 h->cmd_pool_bits = NULL;
7940 if (h->cmd_pool) {
7941 dma_free_coherent(&h->pdev->dev,
7942 h->nr_cmds * sizeof(struct CommandList),
7943 h->cmd_pool,
7944 h->cmd_pool_dhandle);
7945 h->cmd_pool = NULL;
7946 h->cmd_pool_dhandle = 0;
7947 }
7948 if (h->errinfo_pool) {
7949 dma_free_coherent(&h->pdev->dev,
7950 h->nr_cmds * sizeof(struct ErrorInfo),
7951 h->errinfo_pool,
7952 h->errinfo_pool_dhandle);
7953 h->errinfo_pool = NULL;
7954 h->errinfo_pool_dhandle = 0;
7955 }
7956}
7957
7958static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7959{
7960 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
7961 sizeof(unsigned long),
7962 GFP_KERNEL);
7963 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
7964 h->nr_cmds * sizeof(*h->cmd_pool),
7965 &h->cmd_pool_dhandle, GFP_KERNEL);
7966 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
7967 h->nr_cmds * sizeof(*h->errinfo_pool),
7968 &h->errinfo_pool_dhandle, GFP_KERNEL);
7969 if ((h->cmd_pool_bits == NULL)
7970 || (h->cmd_pool == NULL)
7971 || (h->errinfo_pool == NULL)) {
7972 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7973 goto clean_up;
7974 }
7975 hpsa_preinitialize_commands(h);
7976 return 0;
7977clean_up:
7978 hpsa_free_cmd_pool(h);
7979 return -ENOMEM;
7980}
7981
7982
7983static void hpsa_free_irqs(struct ctlr_info *h)
7984{
7985 int i;
7986
7987 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7988
7989 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7990 h->q[h->intr_mode] = 0;
7991 return;
7992 }
7993
7994 for (i = 0; i < h->msix_vectors; i++) {
7995 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7996 h->q[i] = 0;
7997 }
7998 for (; i < MAX_REPLY_QUEUES; i++)
7999 h->q[i] = 0;
8000}
8001
8002
8003static int hpsa_request_irqs(struct ctlr_info *h,
8004 irqreturn_t (*msixhandler)(int, void *),
8005 irqreturn_t (*intxhandler)(int, void *))
8006{
8007 int rc, i;
8008
8009
8010
8011
8012
8013 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8014 h->q[i] = (u8) i;
8015
8016 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8017
8018 for (i = 0; i < h->msix_vectors; i++) {
8019 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8020 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8021 0, h->intrname[i],
8022 &h->q[i]);
8023 if (rc) {
8024 int j;
8025
8026 dev_err(&h->pdev->dev,
8027 "failed to get irq %d for %s\n",
8028 pci_irq_vector(h->pdev, i), h->devname);
8029 for (j = 0; j < i; j++) {
8030 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8031 h->q[j] = 0;
8032 }
8033 for (; j < MAX_REPLY_QUEUES; j++)
8034 h->q[j] = 0;
8035 return rc;
8036 }
8037 }
8038 } else {
8039
8040 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8041 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8042 h->msix_vectors ? "x" : "");
8043 rc = request_irq(pci_irq_vector(h->pdev, 0),
8044 msixhandler, 0,
8045 h->intrname[0],
8046 &h->q[h->intr_mode]);
8047 } else {
8048 sprintf(h->intrname[h->intr_mode],
8049 "%s-intx", h->devname);
8050 rc = request_irq(pci_irq_vector(h->pdev, 0),
8051 intxhandler, IRQF_SHARED,
8052 h->intrname[0],
8053 &h->q[h->intr_mode]);
8054 }
8055 }
8056 if (rc) {
8057 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8058 pci_irq_vector(h->pdev, 0), h->devname);
8059 hpsa_free_irqs(h);
8060 return -ENODEV;
8061 }
8062 return 0;
8063}
8064
8065static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8066{
8067 int rc;
8068 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8069
8070 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8071 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8072 if (rc) {
8073 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8074 return rc;
8075 }
8076
8077 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8078 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8079 if (rc) {
8080 dev_warn(&h->pdev->dev, "Board failed to become ready "
8081 "after soft reset.\n");
8082 return rc;
8083 }
8084
8085 return 0;
8086}
8087
8088static void hpsa_free_reply_queues(struct ctlr_info *h)
8089{
8090 int i;
8091
8092 for (i = 0; i < h->nreply_queues; i++) {
8093 if (!h->reply_queue[i].head)
8094 continue;
8095 dma_free_coherent(&h->pdev->dev,
8096 h->reply_queue_size,
8097 h->reply_queue[i].head,
8098 h->reply_queue[i].busaddr);
8099 h->reply_queue[i].head = NULL;
8100 h->reply_queue[i].busaddr = 0;
8101 }
8102 h->reply_queue_size = 0;
8103}
8104
8105static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8106{
8107 hpsa_free_performant_mode(h);
8108 hpsa_free_sg_chain_blocks(h);
8109 hpsa_free_cmd_pool(h);
8110 hpsa_free_irqs(h);
8111 scsi_host_put(h->scsi_host);
8112 h->scsi_host = NULL;
8113 hpsa_free_pci_init(h);
8114 free_percpu(h->lockup_detected);
8115 h->lockup_detected = NULL;
8116 if (h->resubmit_wq) {
8117 destroy_workqueue(h->resubmit_wq);
8118 h->resubmit_wq = NULL;
8119 }
8120 if (h->rescan_ctlr_wq) {
8121 destroy_workqueue(h->rescan_ctlr_wq);
8122 h->rescan_ctlr_wq = NULL;
8123 }
8124 kfree(h);
8125}
8126
8127
8128static void fail_all_outstanding_cmds(struct ctlr_info *h)
8129{
8130 int i, refcount;
8131 struct CommandList *c;
8132 int failcount = 0;
8133
8134 flush_workqueue(h->resubmit_wq);
8135 for (i = 0; i < h->nr_cmds; i++) {
8136 c = h->cmd_pool + i;
8137 refcount = atomic_inc_return(&c->refcount);
8138 if (refcount > 1) {
8139 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8140 finish_cmd(c);
8141 atomic_dec(&h->commands_outstanding);
8142 failcount++;
8143 }
8144 cmd_free(h, c);
8145 }
8146 dev_warn(&h->pdev->dev,
8147 "failed %d commands in fail_all\n", failcount);
8148}
8149
8150static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8151{
8152 int cpu;
8153
8154 for_each_online_cpu(cpu) {
8155 u32 *lockup_detected;
8156 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8157 *lockup_detected = value;
8158 }
8159 wmb();
8160}
8161
8162static void controller_lockup_detected(struct ctlr_info *h)
8163{
8164 unsigned long flags;
8165 u32 lockup_detected;
8166
8167 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8168 spin_lock_irqsave(&h->lock, flags);
8169 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8170 if (!lockup_detected) {
8171
8172 dev_warn(&h->pdev->dev,
8173 "lockup detected after %d but scratchpad register is zero\n",
8174 h->heartbeat_sample_interval / HZ);
8175 lockup_detected = 0xffffffff;
8176 }
8177 set_lockup_detected_for_all_cpus(h, lockup_detected);
8178 spin_unlock_irqrestore(&h->lock, flags);
8179 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8180 lockup_detected, h->heartbeat_sample_interval / HZ);
8181 if (lockup_detected == 0xffff0000) {
8182 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8183 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8184 }
8185 pci_disable_device(h->pdev);
8186 fail_all_outstanding_cmds(h);
8187}
8188
8189static int detect_controller_lockup(struct ctlr_info *h)
8190{
8191 u64 now;
8192 u32 heartbeat;
8193 unsigned long flags;
8194
8195 now = get_jiffies_64();
8196
8197 if (time_after64(h->last_intr_timestamp +
8198 (h->heartbeat_sample_interval), now))
8199 return false;
8200
8201
8202
8203
8204
8205
8206 if (time_after64(h->last_heartbeat_timestamp +
8207 (h->heartbeat_sample_interval), now))
8208 return false;
8209
8210
8211 spin_lock_irqsave(&h->lock, flags);
8212 heartbeat = readl(&h->cfgtable->HeartBeat);
8213 spin_unlock_irqrestore(&h->lock, flags);
8214 if (h->last_heartbeat == heartbeat) {
8215 controller_lockup_detected(h);
8216 return true;
8217 }
8218
8219
8220 h->last_heartbeat = heartbeat;
8221 h->last_heartbeat_timestamp = now;
8222 return false;
8223}
8224
8225
8226
8227
8228
8229
8230
8231
8232
8233
8234static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8235{
8236 int rc;
8237 int i;
8238 u8 ioaccel_status;
8239 unsigned char *buf;
8240 struct hpsa_scsi_dev_t *device;
8241
8242 if (!h)
8243 return;
8244
8245 buf = kmalloc(64, GFP_KERNEL);
8246 if (!buf)
8247 return;
8248
8249
8250
8251
8252 for (i = 0; i < h->ndevices; i++) {
8253 device = h->dev[i];
8254
8255 if (!device)
8256 continue;
8257 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8258 HPSA_VPD_LV_IOACCEL_STATUS))
8259 continue;
8260
8261 memset(buf, 0, 64);
8262
8263 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8264 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8265 buf, 64);
8266 if (rc != 0)
8267 continue;
8268
8269 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8270 device->offload_config =
8271 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8272 if (device->offload_config)
8273 device->offload_to_be_enabled =
8274 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8275
8276
8277
8278
8279
8280
8281
8282
8283
8284
8285
8286
8287 if (!device->offload_to_be_enabled)
8288 device->offload_enabled = 0;
8289 }
8290
8291 kfree(buf);
8292}
8293
8294static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8295{
8296 char *event_type;
8297
8298 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8299 return;
8300
8301
8302 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8303 | CFGTBL_Trans_io_accel2)) &&
8304 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8305 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8306
8307 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8308 event_type = "state change";
8309 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8310 event_type = "configuration change";
8311
8312 scsi_block_requests(h->scsi_host);
8313 hpsa_set_ioaccel_status(h);
8314 hpsa_drain_accel_commands(h);
8315
8316 dev_warn(&h->pdev->dev,
8317 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8318 h->events, event_type);
8319 writel(h->events, &(h->cfgtable->clear_event_notify));
8320
8321 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8322
8323 hpsa_wait_for_clear_event_notify_ack(h);
8324 scsi_unblock_requests(h->scsi_host);
8325 } else {
8326
8327 writel(h->events, &(h->cfgtable->clear_event_notify));
8328 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8329 hpsa_wait_for_clear_event_notify_ack(h);
8330 }
8331 return;
8332}
8333
8334
8335
8336
8337
8338
8339static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8340{
8341 if (h->drv_req_rescan) {
8342 h->drv_req_rescan = 0;
8343 return 1;
8344 }
8345
8346 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8347 return 0;
8348
8349 h->events = readl(&(h->cfgtable->event_notify));
8350 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8351}
8352
8353
8354
8355
8356static int hpsa_offline_devices_ready(struct ctlr_info *h)
8357{
8358 unsigned long flags;
8359 struct offline_device_entry *d;
8360 struct list_head *this, *tmp;
8361
8362 spin_lock_irqsave(&h->offline_device_lock, flags);
8363 list_for_each_safe(this, tmp, &h->offline_device_list) {
8364 d = list_entry(this, struct offline_device_entry,
8365 offline_list);
8366 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8367 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8368 spin_lock_irqsave(&h->offline_device_lock, flags);
8369 list_del(&d->offline_list);
8370 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8371 return 1;
8372 }
8373 spin_lock_irqsave(&h->offline_device_lock, flags);
8374 }
8375 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8376 return 0;
8377}
8378
8379static int hpsa_luns_changed(struct ctlr_info *h)
8380{
8381 int rc = 1;
8382 struct ReportLUNdata *logdev = NULL;
8383
8384
8385
8386
8387
8388 if (!h->lastlogicals)
8389 return rc;
8390
8391 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8392 if (!logdev)
8393 return rc;
8394
8395 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8396 dev_warn(&h->pdev->dev,
8397 "report luns failed, can't track lun changes.\n");
8398 goto out;
8399 }
8400 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8401 dev_info(&h->pdev->dev,
8402 "Lun changes detected.\n");
8403 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8404 goto out;
8405 } else
8406 rc = 0;
8407out:
8408 kfree(logdev);
8409 return rc;
8410}
8411
8412static void hpsa_perform_rescan(struct ctlr_info *h)
8413{
8414 struct Scsi_Host *sh = NULL;
8415 unsigned long flags;
8416
8417
8418
8419
8420 spin_lock_irqsave(&h->reset_lock, flags);
8421 if (h->reset_in_progress) {
8422 h->drv_req_rescan = 1;
8423 spin_unlock_irqrestore(&h->reset_lock, flags);
8424 return;
8425 }
8426 spin_unlock_irqrestore(&h->reset_lock, flags);
8427
8428 sh = scsi_host_get(h->scsi_host);
8429 if (sh != NULL) {
8430 hpsa_scan_start(sh);
8431 scsi_host_put(sh);
8432 h->drv_req_rescan = 0;
8433 }
8434}
8435
8436
8437
8438
8439static void hpsa_event_monitor_worker(struct work_struct *work)
8440{
8441 struct ctlr_info *h = container_of(to_delayed_work(work),
8442 struct ctlr_info, event_monitor_work);
8443 unsigned long flags;
8444
8445 spin_lock_irqsave(&h->lock, flags);
8446 if (h->remove_in_progress) {
8447 spin_unlock_irqrestore(&h->lock, flags);
8448 return;
8449 }
8450 spin_unlock_irqrestore(&h->lock, flags);
8451
8452 if (hpsa_ctlr_needs_rescan(h)) {
8453 hpsa_ack_ctlr_events(h);
8454 hpsa_perform_rescan(h);
8455 }
8456
8457 spin_lock_irqsave(&h->lock, flags);
8458 if (!h->remove_in_progress)
8459 schedule_delayed_work(&h->event_monitor_work,
8460 HPSA_EVENT_MONITOR_INTERVAL);
8461 spin_unlock_irqrestore(&h->lock, flags);
8462}
8463
8464static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8465{
8466 unsigned long flags;
8467 struct ctlr_info *h = container_of(to_delayed_work(work),
8468 struct ctlr_info, rescan_ctlr_work);
8469
8470 spin_lock_irqsave(&h->lock, flags);
8471 if (h->remove_in_progress) {
8472 spin_unlock_irqrestore(&h->lock, flags);
8473 return;
8474 }
8475 spin_unlock_irqrestore(&h->lock, flags);
8476
8477 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8478 hpsa_perform_rescan(h);
8479 } else if (h->discovery_polling) {
8480 if (hpsa_luns_changed(h)) {
8481 dev_info(&h->pdev->dev,
8482 "driver discovery polling rescan.\n");
8483 hpsa_perform_rescan(h);
8484 }
8485 }
8486 spin_lock_irqsave(&h->lock, flags);
8487 if (!h->remove_in_progress)
8488 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8489 h->heartbeat_sample_interval);
8490 spin_unlock_irqrestore(&h->lock, flags);
8491}
8492
8493static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8494{
8495 unsigned long flags;
8496 struct ctlr_info *h = container_of(to_delayed_work(work),
8497 struct ctlr_info, monitor_ctlr_work);
8498
8499 detect_controller_lockup(h);
8500 if (lockup_detected(h))
8501 return;
8502
8503 spin_lock_irqsave(&h->lock, flags);
8504 if (!h->remove_in_progress)
8505 schedule_delayed_work(&h->monitor_ctlr_work,
8506 h->heartbeat_sample_interval);
8507 spin_unlock_irqrestore(&h->lock, flags);
8508}
8509
8510static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8511 char *name)
8512{
8513 struct workqueue_struct *wq = NULL;
8514
8515 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8516 if (!wq)
8517 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8518
8519 return wq;
8520}
8521
8522static void hpda_free_ctlr_info(struct ctlr_info *h)
8523{
8524 kfree(h->reply_map);
8525 kfree(h);
8526}
8527
8528static struct ctlr_info *hpda_alloc_ctlr_info(void)
8529{
8530 struct ctlr_info *h;
8531
8532 h = kzalloc(sizeof(*h), GFP_KERNEL);
8533 if (!h)
8534 return NULL;
8535
8536 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8537 if (!h->reply_map) {
8538 kfree(h);
8539 return NULL;
8540 }
8541 return h;
8542}
8543
8544static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8545{
8546 int dac, rc;
8547 struct ctlr_info *h;
8548 int try_soft_reset = 0;
8549 unsigned long flags;
8550 u32 board_id;
8551
8552 if (number_of_controllers == 0)
8553 printk(KERN_INFO DRIVER_NAME "\n");
8554
8555 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8556 if (rc < 0) {
8557 dev_warn(&pdev->dev, "Board ID not found\n");
8558 return rc;
8559 }
8560
8561 rc = hpsa_init_reset_devices(pdev, board_id);
8562 if (rc) {
8563 if (rc != -ENOTSUPP)
8564 return rc;
8565
8566
8567
8568
8569
8570 try_soft_reset = 1;
8571 rc = 0;
8572 }
8573
8574reinit_after_soft_reset:
8575
8576
8577
8578
8579
8580 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8581 h = hpda_alloc_ctlr_info();
8582 if (!h) {
8583 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8584 return -ENOMEM;
8585 }
8586
8587 h->pdev = pdev;
8588
8589 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8590 INIT_LIST_HEAD(&h->offline_device_list);
8591 spin_lock_init(&h->lock);
8592 spin_lock_init(&h->offline_device_lock);
8593 spin_lock_init(&h->scan_lock);
8594 spin_lock_init(&h->reset_lock);
8595 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8596
8597
8598 h->lockup_detected = alloc_percpu(u32);
8599 if (!h->lockup_detected) {
8600 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8601 rc = -ENOMEM;
8602 goto clean1;
8603 }
8604 set_lockup_detected_for_all_cpus(h, 0);
8605
8606 rc = hpsa_pci_init(h);
8607 if (rc)
8608 goto clean2;
8609
8610
8611
8612 rc = hpsa_scsi_host_alloc(h);
8613 if (rc)
8614 goto clean2_5;
8615
8616 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8617 h->ctlr = number_of_controllers;
8618 number_of_controllers++;
8619
8620
8621 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8622 if (rc == 0) {
8623 dac = 1;
8624 } else {
8625 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8626 if (rc == 0) {
8627 dac = 0;
8628 } else {
8629 dev_err(&pdev->dev, "no suitable DMA available\n");
8630 goto clean3;
8631 }
8632 }
8633
8634
8635 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8636
8637 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8638 if (rc)
8639 goto clean3;
8640 rc = hpsa_alloc_cmd_pool(h);
8641 if (rc)
8642 goto clean4;
8643 rc = hpsa_alloc_sg_chain_blocks(h);
8644 if (rc)
8645 goto clean5;
8646 init_waitqueue_head(&h->scan_wait_queue);
8647 init_waitqueue_head(&h->event_sync_wait_queue);
8648 mutex_init(&h->reset_mutex);
8649 h->scan_finished = 1;
8650 h->scan_waiting = 0;
8651
8652 pci_set_drvdata(pdev, h);
8653 h->ndevices = 0;
8654
8655 spin_lock_init(&h->devlock);
8656 rc = hpsa_put_ctlr_into_performant_mode(h);
8657 if (rc)
8658 goto clean6;
8659
8660
8661 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8662 if (!h->rescan_ctlr_wq) {
8663 rc = -ENOMEM;
8664 goto clean7;
8665 }
8666
8667 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8668 if (!h->resubmit_wq) {
8669 rc = -ENOMEM;
8670 goto clean7;
8671 }
8672
8673
8674
8675
8676
8677
8678 if (try_soft_reset) {
8679
8680
8681
8682
8683
8684
8685
8686
8687 spin_lock_irqsave(&h->lock, flags);
8688 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8689 spin_unlock_irqrestore(&h->lock, flags);
8690 hpsa_free_irqs(h);
8691 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8692 hpsa_intx_discard_completions);
8693 if (rc) {
8694 dev_warn(&h->pdev->dev,
8695 "Failed to request_irq after soft reset.\n");
8696
8697
8698
8699
8700 hpsa_free_performant_mode(h);
8701 hpsa_free_sg_chain_blocks(h);
8702 hpsa_free_cmd_pool(h);
8703
8704
8705
8706
8707 goto clean3;
8708 }
8709
8710 rc = hpsa_kdump_soft_reset(h);
8711 if (rc)
8712
8713 goto clean7;
8714
8715 dev_info(&h->pdev->dev, "Board READY.\n");
8716 dev_info(&h->pdev->dev,
8717 "Waiting for stale completions to drain.\n");
8718 h->access.set_intr_mask(h, HPSA_INTR_ON);
8719 msleep(10000);
8720 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8721
8722 rc = controller_reset_failed(h->cfgtable);
8723 if (rc)
8724 dev_info(&h->pdev->dev,
8725 "Soft reset appears to have failed.\n");
8726
8727
8728
8729
8730
8731 hpsa_undo_allocations_after_kdump_soft_reset(h);
8732 try_soft_reset = 0;
8733 if (rc)
8734
8735 return -ENODEV;
8736
8737 goto reinit_after_soft_reset;
8738 }
8739
8740
8741 h->acciopath_status = 1;
8742
8743 h->discovery_polling = 0;
8744
8745
8746
8747 h->access.set_intr_mask(h, HPSA_INTR_ON);
8748
8749 hpsa_hba_inquiry(h);
8750
8751 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8752 if (!h->lastlogicals)
8753 dev_info(&h->pdev->dev,
8754 "Can't track change to report lun data\n");
8755
8756
8757 rc = hpsa_scsi_add_host(h);
8758 if (rc)
8759 goto clean7;
8760
8761
8762 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8763 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8764 schedule_delayed_work(&h->monitor_ctlr_work,
8765 h->heartbeat_sample_interval);
8766 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8767 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8768 h->heartbeat_sample_interval);
8769 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8770 schedule_delayed_work(&h->event_monitor_work,
8771 HPSA_EVENT_MONITOR_INTERVAL);
8772 return 0;
8773
8774clean7:
8775 hpsa_free_performant_mode(h);
8776 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8777clean6:
8778 hpsa_free_sg_chain_blocks(h);
8779clean5:
8780 hpsa_free_cmd_pool(h);
8781clean4:
8782 hpsa_free_irqs(h);
8783clean3:
8784 scsi_host_put(h->scsi_host);
8785 h->scsi_host = NULL;
8786clean2_5:
8787 hpsa_free_pci_init(h);
8788clean2:
8789 if (h->lockup_detected) {
8790 free_percpu(h->lockup_detected);
8791 h->lockup_detected = NULL;
8792 }
8793clean1:
8794 if (h->resubmit_wq) {
8795 destroy_workqueue(h->resubmit_wq);
8796 h->resubmit_wq = NULL;
8797 }
8798 if (h->rescan_ctlr_wq) {
8799 destroy_workqueue(h->rescan_ctlr_wq);
8800 h->rescan_ctlr_wq = NULL;
8801 }
8802 kfree(h);
8803 return rc;
8804}
8805
8806static void hpsa_flush_cache(struct ctlr_info *h)
8807{
8808 char *flush_buf;
8809 struct CommandList *c;
8810 int rc;
8811
8812 if (unlikely(lockup_detected(h)))
8813 return;
8814 flush_buf = kzalloc(4, GFP_KERNEL);
8815 if (!flush_buf)
8816 return;
8817
8818 c = cmd_alloc(h);
8819
8820 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8821 RAID_CTLR_LUNID, TYPE_CMD)) {
8822 goto out;
8823 }
8824 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8825 DEFAULT_TIMEOUT);
8826 if (rc)
8827 goto out;
8828 if (c->err_info->CommandStatus != 0)
8829out:
8830 dev_warn(&h->pdev->dev,
8831 "error flushing cache on controller\n");
8832 cmd_free(h, c);
8833 kfree(flush_buf);
8834}
8835
8836
8837
8838
8839static void hpsa_disable_rld_caching(struct ctlr_info *h)
8840{
8841 u32 *options;
8842 struct CommandList *c;
8843 int rc;
8844
8845
8846 if (unlikely(h->lockup_detected))
8847 return;
8848
8849 options = kzalloc(sizeof(*options), GFP_KERNEL);
8850 if (!options)
8851 return;
8852
8853 c = cmd_alloc(h);
8854
8855
8856 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8857 RAID_CTLR_LUNID, TYPE_CMD))
8858 goto errout;
8859
8860 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8861 NO_TIMEOUT);
8862 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8863 goto errout;
8864
8865
8866 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8867
8868 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8869 RAID_CTLR_LUNID, TYPE_CMD))
8870 goto errout;
8871
8872 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8873 NO_TIMEOUT);
8874 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8875 goto errout;
8876
8877
8878 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8879 RAID_CTLR_LUNID, TYPE_CMD))
8880 goto errout;
8881
8882 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8883 NO_TIMEOUT);
8884 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8885 goto errout;
8886
8887 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8888 goto out;
8889
8890errout:
8891 dev_err(&h->pdev->dev,
8892 "Error: failed to disable report lun data caching.\n");
8893out:
8894 cmd_free(h, c);
8895 kfree(options);
8896}
8897
8898static void __hpsa_shutdown(struct pci_dev *pdev)
8899{
8900 struct ctlr_info *h;
8901
8902 h = pci_get_drvdata(pdev);
8903
8904
8905
8906
8907 hpsa_flush_cache(h);
8908 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8909 hpsa_free_irqs(h);
8910 hpsa_disable_interrupt_mode(h);
8911}
8912
8913static void hpsa_shutdown(struct pci_dev *pdev)
8914{
8915 __hpsa_shutdown(pdev);
8916 pci_disable_device(pdev);
8917}
8918
8919static void hpsa_free_device_info(struct ctlr_info *h)
8920{
8921 int i;
8922
8923 for (i = 0; i < h->ndevices; i++) {
8924 kfree(h->dev[i]);
8925 h->dev[i] = NULL;
8926 }
8927}
8928
8929static void hpsa_remove_one(struct pci_dev *pdev)
8930{
8931 struct ctlr_info *h;
8932 unsigned long flags;
8933
8934 if (pci_get_drvdata(pdev) == NULL) {
8935 dev_err(&pdev->dev, "unable to remove device\n");
8936 return;
8937 }
8938 h = pci_get_drvdata(pdev);
8939
8940
8941 spin_lock_irqsave(&h->lock, flags);
8942 h->remove_in_progress = 1;
8943 spin_unlock_irqrestore(&h->lock, flags);
8944 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8945 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8946 cancel_delayed_work_sync(&h->event_monitor_work);
8947 destroy_workqueue(h->rescan_ctlr_wq);
8948 destroy_workqueue(h->resubmit_wq);
8949
8950 hpsa_delete_sas_host(h);
8951
8952
8953
8954
8955
8956
8957
8958 if (h->scsi_host)
8959 scsi_remove_host(h->scsi_host);
8960
8961
8962 __hpsa_shutdown(pdev);
8963
8964 hpsa_free_device_info(h);
8965
8966 kfree(h->hba_inquiry_data);
8967 h->hba_inquiry_data = NULL;
8968 hpsa_free_ioaccel2_sg_chain_blocks(h);
8969 hpsa_free_performant_mode(h);
8970 hpsa_free_sg_chain_blocks(h);
8971 hpsa_free_cmd_pool(h);
8972 kfree(h->lastlogicals);
8973
8974
8975
8976 scsi_host_put(h->scsi_host);
8977 h->scsi_host = NULL;
8978
8979
8980 hpsa_free_pci_init(h);
8981
8982 free_percpu(h->lockup_detected);
8983 h->lockup_detected = NULL;
8984
8985
8986 hpda_free_ctlr_info(h);
8987}
8988
8989static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8990 __attribute__((unused)) pm_message_t state)
8991{
8992 return -ENOSYS;
8993}
8994
8995static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8996{
8997 return -ENOSYS;
8998}
8999
9000static struct pci_driver hpsa_pci_driver = {
9001 .name = HPSA,
9002 .probe = hpsa_init_one,
9003 .remove = hpsa_remove_one,
9004 .id_table = hpsa_pci_device_id,
9005 .shutdown = hpsa_shutdown,
9006 .suspend = hpsa_suspend,
9007 .resume = hpsa_resume,
9008};
9009
9010
9011
9012
9013
9014
9015
9016
9017
9018
9019
9020
9021
9022static void calc_bucket_map(int bucket[], int num_buckets,
9023 int nsgs, int min_blocks, u32 *bucket_map)
9024{
9025 int i, j, b, size;
9026
9027
9028 for (i = 0; i <= nsgs; i++) {
9029
9030 size = i + min_blocks;
9031 b = num_buckets;
9032
9033 for (j = 0; j < num_buckets; j++) {
9034 if (bucket[j] >= size) {
9035 b = j;
9036 break;
9037 }
9038 }
9039
9040 bucket_map[i] = b;
9041 }
9042}
9043
9044
9045
9046
9047
9048static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9049{
9050 int i;
9051 unsigned long register_value;
9052 unsigned long transMethod = CFGTBL_Trans_Performant |
9053 (trans_support & CFGTBL_Trans_use_short_tags) |
9054 CFGTBL_Trans_enable_directed_msix |
9055 (trans_support & (CFGTBL_Trans_io_accel1 |
9056 CFGTBL_Trans_io_accel2));
9057 struct access_method access = SA5_performant_access;
9058
9059
9060
9061
9062
9063
9064
9065
9066
9067
9068
9069
9070
9071
9072
9073
9074
9075
9076 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9077#define MIN_IOACCEL2_BFT_ENTRY 5
9078#define HPSA_IOACCEL2_HEADER_SZ 4
9079 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9080 13, 14, 15, 16, 17, 18, 19,
9081 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9082 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9083 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9084 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9085 16 * MIN_IOACCEL2_BFT_ENTRY);
9086 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9087 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9088
9089
9090
9091
9092
9093
9094
9095
9096
9097
9098 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9099 access = SA5_performant_access_no_read;
9100
9101
9102 for (i = 0; i < h->nreply_queues; i++)
9103 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9104
9105 bft[7] = SG_ENTRIES_IN_CMD + 4;
9106 calc_bucket_map(bft, ARRAY_SIZE(bft),
9107 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9108 for (i = 0; i < 8; i++)
9109 writel(bft[i], &h->transtable->BlockFetch[i]);
9110
9111
9112 writel(h->max_commands, &h->transtable->RepQSize);
9113 writel(h->nreply_queues, &h->transtable->RepQCount);
9114 writel(0, &h->transtable->RepQCtrAddrLow32);
9115 writel(0, &h->transtable->RepQCtrAddrHigh32);
9116
9117 for (i = 0; i < h->nreply_queues; i++) {
9118 writel(0, &h->transtable->RepQAddr[i].upper);
9119 writel(h->reply_queue[i].busaddr,
9120 &h->transtable->RepQAddr[i].lower);
9121 }
9122
9123 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9124 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9125
9126
9127
9128 if (trans_support & CFGTBL_Trans_io_accel1) {
9129 access = SA5_ioaccel_mode1_access;
9130 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9131 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9132 } else
9133 if (trans_support & CFGTBL_Trans_io_accel2)
9134 access = SA5_ioaccel_mode2_access;
9135 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9136 if (hpsa_wait_for_mode_change_ack(h)) {
9137 dev_err(&h->pdev->dev,
9138 "performant mode problem - doorbell timeout\n");
9139 return -ENODEV;
9140 }
9141 register_value = readl(&(h->cfgtable->TransportActive));
9142 if (!(register_value & CFGTBL_Trans_Performant)) {
9143 dev_err(&h->pdev->dev,
9144 "performant mode problem - transport not active\n");
9145 return -ENODEV;
9146 }
9147
9148 h->access = access;
9149 h->transMethod = transMethod;
9150
9151 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9152 (trans_support & CFGTBL_Trans_io_accel2)))
9153 return 0;
9154
9155 if (trans_support & CFGTBL_Trans_io_accel1) {
9156
9157 for (i = 0; i < h->nreply_queues; i++) {
9158 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9159 h->reply_queue[i].current_entry =
9160 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9161 }
9162 bft[7] = h->ioaccel_maxsg + 8;
9163 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9164 h->ioaccel1_blockFetchTable);
9165
9166
9167 for (i = 0; i < h->nreply_queues; i++)
9168 memset(h->reply_queue[i].head,
9169 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9170 h->reply_queue_size);
9171
9172
9173
9174
9175 for (i = 0; i < h->nr_cmds; i++) {
9176 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9177
9178 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9179 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9180 (i * sizeof(struct ErrorInfo)));
9181 cp->err_info_len = sizeof(struct ErrorInfo);
9182 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9183 cp->host_context_flags =
9184 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9185 cp->timeout_sec = 0;
9186 cp->ReplyQueue = 0;
9187 cp->tag =
9188 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9189 cp->host_addr =
9190 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9191 (i * sizeof(struct io_accel1_cmd)));
9192 }
9193 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9194 u64 cfg_offset, cfg_base_addr_index;
9195 u32 bft2_offset, cfg_base_addr;
9196 int rc;
9197
9198 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9199 &cfg_base_addr_index, &cfg_offset);
9200 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9201 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9202 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9203 4, h->ioaccel2_blockFetchTable);
9204 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9205 BUILD_BUG_ON(offsetof(struct CfgTable,
9206 io_accel_request_size_offset) != 0xb8);
9207 h->ioaccel2_bft2_regs =
9208 remap_pci_mem(pci_resource_start(h->pdev,
9209 cfg_base_addr_index) +
9210 cfg_offset + bft2_offset,
9211 ARRAY_SIZE(bft2) *
9212 sizeof(*h->ioaccel2_bft2_regs));
9213 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9214 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9215 }
9216 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9217 if (hpsa_wait_for_mode_change_ack(h)) {
9218 dev_err(&h->pdev->dev,
9219 "performant mode problem - enabling ioaccel mode\n");
9220 return -ENODEV;
9221 }
9222 return 0;
9223}
9224
9225
9226static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9227{
9228 if (h->ioaccel_cmd_pool) {
9229 pci_free_consistent(h->pdev,
9230 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9231 h->ioaccel_cmd_pool,
9232 h->ioaccel_cmd_pool_dhandle);
9233 h->ioaccel_cmd_pool = NULL;
9234 h->ioaccel_cmd_pool_dhandle = 0;
9235 }
9236 kfree(h->ioaccel1_blockFetchTable);
9237 h->ioaccel1_blockFetchTable = NULL;
9238}
9239
9240
9241static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9242{
9243 h->ioaccel_maxsg =
9244 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9245 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9246 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9247
9248
9249
9250
9251
9252 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9253 IOACCEL1_COMMANDLIST_ALIGNMENT);
9254 h->ioaccel_cmd_pool =
9255 dma_alloc_coherent(&h->pdev->dev,
9256 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9257 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9258
9259 h->ioaccel1_blockFetchTable =
9260 kmalloc(((h->ioaccel_maxsg + 1) *
9261 sizeof(u32)), GFP_KERNEL);
9262
9263 if ((h->ioaccel_cmd_pool == NULL) ||
9264 (h->ioaccel1_blockFetchTable == NULL))
9265 goto clean_up;
9266
9267 memset(h->ioaccel_cmd_pool, 0,
9268 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9269 return 0;
9270
9271clean_up:
9272 hpsa_free_ioaccel1_cmd_and_bft(h);
9273 return -ENOMEM;
9274}
9275
9276
9277static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9278{
9279 hpsa_free_ioaccel2_sg_chain_blocks(h);
9280
9281 if (h->ioaccel2_cmd_pool) {
9282 pci_free_consistent(h->pdev,
9283 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9284 h->ioaccel2_cmd_pool,
9285 h->ioaccel2_cmd_pool_dhandle);
9286 h->ioaccel2_cmd_pool = NULL;
9287 h->ioaccel2_cmd_pool_dhandle = 0;
9288 }
9289 kfree(h->ioaccel2_blockFetchTable);
9290 h->ioaccel2_blockFetchTable = NULL;
9291}
9292
9293
9294static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9295{
9296 int rc;
9297
9298
9299
9300 h->ioaccel_maxsg =
9301 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9302 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9303 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9304
9305 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9306 IOACCEL2_COMMANDLIST_ALIGNMENT);
9307 h->ioaccel2_cmd_pool =
9308 dma_alloc_coherent(&h->pdev->dev,
9309 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9310 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9311
9312 h->ioaccel2_blockFetchTable =
9313 kmalloc(((h->ioaccel_maxsg + 1) *
9314 sizeof(u32)), GFP_KERNEL);
9315
9316 if ((h->ioaccel2_cmd_pool == NULL) ||
9317 (h->ioaccel2_blockFetchTable == NULL)) {
9318 rc = -ENOMEM;
9319 goto clean_up;
9320 }
9321
9322 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9323 if (rc)
9324 goto clean_up;
9325
9326 memset(h->ioaccel2_cmd_pool, 0,
9327 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9328 return 0;
9329
9330clean_up:
9331 hpsa_free_ioaccel2_cmd_and_bft(h);
9332 return rc;
9333}
9334
9335
9336static void hpsa_free_performant_mode(struct ctlr_info *h)
9337{
9338 kfree(h->blockFetchTable);
9339 h->blockFetchTable = NULL;
9340 hpsa_free_reply_queues(h);
9341 hpsa_free_ioaccel1_cmd_and_bft(h);
9342 hpsa_free_ioaccel2_cmd_and_bft(h);
9343}
9344
9345
9346
9347
9348static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9349{
9350 u32 trans_support;
9351 unsigned long transMethod = CFGTBL_Trans_Performant |
9352 CFGTBL_Trans_use_short_tags;
9353 int i, rc;
9354
9355 if (hpsa_simple_mode)
9356 return 0;
9357
9358 trans_support = readl(&(h->cfgtable->TransportSupport));
9359 if (!(trans_support & PERFORMANT_MODE))
9360 return 0;
9361
9362
9363 if (trans_support & CFGTBL_Trans_io_accel1) {
9364 transMethod |= CFGTBL_Trans_io_accel1 |
9365 CFGTBL_Trans_enable_directed_msix;
9366 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9367 if (rc)
9368 return rc;
9369 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9370 transMethod |= CFGTBL_Trans_io_accel2 |
9371 CFGTBL_Trans_enable_directed_msix;
9372 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9373 if (rc)
9374 return rc;
9375 }
9376
9377 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9378 hpsa_get_max_perf_mode_cmds(h);
9379
9380 h->reply_queue_size = h->max_commands * sizeof(u64);
9381
9382 for (i = 0; i < h->nreply_queues; i++) {
9383 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9384 h->reply_queue_size,
9385 &h->reply_queue[i].busaddr,
9386 GFP_KERNEL);
9387 if (!h->reply_queue[i].head) {
9388 rc = -ENOMEM;
9389 goto clean1;
9390 }
9391 h->reply_queue[i].size = h->max_commands;
9392 h->reply_queue[i].wraparound = 1;
9393 h->reply_queue[i].current_entry = 0;
9394 }
9395
9396
9397 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9398 sizeof(u32)), GFP_KERNEL);
9399 if (!h->blockFetchTable) {
9400 rc = -ENOMEM;
9401 goto clean1;
9402 }
9403
9404 rc = hpsa_enter_performant_mode(h, trans_support);
9405 if (rc)
9406 goto clean2;
9407 return 0;
9408
9409clean2:
9410 kfree(h->blockFetchTable);
9411 h->blockFetchTable = NULL;
9412clean1:
9413 hpsa_free_reply_queues(h);
9414 hpsa_free_ioaccel1_cmd_and_bft(h);
9415 hpsa_free_ioaccel2_cmd_and_bft(h);
9416 return rc;
9417}
9418
9419static int is_accelerated_cmd(struct CommandList *c)
9420{
9421 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9422}
9423
9424static void hpsa_drain_accel_commands(struct ctlr_info *h)
9425{
9426 struct CommandList *c = NULL;
9427 int i, accel_cmds_out;
9428 int refcount;
9429
9430 do {
9431 accel_cmds_out = 0;
9432 for (i = 0; i < h->nr_cmds; i++) {
9433 c = h->cmd_pool + i;
9434 refcount = atomic_inc_return(&c->refcount);
9435 if (refcount > 1)
9436 accel_cmds_out += is_accelerated_cmd(c);
9437 cmd_free(h, c);
9438 }
9439 if (accel_cmds_out <= 0)
9440 break;
9441 msleep(100);
9442 } while (1);
9443}
9444
9445static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9446 struct hpsa_sas_port *hpsa_sas_port)
9447{
9448 struct hpsa_sas_phy *hpsa_sas_phy;
9449 struct sas_phy *phy;
9450
9451 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9452 if (!hpsa_sas_phy)
9453 return NULL;
9454
9455 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9456 hpsa_sas_port->next_phy_index);
9457 if (!phy) {
9458 kfree(hpsa_sas_phy);
9459 return NULL;
9460 }
9461
9462 hpsa_sas_port->next_phy_index++;
9463 hpsa_sas_phy->phy = phy;
9464 hpsa_sas_phy->parent_port = hpsa_sas_port;
9465
9466 return hpsa_sas_phy;
9467}
9468
9469static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9470{
9471 struct sas_phy *phy = hpsa_sas_phy->phy;
9472
9473 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9474 if (hpsa_sas_phy->added_to_port)
9475 list_del(&hpsa_sas_phy->phy_list_entry);
9476 sas_phy_delete(phy);
9477 kfree(hpsa_sas_phy);
9478}
9479
9480static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9481{
9482 int rc;
9483 struct hpsa_sas_port *hpsa_sas_port;
9484 struct sas_phy *phy;
9485 struct sas_identify *identify;
9486
9487 hpsa_sas_port = hpsa_sas_phy->parent_port;
9488 phy = hpsa_sas_phy->phy;
9489
9490 identify = &phy->identify;
9491 memset(identify, 0, sizeof(*identify));
9492 identify->sas_address = hpsa_sas_port->sas_address;
9493 identify->device_type = SAS_END_DEVICE;
9494 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9495 identify->target_port_protocols = SAS_PROTOCOL_STP;
9496 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9497 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9498 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9499 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9500 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9501
9502 rc = sas_phy_add(hpsa_sas_phy->phy);
9503 if (rc)
9504 return rc;
9505
9506 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9507 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9508 &hpsa_sas_port->phy_list_head);
9509 hpsa_sas_phy->added_to_port = true;
9510
9511 return 0;
9512}
9513
9514static int
9515 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9516 struct sas_rphy *rphy)
9517{
9518 struct sas_identify *identify;
9519
9520 identify = &rphy->identify;
9521 identify->sas_address = hpsa_sas_port->sas_address;
9522 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9523 identify->target_port_protocols = SAS_PROTOCOL_STP;
9524
9525 return sas_rphy_add(rphy);
9526}
9527
9528static struct hpsa_sas_port
9529 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9530 u64 sas_address)
9531{
9532 int rc;
9533 struct hpsa_sas_port *hpsa_sas_port;
9534 struct sas_port *port;
9535
9536 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9537 if (!hpsa_sas_port)
9538 return NULL;
9539
9540 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9541 hpsa_sas_port->parent_node = hpsa_sas_node;
9542
9543 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9544 if (!port)
9545 goto free_hpsa_port;
9546
9547 rc = sas_port_add(port);
9548 if (rc)
9549 goto free_sas_port;
9550
9551 hpsa_sas_port->port = port;
9552 hpsa_sas_port->sas_address = sas_address;
9553 list_add_tail(&hpsa_sas_port->port_list_entry,
9554 &hpsa_sas_node->port_list_head);
9555
9556 return hpsa_sas_port;
9557
9558free_sas_port:
9559 sas_port_free(port);
9560free_hpsa_port:
9561 kfree(hpsa_sas_port);
9562
9563 return NULL;
9564}
9565
9566static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9567{
9568 struct hpsa_sas_phy *hpsa_sas_phy;
9569 struct hpsa_sas_phy *next;
9570
9571 list_for_each_entry_safe(hpsa_sas_phy, next,
9572 &hpsa_sas_port->phy_list_head, phy_list_entry)
9573 hpsa_free_sas_phy(hpsa_sas_phy);
9574
9575 sas_port_delete(hpsa_sas_port->port);
9576 list_del(&hpsa_sas_port->port_list_entry);
9577 kfree(hpsa_sas_port);
9578}
9579
9580static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9581{
9582 struct hpsa_sas_node *hpsa_sas_node;
9583
9584 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9585 if (hpsa_sas_node) {
9586 hpsa_sas_node->parent_dev = parent_dev;
9587 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9588 }
9589
9590 return hpsa_sas_node;
9591}
9592
9593static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9594{
9595 struct hpsa_sas_port *hpsa_sas_port;
9596 struct hpsa_sas_port *next;
9597
9598 if (!hpsa_sas_node)
9599 return;
9600
9601 list_for_each_entry_safe(hpsa_sas_port, next,
9602 &hpsa_sas_node->port_list_head, port_list_entry)
9603 hpsa_free_sas_port(hpsa_sas_port);
9604
9605 kfree(hpsa_sas_node);
9606}
9607
9608static struct hpsa_scsi_dev_t
9609 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9610 struct sas_rphy *rphy)
9611{
9612 int i;
9613 struct hpsa_scsi_dev_t *device;
9614
9615 for (i = 0; i < h->ndevices; i++) {
9616 device = h->dev[i];
9617 if (!device->sas_port)
9618 continue;
9619 if (device->sas_port->rphy == rphy)
9620 return device;
9621 }
9622
9623 return NULL;
9624}
9625
9626static int hpsa_add_sas_host(struct ctlr_info *h)
9627{
9628 int rc;
9629 struct device *parent_dev;
9630 struct hpsa_sas_node *hpsa_sas_node;
9631 struct hpsa_sas_port *hpsa_sas_port;
9632 struct hpsa_sas_phy *hpsa_sas_phy;
9633
9634 parent_dev = &h->scsi_host->shost_dev;
9635
9636 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9637 if (!hpsa_sas_node)
9638 return -ENOMEM;
9639
9640 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9641 if (!hpsa_sas_port) {
9642 rc = -ENODEV;
9643 goto free_sas_node;
9644 }
9645
9646 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9647 if (!hpsa_sas_phy) {
9648 rc = -ENODEV;
9649 goto free_sas_port;
9650 }
9651
9652 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9653 if (rc)
9654 goto free_sas_phy;
9655
9656 h->sas_host = hpsa_sas_node;
9657
9658 return 0;
9659
9660free_sas_phy:
9661 hpsa_free_sas_phy(hpsa_sas_phy);
9662free_sas_port:
9663 hpsa_free_sas_port(hpsa_sas_port);
9664free_sas_node:
9665 hpsa_free_sas_node(hpsa_sas_node);
9666
9667 return rc;
9668}
9669
9670static void hpsa_delete_sas_host(struct ctlr_info *h)
9671{
9672 hpsa_free_sas_node(h->sas_host);
9673}
9674
9675static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9676 struct hpsa_scsi_dev_t *device)
9677{
9678 int rc;
9679 struct hpsa_sas_port *hpsa_sas_port;
9680 struct sas_rphy *rphy;
9681
9682 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9683 if (!hpsa_sas_port)
9684 return -ENOMEM;
9685
9686 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9687 if (!rphy) {
9688 rc = -ENODEV;
9689 goto free_sas_port;
9690 }
9691
9692 hpsa_sas_port->rphy = rphy;
9693 device->sas_port = hpsa_sas_port;
9694
9695 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9696 if (rc)
9697 goto free_sas_port;
9698
9699 return 0;
9700
9701free_sas_port:
9702 hpsa_free_sas_port(hpsa_sas_port);
9703 device->sas_port = NULL;
9704
9705 return rc;
9706}
9707
9708static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9709{
9710 if (device->sas_port) {
9711 hpsa_free_sas_port(device->sas_port);
9712 device->sas_port = NULL;
9713 }
9714}
9715
9716static int
9717hpsa_sas_get_linkerrors(struct sas_phy *phy)
9718{
9719 return 0;
9720}
9721
9722static int
9723hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9724{
9725 struct Scsi_Host *shost = phy_to_shost(rphy);
9726 struct ctlr_info *h;
9727 struct hpsa_scsi_dev_t *sd;
9728
9729 if (!shost)
9730 return -ENXIO;
9731
9732 h = shost_to_hba(shost);
9733
9734 if (!h)
9735 return -ENXIO;
9736
9737 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9738 if (!sd)
9739 return -ENXIO;
9740
9741 *identifier = sd->eli;
9742
9743 return 0;
9744}
9745
9746static int
9747hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9748{
9749 return -ENXIO;
9750}
9751
9752static int
9753hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9754{
9755 return 0;
9756}
9757
9758static int
9759hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9760{
9761 return 0;
9762}
9763
9764static int
9765hpsa_sas_phy_setup(struct sas_phy *phy)
9766{
9767 return 0;
9768}
9769
9770static void
9771hpsa_sas_phy_release(struct sas_phy *phy)
9772{
9773}
9774
9775static int
9776hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9777{
9778 return -EINVAL;
9779}
9780
9781static struct sas_function_template hpsa_sas_transport_functions = {
9782 .get_linkerrors = hpsa_sas_get_linkerrors,
9783 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9784 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9785 .phy_reset = hpsa_sas_phy_reset,
9786 .phy_enable = hpsa_sas_phy_enable,
9787 .phy_setup = hpsa_sas_phy_setup,
9788 .phy_release = hpsa_sas_phy_release,
9789 .set_phy_speed = hpsa_sas_phy_speed,
9790};
9791
9792
9793
9794
9795
9796static int __init hpsa_init(void)
9797{
9798 int rc;
9799
9800 hpsa_sas_transport_template =
9801 sas_attach_transport(&hpsa_sas_transport_functions);
9802 if (!hpsa_sas_transport_template)
9803 return -ENODEV;
9804
9805 rc = pci_register_driver(&hpsa_pci_driver);
9806
9807 if (rc)
9808 sas_release_transport(hpsa_sas_transport_template);
9809
9810 return rc;
9811}
9812
9813static void __exit hpsa_cleanup(void)
9814{
9815 pci_unregister_driver(&hpsa_pci_driver);
9816 sas_release_transport(hpsa_sas_transport_template);
9817}
9818
9819static void __attribute__((unused)) verify_offsets(void)
9820{
9821#define VERIFY_OFFSET(member, offset) \
9822 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9823
9824 VERIFY_OFFSET(structure_size, 0);
9825 VERIFY_OFFSET(volume_blk_size, 4);
9826 VERIFY_OFFSET(volume_blk_cnt, 8);
9827 VERIFY_OFFSET(phys_blk_shift, 16);
9828 VERIFY_OFFSET(parity_rotation_shift, 17);
9829 VERIFY_OFFSET(strip_size, 18);
9830 VERIFY_OFFSET(disk_starting_blk, 20);
9831 VERIFY_OFFSET(disk_blk_cnt, 28);
9832 VERIFY_OFFSET(data_disks_per_row, 36);
9833 VERIFY_OFFSET(metadata_disks_per_row, 38);
9834 VERIFY_OFFSET(row_cnt, 40);
9835 VERIFY_OFFSET(layout_map_count, 42);
9836 VERIFY_OFFSET(flags, 44);
9837 VERIFY_OFFSET(dekindex, 46);
9838
9839 VERIFY_OFFSET(data, 64);
9840
9841#undef VERIFY_OFFSET
9842
9843#define VERIFY_OFFSET(member, offset) \
9844 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9845
9846 VERIFY_OFFSET(IU_type, 0);
9847 VERIFY_OFFSET(direction, 1);
9848 VERIFY_OFFSET(reply_queue, 2);
9849
9850 VERIFY_OFFSET(scsi_nexus, 4);
9851 VERIFY_OFFSET(Tag, 8);
9852 VERIFY_OFFSET(cdb, 16);
9853 VERIFY_OFFSET(cciss_lun, 32);
9854 VERIFY_OFFSET(data_len, 40);
9855 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9856 VERIFY_OFFSET(sg_count, 45);
9857
9858 VERIFY_OFFSET(err_ptr, 48);
9859 VERIFY_OFFSET(err_len, 56);
9860
9861 VERIFY_OFFSET(sg, 64);
9862
9863#undef VERIFY_OFFSET
9864
9865#define VERIFY_OFFSET(member, offset) \
9866 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9867
9868 VERIFY_OFFSET(dev_handle, 0x00);
9869 VERIFY_OFFSET(reserved1, 0x02);
9870 VERIFY_OFFSET(function, 0x03);
9871 VERIFY_OFFSET(reserved2, 0x04);
9872 VERIFY_OFFSET(err_info, 0x0C);
9873 VERIFY_OFFSET(reserved3, 0x10);
9874 VERIFY_OFFSET(err_info_len, 0x12);
9875 VERIFY_OFFSET(reserved4, 0x13);
9876 VERIFY_OFFSET(sgl_offset, 0x14);
9877 VERIFY_OFFSET(reserved5, 0x15);
9878 VERIFY_OFFSET(transfer_len, 0x1C);
9879 VERIFY_OFFSET(reserved6, 0x20);
9880 VERIFY_OFFSET(io_flags, 0x24);
9881 VERIFY_OFFSET(reserved7, 0x26);
9882 VERIFY_OFFSET(LUN, 0x34);
9883 VERIFY_OFFSET(control, 0x3C);
9884 VERIFY_OFFSET(CDB, 0x40);
9885 VERIFY_OFFSET(reserved8, 0x50);
9886 VERIFY_OFFSET(host_context_flags, 0x60);
9887 VERIFY_OFFSET(timeout_sec, 0x62);
9888 VERIFY_OFFSET(ReplyQueue, 0x64);
9889 VERIFY_OFFSET(reserved9, 0x65);
9890 VERIFY_OFFSET(tag, 0x68);
9891 VERIFY_OFFSET(host_addr, 0x70);
9892 VERIFY_OFFSET(CISS_LUN, 0x78);
9893 VERIFY_OFFSET(SG, 0x78 + 8);
9894#undef VERIFY_OFFSET
9895}
9896
9897module_init(hpsa_init);
9898module_exit(hpsa_cleanup);
9899