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13#include <linux/module.h>
14#include <linux/interrupt.h>
15
16#include "../comedidev.h"
17
18#include "amplc_dio200.h"
19#include "comedi_8254.h"
20#include "8255.h"
21
22
23#define DIO200_IO_SIZE 0x20
24#define DIO200_PCIE_IO_SIZE 0x4000
25#define DIO200_CLK_SCE(x) (0x18 + (x))
26#define DIO200_GAT_SCE(x) (0x1b + (x))
27#define DIO200_INT_SCE 0x1e
28
29#define DIO200_ENHANCE 0x20
30#define DIO200_VERSION 0x24
31#define DIO200_TS_CONFIG 0x600
32#define DIO200_TS_COUNT 0x602
33
34
35
36
37
38
39
40
41
42static unsigned char clk_gat_sce(unsigned int which, unsigned int chan,
43 unsigned int source)
44{
45 return (which << 5) | (chan << 3) |
46 ((source & 030) << 3) | (source & 007);
47}
48
49static unsigned char clk_sce(unsigned int which, unsigned int chan,
50 unsigned int source)
51{
52 return clk_gat_sce(which, chan, source);
53}
54
55static unsigned char gat_sce(unsigned int which, unsigned int chan,
56 unsigned int source)
57{
58 return clk_gat_sce(which, chan, source);
59}
60
61
62
63
64static const unsigned int clock_period[32] = {
65 [1] = 100,
66 [2] = 1000,
67 [3] = 10000,
68 [4] = 100000,
69 [5] = 1000000,
70 [11] = 50,
71
72};
73
74
75
76
77#define TS_CONFIG_RESET 0x100
78#define TS_CONFIG_CLK_SRC_MASK 0x0FF
79#define TS_CONFIG_MAX_CLK_SRC 2
80
81
82
83
84static const unsigned int ts_clock_period[TS_CONFIG_MAX_CLK_SRC + 1] = {
85 1,
86 1000,
87 1000000,
88};
89
90struct dio200_subdev_8255 {
91 unsigned int ofs;
92};
93
94struct dio200_subdev_intr {
95 spinlock_t spinlock;
96 unsigned int ofs;
97 unsigned int valid_isns;
98 unsigned int enabled_isns;
99 unsigned int active:1;
100};
101
102static unsigned char dio200_read8(struct comedi_device *dev,
103 unsigned int offset)
104{
105 const struct dio200_board *board = dev->board_ptr;
106
107 if (board->is_pcie)
108 offset <<= 3;
109
110 if (dev->mmio)
111 return readb(dev->mmio + offset);
112 return inb(dev->iobase + offset);
113}
114
115static void dio200_write8(struct comedi_device *dev,
116 unsigned int offset, unsigned char val)
117{
118 const struct dio200_board *board = dev->board_ptr;
119
120 if (board->is_pcie)
121 offset <<= 3;
122
123 if (dev->mmio)
124 writeb(val, dev->mmio + offset);
125 else
126 outb(val, dev->iobase + offset);
127}
128
129static unsigned int dio200_read32(struct comedi_device *dev,
130 unsigned int offset)
131{
132 const struct dio200_board *board = dev->board_ptr;
133
134 if (board->is_pcie)
135 offset <<= 3;
136
137 if (dev->mmio)
138 return readl(dev->mmio + offset);
139 return inl(dev->iobase + offset);
140}
141
142static void dio200_write32(struct comedi_device *dev,
143 unsigned int offset, unsigned int val)
144{
145 const struct dio200_board *board = dev->board_ptr;
146
147 if (board->is_pcie)
148 offset <<= 3;
149
150 if (dev->mmio)
151 writel(val, dev->mmio + offset);
152 else
153 outl(val, dev->iobase + offset);
154}
155
156static unsigned int dio200_subdev_8254_offset(struct comedi_device *dev,
157 struct comedi_subdevice *s)
158{
159 const struct dio200_board *board = dev->board_ptr;
160 struct comedi_8254 *i8254 = s->private;
161 unsigned int offset;
162
163
164 if (dev->mmio)
165 offset = i8254->mmio - dev->mmio;
166 else
167 offset = i8254->iobase - dev->iobase;
168
169
170 if (board->is_pcie)
171 offset >>= 3;
172
173
174 return offset;
175}
176
177static int dio200_subdev_intr_insn_bits(struct comedi_device *dev,
178 struct comedi_subdevice *s,
179 struct comedi_insn *insn,
180 unsigned int *data)
181{
182 const struct dio200_board *board = dev->board_ptr;
183 struct dio200_subdev_intr *subpriv = s->private;
184
185 if (board->has_int_sce) {
186
187 data[1] = dio200_read8(dev, subpriv->ofs) & subpriv->valid_isns;
188 } else {
189
190 data[0] = 0;
191 }
192
193 return insn->n;
194}
195
196static void dio200_stop_intr(struct comedi_device *dev,
197 struct comedi_subdevice *s)
198{
199 const struct dio200_board *board = dev->board_ptr;
200 struct dio200_subdev_intr *subpriv = s->private;
201
202 subpriv->active = false;
203 subpriv->enabled_isns = 0;
204 if (board->has_int_sce)
205 dio200_write8(dev, subpriv->ofs, 0);
206}
207
208static void dio200_start_intr(struct comedi_device *dev,
209 struct comedi_subdevice *s)
210{
211 const struct dio200_board *board = dev->board_ptr;
212 struct dio200_subdev_intr *subpriv = s->private;
213 struct comedi_cmd *cmd = &s->async->cmd;
214 unsigned int n;
215 unsigned int isn_bits;
216
217
218 isn_bits = 0;
219 if (cmd->chanlist) {
220 for (n = 0; n < cmd->chanlist_len; n++)
221 isn_bits |= (1U << CR_CHAN(cmd->chanlist[n]));
222 }
223 isn_bits &= subpriv->valid_isns;
224
225 subpriv->enabled_isns = isn_bits;
226 if (board->has_int_sce)
227 dio200_write8(dev, subpriv->ofs, isn_bits);
228}
229
230static int dio200_inttrig_start_intr(struct comedi_device *dev,
231 struct comedi_subdevice *s,
232 unsigned int trig_num)
233{
234 struct dio200_subdev_intr *subpriv = s->private;
235 struct comedi_cmd *cmd = &s->async->cmd;
236 unsigned long flags;
237
238 if (trig_num != cmd->start_arg)
239 return -EINVAL;
240
241 spin_lock_irqsave(&subpriv->spinlock, flags);
242 s->async->inttrig = NULL;
243 if (subpriv->active)
244 dio200_start_intr(dev, s);
245
246 spin_unlock_irqrestore(&subpriv->spinlock, flags);
247
248 return 1;
249}
250
251static void dio200_read_scan_intr(struct comedi_device *dev,
252 struct comedi_subdevice *s,
253 unsigned int triggered)
254{
255 struct comedi_cmd *cmd = &s->async->cmd;
256 unsigned short val;
257 unsigned int n, ch;
258
259 val = 0;
260 for (n = 0; n < cmd->chanlist_len; n++) {
261 ch = CR_CHAN(cmd->chanlist[n]);
262 if (triggered & (1U << ch))
263 val |= (1U << n);
264 }
265
266 comedi_buf_write_samples(s, &val, 1);
267
268 if (cmd->stop_src == TRIG_COUNT &&
269 s->async->scans_done >= cmd->stop_arg)
270 s->async->events |= COMEDI_CB_EOA;
271}
272
273static int dio200_handle_read_intr(struct comedi_device *dev,
274 struct comedi_subdevice *s)
275{
276 const struct dio200_board *board = dev->board_ptr;
277 struct dio200_subdev_intr *subpriv = s->private;
278 unsigned int triggered;
279 unsigned int intstat;
280 unsigned int cur_enabled;
281 unsigned long flags;
282
283 triggered = 0;
284
285 spin_lock_irqsave(&subpriv->spinlock, flags);
286 if (board->has_int_sce) {
287
288
289
290
291
292
293
294
295
296
297 cur_enabled = subpriv->enabled_isns;
298 while ((intstat = (dio200_read8(dev, subpriv->ofs) &
299 subpriv->valid_isns & ~triggered)) != 0) {
300 triggered |= intstat;
301 cur_enabled &= ~triggered;
302 dio200_write8(dev, subpriv->ofs, cur_enabled);
303 }
304 } else {
305
306
307
308
309 triggered = subpriv->enabled_isns;
310 }
311
312 if (triggered) {
313
314
315
316
317
318
319 cur_enabled = subpriv->enabled_isns;
320 if (board->has_int_sce)
321 dio200_write8(dev, subpriv->ofs, cur_enabled);
322
323 if (subpriv->active) {
324
325
326
327
328
329
330
331 if (triggered & subpriv->enabled_isns) {
332
333 dio200_read_scan_intr(dev, s, triggered);
334 }
335 }
336 }
337 spin_unlock_irqrestore(&subpriv->spinlock, flags);
338
339 comedi_handle_events(dev, s);
340
341 return (triggered != 0);
342}
343
344static int dio200_subdev_intr_cancel(struct comedi_device *dev,
345 struct comedi_subdevice *s)
346{
347 struct dio200_subdev_intr *subpriv = s->private;
348 unsigned long flags;
349
350 spin_lock_irqsave(&subpriv->spinlock, flags);
351 if (subpriv->active)
352 dio200_stop_intr(dev, s);
353
354 spin_unlock_irqrestore(&subpriv->spinlock, flags);
355
356 return 0;
357}
358
359static int dio200_subdev_intr_cmdtest(struct comedi_device *dev,
360 struct comedi_subdevice *s,
361 struct comedi_cmd *cmd)
362{
363 int err = 0;
364
365
366
367 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
368 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
369 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
370 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
371 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
372
373 if (err)
374 return 1;
375
376
377
378 err |= comedi_check_trigger_is_unique(cmd->start_src);
379 err |= comedi_check_trigger_is_unique(cmd->stop_src);
380
381
382
383 if (err)
384 return 2;
385
386
387
388 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
389 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
390 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
391 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
392 cmd->chanlist_len);
393
394 if (cmd->stop_src == TRIG_COUNT)
395 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
396 else
397 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
398
399 if (err)
400 return 3;
401
402
403
404
405
406 return 0;
407}
408
409static int dio200_subdev_intr_cmd(struct comedi_device *dev,
410 struct comedi_subdevice *s)
411{
412 struct comedi_cmd *cmd = &s->async->cmd;
413 struct dio200_subdev_intr *subpriv = s->private;
414 unsigned long flags;
415
416 spin_lock_irqsave(&subpriv->spinlock, flags);
417
418 subpriv->active = true;
419
420 if (cmd->start_src == TRIG_INT)
421 s->async->inttrig = dio200_inttrig_start_intr;
422 else
423 dio200_start_intr(dev, s);
424
425 spin_unlock_irqrestore(&subpriv->spinlock, flags);
426
427 return 0;
428}
429
430static int dio200_subdev_intr_init(struct comedi_device *dev,
431 struct comedi_subdevice *s,
432 unsigned int offset,
433 unsigned int valid_isns)
434{
435 const struct dio200_board *board = dev->board_ptr;
436 struct dio200_subdev_intr *subpriv;
437
438 subpriv = comedi_alloc_spriv(s, sizeof(*subpriv));
439 if (!subpriv)
440 return -ENOMEM;
441
442 subpriv->ofs = offset;
443 subpriv->valid_isns = valid_isns;
444 spin_lock_init(&subpriv->spinlock);
445
446 if (board->has_int_sce)
447
448 dio200_write8(dev, subpriv->ofs, 0);
449
450 s->type = COMEDI_SUBD_DI;
451 s->subdev_flags = SDF_READABLE | SDF_CMD_READ | SDF_PACKED;
452 if (board->has_int_sce) {
453 s->n_chan = DIO200_MAX_ISNS;
454 s->len_chanlist = DIO200_MAX_ISNS;
455 } else {
456
457 s->n_chan = 1;
458 s->len_chanlist = 1;
459 }
460 s->range_table = &range_digital;
461 s->maxdata = 1;
462 s->insn_bits = dio200_subdev_intr_insn_bits;
463 s->do_cmdtest = dio200_subdev_intr_cmdtest;
464 s->do_cmd = dio200_subdev_intr_cmd;
465 s->cancel = dio200_subdev_intr_cancel;
466
467 return 0;
468}
469
470static irqreturn_t dio200_interrupt(int irq, void *d)
471{
472 struct comedi_device *dev = d;
473 struct comedi_subdevice *s = dev->read_subdev;
474 int handled;
475
476 if (!dev->attached)
477 return IRQ_NONE;
478
479 handled = dio200_handle_read_intr(dev, s);
480
481 return IRQ_RETVAL(handled);
482}
483
484static void dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
485 struct comedi_subdevice *s,
486 unsigned int chan,
487 unsigned int src)
488{
489 unsigned int offset = dio200_subdev_8254_offset(dev, s);
490
491 dio200_write8(dev, DIO200_GAT_SCE(offset >> 3),
492 gat_sce((offset >> 2) & 1, chan, src));
493}
494
495static void dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
496 struct comedi_subdevice *s,
497 unsigned int chan,
498 unsigned int src)
499{
500 unsigned int offset = dio200_subdev_8254_offset(dev, s);
501
502 dio200_write8(dev, DIO200_CLK_SCE(offset >> 3),
503 clk_sce((offset >> 2) & 1, chan, src));
504}
505
506static int dio200_subdev_8254_config(struct comedi_device *dev,
507 struct comedi_subdevice *s,
508 struct comedi_insn *insn,
509 unsigned int *data)
510{
511 const struct dio200_board *board = dev->board_ptr;
512 struct comedi_8254 *i8254 = s->private;
513 unsigned int chan = CR_CHAN(insn->chanspec);
514 unsigned int max_src = board->is_pcie ? 31 : 7;
515 unsigned int src;
516
517 if (!board->has_clk_gat_sce)
518 return -EINVAL;
519
520 switch (data[0]) {
521 case INSN_CONFIG_SET_GATE_SRC:
522 src = data[2];
523 if (src > max_src)
524 return -EINVAL;
525
526 dio200_subdev_8254_set_gate_src(dev, s, chan, src);
527 i8254->gate_src[chan] = src;
528 break;
529 case INSN_CONFIG_GET_GATE_SRC:
530 data[2] = i8254->gate_src[chan];
531 break;
532 case INSN_CONFIG_SET_CLOCK_SRC:
533 src = data[1];
534 if (src > max_src)
535 return -EINVAL;
536
537 dio200_subdev_8254_set_clock_src(dev, s, chan, src);
538 i8254->clock_src[chan] = src;
539 break;
540 case INSN_CONFIG_GET_CLOCK_SRC:
541 data[1] = i8254->clock_src[chan];
542 data[2] = clock_period[i8254->clock_src[chan]];
543 break;
544 default:
545 return -EINVAL;
546 }
547
548 return insn->n;
549}
550
551static int dio200_subdev_8254_init(struct comedi_device *dev,
552 struct comedi_subdevice *s,
553 unsigned int offset)
554{
555 const struct dio200_board *board = dev->board_ptr;
556 struct comedi_8254 *i8254;
557 unsigned int regshift;
558 int chan;
559
560
561
562
563
564 if (board->is_pcie) {
565 offset <<= 3;
566 regshift = 3;
567 } else {
568 regshift = 0;
569 }
570
571 if (dev->mmio) {
572 i8254 = comedi_8254_mm_init(dev->mmio + offset,
573 0, I8254_IO8, regshift);
574 } else {
575 i8254 = comedi_8254_init(dev->iobase + offset,
576 0, I8254_IO8, regshift);
577 }
578 if (!i8254)
579 return -ENOMEM;
580
581 comedi_8254_subdevice_init(s, i8254);
582
583 i8254->insn_config = dio200_subdev_8254_config;
584
585
586
587
588
589
590
591
592 comedi_set_spriv_auto_free(s);
593
594
595 if (board->has_clk_gat_sce) {
596 for (chan = 0; chan < 3; chan++) {
597
598 dio200_subdev_8254_set_gate_src(dev, s, chan, 0);
599
600 dio200_subdev_8254_set_clock_src(dev, s, chan, 0);
601 }
602 }
603
604 return 0;
605}
606
607static void dio200_subdev_8255_set_dir(struct comedi_device *dev,
608 struct comedi_subdevice *s)
609{
610 struct dio200_subdev_8255 *subpriv = s->private;
611 int config;
612
613 config = I8255_CTRL_CW;
614
615 if (!(s->io_bits & 0x0000ff))
616 config |= I8255_CTRL_A_IO;
617 if (!(s->io_bits & 0x00ff00))
618 config |= I8255_CTRL_B_IO;
619 if (!(s->io_bits & 0x0f0000))
620 config |= I8255_CTRL_C_LO_IO;
621 if (!(s->io_bits & 0xf00000))
622 config |= I8255_CTRL_C_HI_IO;
623 dio200_write8(dev, subpriv->ofs + I8255_CTRL_REG, config);
624}
625
626static int dio200_subdev_8255_bits(struct comedi_device *dev,
627 struct comedi_subdevice *s,
628 struct comedi_insn *insn,
629 unsigned int *data)
630{
631 struct dio200_subdev_8255 *subpriv = s->private;
632 unsigned int mask;
633 unsigned int val;
634
635 mask = comedi_dio_update_state(s, data);
636 if (mask) {
637 if (mask & 0xff) {
638 dio200_write8(dev, subpriv->ofs + I8255_DATA_A_REG,
639 s->state & 0xff);
640 }
641 if (mask & 0xff00) {
642 dio200_write8(dev, subpriv->ofs + I8255_DATA_B_REG,
643 (s->state >> 8) & 0xff);
644 }
645 if (mask & 0xff0000) {
646 dio200_write8(dev, subpriv->ofs + I8255_DATA_C_REG,
647 (s->state >> 16) & 0xff);
648 }
649 }
650
651 val = dio200_read8(dev, subpriv->ofs + I8255_DATA_A_REG);
652 val |= dio200_read8(dev, subpriv->ofs + I8255_DATA_B_REG) << 8;
653 val |= dio200_read8(dev, subpriv->ofs + I8255_DATA_C_REG) << 16;
654
655 data[1] = val;
656
657 return insn->n;
658}
659
660static int dio200_subdev_8255_config(struct comedi_device *dev,
661 struct comedi_subdevice *s,
662 struct comedi_insn *insn,
663 unsigned int *data)
664{
665 unsigned int chan = CR_CHAN(insn->chanspec);
666 unsigned int mask;
667 int ret;
668
669 if (chan < 8)
670 mask = 0x0000ff;
671 else if (chan < 16)
672 mask = 0x00ff00;
673 else if (chan < 20)
674 mask = 0x0f0000;
675 else
676 mask = 0xf00000;
677
678 ret = comedi_dio_insn_config(dev, s, insn, data, mask);
679 if (ret)
680 return ret;
681
682 dio200_subdev_8255_set_dir(dev, s);
683
684 return insn->n;
685}
686
687static int dio200_subdev_8255_init(struct comedi_device *dev,
688 struct comedi_subdevice *s,
689 unsigned int offset)
690{
691 struct dio200_subdev_8255 *subpriv;
692
693 subpriv = comedi_alloc_spriv(s, sizeof(*subpriv));
694 if (!subpriv)
695 return -ENOMEM;
696
697 subpriv->ofs = offset;
698
699 s->type = COMEDI_SUBD_DIO;
700 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
701 s->n_chan = 24;
702 s->range_table = &range_digital;
703 s->maxdata = 1;
704 s->insn_bits = dio200_subdev_8255_bits;
705 s->insn_config = dio200_subdev_8255_config;
706 dio200_subdev_8255_set_dir(dev, s);
707 return 0;
708}
709
710static int dio200_subdev_timer_read(struct comedi_device *dev,
711 struct comedi_subdevice *s,
712 struct comedi_insn *insn,
713 unsigned int *data)
714{
715 unsigned int n;
716
717 for (n = 0; n < insn->n; n++)
718 data[n] = dio200_read32(dev, DIO200_TS_COUNT);
719 return n;
720}
721
722static void dio200_subdev_timer_reset(struct comedi_device *dev,
723 struct comedi_subdevice *s)
724{
725 unsigned int clock;
726
727 clock = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;
728 dio200_write32(dev, DIO200_TS_CONFIG, clock | TS_CONFIG_RESET);
729 dio200_write32(dev, DIO200_TS_CONFIG, clock);
730}
731
732static void dio200_subdev_timer_get_clock_src(struct comedi_device *dev,
733 struct comedi_subdevice *s,
734 unsigned int *src,
735 unsigned int *period)
736{
737 unsigned int clk;
738
739 clk = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;
740 *src = clk;
741 *period = (clk < ARRAY_SIZE(ts_clock_period)) ?
742 ts_clock_period[clk] : 0;
743}
744
745static int dio200_subdev_timer_set_clock_src(struct comedi_device *dev,
746 struct comedi_subdevice *s,
747 unsigned int src)
748{
749 if (src > TS_CONFIG_MAX_CLK_SRC)
750 return -EINVAL;
751 dio200_write32(dev, DIO200_TS_CONFIG, src);
752 return 0;
753}
754
755static int dio200_subdev_timer_config(struct comedi_device *dev,
756 struct comedi_subdevice *s,
757 struct comedi_insn *insn,
758 unsigned int *data)
759{
760 int ret = 0;
761
762 switch (data[0]) {
763 case INSN_CONFIG_RESET:
764 dio200_subdev_timer_reset(dev, s);
765 break;
766 case INSN_CONFIG_SET_CLOCK_SRC:
767 ret = dio200_subdev_timer_set_clock_src(dev, s, data[1]);
768 if (ret < 0)
769 ret = -EINVAL;
770 break;
771 case INSN_CONFIG_GET_CLOCK_SRC:
772 dio200_subdev_timer_get_clock_src(dev, s, &data[1], &data[2]);
773 break;
774 default:
775 ret = -EINVAL;
776 break;
777 }
778 return ret < 0 ? ret : insn->n;
779}
780
781void amplc_dio200_set_enhance(struct comedi_device *dev, unsigned char val)
782{
783 dio200_write8(dev, DIO200_ENHANCE, val);
784}
785EXPORT_SYMBOL_GPL(amplc_dio200_set_enhance);
786
787int amplc_dio200_common_attach(struct comedi_device *dev, unsigned int irq,
788 unsigned long req_irq_flags)
789{
790 const struct dio200_board *board = dev->board_ptr;
791 struct comedi_subdevice *s;
792 unsigned int n;
793 int ret;
794
795 ret = comedi_alloc_subdevices(dev, board->n_subdevs);
796 if (ret)
797 return ret;
798
799 for (n = 0; n < dev->n_subdevices; n++) {
800 s = &dev->subdevices[n];
801 switch (board->sdtype[n]) {
802 case sd_8254:
803
804 ret = dio200_subdev_8254_init(dev, s,
805 board->sdinfo[n]);
806 if (ret < 0)
807 return ret;
808 break;
809 case sd_8255:
810
811 ret = dio200_subdev_8255_init(dev, s,
812 board->sdinfo[n]);
813 if (ret < 0)
814 return ret;
815 break;
816 case sd_intr:
817
818 if (irq && !dev->read_subdev) {
819 ret = dio200_subdev_intr_init(dev, s,
820 DIO200_INT_SCE,
821 board->sdinfo[n]);
822 if (ret < 0)
823 return ret;
824 dev->read_subdev = s;
825 } else {
826 s->type = COMEDI_SUBD_UNUSED;
827 }
828 break;
829 case sd_timer:
830 s->type = COMEDI_SUBD_TIMER;
831 s->subdev_flags = SDF_READABLE | SDF_LSAMPL;
832 s->n_chan = 1;
833 s->maxdata = 0xffffffff;
834 s->insn_read = dio200_subdev_timer_read;
835 s->insn_config = dio200_subdev_timer_config;
836 break;
837 default:
838 s->type = COMEDI_SUBD_UNUSED;
839 break;
840 }
841 }
842
843 if (irq && dev->read_subdev) {
844 if (request_irq(irq, dio200_interrupt, req_irq_flags,
845 dev->board_name, dev) >= 0) {
846 dev->irq = irq;
847 } else {
848 dev_warn(dev->class_dev,
849 "warning! irq %u unavailable!\n", irq);
850 }
851 }
852
853 return 0;
854}
855EXPORT_SYMBOL_GPL(amplc_dio200_common_attach);
856
857static int __init amplc_dio200_common_init(void)
858{
859 return 0;
860}
861module_init(amplc_dio200_common_init);
862
863static void __exit amplc_dio200_common_exit(void)
864{
865}
866module_exit(amplc_dio200_common_exit);
867
868MODULE_AUTHOR("Comedi http://www.comedi.org");
869MODULE_DESCRIPTION("Comedi helper for amplc_dio200 and amplc_dio200_pci");
870MODULE_LICENSE("GPL");
871