1
2
3
4
5
6
7
8
9
10#include "odm_precomp.h"
11#include "phy.h"
12
13u32 GlobalDebugLevel;
14
15
16static u32 EDCAParam[HT_IOT_PEER_MAX][3] = {
17
18 {0x5ea42b, 0x5ea42b, 0x5ea42b},
19 {0xa44f, 0x5ea44f, 0x5e431c},
20 {0x5ea42b, 0x5ea42b, 0x5ea42b},
21 {0x5ea32b, 0x5ea42b, 0x5e4322},
22 {0x5ea422, 0x00a44f, 0x00a44f},
23 {0x5ea322, 0x00a630, 0x00a44f},
24 {0x5e4322, 0x5e4322, 0x5e4322},
25 {0x5ea44f, 0x00a44f, 0x5ea42b},
26 {0x5ea42b, 0x5ea42b, 0x5ea42b},
27 {0x5ea42b, 0xa630, 0x5e431c},
28};
29
30
31u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
32 0x7f8001fe,
33 0x788001e2,
34 0x71c001c7,
35 0x6b8001ae,
36 0x65400195,
37 0x5fc0017f,
38 0x5a400169,
39 0x55400155,
40 0x50800142,
41 0x4c000130,
42 0x47c0011f,
43 0x43c0010f,
44 0x40000100,
45 0x3c8000f2,
46 0x390000e4,
47 0x35c000d7,
48 0x32c000cb,
49 0x300000c0,
50 0x2d4000b5,
51 0x2ac000ab,
52 0x288000a2,
53 0x26000098,
54 0x24000090,
55 0x22000088,
56 0x20000080,
57 0x1e400079,
58 0x1c800072,
59 0x1b00006c,
60 0x19800066,
61 0x18000060,
62 0x16c0005b,
63 0x15800056,
64 0x14400051,
65 0x1300004c,
66 0x12000048,
67 0x11000044,
68 0x10000040,
69 0x0f00003c,
70 0x0e400039,
71 0x0d800036,
72 0x0cc00033,
73 0x0c000030,
74 0x0b40002d,
75};
76
77u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
78 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
79 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
80 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
81 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
82 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
83 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
84 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
85 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
86 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
87 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
88 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
89 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
90 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
91 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
92 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
93 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
94 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
95 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
96 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
97 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
98 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
99 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
100 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
101 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
102 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
103 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
104 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
105 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
106 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
107 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
108 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
109 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
110 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
111};
112
113u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
114 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
115 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
116 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
117 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
118 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
119 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
120 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
121 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
122 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
123 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
124 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
125 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
126 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
127 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
128 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
129 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
130 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
131 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
132 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
133 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
134 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
135 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
136 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
137 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
138 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
139 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
140 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
141 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
142 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
143 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
144 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
145 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
146 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
147};
148
149#define RxDefaultAnt1 0x65a9
150#define RxDefaultAnt2 0x569a
151
152void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
153{
154 pDM_Odm->DebugLevel = ODM_DBG_TRACE;
155
156 pDM_Odm->DebugComponents = 0;
157}
158
159
160
161
162void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
163{
164
165 odm_CommonInfoSelfInit(pDM_Odm);
166 odm_CmnInfoInit_Debug(pDM_Odm);
167 odm_DIGInit(pDM_Odm);
168 odm_RateAdaptiveMaskInit(pDM_Odm);
169
170 odm_DynamicTxPowerInit(pDM_Odm);
171 odm_TXPowerTrackingInit(pDM_Odm);
172 ODM_EdcaTurboInit(pDM_Odm);
173 ODM_RAInfo_Init_all(pDM_Odm);
174 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
175 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
176 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
177 odm_InitHybridAntDiv(pDM_Odm);
178}
179
180
181
182
183void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm)
184{
185
186 odm_CmnInfoHook_Debug(pDM_Odm);
187 odm_CmnInfoUpdate_Debug(pDM_Odm);
188 odm_CommonInfoSelfUpdate(pDM_Odm);
189 odm_FalseAlarmCounterStatistics(pDM_Odm);
190 odm_RSSIMonitorCheck(pDM_Odm);
191
192
193 odm_DIG(pDM_Odm);
194 odm_CCKPacketDetectionThresh(pDM_Odm);
195
196 if (*(pDM_Odm->pbPowerSaving))
197 return;
198
199 odm_RefreshRateAdaptiveMask(pDM_Odm);
200
201 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
202 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
203 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
204 odm_HwAntDiv(pDM_Odm);
205
206 ODM_TXPowerTrackingCheck(pDM_Odm);
207 odm_EdcaTurboCheck(pDM_Odm);
208}
209
210void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue)
211{
212 if (CmnInfo == ODM_CMNINFO_STA_STATUS)
213 pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue;
214}
215
216void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm)
217{
218 struct adapter *adapter = pDM_Odm->Adapter;
219
220 pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9));
221 pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F);
222
223 ODM_InitDebugSetting(pDM_Odm);
224}
225
226void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm)
227{
228 u8 EntryCnt = 0;
229 u8 i;
230 struct sta_info *pEntry;
231
232 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
233 if (*(pDM_Odm->pSecChOffset) == 1)
234 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
235 else if (*(pDM_Odm->pSecChOffset) == 2)
236 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
237 } else {
238 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
239 }
240
241 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
242 pEntry = pDM_Odm->pODM_StaInfo[i];
243 if (IS_STA_VALID(pEntry))
244 EntryCnt++;
245 }
246 if (EntryCnt == 1)
247 pDM_Odm->bOneEntryOnly = true;
248 else
249 pDM_Odm->bOneEntryOnly = false;
250}
251
252void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm)
253{
254 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n"));
255 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform));
256 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility));
257 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface));
258 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType));
259 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion));
260 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType));
261 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA));
262 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA));
263 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW));
264 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID));
265 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest));
266 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest));
267 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent));
268}
269
270void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm)
271{
272 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n"));
273 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast)));
274 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast)));
275 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode)));
276 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset)));
277 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity)));
278 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth)));
279 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel)));
280
281 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess)));
282 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving)));
283}
284
285void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm)
286{
287 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n"));
288 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct));
289 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display));
290 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked));
291 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min));
292}
293
294void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI)
295{
296 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
297 struct adapter *adapter = pDM_Odm->Adapter;
298
299 if (pDM_DigTable->CurIGValue != CurrentIGI) {
300 phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI);
301 pDM_DigTable->CurIGValue = CurrentIGI;
302 }
303}
304
305void odm_DIGInit(struct odm_dm_struct *pDM_Odm)
306{
307 struct adapter *adapter = pDM_Odm->Adapter;
308 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
309
310 pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N);
311 pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
312 pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
313 pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW;
314 pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH;
315 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
316 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
317 pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
318 pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
319 pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
320 pDM_DigTable->PreCCK_CCAThres = 0xFF;
321 pDM_DigTable->CurCCK_CCAThres = 0x83;
322 pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC;
323 pDM_DigTable->LargeFAHit = 0;
324 pDM_DigTable->Recover_cnt = 0;
325 pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC;
326 pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC;
327 pDM_DigTable->bMediaConnect_0 = false;
328 pDM_DigTable->bMediaConnect_1 = false;
329
330
331 pDM_Odm->bDMInitialGainEnable = true;
332}
333
334void odm_DIG(struct odm_dm_struct *pDM_Odm)
335{
336 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
337 struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt;
338 u8 DIG_Dynamic_MIN;
339 u8 DIG_MaxOfMin;
340 bool FirstConnect, FirstDisConnect;
341 u8 dm_dig_max, dm_dig_min;
342 u8 CurrentIGI = pDM_DigTable->CurIGValue;
343
344 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n"));
345 if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) {
346 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
347 ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n"));
348 return;
349 }
350
351 if (*(pDM_Odm->pbScanInProcess)) {
352 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n"));
353 return;
354 }
355
356
357 if (!pDM_Odm->bDMInitialGainEnable) {
358 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n"));
359 return;
360 }
361
362 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
363 FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
364 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
365
366
367 dm_dig_max = DM_DIG_MAX_NIC;
368 dm_dig_min = DM_DIG_MIN_NIC;
369 DIG_MaxOfMin = DM_DIG_MAX_AP;
370
371 if (pDM_Odm->bLinked) {
372
373 if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max)
374 pDM_DigTable->rx_gain_range_max = dm_dig_max;
375 else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min)
376 pDM_DigTable->rx_gain_range_max = dm_dig_min;
377 else
378 pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20;
379
380 if (pDM_Odm->bOneEntryOnly) {
381 if (pDM_Odm->RSSI_Min < dm_dig_min)
382 DIG_Dynamic_MIN = dm_dig_min;
383 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
384 DIG_Dynamic_MIN = DIG_MaxOfMin;
385 else
386 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
387 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
388 ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n",
389 DIG_Dynamic_MIN));
390 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
391 ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",
392 pDM_Odm->RSSI_Min));
393 } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
394
395 if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) {
396 DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max;
397 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
398 ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n",
399 pDM_DigTable->AntDiv_RSSI_max));
400 }
401 } else {
402 DIG_Dynamic_MIN = dm_dig_min;
403 }
404 } else {
405 pDM_DigTable->rx_gain_range_max = dm_dig_max;
406 DIG_Dynamic_MIN = dm_dig_min;
407 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n"));
408 }
409
410
411 if (pFalseAlmCnt->Cnt_all > 10000) {
412 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnormally false alarm case.\n"));
413
414 if (pDM_DigTable->LargeFAHit != 3)
415 pDM_DigTable->LargeFAHit++;
416 if (pDM_DigTable->ForbiddenIGI < CurrentIGI) {
417 pDM_DigTable->ForbiddenIGI = CurrentIGI;
418 pDM_DigTable->LargeFAHit = 1;
419 }
420
421 if (pDM_DigTable->LargeFAHit >= 3) {
422 if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max)
423 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
424 else
425 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
426 pDM_DigTable->Recover_cnt = 3600;
427 }
428
429 } else {
430
431 if (pDM_DigTable->Recover_cnt != 0) {
432 pDM_DigTable->Recover_cnt--;
433 } else {
434 if (pDM_DigTable->LargeFAHit < 3) {
435 if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) {
436 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN;
437 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN;
438 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n"));
439 } else {
440 pDM_DigTable->ForbiddenIGI--;
441 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
442 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n"));
443 }
444 } else {
445 pDM_DigTable->LargeFAHit = 0;
446 }
447 }
448 }
449 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
450 ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",
451 pDM_DigTable->LargeFAHit));
452
453
454 if (pDM_Odm->bLinked) {
455 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n"));
456 if (FirstConnect) {
457 CurrentIGI = pDM_Odm->RSSI_Min;
458 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n"));
459 } else {
460 if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2)
461 CurrentIGI = CurrentIGI + 4;
462 else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1)
463 CurrentIGI = CurrentIGI + 2;
464 else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
465 CurrentIGI = CurrentIGI - 2;
466 }
467 } else {
468 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n"));
469 if (FirstDisConnect) {
470 CurrentIGI = pDM_DigTable->rx_gain_range_min;
471 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n"));
472 } else {
473
474 if (pFalseAlmCnt->Cnt_all > 10000)
475 CurrentIGI = CurrentIGI + 2;
476 else if (pFalseAlmCnt->Cnt_all > 8000)
477 CurrentIGI = CurrentIGI + 1;
478 else if (pFalseAlmCnt->Cnt_all < 500)
479 CurrentIGI = CurrentIGI - 1;
480 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n"));
481 }
482 }
483 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n"));
484
485 if (CurrentIGI > pDM_DigTable->rx_gain_range_max)
486 CurrentIGI = pDM_DigTable->rx_gain_range_max;
487 if (CurrentIGI < pDM_DigTable->rx_gain_range_min)
488 CurrentIGI = pDM_DigTable->rx_gain_range_min;
489
490 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
491 ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n",
492 pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min));
493 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all));
494 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI));
495
496
497
498 ODM_Write_DIG(pDM_Odm, CurrentIGI);
499 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
500 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
501}
502
503
504
505
506
507void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm)
508{
509 struct adapter *adapter = pDM_Odm->Adapter;
510 u32 ret_value;
511 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
512
513 if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
514 return;
515
516
517 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
518 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
519
520 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
521 FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
522 FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
523 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
524 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
525 FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
526 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
527 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
528 FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
529 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
530 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
531
532 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
533 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
534 FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
535
536 ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
537 FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
538 FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16;
539
540
541 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
542 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
543
544 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
545 FalseAlmCnt->Cnt_Cck_fail = ret_value;
546 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
547 FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8;
548
549 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
550 FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
551
552 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync +
553 FalseAlmCnt->Cnt_SB_Search_fail +
554 FalseAlmCnt->Cnt_Parity_Fail +
555 FalseAlmCnt->Cnt_Rate_Illegal +
556 FalseAlmCnt->Cnt_Crc8_fail +
557 FalseAlmCnt->Cnt_Mcs_fail +
558 FalseAlmCnt->Cnt_Cck_fail);
559
560 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
561
562 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n"));
563 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
564 ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n",
565 FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail));
566 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
567 ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n",
568 FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal));
569 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
570 ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n",
571 FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
572 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail));
573 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
574 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all));
575}
576
577
578
579
580
581void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm)
582{
583 u8 CurCCK_CCAThres;
584 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
585
586 if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT)))
587 return;
588 if (pDM_Odm->ExtLNA)
589 return;
590 if (pDM_Odm->bLinked) {
591 if (pDM_Odm->RSSI_Min > 25) {
592 CurCCK_CCAThres = 0xcd;
593 } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) {
594 CurCCK_CCAThres = 0x83;
595 } else {
596 if (FalseAlmCnt->Cnt_Cck_fail > 1000)
597 CurCCK_CCAThres = 0x83;
598 else
599 CurCCK_CCAThres = 0x40;
600 }
601 } else {
602 if (FalseAlmCnt->Cnt_Cck_fail > 1000)
603 CurCCK_CCAThres = 0x83;
604 else
605 CurCCK_CCAThres = 0x40;
606 }
607 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres);
608}
609
610void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres)
611{
612 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
613 struct adapter *adapt = pDM_Odm->Adapter;
614
615 if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres)
616 usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
617 pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
618 pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
619}
620
621void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal)
622{
623 struct adapter *adapter = pDM_Odm->Adapter;
624 struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable;
625 u8 Rssi_Up_bound = 30;
626 u8 Rssi_Low_bound = 25;
627
628 if (pDM_Odm->PatchID == 40) {
629 Rssi_Up_bound = 50;
630 Rssi_Low_bound = 45;
631 }
632 if (pDM_PSTable->initialize == 0) {
633 pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
634 pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3))>>3;
635 pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
636 pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12;
637 pDM_PSTable->initialize = 1;
638 }
639
640 if (!bForceInNormal) {
641 if (pDM_Odm->RSSI_Min != 0xFF) {
642 if (pDM_PSTable->PreRFState == RF_Normal) {
643 if (pDM_Odm->RSSI_Min >= Rssi_Up_bound)
644 pDM_PSTable->CurRFState = RF_Save;
645 else
646 pDM_PSTable->CurRFState = RF_Normal;
647 } else {
648 if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
649 pDM_PSTable->CurRFState = RF_Normal;
650 else
651 pDM_PSTable->CurRFState = RF_Save;
652 }
653 } else {
654 pDM_PSTable->CurRFState = RF_MAX;
655 }
656 } else {
657 pDM_PSTable->CurRFState = RF_Normal;
658 }
659
660 if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
661 if (pDM_PSTable->CurRFState == RF_Save) {
662 phy_set_bb_reg(adapter, 0x874, 0x1C0000, 0x2);
663 phy_set_bb_reg(adapter, 0xc70, BIT(3), 0);
664 phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63);
665 phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2);
666 phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3);
667 phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0);
668 phy_set_bb_reg(adapter, 0x818, BIT(28), 0x1);
669 } else {
670 phy_set_bb_reg(adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
671 phy_set_bb_reg(adapter, 0xc70, BIT(3), pDM_PSTable->RegC70);
672 phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
673 phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
674 phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0);
675 }
676 pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
677 }
678}
679
680
681
682
683
684
685
686
687void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm)
688{
689 struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
690
691 pOdmRA->Type = DM_Type_ByDriver;
692 if (pOdmRA->Type == DM_Type_ByDriver)
693 pDM_Odm->bUseRAMask = true;
694 else
695 pDM_Odm->bUseRAMask = false;
696
697 pOdmRA->RATRState = DM_RATR_STA_INIT;
698 pOdmRA->HighRSSIThresh = 50;
699 pOdmRA->LowRSSIThresh = 20;
700}
701
702u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level)
703{
704 struct sta_info *pEntry;
705 u32 rate_bitmap = 0x0fffffff;
706 u8 WirelessMode;
707
708 pEntry = pDM_Odm->pODM_StaInfo[macid];
709 if (!IS_STA_VALID(pEntry))
710 return ra_mask;
711
712 WirelessMode = pEntry->wireless_mode;
713
714 switch (WirelessMode) {
715 case ODM_WM_B:
716 if (ra_mask & 0x0000000c)
717 rate_bitmap = 0x0000000d;
718 else
719 rate_bitmap = 0x0000000f;
720 break;
721 case (ODM_WM_A|ODM_WM_G):
722 if (rssi_level == DM_RATR_STA_HIGH)
723 rate_bitmap = 0x00000f00;
724 else
725 rate_bitmap = 0x00000ff0;
726 break;
727 case (ODM_WM_B|ODM_WM_G):
728 if (rssi_level == DM_RATR_STA_HIGH)
729 rate_bitmap = 0x00000f00;
730 else if (rssi_level == DM_RATR_STA_MIDDLE)
731 rate_bitmap = 0x00000ff0;
732 else
733 rate_bitmap = 0x00000ff5;
734 break;
735 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
736 case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
737 if (rssi_level == DM_RATR_STA_HIGH) {
738 rate_bitmap = 0x000f0000;
739 } else if (rssi_level == DM_RATR_STA_MIDDLE) {
740 rate_bitmap = 0x000ff000;
741 } else {
742 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
743 rate_bitmap = 0x000ff015;
744 else
745 rate_bitmap = 0x000ff005;
746 }
747 break;
748 default:
749
750
751 rate_bitmap = 0x0fffffff;
752 break;
753 }
754
755 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
756 (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n",
757 rssi_level, WirelessMode, rate_bitmap));
758
759 return rate_bitmap;
760}
761
762
763void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm)
764{
765 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
766 return;
767
768
769
770
771
772 odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
773}
774
775void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm)
776{
777 u8 i;
778 struct adapter *pAdapter = pDM_Odm->Adapter;
779
780 if (pAdapter->bDriverStopped) {
781 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
782 return;
783 }
784
785 if (!pDM_Odm->bUseRAMask) {
786 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
787 return;
788 }
789
790 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
791 struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
792
793 if (IS_STA_VALID(pstat)) {
794 if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) {
795 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
796 ("RSSI:%d, RSSI_LEVEL:%d\n",
797 pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
798 rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level);
799 }
800 }
801 }
802}
803
804
805
806bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState)
807{
808 struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive;
809 const u8 GoUpGap = 5;
810 u8 HighRSSIThreshForRA = pRA->HighRSSIThresh;
811 u8 LowRSSIThreshForRA = pRA->LowRSSIThresh;
812 u8 RATRState;
813
814
815
816
817 switch (*pRATRState) {
818 case DM_RATR_STA_INIT:
819 case DM_RATR_STA_HIGH:
820 break;
821 case DM_RATR_STA_MIDDLE:
822 HighRSSIThreshForRA += GoUpGap;
823 break;
824 case DM_RATR_STA_LOW:
825 HighRSSIThreshForRA += GoUpGap;
826 LowRSSIThreshForRA += GoUpGap;
827 break;
828 default:
829 ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState));
830 break;
831 }
832
833
834 if (RSSI > HighRSSIThreshForRA)
835 RATRState = DM_RATR_STA_HIGH;
836 else if (RSSI > LowRSSIThreshForRA)
837 RATRState = DM_RATR_STA_MIDDLE;
838 else
839 RATRState = DM_RATR_STA_LOW;
840
841 if (*pRATRState != RATRState || bForceUpdate) {
842 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState));
843 *pRATRState = RATRState;
844 return true;
845 }
846 return false;
847}
848
849
850
851
852
853void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)
854{
855 struct adapter *Adapter = pDM_Odm->Adapter;
856 struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
857
858 pdmpriv->bDynamicTxPowerEnable = false;
859 pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
860 pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
861}
862
863
864
865
866
867void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
868{
869 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
870 return;
871
872
873
874
875
876
877 odm_RSSIMonitorCheckCE(pDM_Odm);
878}
879
880static void FindMinimumRSSI(struct adapter *pAdapter)
881{
882 struct dm_priv *pdmpriv = &pAdapter->HalData->dmpriv;
883
884
885 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
886}
887
888void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm)
889{
890 struct adapter *Adapter = pDM_Odm->Adapter;
891 struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
892 int i;
893 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
894 u8 sta_cnt = 0;
895 u32 PWDB_rssi[NUM_STA] = {0};
896 struct sta_info *psta;
897 u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
898
899 if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED))
900 return;
901
902 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
903 psta = pDM_Odm->pODM_StaInfo[i];
904 if (IS_STA_VALID(psta) &&
905 (psta->state & WIFI_ASOC_STATE) &&
906 memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) &&
907 memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) {
908 if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
909 tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
910
911 if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
912 tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
913 if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
914 PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
915 }
916 }
917
918 for (i = 0; i < sta_cnt; i++) {
919 if (PWDB_rssi[i] != 0) {
920 ODM_RA_SetRSSI_8188E(&Adapter->HalData->odmpriv,
921 PWDB_rssi[i] & 0xFF,
922 (PWDB_rssi[i] >> 16) & 0xFF);
923 }
924 }
925
926 if (tmpEntryMaxPWDB != 0)
927 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
928 else
929 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
930
931 if (tmpEntryMinPWDB != 0xff)
932 pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
933 else
934 pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
935
936 FindMinimumRSSI(Adapter);
937 Adapter->HalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM;
938}
939
940
941
942
943
944void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm)
945{
946 odm_TXPowerTrackingThermalMeterInit(pDM_Odm);
947}
948
949void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm)
950{
951 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
952 pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
953 if (*(pDM_Odm->mp_mode) != 1)
954 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
955 MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl);
956
957 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
958}
959
960void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
961{
962
963
964
965 odm_TXPowerTrackingCheckCE(pDM_Odm);
966}
967
968void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm)
969{
970 struct adapter *Adapter = pDM_Odm->Adapter;
971
972 if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
973 return;
974
975 if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) {
976 phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
977
978 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
979 return;
980 } else {
981 rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter);
982 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
983 }
984}
985
986
987
988
989
990void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
991{
992 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
993 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
994 return;
995 }
996
997 rtl88eu_dm_antenna_div_init(pDM_Odm);
998}
999
1000void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
1001{
1002 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
1003 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
1004 return;
1005 }
1006
1007 rtl88eu_dm_antenna_diversity(pDM_Odm);
1008}
1009
1010
1011void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm)
1012{
1013 struct adapter *Adapter = pDM_Odm->Adapter;
1014
1015 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
1016 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
1017 Adapter->recvpriv.bIsAnyNonBEPkts = false;
1018
1019 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM)));
1020 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM)));
1021 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM)));
1022 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM)));
1023}
1024
1025void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
1026{
1027
1028
1029
1030 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n"));
1031
1032 if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
1033 return;
1034
1035 odm_EdcaTurboCheckCE(pDM_Odm);
1036 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n"));
1037}
1038
1039void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm)
1040{
1041 struct adapter *Adapter = pDM_Odm->Adapter;
1042 u32 trafficIndex;
1043 u32 edca_param;
1044 u64 cur_tx_bytes = 0;
1045 u64 cur_rx_bytes = 0;
1046 u8 bbtchange = false;
1047 struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
1048 struct recv_priv *precvpriv = &(Adapter->recvpriv);
1049 struct registry_priv *pregpriv = &Adapter->registrypriv;
1050 struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv);
1051 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1052
1053 if (pregpriv->wifi_spec == 1)
1054 goto dm_CheckEdcaTurbo_EXIT;
1055
1056 if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX)
1057 goto dm_CheckEdcaTurbo_EXIT;
1058
1059
1060 if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
1061 cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
1062 cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
1063
1064
1065 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) ||
1066 (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) {
1067 if (cur_tx_bytes > (cur_rx_bytes << 2)) {
1068
1069 trafficIndex = UP_LINK;
1070 } else {
1071
1072 trafficIndex = DOWN_LINK;
1073 }
1074 } else {
1075 if (cur_rx_bytes > (cur_tx_bytes << 2)) {
1076
1077 trafficIndex = DOWN_LINK;
1078 } else {
1079
1080 trafficIndex = UP_LINK;
1081 }
1082 }
1083
1084 if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) {
1085 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
1086 edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
1087 else
1088 edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
1089
1090 usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
1091
1092 pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
1093 }
1094
1095 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true;
1096 } else {
1097
1098
1099 if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {
1100 usb_write32(Adapter, REG_EDCA_BE_PARAM,
1101 Adapter->HalData->AcParam_BE);
1102 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
1103 }
1104 }
1105
1106dm_CheckEdcaTurbo_EXIT:
1107
1108 precvpriv->bIsAnyNonBEPkts = false;
1109 pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
1110 precvpriv->last_rx_bytes = precvpriv->rx_bytes;
1111}
1112