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7#ifndef LINUX_MMC_HOST_H
8#define LINUX_MMC_HOST_H
9
10#include <linux/sched.h>
11#include <linux/device.h>
12#include <linux/fault-inject.h>
13
14#include <linux/mmc/core.h>
15#include <linux/mmc/card.h>
16#include <linux/mmc/pm.h>
17#include <linux/dma-direction.h>
18
19struct mmc_ios {
20 unsigned int clock;
21 unsigned short vdd;
22 unsigned int power_delay_ms;
23
24
25
26 unsigned char bus_mode;
27
28#define MMC_BUSMODE_OPENDRAIN 1
29#define MMC_BUSMODE_PUSHPULL 2
30
31 unsigned char chip_select;
32
33#define MMC_CS_DONTCARE 0
34#define MMC_CS_HIGH 1
35#define MMC_CS_LOW 2
36
37 unsigned char power_mode;
38
39#define MMC_POWER_OFF 0
40#define MMC_POWER_UP 1
41#define MMC_POWER_ON 2
42#define MMC_POWER_UNDEFINED 3
43
44 unsigned char bus_width;
45
46#define MMC_BUS_WIDTH_1 0
47#define MMC_BUS_WIDTH_4 2
48#define MMC_BUS_WIDTH_8 3
49
50 unsigned char timing;
51
52#define MMC_TIMING_LEGACY 0
53#define MMC_TIMING_MMC_HS 1
54#define MMC_TIMING_SD_HS 2
55#define MMC_TIMING_UHS_SDR12 3
56#define MMC_TIMING_UHS_SDR25 4
57#define MMC_TIMING_UHS_SDR50 5
58#define MMC_TIMING_UHS_SDR104 6
59#define MMC_TIMING_UHS_DDR50 7
60#define MMC_TIMING_MMC_DDR52 8
61#define MMC_TIMING_MMC_HS200 9
62#define MMC_TIMING_MMC_HS400 10
63
64 unsigned char signal_voltage;
65
66#define MMC_SIGNAL_VOLTAGE_330 0
67#define MMC_SIGNAL_VOLTAGE_180 1
68#define MMC_SIGNAL_VOLTAGE_120 2
69
70 unsigned char drv_type;
71
72#define MMC_SET_DRIVER_TYPE_B 0
73#define MMC_SET_DRIVER_TYPE_A 1
74#define MMC_SET_DRIVER_TYPE_C 2
75#define MMC_SET_DRIVER_TYPE_D 3
76
77 bool enhanced_strobe;
78};
79
80struct mmc_host;
81
82struct mmc_host_ops {
83
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87
88
89
90
91 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
92 int err);
93 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
94 void (*request)(struct mmc_host *host, struct mmc_request *req);
95
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108
109
110 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
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117
118
119 int (*get_ro)(struct mmc_host *host);
120
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126
127
128 int (*get_cd)(struct mmc_host *host);
129
130 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
131 void (*ack_sdio_irq)(struct mmc_host *host);
132
133
134 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
135
136 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
137
138
139 int (*card_busy)(struct mmc_host *host);
140
141
142 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
143
144
145 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
146
147
148 int (*hs400_prepare_ddr)(struct mmc_host *host);
149
150
151 void (*hs400_downgrade)(struct mmc_host *host);
152
153
154 void (*hs400_complete)(struct mmc_host *host);
155
156
157 void (*hs400_enhanced_strobe)(struct mmc_host *host,
158 struct mmc_ios *ios);
159 int (*select_drive_strength)(struct mmc_card *card,
160 unsigned int max_dtr, int host_drv,
161 int card_drv, int *drv_type);
162 void (*hw_reset)(struct mmc_host *host);
163 void (*card_event)(struct mmc_host *host);
164
165
166
167
168
169 int (*multi_io_quirk)(struct mmc_card *card,
170 unsigned int direction, int blk_size);
171};
172
173struct mmc_cqe_ops {
174
175 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
176
177 void (*cqe_disable)(struct mmc_host *host);
178
179
180
181
182 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
183
184 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
185
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189
190 void (*cqe_off)(struct mmc_host *host);
191
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193
194
195 int (*cqe_wait_for_idle)(struct mmc_host *host);
196
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200
201 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
202 bool *recovery_needed);
203
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206
207 void (*cqe_recovery_start)(struct mmc_host *host);
208
209
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212
213
214 void (*cqe_recovery_finish)(struct mmc_host *host);
215};
216
217struct mmc_async_req {
218
219 struct mmc_request *mrq;
220
221
222
223
224 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
225};
226
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237
238struct mmc_slot {
239 int cd_irq;
240 bool cd_wake_enabled;
241 void *handler_priv;
242};
243
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247
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249
250
251struct mmc_context_info {
252 bool is_done_rcv;
253 bool is_new_req;
254 bool is_waiting_last_req;
255 wait_queue_head_t wait;
256};
257
258struct regulator;
259struct mmc_pwrseq;
260
261struct mmc_supply {
262 struct regulator *vmmc;
263 struct regulator *vqmmc;
264};
265
266struct mmc_ctx {
267 struct task_struct *task;
268};
269
270struct mmc_host {
271 struct device *parent;
272 struct device class_dev;
273 int index;
274 const struct mmc_host_ops *ops;
275 struct mmc_pwrseq *pwrseq;
276 unsigned int f_min;
277 unsigned int f_max;
278 unsigned int f_init;
279 u32 ocr_avail;
280 u32 ocr_avail_sdio;
281 u32 ocr_avail_sd;
282 u32 ocr_avail_mmc;
283#ifdef CONFIG_PM_SLEEP
284 struct notifier_block pm_notify;
285#endif
286 u32 max_current_330;
287 u32 max_current_300;
288 u32 max_current_180;
289
290#define MMC_VDD_165_195 0x00000080
291#define MMC_VDD_20_21 0x00000100
292#define MMC_VDD_21_22 0x00000200
293#define MMC_VDD_22_23 0x00000400
294#define MMC_VDD_23_24 0x00000800
295#define MMC_VDD_24_25 0x00001000
296#define MMC_VDD_25_26 0x00002000
297#define MMC_VDD_26_27 0x00004000
298#define MMC_VDD_27_28 0x00008000
299#define MMC_VDD_28_29 0x00010000
300#define MMC_VDD_29_30 0x00020000
301#define MMC_VDD_30_31 0x00040000
302#define MMC_VDD_31_32 0x00080000
303#define MMC_VDD_32_33 0x00100000
304#define MMC_VDD_33_34 0x00200000
305#define MMC_VDD_34_35 0x00400000
306#define MMC_VDD_35_36 0x00800000
307
308 u32 caps;
309
310#define MMC_CAP_4_BIT_DATA (1 << 0)
311#define MMC_CAP_MMC_HIGHSPEED (1 << 1)
312#define MMC_CAP_SD_HIGHSPEED (1 << 2)
313#define MMC_CAP_SDIO_IRQ (1 << 3)
314#define MMC_CAP_SPI (1 << 4)
315#define MMC_CAP_NEEDS_POLL (1 << 5)
316#define MMC_CAP_8_BIT_DATA (1 << 6)
317#define MMC_CAP_AGGRESSIVE_PM (1 << 7)
318#define MMC_CAP_NONREMOVABLE (1 << 8)
319#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)
320#define MMC_CAP_ERASE (1 << 10)
321#define MMC_CAP_3_3V_DDR (1 << 11)
322#define MMC_CAP_1_8V_DDR (1 << 12)
323#define MMC_CAP_1_2V_DDR (1 << 13)
324#define MMC_CAP_POWER_OFF_CARD (1 << 14)
325#define MMC_CAP_BUS_WIDTH_TEST (1 << 15)
326#define MMC_CAP_UHS_SDR12 (1 << 16)
327#define MMC_CAP_UHS_SDR25 (1 << 17)
328#define MMC_CAP_UHS_SDR50 (1 << 18)
329#define MMC_CAP_UHS_SDR104 (1 << 19)
330#define MMC_CAP_UHS_DDR50 (1 << 20)
331#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
332 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
333 MMC_CAP_UHS_DDR50)
334#define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)
335#define MMC_CAP_DRIVER_TYPE_A (1 << 23)
336#define MMC_CAP_DRIVER_TYPE_C (1 << 24)
337#define MMC_CAP_DRIVER_TYPE_D (1 << 25)
338#define MMC_CAP_DONE_COMPLETE (1 << 27)
339#define MMC_CAP_CD_WAKE (1 << 28)
340#define MMC_CAP_CMD_DURING_TFR (1 << 29)
341#define MMC_CAP_CMD23 (1 << 30)
342#define MMC_CAP_HW_RESET (1 << 31)
343
344 u32 caps2;
345
346#define MMC_CAP2_BOOTPART_NOACC (1 << 0)
347#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)
348#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)
349#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)
350#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
351 MMC_CAP2_HS200_1_2V_SDR)
352#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)
353#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)
354#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)
355#define MMC_CAP2_HS400_1_8V (1 << 15)
356#define MMC_CAP2_HS400_1_2V (1 << 16)
357#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
358 MMC_CAP2_HS400_1_2V)
359#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
360#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
361#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
362#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)
363#define MMC_CAP2_NO_SDIO (1 << 19)
364#define MMC_CAP2_HS400_ES (1 << 20)
365#define MMC_CAP2_NO_SD (1 << 21)
366#define MMC_CAP2_NO_MMC (1 << 22)
367#define MMC_CAP2_CQE (1 << 23)
368#define MMC_CAP2_CQE_DCMD (1 << 24)
369#define MMC_CAP2_AVOID_3_3V (1 << 25)
370
371 int fixed_drv_type;
372
373 mmc_pm_flag_t pm_caps;
374
375
376 unsigned int max_seg_size;
377 unsigned short max_segs;
378 unsigned short unused;
379 unsigned int max_req_size;
380 unsigned int max_blk_size;
381 unsigned int max_blk_count;
382 unsigned int max_busy_timeout;
383
384
385 spinlock_t lock;
386
387 struct mmc_ios ios;
388
389
390 unsigned int use_spi_crc:1;
391 unsigned int claimed:1;
392 unsigned int bus_dead:1;
393 unsigned int can_retune:1;
394 unsigned int doing_retune:1;
395 unsigned int retune_now:1;
396 unsigned int retune_paused:1;
397 unsigned int use_blk_mq:1;
398 unsigned int retune_crc_disable:1;
399
400 int rescan_disable;
401 int rescan_entered;
402
403 int need_retune;
404 int hold_retune;
405 unsigned int retune_period;
406 struct timer_list retune_timer;
407
408 bool trigger_card_event;
409
410 struct mmc_card *card;
411
412 wait_queue_head_t wq;
413 struct mmc_ctx *claimer;
414 int claim_cnt;
415 struct mmc_ctx default_ctx;
416
417 struct delayed_work detect;
418 int detect_change;
419 struct mmc_slot slot;
420
421 const struct mmc_bus_ops *bus_ops;
422 unsigned int bus_refs;
423
424 unsigned int sdio_irqs;
425 struct task_struct *sdio_irq_thread;
426 struct delayed_work sdio_irq_work;
427 bool sdio_irq_pending;
428 atomic_t sdio_irq_thread_abort;
429
430 mmc_pm_flag_t pm_flags;
431
432 struct led_trigger *led;
433
434#ifdef CONFIG_REGULATOR
435 bool regulator_enabled;
436#endif
437 struct mmc_supply supply;
438
439 struct dentry *debugfs_root;
440
441
442 struct mmc_request *ongoing_mrq;
443
444#ifdef CONFIG_FAIL_MMC_REQUEST
445 struct fault_attr fail_mmc_request;
446#endif
447
448 unsigned int actual_clock;
449
450 unsigned int slotno;
451
452 int dsr_req;
453 u32 dsr;
454
455
456 const struct mmc_cqe_ops *cqe_ops;
457 void *cqe_private;
458 int cqe_qdepth;
459 bool cqe_enabled;
460 bool cqe_on;
461
462 unsigned long private[0] ____cacheline_aligned;
463};
464
465struct device_node;
466
467struct mmc_host *mmc_alloc_host(int extra, struct device *);
468int mmc_add_host(struct mmc_host *);
469void mmc_remove_host(struct mmc_host *);
470void mmc_free_host(struct mmc_host *);
471int mmc_of_parse(struct mmc_host *host);
472int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
473
474static inline void *mmc_priv(struct mmc_host *host)
475{
476 return (void *)host->private;
477}
478
479static inline struct mmc_host *mmc_from_priv(void *priv)
480{
481 return container_of(priv, struct mmc_host, private);
482}
483
484#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
485
486#define mmc_dev(x) ((x)->parent)
487#define mmc_classdev(x) (&(x)->class_dev)
488#define mmc_hostname(x) (dev_name(&(x)->class_dev))
489
490void mmc_detect_change(struct mmc_host *, unsigned long delay);
491void mmc_request_done(struct mmc_host *, struct mmc_request *);
492void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
493
494void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
495
496static inline void mmc_signal_sdio_irq(struct mmc_host *host)
497{
498 host->ops->enable_sdio_irq(host, 0);
499 host->sdio_irq_pending = true;
500 if (host->sdio_irq_thread)
501 wake_up_process(host->sdio_irq_thread);
502}
503
504void sdio_run_irqs(struct mmc_host *host);
505void sdio_signal_irq(struct mmc_host *host);
506
507#ifdef CONFIG_REGULATOR
508int mmc_regulator_set_ocr(struct mmc_host *mmc,
509 struct regulator *supply,
510 unsigned short vdd_bit);
511int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
512#else
513static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
514 struct regulator *supply,
515 unsigned short vdd_bit)
516{
517 return 0;
518}
519
520static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
521 struct mmc_ios *ios)
522{
523 return -EINVAL;
524}
525#endif
526
527int mmc_regulator_get_supply(struct mmc_host *mmc);
528
529static inline int mmc_card_is_removable(struct mmc_host *host)
530{
531 return !(host->caps & MMC_CAP_NONREMOVABLE);
532}
533
534static inline int mmc_card_keep_power(struct mmc_host *host)
535{
536 return host->pm_flags & MMC_PM_KEEP_POWER;
537}
538
539static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
540{
541 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
542}
543
544
545static inline int mmc_card_hs(struct mmc_card *card)
546{
547 return card->host->ios.timing == MMC_TIMING_SD_HS ||
548 card->host->ios.timing == MMC_TIMING_MMC_HS;
549}
550
551
552static inline int mmc_card_uhs(struct mmc_card *card)
553{
554 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
555 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
556}
557
558void mmc_retune_timer_stop(struct mmc_host *host);
559
560static inline void mmc_retune_needed(struct mmc_host *host)
561{
562 if (host->can_retune)
563 host->need_retune = 1;
564}
565
566static inline bool mmc_can_retune(struct mmc_host *host)
567{
568 return host->can_retune == 1;
569}
570
571static inline bool mmc_doing_retune(struct mmc_host *host)
572{
573 return host->doing_retune == 1;
574}
575
576static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
577{
578 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
579}
580
581int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
582int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
583
584#endif
585