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11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/linkmode.h>
18#include <linux/mdio.h>
19#include <linux/mii.h>
20#include <linux/module.h>
21#include <linux/timer.h>
22#include <linux/workqueue.h>
23#include <linux/mod_devicetable.h>
24
25#include <linux/atomic.h>
26
27#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
31#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
38 SUPPORTED_1000baseT_Full)
39
40extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
55#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
56#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
57
58extern const int phy_10_100_features_array[4];
59extern const int phy_basic_t1_features_array[2];
60extern const int phy_gbit_features_array[2];
61extern const int phy_10gbit_features_array[1];
62
63
64
65
66
67
68#define PHY_POLL -1
69#define PHY_IGNORE_INTERRUPT -2
70
71#define PHY_IS_INTERNAL 0x00000001
72#define PHY_RST_AFTER_CLK_EN 0x00000002
73#define MDIO_DEVICE_IS_PHY 0x80000000
74
75
76typedef enum {
77 PHY_INTERFACE_MODE_NA,
78 PHY_INTERFACE_MODE_INTERNAL,
79 PHY_INTERFACE_MODE_MII,
80 PHY_INTERFACE_MODE_GMII,
81 PHY_INTERFACE_MODE_SGMII,
82 PHY_INTERFACE_MODE_TBI,
83 PHY_INTERFACE_MODE_REVMII,
84 PHY_INTERFACE_MODE_RMII,
85 PHY_INTERFACE_MODE_RGMII,
86 PHY_INTERFACE_MODE_RGMII_ID,
87 PHY_INTERFACE_MODE_RGMII_RXID,
88 PHY_INTERFACE_MODE_RGMII_TXID,
89 PHY_INTERFACE_MODE_RTBI,
90 PHY_INTERFACE_MODE_SMII,
91 PHY_INTERFACE_MODE_XGMII,
92 PHY_INTERFACE_MODE_MOCA,
93 PHY_INTERFACE_MODE_QSGMII,
94 PHY_INTERFACE_MODE_TRGMII,
95 PHY_INTERFACE_MODE_1000BASEX,
96 PHY_INTERFACE_MODE_2500BASEX,
97 PHY_INTERFACE_MODE_RXAUI,
98 PHY_INTERFACE_MODE_XAUI,
99
100 PHY_INTERFACE_MODE_10GKR,
101 PHY_INTERFACE_MODE_MAX,
102} phy_interface_t;
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114
115unsigned int phy_supported_speeds(struct phy_device *phy,
116 unsigned int *speeds,
117 unsigned int size);
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126
127static inline const char *phy_modes(phy_interface_t interface)
128{
129 switch (interface) {
130 case PHY_INTERFACE_MODE_NA:
131 return "";
132 case PHY_INTERFACE_MODE_INTERNAL:
133 return "internal";
134 case PHY_INTERFACE_MODE_MII:
135 return "mii";
136 case PHY_INTERFACE_MODE_GMII:
137 return "gmii";
138 case PHY_INTERFACE_MODE_SGMII:
139 return "sgmii";
140 case PHY_INTERFACE_MODE_TBI:
141 return "tbi";
142 case PHY_INTERFACE_MODE_REVMII:
143 return "rev-mii";
144 case PHY_INTERFACE_MODE_RMII:
145 return "rmii";
146 case PHY_INTERFACE_MODE_RGMII:
147 return "rgmii";
148 case PHY_INTERFACE_MODE_RGMII_ID:
149 return "rgmii-id";
150 case PHY_INTERFACE_MODE_RGMII_RXID:
151 return "rgmii-rxid";
152 case PHY_INTERFACE_MODE_RGMII_TXID:
153 return "rgmii-txid";
154 case PHY_INTERFACE_MODE_RTBI:
155 return "rtbi";
156 case PHY_INTERFACE_MODE_SMII:
157 return "smii";
158 case PHY_INTERFACE_MODE_XGMII:
159 return "xgmii";
160 case PHY_INTERFACE_MODE_MOCA:
161 return "moca";
162 case PHY_INTERFACE_MODE_QSGMII:
163 return "qsgmii";
164 case PHY_INTERFACE_MODE_TRGMII:
165 return "trgmii";
166 case PHY_INTERFACE_MODE_1000BASEX:
167 return "1000base-x";
168 case PHY_INTERFACE_MODE_2500BASEX:
169 return "2500base-x";
170 case PHY_INTERFACE_MODE_RXAUI:
171 return "rxaui";
172 case PHY_INTERFACE_MODE_XAUI:
173 return "xaui";
174 case PHY_INTERFACE_MODE_10GKR:
175 return "10gbase-kr";
176 default:
177 return "unknown";
178 }
179}
180
181
182#define PHY_INIT_TIMEOUT 100000
183#define PHY_STATE_TIME 1
184#define PHY_FORCE_TIMEOUT 10
185
186#define PHY_MAX_ADDR 32
187
188
189#define PHY_ID_FMT "%s:%02x"
190
191#define MII_BUS_ID_SIZE 61
192
193
194
195#define MII_ADDR_C45 (1<<30)
196
197struct device;
198struct phylink;
199struct sk_buff;
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204
205struct mii_bus {
206 struct module *owner;
207 const char *name;
208 char id[MII_BUS_ID_SIZE];
209 void *priv;
210 int (*read)(struct mii_bus *bus, int addr, int regnum);
211 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
212 int (*reset)(struct mii_bus *bus);
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217
218 struct mutex mdio_lock;
219
220 struct device *parent;
221 enum {
222 MDIOBUS_ALLOCATED = 1,
223 MDIOBUS_REGISTERED,
224 MDIOBUS_UNREGISTERED,
225 MDIOBUS_RELEASED,
226 } state;
227 struct device dev;
228
229
230 struct mdio_device *mdio_map[PHY_MAX_ADDR];
231
232
233 u32 phy_mask;
234
235
236 u32 phy_ignore_ta_mask;
237
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242 int irq[PHY_MAX_ADDR];
243
244
245 int reset_delay_us;
246
247 struct gpio_desc *reset_gpiod;
248};
249#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
250
251struct mii_bus *mdiobus_alloc_size(size_t);
252static inline struct mii_bus *mdiobus_alloc(void)
253{
254 return mdiobus_alloc_size(0);
255}
256
257int __mdiobus_register(struct mii_bus *bus, struct module *owner);
258#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
259void mdiobus_unregister(struct mii_bus *bus);
260void mdiobus_free(struct mii_bus *bus);
261struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
262static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
263{
264 return devm_mdiobus_alloc_size(dev, 0);
265}
266
267void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
268struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
269
270#define PHY_INTERRUPT_DISABLED false
271#define PHY_INTERRUPT_ENABLED true
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308enum phy_state {
309 PHY_DOWN = 0,
310 PHY_READY,
311 PHY_HALTED,
312 PHY_UP,
313 PHY_RUNNING,
314 PHY_NOLINK,
315 PHY_FORCING,
316};
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323struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326};
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361struct phy_device {
362 struct mdio_device mdio;
363
364
365
366 struct phy_driver *drv;
367
368 u32 phy_id;
369
370 struct phy_c45_device_ids c45_ids;
371 unsigned is_c45:1;
372 unsigned is_internal:1;
373 unsigned is_pseudo_fixed_link:1;
374 unsigned is_gigabit_capable:1;
375 unsigned has_fixups:1;
376 unsigned suspended:1;
377 unsigned sysfs_links:1;
378 unsigned loopback_enabled:1;
379
380 unsigned autoneg:1;
381
382 unsigned link:1;
383 unsigned autoneg_complete:1;
384
385
386 unsigned interrupts:1;
387
388 enum phy_state state;
389
390 u32 dev_flags;
391
392 phy_interface_t interface;
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397
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
403
404
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
406 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
407 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
408
409
410 u32 eee_broken_modes;
411
412 int link_timeout;
413
414#ifdef CONFIG_LED_TRIGGER_PHY
415 struct phy_led_trigger *phy_led_triggers;
416 unsigned int phy_num_led_triggers;
417 struct phy_led_trigger *last_triggered;
418
419 struct phy_led_trigger *led_link_trigger;
420#endif
421
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425
426 int irq;
427
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429
430 void *priv;
431
432
433 struct delayed_work state_queue;
434
435 struct mutex lock;
436
437 struct phylink *phylink;
438 struct net_device *attached_dev;
439
440 u8 mdix;
441 u8 mdix_ctrl;
442
443 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
444 void (*adjust_link)(struct net_device *dev);
445};
446#define to_phy_device(d) container_of(to_mdio_device(d), \
447 struct phy_device, mdio)
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470struct phy_driver {
471 struct mdio_driver_common mdiodrv;
472 u32 phy_id;
473 char *name;
474 u32 phy_id_mask;
475 const unsigned long * const features;
476 u32 flags;
477 const void *driver_data;
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481
482 int (*soft_reset)(struct phy_device *phydev);
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488 int (*config_init)(struct phy_device *phydev);
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494 int (*probe)(struct phy_device *phydev);
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500 int (*get_features)(struct phy_device *phydev);
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503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
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512 int (*config_aneg)(struct phy_device *phydev);
513
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515 int (*aneg_done)(struct phy_device *phydev);
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518 int (*read_status)(struct phy_device *phydev);
519
520
521 int (*ack_interrupt)(struct phy_device *phydev);
522
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524 int (*config_intr)(struct phy_device *phydev);
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530 int (*did_interrupt)(struct phy_device *phydev);
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533 void (*remove)(struct phy_device *phydev);
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539 int (*match_phy_device)(struct phy_device *phydev);
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542 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
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545 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
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554 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
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562 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
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567 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
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570 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
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579 void (*link_change_notify)(struct phy_device *dev);
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590 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
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602 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
603 u16 val);
604
605 int (*read_page)(struct phy_device *dev);
606 int (*write_page)(struct phy_device *dev, int page);
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610 int (*module_info)(struct phy_device *dev,
611 struct ethtool_modinfo *modinfo);
612
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614 int (*module_eeprom)(struct phy_device *dev,
615 struct ethtool_eeprom *ee, u8 *data);
616
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618 int (*get_sset_count)(struct phy_device *dev);
619 void (*get_strings)(struct phy_device *dev, u8 *data);
620 void (*get_stats)(struct phy_device *dev,
621 struct ethtool_stats *stats, u64 *data);
622
623
624 int (*get_tunable)(struct phy_device *dev,
625 struct ethtool_tunable *tuna, void *data);
626 int (*set_tunable)(struct phy_device *dev,
627 struct ethtool_tunable *tuna,
628 const void *data);
629 int (*set_loopback)(struct phy_device *dev, bool enable);
630};
631#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
632 struct phy_driver, mdiodrv)
633
634#define PHY_ANY_ID "MATCH ANY PHY"
635#define PHY_ANY_UID 0xffffffff
636
637#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
638#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
639#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
640
641
642struct phy_fixup {
643 struct list_head list;
644 char bus_id[MII_BUS_ID_SIZE + 3];
645 u32 phy_uid;
646 u32 phy_uid_mask;
647 int (*run)(struct phy_device *phydev);
648};
649
650const char *phy_speed_to_str(int speed);
651const char *phy_duplex_to_str(unsigned int duplex);
652
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655
656struct phy_setting {
657 u32 speed;
658 u8 duplex;
659 u8 bit;
660};
661
662const struct phy_setting *
663phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
664 bool exact);
665size_t phy_speeds(unsigned int *speeds, size_t size,
666 unsigned long *mask);
667void of_set_phy_supported(struct phy_device *phydev);
668void of_set_phy_eee_broken(struct phy_device *phydev);
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674static inline bool phy_is_started(struct phy_device *phydev)
675{
676 return phydev->state >= PHY_UP;
677}
678
679void phy_resolve_aneg_linkmode(struct phy_device *phydev);
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690static inline int phy_read(struct phy_device *phydev, u32 regnum)
691{
692 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
693}
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702static inline int __phy_read(struct phy_device *phydev, u32 regnum)
703{
704 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
705}
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717static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
718{
719 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
720}
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730static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
731{
732 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
733 val);
734}
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745int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
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756int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
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768int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
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780int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
781
782int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
783 u16 set);
784int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
785 u16 set);
786int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
787int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788
789int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
790 u16 mask, u16 set);
791int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
792 u16 mask, u16 set);
793int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
794 u16 mask, u16 set);
795int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
796 u16 mask, u16 set);
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806static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
807{
808 return __phy_modify(phydev, regnum, 0, val);
809}
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819static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
820 u16 val)
821{
822 return __phy_modify(phydev, regnum, val, 0);
823}
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831static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
832{
833 return phy_modify(phydev, regnum, 0, val);
834}
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842static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
843{
844 return phy_modify(phydev, regnum, val, 0);
845}
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857static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
858 u32 regnum, u16 val)
859{
860 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
861}
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873static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
874 u32 regnum, u16 val)
875{
876 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
877}
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887static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
888 u32 regnum, u16 val)
889{
890 return phy_modify_mmd(phydev, devad, regnum, 0, val);
891}
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901static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
902 u32 regnum, u16 val)
903{
904 return phy_modify_mmd(phydev, devad, regnum, val, 0);
905}
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913
914static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
915{
916 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
917}
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924static inline bool phy_polling_mode(struct phy_device *phydev)
925{
926 return phydev->irq == PHY_POLL;
927}
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933static inline bool phy_is_internal(struct phy_device *phydev)
934{
935 return phydev->is_internal;
936}
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943static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
944{
945 return mode >= PHY_INTERFACE_MODE_RGMII &&
946 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
947};
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957static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
958{
959 return mode == PHY_INTERFACE_MODE_1000BASEX ||
960 mode == PHY_INTERFACE_MODE_2500BASEX;
961}
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968static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
969{
970 return phy_interface_mode_is_rgmii(phydev->interface);
971};
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978static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
979{
980 return phydev->is_pseudo_fixed_link;
981}
982
983int phy_save_page(struct phy_device *phydev);
984int phy_select_page(struct phy_device *phydev, int page);
985int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
986int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
987int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
988int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
989 u16 mask, u16 set);
990
991struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
992 bool is_c45,
993 struct phy_c45_device_ids *c45_ids);
994#if IS_ENABLED(CONFIG_PHYLIB)
995struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
996int phy_device_register(struct phy_device *phy);
997void phy_device_free(struct phy_device *phydev);
998#else
999static inline
1000struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1001{
1002 return NULL;
1003}
1004
1005static inline int phy_device_register(struct phy_device *phy)
1006{
1007 return 0;
1008}
1009
1010static inline void phy_device_free(struct phy_device *phydev) { }
1011#endif
1012void phy_device_remove(struct phy_device *phydev);
1013int phy_init_hw(struct phy_device *phydev);
1014int phy_suspend(struct phy_device *phydev);
1015int phy_resume(struct phy_device *phydev);
1016int __phy_resume(struct phy_device *phydev);
1017int phy_loopback(struct phy_device *phydev, bool enable);
1018struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1019 phy_interface_t interface);
1020struct phy_device *phy_find_first(struct mii_bus *bus);
1021int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1022 u32 flags, phy_interface_t interface);
1023int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1024 void (*handler)(struct net_device *),
1025 phy_interface_t interface);
1026struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1027 void (*handler)(struct net_device *),
1028 phy_interface_t interface);
1029void phy_disconnect(struct phy_device *phydev);
1030void phy_detach(struct phy_device *phydev);
1031void phy_start(struct phy_device *phydev);
1032void phy_stop(struct phy_device *phydev);
1033int phy_start_aneg(struct phy_device *phydev);
1034int phy_aneg_done(struct phy_device *phydev);
1035int phy_speed_down(struct phy_device *phydev, bool sync);
1036int phy_speed_up(struct phy_device *phydev);
1037
1038int phy_restart_aneg(struct phy_device *phydev);
1039int phy_reset_after_clk_enable(struct phy_device *phydev);
1040
1041static inline void phy_device_reset(struct phy_device *phydev, int value)
1042{
1043 mdio_device_reset(&phydev->mdio, value);
1044}
1045
1046#define phydev_err(_phydev, format, args...) \
1047 dev_err(&_phydev->mdio.dev, format, ##args)
1048
1049#define phydev_info(_phydev, format, args...) \
1050 dev_info(&_phydev->mdio.dev, format, ##args)
1051
1052#define phydev_warn(_phydev, format, args...) \
1053 dev_warn(&_phydev->mdio.dev, format, ##args)
1054
1055#define phydev_dbg(_phydev, format, args...) \
1056 dev_dbg(&_phydev->mdio.dev, format, ##args)
1057
1058static inline const char *phydev_name(const struct phy_device *phydev)
1059{
1060 return dev_name(&phydev->mdio.dev);
1061}
1062
1063void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1064 __printf(2, 3);
1065void phy_attached_info(struct phy_device *phydev);
1066
1067
1068int genphy_config_init(struct phy_device *phydev);
1069int genphy_read_abilities(struct phy_device *phydev);
1070int genphy_setup_forced(struct phy_device *phydev);
1071int genphy_restart_aneg(struct phy_device *phydev);
1072int genphy_config_eee_advert(struct phy_device *phydev);
1073int genphy_config_aneg(struct phy_device *phydev);
1074int genphy_aneg_done(struct phy_device *phydev);
1075int genphy_update_link(struct phy_device *phydev);
1076int genphy_read_status(struct phy_device *phydev);
1077int genphy_suspend(struct phy_device *phydev);
1078int genphy_resume(struct phy_device *phydev);
1079int genphy_loopback(struct phy_device *phydev, bool enable);
1080int genphy_soft_reset(struct phy_device *phydev);
1081static inline int genphy_no_soft_reset(struct phy_device *phydev)
1082{
1083 return 0;
1084}
1085static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1086{
1087 return 0;
1088}
1089static inline int genphy_no_config_intr(struct phy_device *phydev)
1090{
1091 return 0;
1092}
1093int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1094 u16 regnum);
1095int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1096 u16 regnum, u16 val);
1097
1098
1099int genphy_c45_restart_aneg(struct phy_device *phydev);
1100int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1101int genphy_c45_aneg_done(struct phy_device *phydev);
1102int genphy_c45_read_link(struct phy_device *phydev);
1103int genphy_c45_read_lpa(struct phy_device *phydev);
1104int genphy_c45_read_pma(struct phy_device *phydev);
1105int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1106int genphy_c45_an_config_aneg(struct phy_device *phydev);
1107int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1108int genphy_c45_read_mdix(struct phy_device *phydev);
1109int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1110int genphy_c45_read_status(struct phy_device *phydev);
1111
1112
1113int gen10g_config_aneg(struct phy_device *phydev);
1114
1115static inline int phy_read_status(struct phy_device *phydev)
1116{
1117 if (!phydev->drv)
1118 return -EIO;
1119
1120 if (phydev->drv->read_status)
1121 return phydev->drv->read_status(phydev);
1122 else
1123 return genphy_read_status(phydev);
1124}
1125
1126void phy_driver_unregister(struct phy_driver *drv);
1127void phy_drivers_unregister(struct phy_driver *drv, int n);
1128int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1129int phy_drivers_register(struct phy_driver *new_driver, int n,
1130 struct module *owner);
1131void phy_state_machine(struct work_struct *work);
1132void phy_mac_interrupt(struct phy_device *phydev);
1133void phy_start_machine(struct phy_device *phydev);
1134void phy_stop_machine(struct phy_device *phydev);
1135int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1136void phy_ethtool_ksettings_get(struct phy_device *phydev,
1137 struct ethtool_link_ksettings *cmd);
1138int phy_ethtool_ksettings_set(struct phy_device *phydev,
1139 const struct ethtool_link_ksettings *cmd);
1140int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1141void phy_request_interrupt(struct phy_device *phydev);
1142void phy_print_status(struct phy_device *phydev);
1143int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1144void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1145void phy_advertise_supported(struct phy_device *phydev);
1146void phy_support_sym_pause(struct phy_device *phydev);
1147void phy_support_asym_pause(struct phy_device *phydev);
1148void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1149 bool autoneg);
1150void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1151bool phy_validate_pause(struct phy_device *phydev,
1152 struct ethtool_pauseparam *pp);
1153
1154int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1155 int (*run)(struct phy_device *));
1156int phy_register_fixup_for_id(const char *bus_id,
1157 int (*run)(struct phy_device *));
1158int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1159 int (*run)(struct phy_device *));
1160
1161int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1162int phy_unregister_fixup_for_id(const char *bus_id);
1163int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1164
1165int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1166int phy_get_eee_err(struct phy_device *phydev);
1167int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1168int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1169int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1170void phy_ethtool_get_wol(struct phy_device *phydev,
1171 struct ethtool_wolinfo *wol);
1172int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1173 struct ethtool_link_ksettings *cmd);
1174int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1175 const struct ethtool_link_ksettings *cmd);
1176int phy_ethtool_nway_reset(struct net_device *ndev);
1177
1178#if IS_ENABLED(CONFIG_PHYLIB)
1179int __init mdio_bus_init(void);
1180void mdio_bus_exit(void);
1181#endif
1182
1183
1184static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1185{
1186 if (!phydev->drv)
1187 return -EIO;
1188
1189 mutex_lock(&phydev->lock);
1190 phydev->drv->get_strings(phydev, data);
1191 mutex_unlock(&phydev->lock);
1192
1193 return 0;
1194}
1195
1196static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1197{
1198 int ret;
1199
1200 if (!phydev->drv)
1201 return -EIO;
1202
1203 if (phydev->drv->get_sset_count &&
1204 phydev->drv->get_strings &&
1205 phydev->drv->get_stats) {
1206 mutex_lock(&phydev->lock);
1207 ret = phydev->drv->get_sset_count(phydev);
1208 mutex_unlock(&phydev->lock);
1209
1210 return ret;
1211 }
1212
1213 return -EOPNOTSUPP;
1214}
1215
1216static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1217 struct ethtool_stats *stats, u64 *data)
1218{
1219 if (!phydev->drv)
1220 return -EIO;
1221
1222 mutex_lock(&phydev->lock);
1223 phydev->drv->get_stats(phydev, stats, data);
1224 mutex_unlock(&phydev->lock);
1225
1226 return 0;
1227}
1228
1229extern struct bus_type mdio_bus_type;
1230
1231struct mdio_board_info {
1232 const char *bus_id;
1233 char modalias[MDIO_NAME_SIZE];
1234 int mdio_addr;
1235 const void *platform_data;
1236};
1237
1238#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1239int mdiobus_register_board_info(const struct mdio_board_info *info,
1240 unsigned int n);
1241#else
1242static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1243 unsigned int n)
1244{
1245 return 0;
1246}
1247#endif
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258#define phy_module_driver(__phy_drivers, __count) \
1259static int __init phy_module_init(void) \
1260{ \
1261 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1262} \
1263module_init(phy_module_init); \
1264static void __exit phy_module_exit(void) \
1265{ \
1266 phy_drivers_unregister(__phy_drivers, __count); \
1267} \
1268module_exit(phy_module_exit)
1269
1270#define module_phy_driver(__phy_drivers) \
1271 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1272
1273bool phy_driver_is_genphy(struct phy_device *phydev);
1274bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1275
1276#endif
1277