linux/sound/soc/codecs/max9860.c
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   1// SPDX-License-Identifier: GPL-2.0
   2//
   3// Driver for the MAX9860 Mono Audio Voice Codec
   4//
   5// https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf
   6//
   7// The driver does not support sidetone since the DVST register field is
   8// backwards with the mute near the maximum level instead of the minimum.
   9//
  10// Author: Peter Rosin <peda@axentia.s>
  11//         Copyright 2016 Axentia Technologies
  12
  13#include <linux/init.h>
  14#include <linux/module.h>
  15#include <linux/clk.h>
  16#include <linux/kernel.h>
  17#include <linux/pm_runtime.h>
  18#include <linux/regmap.h>
  19#include <linux/i2c.h>
  20#include <linux/regulator/consumer.h>
  21#include <sound/soc.h>
  22#include <sound/soc-dapm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/tlv.h>
  25
  26#include "max9860.h"
  27
  28struct max9860_priv {
  29        struct regmap *regmap;
  30        struct regulator *dvddio;
  31        struct notifier_block dvddio_nb;
  32        u8 psclk;
  33        unsigned long pclk_rate;
  34        int fmt;
  35};
  36
  37static int max9860_dvddio_event(struct notifier_block *nb,
  38                                unsigned long event, void *data)
  39{
  40        struct max9860_priv *max9860 = container_of(nb, struct max9860_priv,
  41                                                    dvddio_nb);
  42        if (event & REGULATOR_EVENT_DISABLE) {
  43                regcache_mark_dirty(max9860->regmap);
  44                regcache_cache_only(max9860->regmap, true);
  45        }
  46
  47        return 0;
  48}
  49
  50static const struct reg_default max9860_reg_defaults[] = {
  51        { MAX9860_PWRMAN,       0x00 },
  52        { MAX9860_INTEN,        0x00 },
  53        { MAX9860_SYSCLK,       0x00 },
  54        { MAX9860_AUDIOCLKHIGH, 0x00 },
  55        { MAX9860_AUDIOCLKLOW,  0x00 },
  56        { MAX9860_IFC1A,        0x00 },
  57        { MAX9860_IFC1B,        0x00 },
  58        { MAX9860_VOICEFLTR,    0x00 },
  59        { MAX9860_DACATTN,      0x00 },
  60        { MAX9860_ADCLEVEL,     0x00 },
  61        { MAX9860_DACGAIN,      0x00 },
  62        { MAX9860_MICGAIN,      0x00 },
  63        { MAX9860_MICADC,       0x00 },
  64        { MAX9860_NOISEGATE,    0x00 },
  65};
  66
  67static bool max9860_readable(struct device *dev, unsigned int reg)
  68{
  69        switch (reg) {
  70        case MAX9860_INTRSTATUS ... MAX9860_MICGAIN:
  71        case MAX9860_MICADC ... MAX9860_PWRMAN:
  72        case MAX9860_REVISION:
  73                return true;
  74        }
  75
  76        return false;
  77}
  78
  79static bool max9860_writeable(struct device *dev, unsigned int reg)
  80{
  81        switch (reg) {
  82        case MAX9860_INTEN ... MAX9860_MICGAIN:
  83        case MAX9860_MICADC ... MAX9860_PWRMAN:
  84                return true;
  85        }
  86
  87        return false;
  88}
  89
  90static bool max9860_volatile(struct device *dev, unsigned int reg)
  91{
  92        switch (reg) {
  93        case MAX9860_INTRSTATUS:
  94        case MAX9860_MICREADBACK:
  95                return true;
  96        }
  97
  98        return false;
  99}
 100
 101static bool max9860_precious(struct device *dev, unsigned int reg)
 102{
 103        switch (reg) {
 104        case MAX9860_INTRSTATUS:
 105                return true;
 106        }
 107
 108        return false;
 109}
 110
 111static const struct regmap_config max9860_regmap = {
 112        .reg_bits = 8,
 113        .val_bits = 8,
 114
 115        .readable_reg = max9860_readable,
 116        .writeable_reg = max9860_writeable,
 117        .volatile_reg = max9860_volatile,
 118        .precious_reg = max9860_precious,
 119
 120        .max_register = MAX9860_MAX_REGISTER,
 121        .reg_defaults = max9860_reg_defaults,
 122        .num_reg_defaults = ARRAY_SIZE(max9860_reg_defaults),
 123        .cache_type = REGCACHE_RBTREE,
 124};
 125
 126static const DECLARE_TLV_DB_SCALE(dva_tlv, -9100, 100, 1);
 127static const DECLARE_TLV_DB_SCALE(dvg_tlv, 0, 600, 0);
 128static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
 129static const DECLARE_TLV_DB_RANGE(pam_tlv,
 130        0, MAX9860_PAM_MAX - 1,             TLV_DB_SCALE_ITEM(-2000, 2000, 1),
 131        MAX9860_PAM_MAX, MAX9860_PAM_MAX,   TLV_DB_SCALE_ITEM(3000, 0, 0));
 132static const DECLARE_TLV_DB_SCALE(pgam_tlv, 0, 100, 0);
 133static const DECLARE_TLV_DB_SCALE(anth_tlv, -7600, 400, 1);
 134static const DECLARE_TLV_DB_SCALE(agcth_tlv, -1800, 100, 0);
 135
 136static const char * const agchld_text[] = {
 137        "AGC Disabled", "50ms", "100ms", "400ms"
 138};
 139
 140static SOC_ENUM_SINGLE_DECL(agchld_enum, MAX9860_MICADC,
 141                            MAX9860_AGCHLD_SHIFT, agchld_text);
 142
 143static const char * const agcsrc_text[] = {
 144        "Left ADC", "Left/Right ADC"
 145};
 146
 147static SOC_ENUM_SINGLE_DECL(agcsrc_enum, MAX9860_MICADC,
 148                            MAX9860_AGCSRC_SHIFT, agcsrc_text);
 149
 150static const char * const agcatk_text[] = {
 151        "3ms", "12ms", "50ms", "200ms"
 152};
 153
 154static SOC_ENUM_SINGLE_DECL(agcatk_enum, MAX9860_MICADC,
 155                            MAX9860_AGCATK_SHIFT, agcatk_text);
 156
 157static const char * const agcrls_text[] = {
 158        "78ms", "156ms", "312ms", "625ms",
 159        "1.25s", "2.5s", "5s", "10s"
 160};
 161
 162static SOC_ENUM_SINGLE_DECL(agcrls_enum, MAX9860_MICADC,
 163                            MAX9860_AGCRLS_SHIFT, agcrls_text);
 164
 165static const char * const filter_text[] = {
 166        "Disabled",
 167        "Elliptical HP 217Hz notch (16kHz)",
 168        "Butterworth HP 500Hz (16kHz)",
 169        "Elliptical HP 217Hz notch (8kHz)",
 170        "Butterworth HP 500Hz (8kHz)",
 171        "Butterworth HP 200Hz (48kHz)"
 172};
 173
 174static SOC_ENUM_SINGLE_DECL(avflt_enum, MAX9860_VOICEFLTR,
 175                            MAX9860_AVFLT_SHIFT, filter_text);
 176
 177static SOC_ENUM_SINGLE_DECL(dvflt_enum, MAX9860_VOICEFLTR,
 178                            MAX9860_DVFLT_SHIFT, filter_text);
 179
 180static const struct snd_kcontrol_new max9860_controls[] = {
 181SOC_SINGLE_TLV("Master Playback Volume", MAX9860_DACATTN,
 182               MAX9860_DVA_SHIFT, MAX9860_DVA_MUTE, 1, dva_tlv),
 183SOC_SINGLE_TLV("DAC Gain Volume", MAX9860_DACGAIN,
 184               MAX9860_DVG_SHIFT, MAX9860_DVG_MAX, 0, dvg_tlv),
 185SOC_DOUBLE_TLV("Line Capture Volume", MAX9860_ADCLEVEL,
 186               MAX9860_ADCLL_SHIFT, MAX9860_ADCRL_SHIFT, MAX9860_ADCxL_MIN, 1,
 187               adc_tlv),
 188
 189SOC_ENUM("AGC Hold Time", agchld_enum),
 190SOC_ENUM("AGC/Noise Gate Source", agcsrc_enum),
 191SOC_ENUM("AGC Attack Time", agcatk_enum),
 192SOC_ENUM("AGC Release Time", agcrls_enum),
 193
 194SOC_SINGLE_TLV("Noise Gate Threshold Volume", MAX9860_NOISEGATE,
 195               MAX9860_ANTH_SHIFT, MAX9860_ANTH_MAX, 0, anth_tlv),
 196SOC_SINGLE_TLV("AGC Signal Threshold Volume", MAX9860_NOISEGATE,
 197               MAX9860_AGCTH_SHIFT, MAX9860_AGCTH_MIN, 1, agcth_tlv),
 198
 199SOC_SINGLE_TLV("Mic PGA Volume", MAX9860_MICGAIN,
 200               MAX9860_PGAM_SHIFT, MAX9860_PGAM_MIN, 1, pgam_tlv),
 201SOC_SINGLE_TLV("Mic Preamp Volume", MAX9860_MICGAIN,
 202               MAX9860_PAM_SHIFT, MAX9860_PAM_MAX, 0, pam_tlv),
 203
 204SOC_ENUM("ADC Filter", avflt_enum),
 205SOC_ENUM("DAC Filter", dvflt_enum),
 206};
 207
 208static const struct snd_soc_dapm_widget max9860_dapm_widgets[] = {
 209SND_SOC_DAPM_INPUT("MICL"),
 210SND_SOC_DAPM_INPUT("MICR"),
 211
 212SND_SOC_DAPM_ADC("ADCL", NULL, MAX9860_PWRMAN, MAX9860_ADCLEN_SHIFT, 0),
 213SND_SOC_DAPM_ADC("ADCR", NULL, MAX9860_PWRMAN, MAX9860_ADCREN_SHIFT, 0),
 214
 215SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
 216SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
 217
 218SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
 219SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
 220
 221SND_SOC_DAPM_DAC("DAC", NULL, MAX9860_PWRMAN, MAX9860_DACEN_SHIFT, 0),
 222
 223SND_SOC_DAPM_OUTPUT("OUT"),
 224
 225SND_SOC_DAPM_SUPPLY("Supply", SND_SOC_NOPM, 0, 0,
 226                    NULL, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 227SND_SOC_DAPM_REGULATOR_SUPPLY("AVDD", 0, 0),
 228SND_SOC_DAPM_REGULATOR_SUPPLY("DVDD", 0, 0),
 229SND_SOC_DAPM_CLOCK_SUPPLY("mclk"),
 230};
 231
 232static const struct snd_soc_dapm_route max9860_dapm_routes[] = {
 233        { "ADCL", NULL, "MICL" },
 234        { "ADCR", NULL, "MICR" },
 235        { "AIFOUTL", NULL, "ADCL" },
 236        { "AIFOUTR", NULL, "ADCR" },
 237
 238        { "DAC", NULL, "AIFINL" },
 239        { "DAC", NULL, "AIFINR" },
 240        { "OUT", NULL, "DAC" },
 241
 242        { "Supply", NULL, "AVDD" },
 243        { "Supply", NULL, "DVDD" },
 244        { "Supply", NULL, "mclk" },
 245
 246        { "DAC", NULL, "Supply" },
 247        { "ADCL", NULL, "Supply" },
 248        { "ADCR", NULL, "Supply" },
 249};
 250
 251static int max9860_hw_params(struct snd_pcm_substream *substream,
 252                             struct snd_pcm_hw_params *params,
 253                             struct snd_soc_dai *dai)
 254{
 255        struct snd_soc_component *component = dai->component;
 256        struct max9860_priv *max9860 = snd_soc_component_get_drvdata(component);
 257        u8 master;
 258        u8 ifc1a = 0;
 259        u8 ifc1b = 0;
 260        u8 sysclk = 0;
 261        unsigned long n;
 262        int ret;
 263
 264        dev_dbg(component->dev, "hw_params %u Hz, %u channels\n",
 265                params_rate(params),
 266                params_channels(params));
 267
 268        if (params_channels(params) == 2)
 269                ifc1b |= MAX9860_ST;
 270
 271        switch (max9860->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 272        case SND_SOC_DAIFMT_CBS_CFS:
 273                master = 0;
 274                break;
 275        case SND_SOC_DAIFMT_CBM_CFM:
 276                master = MAX9860_MASTER;
 277                break;
 278        default:
 279                return -EINVAL;
 280        }
 281        ifc1a |= master;
 282
 283        if (master) {
 284                if (params_width(params) * params_channels(params) > 48)
 285                        ifc1b |= MAX9860_BSEL_64X;
 286                else
 287                        ifc1b |= MAX9860_BSEL_48X;
 288        }
 289
 290        switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 291        case SND_SOC_DAIFMT_I2S:
 292                ifc1a |= MAX9860_DDLY;
 293                ifc1b |= MAX9860_ADLY;
 294                break;
 295        case SND_SOC_DAIFMT_LEFT_J:
 296                ifc1a |= MAX9860_WCI;
 297                break;
 298        case SND_SOC_DAIFMT_DSP_A:
 299                if (params_width(params) != 16) {
 300                        dev_err(component->dev,
 301                                "DSP_A works for 16 bits per sample only.\n");
 302                        return -EINVAL;
 303                }
 304                ifc1a |= MAX9860_DDLY | MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM;
 305                ifc1b |= MAX9860_ADLY;
 306                break;
 307        case SND_SOC_DAIFMT_DSP_B:
 308                if (params_width(params) != 16) {
 309                        dev_err(component->dev,
 310                                "DSP_B works for 16 bits per sample only.\n");
 311                        return -EINVAL;
 312                }
 313                ifc1a |= MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM;
 314                break;
 315        default:
 316                return -EINVAL;
 317        }
 318
 319        switch (max9860->fmt & SND_SOC_DAIFMT_INV_MASK) {
 320        case SND_SOC_DAIFMT_NB_NF:
 321                break;
 322        case SND_SOC_DAIFMT_NB_IF:
 323                switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 324                case SND_SOC_DAIFMT_DSP_A:
 325                case SND_SOC_DAIFMT_DSP_B:
 326                        return -EINVAL;
 327                }
 328                ifc1a ^= MAX9860_WCI;
 329                break;
 330        case SND_SOC_DAIFMT_IB_IF:
 331                switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 332                case SND_SOC_DAIFMT_DSP_A:
 333                case SND_SOC_DAIFMT_DSP_B:
 334                        return -EINVAL;
 335                }
 336                ifc1a ^= MAX9860_WCI;
 337                /* fall through */
 338        case SND_SOC_DAIFMT_IB_NF:
 339                ifc1a ^= MAX9860_DBCI;
 340                ifc1b ^= MAX9860_ABCI;
 341                break;
 342        default:
 343                return -EINVAL;
 344        }
 345
 346        dev_dbg(component->dev, "IFC1A  %02x\n", ifc1a);
 347        ret = regmap_write(max9860->regmap, MAX9860_IFC1A, ifc1a);
 348        if (ret) {
 349                dev_err(component->dev, "Failed to set IFC1A: %d\n", ret);
 350                return ret;
 351        }
 352        dev_dbg(component->dev, "IFC1B  %02x\n", ifc1b);
 353        ret = regmap_write(max9860->regmap, MAX9860_IFC1B, ifc1b);
 354        if (ret) {
 355                dev_err(component->dev, "Failed to set IFC1B: %d\n", ret);
 356                return ret;
 357        }
 358
 359        /*
 360         * Check if Integer Clock Mode is possible, but avoid it in slave mode
 361         * since we then do not know if lrclk is derived from pclk and the
 362         * datasheet mentions that the frequencies have to match exactly in
 363         * order for this to work.
 364         */
 365        if (params_rate(params) == 8000 || params_rate(params) == 16000) {
 366                if (master) {
 367                        switch (max9860->pclk_rate) {
 368                        case 12000000:
 369                                sysclk = MAX9860_FREQ_12MHZ;
 370                                break;
 371                        case 13000000:
 372                                sysclk = MAX9860_FREQ_13MHZ;
 373                                break;
 374                        case 19200000:
 375                                sysclk = MAX9860_FREQ_19_2MHZ;
 376                                break;
 377                        default:
 378                                /*
 379                                 * Integer Clock Mode not possible. Leave
 380                                 * sysclk at zero and fall through to the
 381                                 * code below for PLL mode.
 382                                 */
 383                                break;
 384                        }
 385
 386                        if (sysclk && params_rate(params) == 16000)
 387                                sysclk |= MAX9860_16KHZ;
 388                }
 389        }
 390
 391        /*
 392         * Largest possible n:
 393         *    65536 * 96 * 48kHz / 10MHz -> 30199
 394         * Smallest possible n:
 395         *    65536 * 96 *  8kHz / 20MHz -> 2517
 396         * Both fit nicely in the available 15 bits, no need to apply any mask.
 397         */
 398        n = DIV_ROUND_CLOSEST_ULL(65536ULL * 96 * params_rate(params),
 399                                  max9860->pclk_rate);
 400
 401        if (!sysclk) {
 402                /* PLL mode */
 403                if (params_rate(params) > 24000)
 404                        sysclk |= MAX9860_16KHZ;
 405
 406                if (!master)
 407                        n |= 1; /* trigger rapid pll lock mode */
 408        }
 409
 410        sysclk |= max9860->psclk;
 411        dev_dbg(component->dev, "SYSCLK %02x\n", sysclk);
 412        ret = regmap_write(max9860->regmap,
 413                           MAX9860_SYSCLK, sysclk);
 414        if (ret) {
 415                dev_err(component->dev, "Failed to set SYSCLK: %d\n", ret);
 416                return ret;
 417        }
 418        dev_dbg(component->dev, "N %lu\n", n);
 419        ret = regmap_write(max9860->regmap,
 420                           MAX9860_AUDIOCLKHIGH, n >> 8);
 421        if (ret) {
 422                dev_err(component->dev, "Failed to set NHI: %d\n", ret);
 423                return ret;
 424        }
 425        ret = regmap_write(max9860->regmap,
 426                           MAX9860_AUDIOCLKLOW, n & 0xff);
 427        if (ret) {
 428                dev_err(component->dev, "Failed to set NLO: %d\n", ret);
 429                return ret;
 430        }
 431
 432        if (!master) {
 433                dev_dbg(component->dev, "Enable PLL\n");
 434                ret = regmap_update_bits(max9860->regmap, MAX9860_AUDIOCLKHIGH,
 435                                         MAX9860_PLL, MAX9860_PLL);
 436                if (ret) {
 437                        dev_err(component->dev, "Failed to enable PLL: %d\n",
 438                                ret);
 439                        return ret;
 440                }
 441        }
 442
 443        return 0;
 444}
 445
 446static int max9860_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 447{
 448        struct snd_soc_component *component = dai->component;
 449        struct max9860_priv *max9860 = snd_soc_component_get_drvdata(component);
 450
 451        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 452        case SND_SOC_DAIFMT_CBM_CFM:
 453        case SND_SOC_DAIFMT_CBS_CFS:
 454                max9860->fmt = fmt;
 455                return 0;
 456
 457        default:
 458                return -EINVAL;
 459        }
 460}
 461
 462static const struct snd_soc_dai_ops max9860_dai_ops = {
 463        .hw_params = max9860_hw_params,
 464        .set_fmt = max9860_set_fmt,
 465};
 466
 467static struct snd_soc_dai_driver max9860_dai = {
 468        .name = "max9860-hifi",
 469        .playback = {
 470                .stream_name = "Playback",
 471                .channels_min = 1,
 472                .channels_max = 2,
 473                .rates = SNDRV_PCM_RATE_CONTINUOUS,
 474                .rate_min = 8000,
 475                .rate_max = 48000,
 476                .formats = SNDRV_PCM_FMTBIT_S16_LE |
 477                           SNDRV_PCM_FMTBIT_S24_LE |
 478                           SNDRV_PCM_FMTBIT_S32_LE,
 479        },
 480        .capture = {
 481                .stream_name = "Capture",
 482                .channels_min = 1,
 483                .channels_max = 2,
 484                .rates = SNDRV_PCM_RATE_CONTINUOUS,
 485                .rate_min = 8000,
 486                .rate_max = 48000,
 487                .formats = SNDRV_PCM_FMTBIT_S16_LE |
 488                           SNDRV_PCM_FMTBIT_S24_LE |
 489                           SNDRV_PCM_FMTBIT_S32_LE,
 490        },
 491        .ops = &max9860_dai_ops,
 492        .symmetric_rates = 1,
 493};
 494
 495static int max9860_set_bias_level(struct snd_soc_component *component,
 496                                  enum snd_soc_bias_level level)
 497{
 498        struct max9860_priv *max9860 = dev_get_drvdata(component->dev);
 499        int ret;
 500
 501        switch (level) {
 502        case SND_SOC_BIAS_ON:
 503        case SND_SOC_BIAS_PREPARE:
 504                break;
 505
 506        case SND_SOC_BIAS_STANDBY:
 507                ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN,
 508                                         MAX9860_SHDN, MAX9860_SHDN);
 509                if (ret) {
 510                        dev_err(component->dev, "Failed to remove SHDN: %d\n",
 511                                ret);
 512                        return ret;
 513                }
 514                break;
 515
 516        case SND_SOC_BIAS_OFF:
 517                ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN,
 518                                         MAX9860_SHDN, 0);
 519                if (ret) {
 520                        dev_err(component->dev, "Failed to request SHDN: %d\n",
 521                                ret);
 522                        return ret;
 523                }
 524                break;
 525        }
 526
 527        return 0;
 528}
 529
 530static const struct snd_soc_component_driver max9860_component_driver = {
 531        .set_bias_level         = max9860_set_bias_level,
 532        .controls               = max9860_controls,
 533        .num_controls           = ARRAY_SIZE(max9860_controls),
 534        .dapm_widgets           = max9860_dapm_widgets,
 535        .num_dapm_widgets       = ARRAY_SIZE(max9860_dapm_widgets),
 536        .dapm_routes            = max9860_dapm_routes,
 537        .num_dapm_routes        = ARRAY_SIZE(max9860_dapm_routes),
 538        .use_pmdown_time        = 1,
 539        .endianness             = 1,
 540        .non_legacy_dai_naming  = 1,
 541};
 542
 543#ifdef CONFIG_PM
 544static int max9860_suspend(struct device *dev)
 545{
 546        struct max9860_priv *max9860 = dev_get_drvdata(dev);
 547        int ret;
 548
 549        ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK,
 550                                 MAX9860_PSCLK, MAX9860_PSCLK_OFF);
 551        if (ret) {
 552                dev_err(dev, "Failed to disable clock: %d\n", ret);
 553                return ret;
 554        }
 555
 556        regulator_disable(max9860->dvddio);
 557
 558        return 0;
 559}
 560
 561static int max9860_resume(struct device *dev)
 562{
 563        struct max9860_priv *max9860 = dev_get_drvdata(dev);
 564        int ret;
 565
 566        ret = regulator_enable(max9860->dvddio);
 567        if (ret) {
 568                dev_err(dev, "Failed to enable DVDDIO: %d\n", ret);
 569                return ret;
 570        }
 571
 572        regcache_cache_only(max9860->regmap, false);
 573        ret = regcache_sync(max9860->regmap);
 574        if (ret) {
 575                dev_err(dev, "Failed to sync cache: %d\n", ret);
 576                return ret;
 577        }
 578
 579        ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK,
 580                                 MAX9860_PSCLK, max9860->psclk);
 581        if (ret) {
 582                dev_err(dev, "Failed to enable clock: %d\n", ret);
 583                return ret;
 584        }
 585
 586        return 0;
 587}
 588#endif
 589
 590static const struct dev_pm_ops max9860_pm_ops = {
 591        SET_RUNTIME_PM_OPS(max9860_suspend, max9860_resume, NULL)
 592};
 593
 594static int max9860_probe(struct i2c_client *i2c)
 595{
 596        struct device *dev = &i2c->dev;
 597        struct max9860_priv *max9860;
 598        int ret;
 599        struct clk *mclk;
 600        unsigned long mclk_rate;
 601        int i;
 602        int intr;
 603
 604        max9860 = devm_kzalloc(dev, sizeof(struct max9860_priv), GFP_KERNEL);
 605        if (!max9860)
 606                return -ENOMEM;
 607
 608        max9860->dvddio = devm_regulator_get(dev, "DVDDIO");
 609        if (IS_ERR(max9860->dvddio)) {
 610                ret = PTR_ERR(max9860->dvddio);
 611                if (ret != -EPROBE_DEFER)
 612                        dev_err(dev, "Failed to get DVDDIO supply: %d\n", ret);
 613                return ret;
 614        }
 615
 616        max9860->dvddio_nb.notifier_call = max9860_dvddio_event;
 617
 618        ret = devm_regulator_register_notifier(max9860->dvddio,
 619                                               &max9860->dvddio_nb);
 620        if (ret)
 621                dev_err(dev, "Failed to register DVDDIO notifier: %d\n", ret);
 622
 623        ret = regulator_enable(max9860->dvddio);
 624        if (ret != 0) {
 625                dev_err(dev, "Failed to enable DVDDIO: %d\n", ret);
 626                return ret;
 627        }
 628
 629        max9860->regmap = devm_regmap_init_i2c(i2c, &max9860_regmap);
 630        if (IS_ERR(max9860->regmap)) {
 631                ret = PTR_ERR(max9860->regmap);
 632                goto err_regulator;
 633        }
 634
 635        dev_set_drvdata(dev, max9860);
 636
 637        /*
 638         * mclk has to be in the 10MHz to 60MHz range.
 639         * psclk is used to scale mclk into pclk so that
 640         * pclk is in the 10MHz to 20MHz range.
 641         */
 642        mclk = clk_get(dev, "mclk");
 643
 644        if (IS_ERR(mclk)) {
 645                ret = PTR_ERR(mclk);
 646                if (ret != -EPROBE_DEFER)
 647                        dev_err(dev, "Failed to get MCLK: %d\n", ret);
 648                goto err_regulator;
 649        }
 650
 651        mclk_rate = clk_get_rate(mclk);
 652        clk_put(mclk);
 653
 654        if (mclk_rate > 60000000 || mclk_rate < 10000000) {
 655                dev_err(dev, "Bad mclk %luHz (needs 10MHz - 60MHz)\n",
 656                        mclk_rate);
 657                ret = -EINVAL;
 658                goto err_regulator;
 659        }
 660        if (mclk_rate >= 40000000)
 661                max9860->psclk = 3;
 662        else if (mclk_rate >= 20000000)
 663                max9860->psclk = 2;
 664        else
 665                max9860->psclk = 1;
 666        max9860->pclk_rate = mclk_rate >> (max9860->psclk - 1);
 667        max9860->psclk <<= MAX9860_PSCLK_SHIFT;
 668        dev_dbg(dev, "mclk %lu pclk %lu\n", mclk_rate, max9860->pclk_rate);
 669
 670        regcache_cache_bypass(max9860->regmap, true);
 671        for (i = 0; i < max9860_regmap.num_reg_defaults; ++i) {
 672                ret = regmap_write(max9860->regmap,
 673                                   max9860_regmap.reg_defaults[i].reg,
 674                                   max9860_regmap.reg_defaults[i].def);
 675                if (ret) {
 676                        dev_err(dev, "Failed to initialize register %u: %d\n",
 677                                max9860_regmap.reg_defaults[i].reg, ret);
 678                        goto err_regulator;
 679                }
 680        }
 681        regcache_cache_bypass(max9860->regmap, false);
 682
 683        ret = regmap_read(max9860->regmap, MAX9860_INTRSTATUS, &intr);
 684        if (ret) {
 685                dev_err(dev, "Failed to clear INTRSTATUS: %d\n", ret);
 686                goto err_regulator;
 687        }
 688
 689        pm_runtime_set_active(dev);
 690        pm_runtime_enable(dev);
 691        pm_runtime_idle(dev);
 692
 693        ret = devm_snd_soc_register_component(dev, &max9860_component_driver,
 694                                              &max9860_dai, 1);
 695        if (ret) {
 696                dev_err(dev, "Failed to register CODEC: %d\n", ret);
 697                goto err_pm;
 698        }
 699
 700        return 0;
 701
 702err_pm:
 703        pm_runtime_disable(dev);
 704err_regulator:
 705        regulator_disable(max9860->dvddio);
 706        return ret;
 707}
 708
 709static int max9860_remove(struct i2c_client *i2c)
 710{
 711        struct device *dev = &i2c->dev;
 712        struct max9860_priv *max9860 = dev_get_drvdata(dev);
 713
 714        pm_runtime_disable(dev);
 715        regulator_disable(max9860->dvddio);
 716        return 0;
 717}
 718
 719static const struct i2c_device_id max9860_i2c_id[] = {
 720        { "max9860", },
 721        { }
 722};
 723MODULE_DEVICE_TABLE(i2c, max9860_i2c_id);
 724
 725static const struct of_device_id max9860_of_match[] = {
 726        { .compatible = "maxim,max9860", },
 727        { }
 728};
 729MODULE_DEVICE_TABLE(of, max9860_of_match);
 730
 731static struct i2c_driver max9860_i2c_driver = {
 732        .probe_new      = max9860_probe,
 733        .remove         = max9860_remove,
 734        .id_table       = max9860_i2c_id,
 735        .driver         = {
 736                .name           = "max9860",
 737                .of_match_table = max9860_of_match,
 738                .pm             = &max9860_pm_ops,
 739        },
 740};
 741
 742module_i2c_driver(max9860_i2c_driver);
 743
 744MODULE_DESCRIPTION("ASoC MAX9860 Mono Audio Voice Codec driver");
 745MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
 746MODULE_LICENSE("GPL v2");
 747