linux/sound/soc/txx9/txx9aclc-ac97.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * TXx9 ACLC AC97 driver
   4 *
   5 * Copyright (C) 2009 Atsushi Nemoto
   6 *
   7 * Based on RBTX49xx patch from CELF patch archive.
   8 * (C) Copyright TOSHIBA CORPORATION 2004-2006
   9 */
  10
  11#include <linux/init.h>
  12#include <linux/module.h>
  13#include <linux/delay.h>
  14#include <linux/interrupt.h>
  15#include <linux/io.h>
  16#include <linux/gfp.h>
  17#include <sound/core.h>
  18#include <sound/pcm.h>
  19#include <sound/soc.h>
  20#include "txx9aclc.h"
  21
  22#define AC97_DIR        \
  23        (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  24
  25#define AC97_RATES      \
  26        SNDRV_PCM_RATE_8000_48000
  27
  28#ifdef __BIG_ENDIAN
  29#define AC97_FMTS       SNDRV_PCM_FMTBIT_S16_BE
  30#else
  31#define AC97_FMTS       SNDRV_PCM_FMTBIT_S16_LE
  32#endif
  33
  34static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
  35
  36/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
  37static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
  38
  39static int txx9aclc_regready(struct txx9aclc_plat_drvdata *drvdata)
  40{
  41        return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
  42}
  43
  44/* AC97 controller reads codec register */
  45static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
  46                                         unsigned short reg)
  47{
  48        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  49        void __iomem *base = drvdata->base;
  50        u32 dat;
  51
  52        if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
  53                return 0xffff;
  54        reg |= ac97->num << 7;
  55        dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
  56        __raw_writel(dat, base + ACREGACC);
  57        __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  58        if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
  59                __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  60                printk(KERN_ERR "ac97 read timeout (reg %#x)\n", reg);
  61                dat = 0xffff;
  62                goto done;
  63        }
  64        dat = __raw_readl(base + ACREGACC);
  65        if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
  66                printk(KERN_ERR "reg mismatch %x with %x\n",
  67                        dat, reg);
  68                dat = 0xffff;
  69                goto done;
  70        }
  71        dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
  72done:
  73        __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  74        return dat;
  75}
  76
  77/* AC97 controller writes to codec register */
  78static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  79                                unsigned short val)
  80{
  81        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  82        void __iomem *base = drvdata->base;
  83
  84        __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
  85                     (val << ACREGACC_DAT_SHIFT),
  86                     base + ACREGACC);
  87        __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  88        if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
  89                printk(KERN_ERR
  90                        "ac97 write timeout (reg %#x)\n", reg);
  91        }
  92        __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  93}
  94
  95static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
  96{
  97        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  98        void __iomem *base = drvdata->base;
  99        u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
 100
 101        __raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
 102        udelay(1);
 103        __raw_writel(ACCTL_ENLINK, base + ACCTLEN);
 104        /* wait for primary codec ready status */
 105        __raw_writel(ready, base + ACINTEN);
 106        if (!wait_event_timeout(ac97_waitq,
 107                                (__raw_readl(base + ACINTSTS) & ready) == ready,
 108                                HZ)) {
 109                dev_err(&ac97->dev, "primary codec is not ready "
 110                        "(status %#x)\n",
 111                        __raw_readl(base + ACINTSTS));
 112        }
 113        __raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
 114        __raw_writel(ready, base + ACINTDIS);
 115}
 116
 117/* AC97 controller operations */
 118static struct snd_ac97_bus_ops txx9aclc_ac97_ops = {
 119        .read           = txx9aclc_ac97_read,
 120        .write          = txx9aclc_ac97_write,
 121        .reset          = txx9aclc_ac97_cold_reset,
 122};
 123
 124static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
 125{
 126        struct txx9aclc_plat_drvdata *drvdata = dev_id;
 127        void __iomem *base = drvdata->base;
 128
 129        __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
 130        wake_up(&ac97_waitq);
 131        return IRQ_HANDLED;
 132}
 133
 134static int txx9aclc_ac97_probe(struct snd_soc_dai *dai)
 135{
 136        txx9aclc_drvdata = snd_soc_dai_get_drvdata(dai);
 137        return 0;
 138}
 139
 140static int txx9aclc_ac97_remove(struct snd_soc_dai *dai)
 141{
 142        struct txx9aclc_plat_drvdata *drvdata = snd_soc_dai_get_drvdata(dai);
 143
 144        /* disable AC-link */
 145        __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
 146        txx9aclc_drvdata = NULL;
 147        return 0;
 148}
 149
 150static struct snd_soc_dai_driver txx9aclc_ac97_dai = {
 151        .bus_control            = true,
 152        .probe                  = txx9aclc_ac97_probe,
 153        .remove                 = txx9aclc_ac97_remove,
 154        .playback = {
 155                .rates          = AC97_RATES,
 156                .formats        = AC97_FMTS,
 157                .channels_min   = 2,
 158                .channels_max   = 2,
 159        },
 160        .capture = {
 161                .rates          = AC97_RATES,
 162                .formats        = AC97_FMTS,
 163                .channels_min   = 2,
 164                .channels_max   = 2,
 165        },
 166};
 167
 168static const struct snd_soc_component_driver txx9aclc_ac97_component = {
 169        .name           = "txx9aclc-ac97",
 170};
 171
 172static int txx9aclc_ac97_dev_probe(struct platform_device *pdev)
 173{
 174        struct txx9aclc_plat_drvdata *drvdata;
 175        struct resource *r;
 176        int err;
 177        int irq;
 178
 179        irq = platform_get_irq(pdev, 0);
 180        if (irq < 0)
 181                return irq;
 182
 183        drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
 184        if (!drvdata)
 185                return -ENOMEM;
 186
 187        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 188        drvdata->base = devm_ioremap_resource(&pdev->dev, r);
 189        if (IS_ERR(drvdata->base))
 190                return PTR_ERR(drvdata->base);
 191
 192        platform_set_drvdata(pdev, drvdata);
 193        drvdata->physbase = r->start;
 194        if (sizeof(drvdata->physbase) > sizeof(r->start) &&
 195            r->start >= TXX9_DIRECTMAP_BASE &&
 196            r->start < TXX9_DIRECTMAP_BASE + 0x400000)
 197                drvdata->physbase |= 0xf00000000ull;
 198        err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
 199                               0, dev_name(&pdev->dev), drvdata);
 200        if (err < 0)
 201                return err;
 202
 203        err = snd_soc_set_ac97_ops(&txx9aclc_ac97_ops);
 204        if (err < 0)
 205                return err;
 206
 207        return devm_snd_soc_register_component(&pdev->dev, &txx9aclc_ac97_component,
 208                                          &txx9aclc_ac97_dai, 1);
 209}
 210
 211static int txx9aclc_ac97_dev_remove(struct platform_device *pdev)
 212{
 213        snd_soc_set_ac97_ops(NULL);
 214        return 0;
 215}
 216
 217static struct platform_driver txx9aclc_ac97_driver = {
 218        .probe          = txx9aclc_ac97_dev_probe,
 219        .remove         = txx9aclc_ac97_dev_remove,
 220        .driver         = {
 221                .name   = "txx9aclc-ac97",
 222        },
 223};
 224
 225module_platform_driver(txx9aclc_ac97_driver);
 226
 227MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
 228MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
 229MODULE_LICENSE("GPL");
 230MODULE_ALIAS("platform:txx9aclc-ac97");
 231