LXR linux/arch/arm/mach-imx/mach-imx6ul.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
   4 */
   5#include <linux/irqchip.h>
   6#include <linux/mfd/syscon.h>
   7#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
   8#include <linux/micrel_phy.h>
   9#include <linux/of_platform.h>
  10#include <linux/phy.h>
  11#include <linux/regmap.h>
  12#include <asm/mach/arch.h>
  13#include <asm/mach/map.h>
  14
  15#include "common.h"
  16#include "cpuidle.h"
  17
  18static void __init imx6ul_enet_clk_init(void)
  19{
  20        struct regmap *gpr;
  21
  22        gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
  23        if (!IS_ERR(gpr))
  24                regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
  25                                   IMX6UL_GPR1_ENET_CLK_OUTPUT);
  26        else
  27                pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
  28
  29}
  30
  31static int ksz8081_phy_fixup(struct phy_device *dev)
  32{
  33        if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
  34                phy_write(dev, 0x1f, 0x8110);
  35                phy_write(dev, 0x16, 0x201);
  36        } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
  37                phy_write(dev, 0x1f, 0x8190);
  38                phy_write(dev, 0x16, 0x202);
  39        }
  40
  41        return 0;
  42}
  43
  44static void __init imx6ul_enet_phy_init(void)
  45{
  46        if (IS_BUILTIN(CONFIG_PHYLIB))
  47                phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
  48                                           ksz8081_phy_fixup);
  49}
  50
  51static inline void imx6ul_enet_init(void)
  52{
  53        imx6ul_enet_clk_init();
  54        imx6ul_enet_phy_init();
  55}
  56
  57static void __init imx6ul_init_machine(void)
  58{
  59        struct device *parent;
  60
  61        parent = imx_soc_device_init();
  62        if (parent == NULL)
  63                pr_warn("failed to initialize soc device\n");
  64
  65        of_platform_default_populate(NULL, NULL, parent);
  66        imx6ul_enet_init();
  67        imx_anatop_init();
  68        imx6ul_pm_init();
  69}
  70
  71static void __init imx6ul_init_irq(void)
  72{
  73        imx_init_revision_from_anatop();
  74        imx_src_init();
  75        irqchip_init();
  76        imx6_pm_ccm_init("fsl,imx6ul-ccm");
  77}
  78
  79static void __init imx6ul_init_late(void)
  80{
  81        imx6sx_cpuidle_init();
  82
  83        if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
  84                platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
  85}
  86
  87static const char * const imx6ul_dt_compat[] __initconst = {
  88        "fsl,imx6ul",
  89        "fsl,imx6ull",
  90        NULL,
  91};
  92
  93DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
  94        .init_irq       = imx6ul_init_irq,
  95        .init_machine   = imx6ul_init_machine,
  96        .init_late      = imx6ul_init_late,
  97        .dt_compat      = imx6ul_dt_compat,
  98MACHINE_END
  99