LXR linux/arch/arm/mach-omap1/ams-delta-fiq-handler.S

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 *  linux/arch/arm/mach-omap1/ams-delta-fiq-handler.S
   4 *
   5 *  Based on  linux/arch/arm/lib/floppydma.S
   6 *  Renamed and modified to work with 2.6 kernel by Matt Callow
   7 *  Copyright (C) 1995, 1996 Russell King
   8 *  Copyright (C) 2004 Pete Trapps
   9 *  Copyright (C) 2006 Matt Callow
  10 *  Copyright (C) 2010 Janusz Krzysztofik
  11 */
  12
  13#include <linux/linkage.h>
  14#include <linux/platform_data/ams-delta-fiq.h>
  15#include <linux/platform_data/gpio-omap.h>
  16
  17#include <asm/assembler.h>
  18
  19#include "ams-delta-fiq.h"
  20#include "board-ams-delta.h"
  21#include "iomap.h"
  22#include "soc.h"
  23
  24/*
  25 * OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c.
  26 * Unfortunately, it was not placed in a separate header file.
  27 */
  28#define OMAP1510_GPIO_BASE              0xFFFCE000
  29
  30/* GPIO register bitmasks */
  31#define KEYBRD_DATA_MASK                (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_DATA)
  32#define KEYBRD_CLK_MASK                 (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_CLK)
  33#define MODEM_IRQ_MASK                  (0x1 << AMS_DELTA_GPIO_PIN_MODEM_IRQ)
  34#define HOOK_SWITCH_MASK                (0x1 << AMS_DELTA_GPIO_PIN_HOOK_SWITCH)
  35#define OTHERS_MASK                     (MODEM_IRQ_MASK | HOOK_SWITCH_MASK)
  36
  37/* IRQ handler register bitmasks */
  38#define DEFERRED_FIQ_MASK               OMAP_IRQ_BIT(INT_DEFERRED_FIQ)
  39#define GPIO_BANK1_MASK                 OMAP_IRQ_BIT(INT_GPIO_BANK1)
  40
  41/* Driver buffer byte offsets */
  42#define BUF_MASK                        (FIQ_MASK * 4)
  43#define BUF_STATE                       (FIQ_STATE * 4)
  44#define BUF_KEYS_CNT                    (FIQ_KEYS_CNT * 4)
  45#define BUF_TAIL_OFFSET                 (FIQ_TAIL_OFFSET * 4)
  46#define BUF_HEAD_OFFSET                 (FIQ_HEAD_OFFSET * 4)
  47#define BUF_BUF_LEN                     (FIQ_BUF_LEN * 4)
  48#define BUF_KEY                         (FIQ_KEY * 4)
  49#define BUF_MISSED_KEYS                 (FIQ_MISSED_KEYS * 4)
  50#define BUF_BUFFER_START                (FIQ_BUFFER_START * 4)
  51#define BUF_GPIO_INT_MASK               (FIQ_GPIO_INT_MASK * 4)
  52#define BUF_KEYS_HICNT                  (FIQ_KEYS_HICNT * 4)
  53#define BUF_IRQ_PEND                    (FIQ_IRQ_PEND * 4)
  54#define BUF_SIR_CODE_L1                 (FIQ_SIR_CODE_L1 * 4)
  55#define BUF_SIR_CODE_L2                 (IRQ_SIR_CODE_L2 * 4)
  56#define BUF_CNT_INT_00                  (FIQ_CNT_INT_00 * 4)
  57#define BUF_CNT_INT_KEY                 (FIQ_CNT_INT_KEY * 4)
  58#define BUF_CNT_INT_MDM                 (FIQ_CNT_INT_MDM * 4)
  59#define BUF_CNT_INT_03                  (FIQ_CNT_INT_03 * 4)
  60#define BUF_CNT_INT_HSW                 (FIQ_CNT_INT_HSW * 4)
  61#define BUF_CNT_INT_05                  (FIQ_CNT_INT_05 * 4)
  62#define BUF_CNT_INT_06                  (FIQ_CNT_INT_06 * 4)
  63#define BUF_CNT_INT_07                  (FIQ_CNT_INT_07 * 4)
  64#define BUF_CNT_INT_08                  (FIQ_CNT_INT_08 * 4)
  65#define BUF_CNT_INT_09                  (FIQ_CNT_INT_09 * 4)
  66#define BUF_CNT_INT_10                  (FIQ_CNT_INT_10 * 4)
  67#define BUF_CNT_INT_11                  (FIQ_CNT_INT_11 * 4)
  68#define BUF_CNT_INT_12                  (FIQ_CNT_INT_12 * 4)
  69#define BUF_CNT_INT_13                  (FIQ_CNT_INT_13 * 4)
  70#define BUF_CNT_INT_14                  (FIQ_CNT_INT_14 * 4)
  71#define BUF_CNT_INT_15                  (FIQ_CNT_INT_15 * 4)
  72#define BUF_CIRC_BUFF                   (FIQ_CIRC_BUFF * 4)
  73
  74
  75/*
  76 * Register usage
  77 * r8  - temporary
  78 * r9  - the driver buffer
  79 * r10 - temporary
  80 * r11 - interrupts mask
  81 * r12 - base pointers
  82 * r13 - interrupts status
  83 */
  84
  85        .text
  86
  87        .global qwerty_fiqin_end
  88
  89ENTRY(qwerty_fiqin_start)
  90        @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  91        @ FIQ intrrupt handler
  92        ldr r12, omap_ih1_base                  @ set pointer to level1 handler
  93
  94        ldr r11, [r12, #IRQ_MIR_REG_OFFSET]     @ fetch interrupts mask
  95
  96        ldr r13, [r12, #IRQ_ITR_REG_OFFSET]     @ fetch interrupts status
  97        bics r13, r13, r11                      @ clear masked - any left?
  98        beq exit                                @ none - spurious FIQ? exit
  99
 100        ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
 101
 102        mov r8, #2                              @ reset FIQ agreement
 103        str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
 104
 105        cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY)     @ is it GPIO interrupt?
 106        beq gpio                                @ yes - process it
 107
 108        mov r8, #1
 109        orr r8, r11, r8, lsl r10                @ mask spurious interrupt
 110        str r8, [r12, #IRQ_MIR_REG_OFFSET]
 111exit:
 112        subs    pc, lr, #4                      @ return from FIQ
 113        @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 114
 115
 116        @@@@@@@@@@@@@@@@@@@@@@@@@@@
 117gpio:   @ GPIO bank interrupt handler
 118        ldr r12, omap1510_gpio_base             @ set base pointer to GPIO bank
 119
 120        ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
 121restart:
 122        ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS]       @ fetch status bits
 123        bics r13, r13, r11                      @ clear masked - any left?
 124        beq exit                                @ no - spurious interrupt? exit
 125
 126        orr r11, r11, r13                       @ mask all requested interrupts
 127        str r11, [r12, #OMAP1510_GPIO_INT_MASK]
 128
 129        str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
 130
 131        ands r10, r13, #KEYBRD_CLK_MASK         @ extract keyboard status - set?
 132        beq hksw                                @ no - try next source
 133
 134
 135        @@@@@@@@@@@@@@@@@@@@@@
 136        @ Keyboard clock FIQ mode interrupt handler
 137        @ r10 now contains KEYBRD_CLK_MASK, use it
 138        bic r11, r11, r10                               @ unmask it
 139        str r11, [r12, #OMAP1510_GPIO_INT_MASK]
 140
 141        @ Process keyboard data
 142        ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT]        @ fetch GPIO input
 143
 144        ldr r10, [r9, #BUF_STATE]               @ fetch kbd interface state
 145        cmp r10, #0                             @ are we expecting start bit?
 146        bne data                                @ no - go to data processing
 147
 148        ands r8, r8, #KEYBRD_DATA_MASK          @ check start bit - detected?
 149        beq hksw                                @ no - try next source
 150
 151        @ r8 contains KEYBRD_DATA_MASK, use it
 152        str r8, [r9, #BUF_STATE]                @ enter data processing state
 153        @ r10 already contains 0, reuse it
 154        str r10, [r9, #BUF_KEY]                 @ clear keycode
 155        mov r10, #2                             @ reset input bit mask
 156        str r10, [r9, #BUF_MASK]
 157
 158        @ Mask other GPIO line interrupts till key done
 159        str r11, [r9, #BUF_GPIO_INT_MASK]       @ save mask for later restore
 160        mvn r11, #KEYBRD_CLK_MASK               @ prepare all except kbd mask
 161        str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register
 162
 163        b restart                               @ restart
 164
 165data:   ldr r10, [r9, #BUF_MASK]                @ fetch current input bit mask
 166
 167        @ r8 still contains GPIO input bits
 168        ands r8, r8, #KEYBRD_DATA_MASK          @ is keyboard data line low?
 169        ldreq r8, [r9, #BUF_KEY]                @ yes - fetch collected so far,
 170        orreq r8, r8, r10                       @ set 1 at current mask position
 171        streq r8, [r9, #BUF_KEY]                @ and save back
 172
 173        mov r10, r10, lsl #1                    @ shift mask left
 174        bics r10, r10, #0x800                   @ have we got all the bits?
 175        strne r10, [r9, #BUF_MASK]              @ not yet - store the mask
 176        bne restart                             @ and restart
 177
 178        @ r10 already contains 0, reuse it
 179        str r10, [r9, #BUF_STATE]               @ reset state to start
 180
 181        @ Key done - restore interrupt mask
 182        ldr r10, [r9, #BUF_GPIO_INT_MASK]       @ fetch saved mask
 183        and r11, r11, r10                       @ unmask all saved as unmasked
 184        str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ restore into the mask register
 185
 186        @ Try appending the keycode to the circular buffer
 187        ldr r10, [r9, #BUF_KEYS_CNT]            @ get saved keystrokes count
 188        ldr r8, [r9, #BUF_BUF_LEN]              @ get buffer size
 189        cmp r10, r8                             @ is buffer full?
 190        beq hksw                                @ yes - key lost, next source
 191
 192        add r10, r10, #1                        @ incremet keystrokes counter
 193        str r10, [r9, #BUF_KEYS_CNT]
 194
 195        ldr r10, [r9, #BUF_TAIL_OFFSET]         @ get buffer tail offset
 196        @ r8 already contains buffer size
 197        cmp r10, r8                             @ end of buffer?
 198        moveq r10, #0                           @ yes - rewind to buffer start
 199
 200        ldr r12, [r9, #BUF_BUFFER_START]        @ get buffer start address
 201        add r12, r12, r10, LSL #2               @ calculate buffer tail address
 202        ldr r8, [r9, #BUF_KEY]                  @ get last keycode
 203        str r8, [r12]                           @ append it to the buffer tail
 204
 205        add r10, r10, #1                        @ increment buffer tail offset
 206        str r10, [r9, #BUF_TAIL_OFFSET]
 207
 208        ldr r10, [r9, #BUF_CNT_INT_KEY]         @ increment interrupts counter
 209        add r10, r10, #1
 210        str r10, [r9, #BUF_CNT_INT_KEY]
 211        @@@@@@@@@@@@@@@@@@@@@@@@
 212
 213
 214hksw:   @Is hook switch interrupt requested?
 215        tst r13, #HOOK_SWITCH_MASK              @ is hook switch status bit set?
 216        beq mdm                                 @ no - try next source
 217
 218
 219        @@@@@@@@@@@@@@@@@@@@@@@@
 220        @ Hook switch interrupt FIQ mode simple handler
 221
 222        @ Don't toggle active edge, the switch always bounces
 223
 224        @ Increment hook switch interrupt counter
 225        ldr r10, [r9, #BUF_CNT_INT_HSW]
 226        add r10, r10, #1
 227        str r10, [r9, #BUF_CNT_INT_HSW]
 228        @@@@@@@@@@@@@@@@@@@@@@@@
 229
 230
 231mdm:    @Is it a modem interrupt?
 232        tst r13, #MODEM_IRQ_MASK                @ is modem status bit set?
 233        beq irq                                 @ no - check for next interrupt
 234
 235
 236        @@@@@@@@@@@@@@@@@@@@@@@@
 237        @ Modem FIQ mode interrupt handler stub
 238
 239        @ Increment modem interrupt counter
 240        ldr r10, [r9, #BUF_CNT_INT_MDM]
 241        add r10, r10, #1
 242        str r10, [r9, #BUF_CNT_INT_MDM]
 243        @@@@@@@@@@@@@@@@@@@@@@@@
 244
 245
 246irq:    @ Place deferred_fiq interrupt request
 247        ldr r12, deferred_fiq_ih_base           @ set pointer to IRQ handler
 248        mov r10, #DEFERRED_FIQ_MASK             @ set deferred_fiq bit
 249        str r10, [r12, #IRQ_ISR_REG_OFFSET]     @ place it in the ISR register
 250
 251        ldr r12, omap1510_gpio_base             @ set pointer back to GPIO bank
 252        b restart                               @ check for next GPIO interrupt
 253        @@@@@@@@@@@@@@@@@@@@@@@@@@@
 254
 255
 256/*
 257 * Virtual addresses for IO
 258 */
 259omap_ih1_base:
 260        .word OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
 261deferred_fiq_ih_base:
 262        .word OMAP1_IO_ADDRESS(DEFERRED_FIQ_IH_BASE)
 263omap1510_gpio_base:
 264        .word OMAP1_IO_ADDRESS(OMAP1510_GPIO_BASE)
 265qwerty_fiqin_end:
 266
 267/*
 268 * Check the size of the FIQ,
 269 * it cannot go beyond 0xffff0200, and is copied to 0xffff001c
 270 */
 271.if (qwerty_fiqin_end - qwerty_fiqin_start) > (0x200 - 0x1c)
 272        .err
 273.endif
 274