1
2
3
4
5
6
7
8
9#include <linux/acpi.h>
10#include <linux/arm_sdei.h>
11#include <linux/delay.h>
12#include <linux/init.h>
13#include <linux/spinlock.h>
14#include <linux/sched/mm.h>
15#include <linux/sched/hotplug.h>
16#include <linux/sched/task_stack.h>
17#include <linux/interrupt.h>
18#include <linux/cache.h>
19#include <linux/profile.h>
20#include <linux/errno.h>
21#include <linux/mm.h>
22#include <linux/err.h>
23#include <linux/cpu.h>
24#include <linux/smp.h>
25#include <linux/seq_file.h>
26#include <linux/irq.h>
27#include <linux/irqchip/arm-gic-v3.h>
28#include <linux/percpu.h>
29#include <linux/clockchips.h>
30#include <linux/completion.h>
31#include <linux/of.h>
32#include <linux/irq_work.h>
33#include <linux/kexec.h>
34
35#include <asm/alternative.h>
36#include <asm/atomic.h>
37#include <asm/cacheflush.h>
38#include <asm/cpu.h>
39#include <asm/cputype.h>
40#include <asm/cpu_ops.h>
41#include <asm/daifflags.h>
42#include <asm/mmu_context.h>
43#include <asm/numa.h>
44#include <asm/pgtable.h>
45#include <asm/pgalloc.h>
46#include <asm/processor.h>
47#include <asm/smp_plat.h>
48#include <asm/sections.h>
49#include <asm/tlbflush.h>
50#include <asm/ptrace.h>
51#include <asm/virt.h>
52
53#define CREATE_TRACE_POINTS
54#include <trace/events/ipi.h>
55
56DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
57EXPORT_PER_CPU_SYMBOL(cpu_number);
58
59
60
61
62
63
64struct secondary_data secondary_data;
65
66int cpus_stuck_in_kernel;
67
68enum ipi_msg_type {
69 IPI_RESCHEDULE,
70 IPI_CALL_FUNC,
71 IPI_CPU_STOP,
72 IPI_CPU_CRASH_STOP,
73 IPI_TIMER,
74 IPI_IRQ_WORK,
75 IPI_WAKEUP
76};
77
78#ifdef CONFIG_HOTPLUG_CPU
79static int op_cpu_kill(unsigned int cpu);
80#else
81static inline int op_cpu_kill(unsigned int cpu)
82{
83 return -ENOSYS;
84}
85#endif
86
87
88
89
90
91
92static int boot_secondary(unsigned int cpu, struct task_struct *idle)
93{
94 if (cpu_ops[cpu]->cpu_boot)
95 return cpu_ops[cpu]->cpu_boot(cpu);
96
97 return -EOPNOTSUPP;
98}
99
100static DECLARE_COMPLETION(cpu_running);
101
102int __cpu_up(unsigned int cpu, struct task_struct *idle)
103{
104 int ret;
105 long status;
106
107
108
109
110
111 secondary_data.task = idle;
112 secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
113 update_cpu_boot_status(CPU_MMU_OFF);
114 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
115
116
117
118
119 ret = boot_secondary(cpu, idle);
120 if (ret == 0) {
121
122
123
124
125 wait_for_completion_timeout(&cpu_running,
126 msecs_to_jiffies(1000));
127
128 if (!cpu_online(cpu)) {
129 pr_crit("CPU%u: failed to come online\n", cpu);
130 ret = -EIO;
131 }
132 } else {
133 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
134 return ret;
135 }
136
137 secondary_data.task = NULL;
138 secondary_data.stack = NULL;
139 status = READ_ONCE(secondary_data.status);
140 if (ret && status) {
141
142 if (status == CPU_MMU_OFF)
143 status = READ_ONCE(__early_cpu_boot_status);
144
145 switch (status & CPU_BOOT_STATUS_MASK) {
146 default:
147 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
148 cpu, status);
149 break;
150 case CPU_KILL_ME:
151 if (!op_cpu_kill(cpu)) {
152 pr_crit("CPU%u: died during early boot\n", cpu);
153 break;
154 }
155 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
156
157 case CPU_STUCK_IN_KERNEL:
158 pr_crit("CPU%u: is stuck in kernel\n", cpu);
159 if (status & CPU_STUCK_REASON_52_BIT_VA)
160 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
161 if (status & CPU_STUCK_REASON_NO_GRAN)
162 pr_crit("CPU%u: does not support %luK granule \n", cpu, PAGE_SIZE / SZ_1K);
163 cpus_stuck_in_kernel++;
164 break;
165 case CPU_PANIC_KERNEL:
166 panic("CPU%u detected unsupported configuration\n", cpu);
167 }
168 }
169
170 return ret;
171}
172
173static void init_gic_priority_masking(void)
174{
175 u32 cpuflags;
176
177 if (WARN_ON(!gic_enable_sre()))
178 return;
179
180 cpuflags = read_sysreg(daif);
181
182 WARN_ON(!(cpuflags & PSR_I_BIT));
183
184 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
185}
186
187
188
189
190
191asmlinkage notrace void secondary_start_kernel(void)
192{
193 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
194 struct mm_struct *mm = &init_mm;
195 unsigned int cpu;
196
197 cpu = task_cpu(current);
198 set_my_cpu_offset(per_cpu_offset(cpu));
199
200
201
202
203
204 mmgrab(mm);
205 current->active_mm = mm;
206
207
208
209
210
211 cpu_uninstall_idmap();
212
213 if (system_uses_irq_prio_masking())
214 init_gic_priority_masking();
215
216 preempt_disable();
217 trace_hardirqs_off();
218
219
220
221
222
223
224 check_local_cpu_capabilities();
225
226 if (cpu_ops[cpu]->cpu_postboot)
227 cpu_ops[cpu]->cpu_postboot();
228
229
230
231
232 cpuinfo_store_cpu();
233
234
235
236
237 notify_cpu_starting(cpu);
238
239 store_cpu_topology(cpu);
240 numa_add_cpu(cpu);
241
242
243
244
245
246
247 pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
248 cpu, (unsigned long)mpidr,
249 read_cpuid_id());
250 update_cpu_boot_status(CPU_BOOT_SUCCESS);
251 set_cpu_online(cpu, true);
252 complete(&cpu_running);
253
254 local_daif_restore(DAIF_PROCCTX);
255
256
257
258
259 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
260}
261
262#ifdef CONFIG_HOTPLUG_CPU
263static int op_cpu_disable(unsigned int cpu)
264{
265
266
267
268
269 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
270 return -EOPNOTSUPP;
271
272
273
274
275
276 if (cpu_ops[cpu]->cpu_disable)
277 return cpu_ops[cpu]->cpu_disable(cpu);
278
279 return 0;
280}
281
282
283
284
285int __cpu_disable(void)
286{
287 unsigned int cpu = smp_processor_id();
288 int ret;
289
290 ret = op_cpu_disable(cpu);
291 if (ret)
292 return ret;
293
294 remove_cpu_topology(cpu);
295 numa_remove_cpu(cpu);
296
297
298
299
300
301 set_cpu_online(cpu, false);
302
303
304
305
306 irq_migrate_all_off_this_cpu();
307
308 return 0;
309}
310
311static int op_cpu_kill(unsigned int cpu)
312{
313
314
315
316
317
318 if (!cpu_ops[cpu]->cpu_kill)
319 return 0;
320
321 return cpu_ops[cpu]->cpu_kill(cpu);
322}
323
324
325
326
327
328void __cpu_die(unsigned int cpu)
329{
330 int err;
331
332 if (!cpu_wait_death(cpu, 5)) {
333 pr_crit("CPU%u: cpu didn't die\n", cpu);
334 return;
335 }
336 pr_notice("CPU%u: shutdown\n", cpu);
337
338
339
340
341
342
343
344 err = op_cpu_kill(cpu);
345 if (err)
346 pr_warn("CPU%d may not have shut down cleanly: %d\n",
347 cpu, err);
348}
349
350
351
352
353
354void cpu_die(void)
355{
356 unsigned int cpu = smp_processor_id();
357
358 idle_task_exit();
359
360 local_daif_mask();
361
362
363 (void)cpu_report_death();
364
365
366
367
368
369
370 cpu_ops[cpu]->cpu_die(cpu);
371
372 BUG();
373}
374#endif
375
376
377
378
379
380void cpu_die_early(void)
381{
382 int cpu = smp_processor_id();
383
384 pr_crit("CPU%d: will not boot\n", cpu);
385
386
387 set_cpu_present(cpu, 0);
388
389#ifdef CONFIG_HOTPLUG_CPU
390 update_cpu_boot_status(CPU_KILL_ME);
391
392 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
393 cpu_ops[cpu]->cpu_die(cpu);
394#endif
395 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
396
397 cpu_park_loop();
398}
399
400static void __init hyp_mode_check(void)
401{
402 if (is_hyp_mode_available())
403 pr_info("CPU: All CPU(s) started at EL2\n");
404 else if (is_hyp_mode_mismatched())
405 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
406 "CPU: CPUs started in inconsistent modes");
407 else
408 pr_info("CPU: All CPU(s) started at EL1\n");
409}
410
411void __init smp_cpus_done(unsigned int max_cpus)
412{
413 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
414 setup_cpu_features();
415 hyp_mode_check();
416 apply_alternatives_all();
417 mark_linear_text_alias_ro();
418}
419
420void __init smp_prepare_boot_cpu(void)
421{
422 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
423 cpuinfo_store_boot_cpu();
424
425
426
427
428
429
430 apply_boot_alternatives();
431
432
433 if (system_uses_irq_prio_masking())
434 init_gic_priority_masking();
435}
436
437static u64 __init of_get_cpu_mpidr(struct device_node *dn)
438{
439 const __be32 *cell;
440 u64 hwid;
441
442
443
444
445
446
447 cell = of_get_property(dn, "reg", NULL);
448 if (!cell) {
449 pr_err("%pOF: missing reg property\n", dn);
450 return INVALID_HWID;
451 }
452
453 hwid = of_read_number(cell, of_n_addr_cells(dn));
454
455
456
457 if (hwid & ~MPIDR_HWID_BITMASK) {
458 pr_err("%pOF: invalid reg property\n", dn);
459 return INVALID_HWID;
460 }
461 return hwid;
462}
463
464
465
466
467
468
469
470static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
471{
472 unsigned int i;
473
474 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
475 if (cpu_logical_map(i) == hwid)
476 return true;
477 return false;
478}
479
480
481
482
483
484static int __init smp_cpu_setup(int cpu)
485{
486 if (cpu_read_ops(cpu))
487 return -ENODEV;
488
489 if (cpu_ops[cpu]->cpu_init(cpu))
490 return -ENODEV;
491
492 set_cpu_possible(cpu, true);
493
494 return 0;
495}
496
497static bool bootcpu_valid __initdata;
498static unsigned int cpu_count = 1;
499
500#ifdef CONFIG_ACPI
501static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
502
503struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
504{
505 return &cpu_madt_gicc[cpu];
506}
507
508
509
510
511
512
513
514static void __init
515acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
516{
517 u64 hwid = processor->arm_mpidr;
518
519 if (!(processor->flags & ACPI_MADT_ENABLED)) {
520 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
521 return;
522 }
523
524 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
525 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
526 return;
527 }
528
529 if (is_mpidr_duplicate(cpu_count, hwid)) {
530 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
531 return;
532 }
533
534
535 if (cpu_logical_map(0) == hwid) {
536 if (bootcpu_valid) {
537 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
538 hwid);
539 return;
540 }
541 bootcpu_valid = true;
542 cpu_madt_gicc[0] = *processor;
543 return;
544 }
545
546 if (cpu_count >= NR_CPUS)
547 return;
548
549
550 cpu_logical_map(cpu_count) = hwid;
551
552 cpu_madt_gicc[cpu_count] = *processor;
553
554
555
556
557
558
559
560
561
562
563 acpi_set_mailbox_entry(cpu_count, processor);
564
565 cpu_count++;
566}
567
568static int __init
569acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
570 const unsigned long end)
571{
572 struct acpi_madt_generic_interrupt *processor;
573
574 processor = (struct acpi_madt_generic_interrupt *)header;
575 if (BAD_MADT_GICC_ENTRY(processor, end))
576 return -EINVAL;
577
578 acpi_table_print_madt_entry(&header->common);
579
580 acpi_map_gic_cpu_interface(processor);
581
582 return 0;
583}
584
585static void __init acpi_parse_and_init_cpus(void)
586{
587 int i;
588
589
590
591
592
593
594 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
595 acpi_parse_gic_cpu_interface, 0);
596
597
598
599
600
601
602
603
604
605 acpi_map_cpus_to_nodes();
606
607 for (i = 0; i < nr_cpu_ids; i++)
608 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
609}
610#else
611#define acpi_parse_and_init_cpus(...) do { } while (0)
612#endif
613
614
615
616
617
618
619static void __init of_parse_and_init_cpus(void)
620{
621 struct device_node *dn;
622
623 for_each_of_cpu_node(dn) {
624 u64 hwid = of_get_cpu_mpidr(dn);
625
626 if (hwid == INVALID_HWID)
627 goto next;
628
629 if (is_mpidr_duplicate(cpu_count, hwid)) {
630 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
631 dn);
632 goto next;
633 }
634
635
636
637
638
639
640
641 if (hwid == cpu_logical_map(0)) {
642 if (bootcpu_valid) {
643 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
644 dn);
645 goto next;
646 }
647
648 bootcpu_valid = true;
649 early_map_cpu_to_node(0, of_node_to_nid(dn));
650
651
652
653
654
655
656
657 continue;
658 }
659
660 if (cpu_count >= NR_CPUS)
661 goto next;
662
663 pr_debug("cpu logical map 0x%llx\n", hwid);
664 cpu_logical_map(cpu_count) = hwid;
665
666 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
667next:
668 cpu_count++;
669 }
670}
671
672
673
674
675
676
677void __init smp_init_cpus(void)
678{
679 int i;
680
681 if (acpi_disabled)
682 of_parse_and_init_cpus();
683 else
684 acpi_parse_and_init_cpus();
685
686 if (cpu_count > nr_cpu_ids)
687 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
688 cpu_count, nr_cpu_ids);
689
690 if (!bootcpu_valid) {
691 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
692 return;
693 }
694
695
696
697
698
699
700
701
702 for (i = 1; i < nr_cpu_ids; i++) {
703 if (cpu_logical_map(i) != INVALID_HWID) {
704 if (smp_cpu_setup(i))
705 cpu_logical_map(i) = INVALID_HWID;
706 }
707 }
708}
709
710void __init smp_prepare_cpus(unsigned int max_cpus)
711{
712 int err;
713 unsigned int cpu;
714 unsigned int this_cpu;
715
716 init_cpu_topology();
717
718 this_cpu = smp_processor_id();
719 store_cpu_topology(this_cpu);
720 numa_store_cpu_info(this_cpu);
721 numa_add_cpu(this_cpu);
722
723
724
725
726
727 if (max_cpus == 0)
728 return;
729
730
731
732
733
734
735 for_each_possible_cpu(cpu) {
736
737 per_cpu(cpu_number, cpu) = cpu;
738
739 if (cpu == smp_processor_id())
740 continue;
741
742 if (!cpu_ops[cpu])
743 continue;
744
745 err = cpu_ops[cpu]->cpu_prepare(cpu);
746 if (err)
747 continue;
748
749 set_cpu_present(cpu, true);
750 numa_store_cpu_info(cpu);
751 }
752}
753
754void (*__smp_cross_call)(const struct cpumask *, unsigned int);
755
756void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
757{
758 __smp_cross_call = fn;
759}
760
761static const char *ipi_types[NR_IPI] __tracepoint_string = {
762#define S(x,s) [x] = s
763 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
764 S(IPI_CALL_FUNC, "Function call interrupts"),
765 S(IPI_CPU_STOP, "CPU stop interrupts"),
766 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
767 S(IPI_TIMER, "Timer broadcast interrupts"),
768 S(IPI_IRQ_WORK, "IRQ work interrupts"),
769 S(IPI_WAKEUP, "CPU wake-up interrupts"),
770};
771
772static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
773{
774 trace_ipi_raise(target, ipi_types[ipinr]);
775 __smp_cross_call(target, ipinr);
776}
777
778void show_ipi_list(struct seq_file *p, int prec)
779{
780 unsigned int cpu, i;
781
782 for (i = 0; i < NR_IPI; i++) {
783 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
784 prec >= 4 ? " " : "");
785 for_each_online_cpu(cpu)
786 seq_printf(p, "%10u ",
787 __get_irq_stat(cpu, ipi_irqs[i]));
788 seq_printf(p, " %s\n", ipi_types[i]);
789 }
790}
791
792u64 smp_irq_stat_cpu(unsigned int cpu)
793{
794 u64 sum = 0;
795 int i;
796
797 for (i = 0; i < NR_IPI; i++)
798 sum += __get_irq_stat(cpu, ipi_irqs[i]);
799
800 return sum;
801}
802
803void arch_send_call_function_ipi_mask(const struct cpumask *mask)
804{
805 smp_cross_call(mask, IPI_CALL_FUNC);
806}
807
808void arch_send_call_function_single_ipi(int cpu)
809{
810 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
811}
812
813#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
814void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
815{
816 smp_cross_call(mask, IPI_WAKEUP);
817}
818#endif
819
820#ifdef CONFIG_IRQ_WORK
821void arch_irq_work_raise(void)
822{
823 if (__smp_cross_call)
824 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
825}
826#endif
827
828static void local_cpu_stop(void)
829{
830 set_cpu_online(smp_processor_id(), false);
831
832 local_daif_mask();
833 sdei_mask_local_cpu();
834 cpu_park_loop();
835}
836
837
838
839
840
841
842void panic_smp_self_stop(void)
843{
844 local_cpu_stop();
845}
846
847#ifdef CONFIG_KEXEC_CORE
848static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
849#endif
850
851static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
852{
853#ifdef CONFIG_KEXEC_CORE
854 crash_save_cpu(regs, cpu);
855
856 atomic_dec(&waiting_for_crash_ipi);
857
858 local_irq_disable();
859 sdei_mask_local_cpu();
860
861#ifdef CONFIG_HOTPLUG_CPU
862 if (cpu_ops[cpu]->cpu_die)
863 cpu_ops[cpu]->cpu_die(cpu);
864#endif
865
866
867 cpu_park_loop();
868#endif
869}
870
871
872
873
874void handle_IPI(int ipinr, struct pt_regs *regs)
875{
876 unsigned int cpu = smp_processor_id();
877 struct pt_regs *old_regs = set_irq_regs(regs);
878
879 if ((unsigned)ipinr < NR_IPI) {
880 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
881 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
882 }
883
884 switch (ipinr) {
885 case IPI_RESCHEDULE:
886 scheduler_ipi();
887 break;
888
889 case IPI_CALL_FUNC:
890 irq_enter();
891 generic_smp_call_function_interrupt();
892 irq_exit();
893 break;
894
895 case IPI_CPU_STOP:
896 irq_enter();
897 local_cpu_stop();
898 irq_exit();
899 break;
900
901 case IPI_CPU_CRASH_STOP:
902 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
903 irq_enter();
904 ipi_cpu_crash_stop(cpu, regs);
905
906 unreachable();
907 }
908 break;
909
910#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
911 case IPI_TIMER:
912 irq_enter();
913 tick_receive_broadcast();
914 irq_exit();
915 break;
916#endif
917
918#ifdef CONFIG_IRQ_WORK
919 case IPI_IRQ_WORK:
920 irq_enter();
921 irq_work_run();
922 irq_exit();
923 break;
924#endif
925
926#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
927 case IPI_WAKEUP:
928 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
929 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
930 cpu);
931 break;
932#endif
933
934 default:
935 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
936 break;
937 }
938
939 if ((unsigned)ipinr < NR_IPI)
940 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
941 set_irq_regs(old_regs);
942}
943
944void smp_send_reschedule(int cpu)
945{
946 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
947}
948
949#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
950void tick_broadcast(const struct cpumask *mask)
951{
952 smp_cross_call(mask, IPI_TIMER);
953}
954#endif
955
956void smp_send_stop(void)
957{
958 unsigned long timeout;
959
960 if (num_online_cpus() > 1) {
961 cpumask_t mask;
962
963 cpumask_copy(&mask, cpu_online_mask);
964 cpumask_clear_cpu(smp_processor_id(), &mask);
965
966 if (system_state <= SYSTEM_RUNNING)
967 pr_crit("SMP: stopping secondary CPUs\n");
968 smp_cross_call(&mask, IPI_CPU_STOP);
969 }
970
971
972 timeout = USEC_PER_SEC;
973 while (num_online_cpus() > 1 && timeout--)
974 udelay(1);
975
976 if (num_online_cpus() > 1)
977 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
978 cpumask_pr_args(cpu_online_mask));
979
980 sdei_mask_local_cpu();
981}
982
983#ifdef CONFIG_KEXEC_CORE
984void crash_smp_send_stop(void)
985{
986 static int cpus_stopped;
987 cpumask_t mask;
988 unsigned long timeout;
989
990
991
992
993
994 if (cpus_stopped)
995 return;
996
997 cpus_stopped = 1;
998
999 if (num_online_cpus() == 1) {
1000 sdei_mask_local_cpu();
1001 return;
1002 }
1003
1004 cpumask_copy(&mask, cpu_online_mask);
1005 cpumask_clear_cpu(smp_processor_id(), &mask);
1006
1007 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
1008
1009 pr_crit("SMP: stopping secondary CPUs\n");
1010 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1011
1012
1013 timeout = USEC_PER_SEC;
1014 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1015 udelay(1);
1016
1017 if (atomic_read(&waiting_for_crash_ipi) > 0)
1018 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1019 cpumask_pr_args(&mask));
1020
1021 sdei_mask_local_cpu();
1022}
1023
1024bool smp_crash_stop_failed(void)
1025{
1026 return (atomic_read(&waiting_for_crash_ipi) > 0);
1027}
1028#endif
1029
1030
1031
1032
1033int setup_profiling_timer(unsigned int multiplier)
1034{
1035 return -EINVAL;
1036}
1037
1038static bool have_cpu_die(void)
1039{
1040#ifdef CONFIG_HOTPLUG_CPU
1041 int any_cpu = raw_smp_processor_id();
1042
1043 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1044 return true;
1045#endif
1046 return false;
1047}
1048
1049bool cpus_are_stuck_in_kernel(void)
1050{
1051 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1052
1053 return !!cpus_stuck_in_kernel || smp_spin_tables;
1054}
1055