LXR linux/arch/m68k/include/asm/mmu

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __M68K_MMU_CONTEXT_H
   3#define __M68K_MMU_CONTEXT_H
   4
   5#include <asm-generic/mm_hooks.h>
   6#include <linux/mm_types.h>
   7
   8static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
   9{
  10}
  11
  12#ifdef CONFIG_MMU
  13
  14#if defined(CONFIG_COLDFIRE)
  15
  16#include <asm/atomic.h>
  17#include <asm/bitops.h>
  18#include <asm/mcfmmu.h>
  19#include <asm/mmu.h>
  20
  21#define NO_CONTEXT              256
  22#define LAST_CONTEXT            255
  23#define FIRST_CONTEXT           1
  24
  25extern unsigned long context_map[];
  26extern mm_context_t next_mmu_context;
  27
  28extern atomic_t nr_free_contexts;
  29extern struct mm_struct *context_mm[LAST_CONTEXT+1];
  30extern void steal_context(void);
  31
  32static inline void get_mmu_context(struct mm_struct *mm)
  33{
  34        mm_context_t ctx;
  35
  36        if (mm->context != NO_CONTEXT)
  37                return;
  38        while (atomic_dec_and_test_lt(&nr_free_contexts)) {
  39                atomic_inc(&nr_free_contexts);
  40                steal_context();
  41        }
  42        ctx = next_mmu_context;
  43        while (test_and_set_bit(ctx, context_map)) {
  44                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
  45                if (ctx > LAST_CONTEXT)
  46                        ctx = 0;
  47        }
  48        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
  49        mm->context = ctx;
  50        context_mm[ctx] = mm;
  51}
  52
  53/*
  54 * Set up the context for a new address space.
  55 */
  56#define init_new_context(tsk, mm)       (((mm)->context = NO_CONTEXT), 0)
  57
  58/*
  59 * We're finished using the context for an address space.
  60 */
  61static inline void destroy_context(struct mm_struct *mm)
  62{
  63        if (mm->context != NO_CONTEXT) {
  64                clear_bit(mm->context, context_map);
  65                mm->context = NO_CONTEXT;
  66                atomic_inc(&nr_free_contexts);
  67        }
  68}
  69
  70static inline void set_context(mm_context_t context, pgd_t *pgd)
  71{
  72        __asm__ __volatile__ ("movec %0,%%asid" : : "d" (context));
  73}
  74
  75static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  76        struct task_struct *tsk)
  77{
  78        get_mmu_context(tsk->mm);
  79        set_context(tsk->mm->context, next->pgd);
  80}
  81
  82/*
  83 * After we have set current->mm to a new value, this activates
  84 * the context for the new mm so we see the new mappings.
  85 */
  86static inline void activate_mm(struct mm_struct *active_mm,
  87        struct mm_struct *mm)
  88{
  89        get_mmu_context(mm);
  90        set_context(mm->context, mm->pgd);
  91}
  92
  93#define deactivate_mm(tsk, mm) do { } while (0)
  94
  95#define prepare_arch_switch(next) load_ksp_mmu(next)
  96
  97static inline void load_ksp_mmu(struct task_struct *task)
  98{
  99        unsigned long flags;
 100        struct mm_struct *mm;
 101        int asid;
 102        pgd_t *pgd;
 103        pmd_t *pmd;
 104        pte_t *pte;
 105        unsigned long mmuar;
 106
 107        local_irq_save(flags);
 108        mmuar = task->thread.ksp;
 109
 110        /* Search for a valid TLB entry, if one is found, don't remap */
 111        mmu_write(MMUAR, mmuar);
 112        mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR);
 113        if (mmu_read(MMUSR) & MMUSR_HIT)
 114                goto end;
 115
 116        if (mmuar >= PAGE_OFFSET) {
 117                mm = &init_mm;
 118        } else {
 119                pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm);
 120                mm = task->mm;
 121        }
 122
 123        if (!mm)
 124                goto bug;
 125
 126        pgd = pgd_offset(mm, mmuar);
 127        if (pgd_none(*pgd))
 128                goto bug;
 129
 130        pmd = pmd_offset(pgd, mmuar);
 131        if (pmd_none(*pmd))
 132                goto bug;
 133
 134        pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
 135                                     : pte_offset_map(pmd, mmuar);
 136        if (pte_none(*pte) || !pte_present(*pte))
 137                goto bug;
 138
 139        set_pte(pte, pte_mkyoung(*pte));
 140        asid = mm->context & 0xff;
 141        if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
 142                set_pte(pte, pte_wrprotect(*pte));
 143
 144        mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
 145                (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
 146                >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
 147
 148        mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
 149                ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
 150
 151        mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
 152
 153        goto end;
 154
 155bug:
 156        pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar);
 157end:
 158        local_irq_restore(flags);
 159}
 160
 161#elif defined(CONFIG_SUN3)
 162#include <asm/sun3mmu.h>
 163#include <linux/sched.h>
 164
 165extern unsigned long get_free_context(struct mm_struct *mm);
 166extern void clear_context(unsigned long context);
 167
 168/* set the context for a new task to unmapped */
 169static inline int init_new_context(struct task_struct *tsk,
 170                                   struct mm_struct *mm)
 171{
 172        mm->context = SUN3_INVALID_CONTEXT;
 173        return 0;
 174}
 175
 176/* find the context given to this process, and if it hasn't already
 177   got one, go get one for it. */
 178static inline void get_mmu_context(struct mm_struct *mm)
 179{
 180        if (mm->context == SUN3_INVALID_CONTEXT)
 181                mm->context = get_free_context(mm);
 182}
 183
 184/* flush context if allocated... */
 185static inline void destroy_context(struct mm_struct *mm)
 186{
 187        if (mm->context != SUN3_INVALID_CONTEXT)
 188                clear_context(mm->context);
 189}
 190
 191static inline void activate_context(struct mm_struct *mm)
 192{
 193        get_mmu_context(mm);
 194        sun3_put_context(mm->context);
 195}
 196
 197static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 198                             struct task_struct *tsk)
 199{
 200        activate_context(tsk->mm);
 201}
 202
 203#define deactivate_mm(tsk, mm)  do { } while (0)
 204
 205static inline void activate_mm(struct mm_struct *prev_mm,
 206                               struct mm_struct *next_mm)
 207{
 208        activate_context(next_mm);
 209}
 210
 211#else
 212
 213#include <asm/setup.h>
 214#include <asm/page.h>
 215#include <asm/pgalloc.h>
 216
 217static inline int init_new_context(struct task_struct *tsk,
 218                                   struct mm_struct *mm)
 219{
 220        mm->context = virt_to_phys(mm->pgd);
 221        return 0;
 222}
 223
 224#define destroy_context(mm)             do { } while(0)
 225
 226static inline void switch_mm_0230(struct mm_struct *mm)
 227{
 228        unsigned long crp[2] = {
 229                0x80000000 | _PAGE_TABLE, mm->context
 230        };
 231        unsigned long tmp;
 232
 233        asm volatile (".chip 68030");
 234
 235        /* flush MC68030/MC68020 caches (they are virtually addressed) */
 236        asm volatile (
 237                "movec %%cacr,%0;"
 238                "orw %1,%0; "
 239                "movec %0,%%cacr"
 240                : "=d" (tmp) : "di" (FLUSH_I_AND_D));
 241
 242        /* Switch the root pointer. For a 030-only kernel,
 243         * avoid flushing the whole ATC, we only need to
 244         * flush the user entries. The 68851 does this by
 245         * itself. Avoid a runtime check here.
 246         */
 247        asm volatile (
 248#ifdef CPU_M68030_ONLY
 249                "pmovefd %0,%%crp; "
 250                "pflush #0,#4"
 251#else
 252                "pmove %0,%%crp"
 253#endif
 254                : : "m" (crp[0]));
 255
 256        asm volatile (".chip 68k");
 257}
 258
 259static inline void switch_mm_0460(struct mm_struct *mm)
 260{
 261        asm volatile (".chip 68040");
 262
 263        /* flush address translation cache (user entries) */
 264        asm volatile ("pflushan");
 265
 266        /* switch the root pointer */
 267        asm volatile ("movec %0,%%urp" : : "r" (mm->context));
 268
 269        if (CPU_IS_060) {
 270                unsigned long tmp;
 271
 272                /* clear user entries in the branch cache */
 273                asm volatile (
 274                        "movec %%cacr,%0; "
 275                        "orl %1,%0; "
 276                        "movec %0,%%cacr"
 277                        : "=d" (tmp): "di" (0x00200000));
 278        }
 279
 280        asm volatile (".chip 68k");
 281}
 282
 283static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
 284{
 285        if (prev != next) {
 286                if (CPU_IS_020_OR_030)
 287                        switch_mm_0230(next);
 288                else
 289                        switch_mm_0460(next);
 290        }
 291}
 292
 293#define deactivate_mm(tsk,mm)   do { } while (0)
 294
 295static inline void activate_mm(struct mm_struct *prev_mm,
 296                               struct mm_struct *next_mm)
 297{
 298        next_mm->context = virt_to_phys(next_mm->pgd);
 299
 300        if (CPU_IS_020_OR_030)
 301                switch_mm_0230(next_mm);
 302        else
 303                switch_mm_0460(next_mm);
 304}
 305
 306#endif
 307
 308#else /* !CONFIG_MMU */
 309
 310static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 311{
 312        return 0;
 313}
 314
 315
 316static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
 317{
 318}
 319
 320#define destroy_context(mm)     do { } while (0)
 321#define deactivate_mm(tsk,mm)   do { } while (0)
 322
 323static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)
 324{
 325}
 326
 327#endif /* CONFIG_MMU */
 328#endif /* __M68K_MMU_CONTEXT_H */
 329