1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef __CVMX_CONFIG_H__ 3#define __CVMX_CONFIG_H__ 4 5/************************* Config Specific Defines ************************/ 6#define CVMX_LLM_NUM_PORTS 1 7#define CVMX_NULL_POINTER_PROTECT 1 8#define CVMX_ENABLE_DEBUG_PRINTS 1 9/* PKO queues per port for interface 0 (ports 0-15) */ 10#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1 11/* PKO queues per port for interface 1 (ports 16-31) */ 12#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1 13/* Limit on the number of PKO ports enabled for interface 0 */ 14#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 15/* Limit on the number of PKO ports enabled for interface 1 */ 16#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 17/* PKO queues per port for PCI (ports 32-35) */ 18#define CVMX_PKO_QUEUES_PER_PORT_PCI 1 19/* PKO queues per port for Loop devices (ports 36-39) */ 20#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1 21 22/************************* FPA allocation *********************************/ 23/* Pool sizes in bytes, must be multiple of a cache line */ 24#define CVMX_FPA_POOL_0_SIZE (16 * CVMX_CACHE_LINE_SIZE) 25#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE) 26#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE) 27#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE) 28#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE) 29#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE) 30#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE) 31#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE) 32 33/* Pools in use */ 34/* Packet buffers */ 35#define CVMX_FPA_PACKET_POOL (0) 36#define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE 37/* Work queue entries */ 38#define CVMX_FPA_WQE_POOL (1) 39#define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE 40/* PKO queue command buffers */ 41#define CVMX_FPA_OUTPUT_BUFFER_POOL (2) 42#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE 43 44/************************* FAU allocation ********************************/ 45/* The fetch and add registers are allocated here. They are arranged 46 * in order of descending size so that all alignment constraints are 47 * automatically met. The enums are linked so that the following enum 48 * continues allocating where the previous one left off, so the 49 * numbering within each enum always starts with zero. The macros 50 * take care of the address increment size, so the values entered 51 * always increase by 1. FAU registers are accessed with byte 52 * addresses. 53 */ 54 55#define CVMX_FAU_REG_64_ADDR(x) ((x << 3) + CVMX_FAU_REG_64_START) 56typedef enum { 57 CVMX_FAU_REG_64_START = 0, 58 CVMX_FAU_REG_64_END = CVMX_FAU_REG_64_ADDR(0), 59} cvmx_fau_reg_64_t; 60 61#define CVMX_FAU_REG_32_ADDR(x) ((x << 2) + CVMX_FAU_REG_32_START) 62typedef enum { 63 CVMX_FAU_REG_32_START = CVMX_FAU_REG_64_END, 64 CVMX_FAU_REG_32_END = CVMX_FAU_REG_32_ADDR(0), 65} cvmx_fau_reg_32_t; 66 67#define CVMX_FAU_REG_16_ADDR(x) ((x << 1) + CVMX_FAU_REG_16_START) 68typedef enum { 69 CVMX_FAU_REG_16_START = CVMX_FAU_REG_32_END, 70 CVMX_FAU_REG_16_END = CVMX_FAU_REG_16_ADDR(0), 71} cvmx_fau_reg_16_t; 72 73#define CVMX_FAU_REG_8_ADDR(x) ((x) + CVMX_FAU_REG_8_START) 74typedef enum { 75 CVMX_FAU_REG_8_START = CVMX_FAU_REG_16_END, 76 CVMX_FAU_REG_8_END = CVMX_FAU_REG_8_ADDR(0), 77} cvmx_fau_reg_8_t; 78 79/* 80 * The name CVMX_FAU_REG_AVAIL_BASE is provided to indicate the first 81 * available FAU address that is not allocated in cvmx-config.h. This 82 * is 64 bit aligned. 83 */ 84#define CVMX_FAU_REG_AVAIL_BASE ((CVMX_FAU_REG_8_END + 0x7) & (~0x7ULL)) 85#define CVMX_FAU_REG_END (2048) 86 87/********************** scratch memory allocation *************************/ 88/* Scratchpad memory allocation. Note that these are byte memory 89 * addresses. Some uses of scratchpad (IOBDMA for example) require 90 * the use of 8-byte aligned addresses, so proper alignment needs to 91 * be taken into account. 92 */ 93/* Generic scratch iobdma area */ 94#define CVMX_SCR_SCRATCH (0) 95/* First location available after cvmx-config.h allocated region. */ 96#define CVMX_SCR_REG_AVAIL_BASE (8) 97 98/* 99 * CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve 100 * before the beginning of the packet. If necessary, override the 101 * default here. See the IPD section of the hardware manual for MBUFF 102 * SKIP details. 103 */ 104#define CVMX_HELPER_FIRST_MBUFF_SKIP 184 105 106/* 107 * CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve 108 * in each chained packet element. If necessary, override the default 109 * here. 110 */ 111#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0 112 113/* 114 * CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is 115 * enabled for all input ports. This controls if IPD sends 116 * backpressure to all ports if Octeon's FPA pools don't have enough 117 * packet or work queue entries. Even when this is off, it is still 118 * possible to get backpressure from individual hardware ports. When 119 * configuring backpressure, also check 120 * CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override 121 * the default here. 122 */ 123#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1 124 125/* 126 * CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper 127 * function. Once it is enabled the hardware starts accepting 128 * packets. You might want to skip the IPD enable if configuration 129 * changes are need from the default helper setup. If necessary, 130 * override the default here. 131 */ 132#define CVMX_HELPER_ENABLE_IPD 0 133 134/* 135 * CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns 136 * to incoming packets. 137 */ 138#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED 139 140#define CVMX_ENABLE_PARAMETER_CHECKING 0 141 142/* 143 * The following select which fields are used by the PIP to generate 144 * the tag on INPUT 145 * 0: don't include 146 * 1: include 147 */ 148#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0 149#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0 150#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0 151#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0 152#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0 153#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0 154#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0 155#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0 156#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0 157#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0 158#define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1 159 160/* Select skip mode for input ports */ 161#define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2 162 163/* 164 * Force backpressure to be disabled. This overrides all other 165 * backpressure configuration. 166 */ 167#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 0 168 169#endif /* __CVMX_CONFIG_H__ */ 170