linux/arch/mips/mm/init.c
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   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 1994 - 2000 Ralf Baechle
   7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
   9 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  10 */
  11#include <linux/bug.h>
  12#include <linux/init.h>
  13#include <linux/export.h>
  14#include <linux/signal.h>
  15#include <linux/sched.h>
  16#include <linux/smp.h>
  17#include <linux/kernel.h>
  18#include <linux/errno.h>
  19#include <linux/string.h>
  20#include <linux/types.h>
  21#include <linux/pagemap.h>
  22#include <linux/ptrace.h>
  23#include <linux/mman.h>
  24#include <linux/mm.h>
  25#include <linux/memblock.h>
  26#include <linux/highmem.h>
  27#include <linux/swap.h>
  28#include <linux/proc_fs.h>
  29#include <linux/pfn.h>
  30#include <linux/hardirq.h>
  31#include <linux/gfp.h>
  32#include <linux/kcore.h>
  33#include <linux/initrd.h>
  34
  35#include <asm/bootinfo.h>
  36#include <asm/cachectl.h>
  37#include <asm/cpu.h>
  38#include <asm/dma.h>
  39#include <asm/kmap_types.h>
  40#include <asm/maar.h>
  41#include <asm/mmu_context.h>
  42#include <asm/sections.h>
  43#include <asm/pgtable.h>
  44#include <asm/pgalloc.h>
  45#include <asm/tlb.h>
  46#include <asm/fixmap.h>
  47
  48/*
  49 * We have up to 8 empty zeroed pages so we can map one of the right colour
  50 * when needed.  This is necessary only on R4000 / R4400 SC and MC versions
  51 * where we have to avoid VCED / VECI exceptions for good performance at
  52 * any price.  Since page is never written to after the initialization we
  53 * don't have to care about aliases on other CPUs.
  54 */
  55unsigned long empty_zero_page, zero_page_mask;
  56EXPORT_SYMBOL_GPL(empty_zero_page);
  57EXPORT_SYMBOL(zero_page_mask);
  58
  59/*
  60 * Not static inline because used by IP27 special magic initialization code
  61 */
  62void setup_zero_pages(void)
  63{
  64        unsigned int order, i;
  65        struct page *page;
  66
  67        if (cpu_has_vce)
  68                order = 3;
  69        else
  70                order = 0;
  71
  72        empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
  73        if (!empty_zero_page)
  74                panic("Oh boy, that early out of memory?");
  75
  76        page = virt_to_page((void *)empty_zero_page);
  77        split_page(page, order);
  78        for (i = 0; i < (1 << order); i++, page++)
  79                mark_page_reserved(page);
  80
  81        zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
  82}
  83
  84static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
  85{
  86        enum fixed_addresses idx;
  87        unsigned int uninitialized_var(old_mmid);
  88        unsigned long vaddr, flags, entrylo;
  89        unsigned long old_ctx;
  90        pte_t pte;
  91        int tlbidx;
  92
  93        BUG_ON(Page_dcache_dirty(page));
  94
  95        preempt_disable();
  96        pagefault_disable();
  97        idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
  98        idx += in_interrupt() ? FIX_N_COLOURS : 0;
  99        vaddr = __fix_to_virt(FIX_CMAP_END - idx);
 100        pte = mk_pte(page, prot);
 101#if defined(CONFIG_XPA)
 102        entrylo = pte_to_entrylo(pte.pte_high);
 103#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
 104        entrylo = pte.pte_high;
 105#else
 106        entrylo = pte_to_entrylo(pte_val(pte));
 107#endif
 108
 109        local_irq_save(flags);
 110        old_ctx = read_c0_entryhi();
 111        write_c0_entryhi(vaddr & (PAGE_MASK << 1));
 112        write_c0_entrylo0(entrylo);
 113        write_c0_entrylo1(entrylo);
 114        if (cpu_has_mmid) {
 115                old_mmid = read_c0_memorymapid();
 116                write_c0_memorymapid(MMID_KERNEL_WIRED);
 117        }
 118#ifdef CONFIG_XPA
 119        if (cpu_has_xpa) {
 120                entrylo = (pte.pte_low & _PFNX_MASK);
 121                writex_c0_entrylo0(entrylo);
 122                writex_c0_entrylo1(entrylo);
 123        }
 124#endif
 125        tlbidx = num_wired_entries();
 126        write_c0_wired(tlbidx + 1);
 127        write_c0_index(tlbidx);
 128        mtc0_tlbw_hazard();
 129        tlb_write_indexed();
 130        tlbw_use_hazard();
 131        write_c0_entryhi(old_ctx);
 132        if (cpu_has_mmid)
 133                write_c0_memorymapid(old_mmid);
 134        local_irq_restore(flags);
 135
 136        return (void*) vaddr;
 137}
 138
 139void *kmap_coherent(struct page *page, unsigned long addr)
 140{
 141        return __kmap_pgprot(page, addr, PAGE_KERNEL);
 142}
 143
 144void *kmap_noncoherent(struct page *page, unsigned long addr)
 145{
 146        return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
 147}
 148
 149void kunmap_coherent(void)
 150{
 151        unsigned int wired;
 152        unsigned long flags, old_ctx;
 153
 154        local_irq_save(flags);
 155        old_ctx = read_c0_entryhi();
 156        wired = num_wired_entries() - 1;
 157        write_c0_wired(wired);
 158        write_c0_index(wired);
 159        write_c0_entryhi(UNIQUE_ENTRYHI(wired));
 160        write_c0_entrylo0(0);
 161        write_c0_entrylo1(0);
 162        mtc0_tlbw_hazard();
 163        tlb_write_indexed();
 164        tlbw_use_hazard();
 165        write_c0_entryhi(old_ctx);
 166        local_irq_restore(flags);
 167        pagefault_enable();
 168        preempt_enable();
 169}
 170
 171void copy_user_highpage(struct page *to, struct page *from,
 172        unsigned long vaddr, struct vm_area_struct *vma)
 173{
 174        void *vfrom, *vto;
 175
 176        vto = kmap_atomic(to);
 177        if (cpu_has_dc_aliases &&
 178            page_mapcount(from) && !Page_dcache_dirty(from)) {
 179                vfrom = kmap_coherent(from, vaddr);
 180                copy_page(vto, vfrom);
 181                kunmap_coherent();
 182        } else {
 183                vfrom = kmap_atomic(from);
 184                copy_page(vto, vfrom);
 185                kunmap_atomic(vfrom);
 186        }
 187        if ((!cpu_has_ic_fills_f_dc) ||
 188            pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
 189                flush_data_cache_page((unsigned long)vto);
 190        kunmap_atomic(vto);
 191        /* Make sure this page is cleared on other CPU's too before using it */
 192        smp_wmb();
 193}
 194
 195void copy_to_user_page(struct vm_area_struct *vma,
 196        struct page *page, unsigned long vaddr, void *dst, const void *src,
 197        unsigned long len)
 198{
 199        if (cpu_has_dc_aliases &&
 200            page_mapcount(page) && !Page_dcache_dirty(page)) {
 201                void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
 202                memcpy(vto, src, len);
 203                kunmap_coherent();
 204        } else {
 205                memcpy(dst, src, len);
 206                if (cpu_has_dc_aliases)
 207                        SetPageDcacheDirty(page);
 208        }
 209        if (vma->vm_flags & VM_EXEC)
 210                flush_cache_page(vma, vaddr, page_to_pfn(page));
 211}
 212
 213void copy_from_user_page(struct vm_area_struct *vma,
 214        struct page *page, unsigned long vaddr, void *dst, const void *src,
 215        unsigned long len)
 216{
 217        if (cpu_has_dc_aliases &&
 218            page_mapcount(page) && !Page_dcache_dirty(page)) {
 219                void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
 220                memcpy(dst, vfrom, len);
 221                kunmap_coherent();
 222        } else {
 223                memcpy(dst, src, len);
 224                if (cpu_has_dc_aliases)
 225                        SetPageDcacheDirty(page);
 226        }
 227}
 228EXPORT_SYMBOL_GPL(copy_from_user_page);
 229
 230void __init fixrange_init(unsigned long start, unsigned long end,
 231        pgd_t *pgd_base)
 232{
 233#ifdef CONFIG_HIGHMEM
 234        pgd_t *pgd;
 235        pud_t *pud;
 236        pmd_t *pmd;
 237        pte_t *pte;
 238        int i, j, k;
 239        unsigned long vaddr;
 240
 241        vaddr = start;
 242        i = __pgd_offset(vaddr);
 243        j = __pud_offset(vaddr);
 244        k = __pmd_offset(vaddr);
 245        pgd = pgd_base + i;
 246
 247        for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
 248                pud = (pud_t *)pgd;
 249                for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
 250                        pmd = (pmd_t *)pud;
 251                        for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
 252                                if (pmd_none(*pmd)) {
 253                                        pte = (pte_t *) memblock_alloc_low(PAGE_SIZE,
 254                                                                           PAGE_SIZE);
 255                                        if (!pte)
 256                                                panic("%s: Failed to allocate %lu bytes align=%lx\n",
 257                                                      __func__, PAGE_SIZE,
 258                                                      PAGE_SIZE);
 259
 260                                        set_pmd(pmd, __pmd((unsigned long)pte));
 261                                        BUG_ON(pte != pte_offset_kernel(pmd, 0));
 262                                }
 263                                vaddr += PMD_SIZE;
 264                        }
 265                        k = 0;
 266                }
 267                j = 0;
 268        }
 269#endif
 270}
 271
 272unsigned __weak platform_maar_init(unsigned num_pairs)
 273{
 274        struct maar_config cfg[BOOT_MEM_MAP_MAX];
 275        unsigned i, num_configured, num_cfg = 0;
 276
 277        for (i = 0; i < boot_mem_map.nr_map; i++) {
 278                switch (boot_mem_map.map[i].type) {
 279                case BOOT_MEM_RAM:
 280                case BOOT_MEM_INIT_RAM:
 281                        break;
 282                default:
 283                        continue;
 284                }
 285
 286                /* Round lower up */
 287                cfg[num_cfg].lower = boot_mem_map.map[i].addr;
 288                cfg[num_cfg].lower = (cfg[num_cfg].lower + 0xffff) & ~0xffff;
 289
 290                /* Round upper down */
 291                cfg[num_cfg].upper = boot_mem_map.map[i].addr +
 292                                        boot_mem_map.map[i].size;
 293                cfg[num_cfg].upper = (cfg[num_cfg].upper & ~0xffff) - 1;
 294
 295                cfg[num_cfg].attrs = MIPS_MAAR_S;
 296                num_cfg++;
 297        }
 298
 299        num_configured = maar_config(cfg, num_cfg, num_pairs);
 300        if (num_configured < num_cfg)
 301                pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
 302                        num_pairs, num_cfg);
 303
 304        return num_configured;
 305}
 306
 307void maar_init(void)
 308{
 309        unsigned num_maars, used, i;
 310        phys_addr_t lower, upper, attr;
 311        static struct {
 312                struct maar_config cfgs[3];
 313                unsigned used;
 314        } recorded = { { { 0 } }, 0 };
 315
 316        if (!cpu_has_maar)
 317                return;
 318
 319        /* Detect the number of MAARs */
 320        write_c0_maari(~0);
 321        back_to_back_c0_hazard();
 322        num_maars = read_c0_maari() + 1;
 323
 324        /* MAARs should be in pairs */
 325        WARN_ON(num_maars % 2);
 326
 327        /* Set MAARs using values we recorded already */
 328        if (recorded.used) {
 329                used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
 330                BUG_ON(used != recorded.used);
 331        } else {
 332                /* Configure the required MAARs */
 333                used = platform_maar_init(num_maars / 2);
 334        }
 335
 336        /* Disable any further MAARs */
 337        for (i = (used * 2); i < num_maars; i++) {
 338                write_c0_maari(i);
 339                back_to_back_c0_hazard();
 340                write_c0_maar(0);
 341                back_to_back_c0_hazard();
 342        }
 343
 344        if (recorded.used)
 345                return;
 346
 347        pr_info("MAAR configuration:\n");
 348        for (i = 0; i < num_maars; i += 2) {
 349                write_c0_maari(i);
 350                back_to_back_c0_hazard();
 351                upper = read_c0_maar();
 352
 353                write_c0_maari(i + 1);
 354                back_to_back_c0_hazard();
 355                lower = read_c0_maar();
 356
 357                attr = lower & upper;
 358                lower = (lower & MIPS_MAAR_ADDR) << 4;
 359                upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
 360
 361                pr_info("  [%d]: ", i / 2);
 362                if (!(attr & MIPS_MAAR_VL)) {
 363                        pr_cont("disabled\n");
 364                        continue;
 365                }
 366
 367                pr_cont("%pa-%pa", &lower, &upper);
 368
 369                if (attr & MIPS_MAAR_S)
 370                        pr_cont(" speculate");
 371
 372                pr_cont("\n");
 373
 374                /* Record the setup for use on secondary CPUs */
 375                if (used <= ARRAY_SIZE(recorded.cfgs)) {
 376                        recorded.cfgs[recorded.used].lower = lower;
 377                        recorded.cfgs[recorded.used].upper = upper;
 378                        recorded.cfgs[recorded.used].attrs = attr;
 379                        recorded.used++;
 380                }
 381        }
 382}
 383
 384#ifndef CONFIG_NEED_MULTIPLE_NODES
 385int page_is_ram(unsigned long pagenr)
 386{
 387        int i;
 388
 389        for (i = 0; i < boot_mem_map.nr_map; i++) {
 390                unsigned long addr, end;
 391
 392                switch (boot_mem_map.map[i].type) {
 393                case BOOT_MEM_RAM:
 394                case BOOT_MEM_INIT_RAM:
 395                        break;
 396                default:
 397                        /* not usable memory */
 398                        continue;
 399                }
 400
 401                addr = PFN_UP(boot_mem_map.map[i].addr);
 402                end = PFN_DOWN(boot_mem_map.map[i].addr +
 403                               boot_mem_map.map[i].size);
 404
 405                if (pagenr >= addr && pagenr < end)
 406                        return 1;
 407        }
 408
 409        return 0;
 410}
 411
 412void __init paging_init(void)
 413{
 414        unsigned long max_zone_pfns[MAX_NR_ZONES];
 415
 416        pagetable_init();
 417
 418#ifdef CONFIG_HIGHMEM
 419        kmap_init();
 420#endif
 421#ifdef CONFIG_ZONE_DMA
 422        max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
 423#endif
 424#ifdef CONFIG_ZONE_DMA32
 425        max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
 426#endif
 427        max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
 428#ifdef CONFIG_HIGHMEM
 429        max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
 430
 431        if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
 432                printk(KERN_WARNING "This processor doesn't support highmem."
 433                       " %ldk highmem ignored\n",
 434                       (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
 435                max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
 436        }
 437#endif
 438
 439        free_area_init_nodes(max_zone_pfns);
 440}
 441
 442#ifdef CONFIG_64BIT
 443static struct kcore_list kcore_kseg0;
 444#endif
 445
 446static inline void mem_init_free_highmem(void)
 447{
 448#ifdef CONFIG_HIGHMEM
 449        unsigned long tmp;
 450
 451        if (cpu_has_dc_aliases)
 452                return;
 453
 454        for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
 455                struct page *page = pfn_to_page(tmp);
 456
 457                if (!page_is_ram(tmp))
 458                        SetPageReserved(page);
 459                else
 460                        free_highmem_page(page);
 461        }
 462#endif
 463}
 464
 465void __init mem_init(void)
 466{
 467#ifdef CONFIG_HIGHMEM
 468#ifdef CONFIG_DISCONTIGMEM
 469#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
 470#endif
 471        max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
 472#else
 473        max_mapnr = max_low_pfn;
 474#endif
 475        high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
 476
 477        maar_init();
 478        memblock_free_all();
 479        setup_zero_pages();     /* Setup zeroed pages.  */
 480        mem_init_free_highmem();
 481        mem_init_print_info(NULL);
 482
 483#ifdef CONFIG_64BIT
 484        if ((unsigned long) &_text > (unsigned long) CKSEG0)
 485                /* The -4 is a hack so that user tools don't have to handle
 486                   the overflow.  */
 487                kclist_add(&kcore_kseg0, (void *) CKSEG0,
 488                                0x80000000 - 4, KCORE_TEXT);
 489#endif
 490}
 491#endif /* !CONFIG_NEED_MULTIPLE_NODES */
 492
 493void free_init_pages(const char *what, unsigned long begin, unsigned long end)
 494{
 495        unsigned long pfn;
 496
 497        for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
 498                struct page *page = pfn_to_page(pfn);
 499                void *addr = phys_to_virt(PFN_PHYS(pfn));
 500
 501                memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
 502                free_reserved_page(page);
 503        }
 504        printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
 505}
 506
 507void (*free_init_pages_eva)(void *begin, void *end) = NULL;
 508
 509void __ref free_initmem(void)
 510{
 511        prom_free_prom_memory();
 512        /*
 513         * Let the platform define a specific function to free the
 514         * init section since EVA may have used any possible mapping
 515         * between virtual and physical addresses.
 516         */
 517        if (free_init_pages_eva)
 518                free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
 519        else
 520                free_initmem_default(POISON_FREE_INITMEM);
 521}
 522
 523#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
 524unsigned long pgd_current[NR_CPUS];
 525#endif
 526
 527/*
 528 * Align swapper_pg_dir in to 64K, allows its address to be loaded
 529 * with a single LUI instruction in the TLB handlers.  If we used
 530 * __aligned(64K), its size would get rounded up to the alignment
 531 * size, and waste space.  So we place it in its own section and align
 532 * it in the linker script.
 533 */
 534pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
 535#ifndef __PAGETABLE_PUD_FOLDED
 536pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss;
 537#endif
 538#ifndef __PAGETABLE_PMD_FOLDED
 539pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
 540EXPORT_SYMBOL_GPL(invalid_pmd_table);
 541#endif
 542pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
 543EXPORT_SYMBOL(invalid_pte_table);
 544