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8#ifndef __QDIO_H__
9#define __QDIO_H__
10
11#include <linux/interrupt.h>
12#include <asm/cio.h>
13#include <asm/ccwdev.h>
14
15
16#define QDIO_MAX_QUEUES_PER_IRQ 4
17#define QDIO_MAX_BUFFERS_PER_Q 128
18#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
19#define QDIO_MAX_ELEMENTS_PER_BUFFER 16
20#define QDIO_SBAL_SIZE 256
21
22#define QDIO_QETH_QFMT 0
23#define QDIO_ZFCP_QFMT 1
24#define QDIO_IQDIO_QFMT 2
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36struct qdesfmt0 {
37 u64 sliba;
38 u64 sla;
39 u64 slsba;
40 u32 : 32;
41 u32 akey : 4;
42 u32 bkey : 4;
43 u32 ckey : 4;
44 u32 dkey : 4;
45 u32 : 16;
46} __attribute__ ((packed));
47
48#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
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62struct qdr {
63 u32 qfmt : 8;
64 u32 : 16;
65 u32 ac : 8;
66 u32 : 8;
67 u32 iqdcnt : 8;
68 u32 : 8;
69 u32 oqdcnt : 8;
70 u32 : 8;
71 u32 iqdsz : 8;
72 u32 : 8;
73 u32 oqdsz : 8;
74
75 u32 res[9];
76
77 u64 qiba;
78 u32 : 32;
79 u32 qkey : 4;
80 u32 : 28;
81 struct qdesfmt0 qdf0[126];
82} __packed __aligned(PAGE_SIZE);
83
84#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
85#define QIB_RFLAGS_ENABLE_QEBSM 0x80
86#define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
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99struct qib {
100 u32 qfmt : 8;
101 u32 pfmt : 8;
102 u32 rflags : 8;
103 u32 ac : 8;
104 u32 : 32;
105 u64 isliba;
106 u64 osliba;
107 u32 : 32;
108 u32 : 32;
109 u8 ebcnam[8];
110
111 u8 res[88];
112
113 u8 parm[QDIO_MAX_BUFFERS_PER_Q];
114} __attribute__ ((packed, aligned(256)));
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120struct slibe {
121 u64 parms;
122};
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141struct qaob {
142 u64 res0[6];
143 u8 res1;
144 u8 res2;
145 u8 res3;
146 u8 aorc;
147 u8 flags;
148 u16 cbtbs;
149 u8 sb_count;
150 u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
151 u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
152 u64 user0;
153 u64 res4[2];
154 u64 user1;
155 u64 user2;
156} __attribute__ ((packed, aligned(256)));
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165struct slib {
166 u64 nsliba;
167 u64 sla;
168 u64 slsba;
169
170 u8 res[1000];
171
172 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
173} __attribute__ ((packed, aligned(2048)));
174
175#define SBAL_EFLAGS_LAST_ENTRY 0x40
176#define SBAL_EFLAGS_CONTIGUOUS 0x20
177#define SBAL_EFLAGS_FIRST_FRAG 0x04
178#define SBAL_EFLAGS_MIDDLE_FRAG 0x08
179#define SBAL_EFLAGS_LAST_FRAG 0x0c
180#define SBAL_EFLAGS_MASK 0x6f
181
182#define SBAL_SFLAGS0_PCI_REQ 0x40
183#define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
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186#define SBAL_SFLAGS0_TYPE_STATUS 0x00
187#define SBAL_SFLAGS0_TYPE_WRITE 0x08
188#define SBAL_SFLAGS0_TYPE_READ 0x10
189#define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
190#define SBAL_SFLAGS0_MORE_SBALS 0x04
191#define SBAL_SFLAGS0_COMMAND 0x02
192#define SBAL_SFLAGS0_LAST_SBAL 0x00
193#define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
194#define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
195#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
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205struct qdio_buffer_element {
206 u8 eflags;
207
208 u8 res1;
209
210 u8 scount;
211 u8 sflags;
212 u32 length;
213 void *addr;
214} __attribute__ ((packed, aligned(16)));
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220struct qdio_buffer {
221 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
222} __attribute__ ((packed, aligned(256)));
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228struct sl_element {
229 unsigned long sbal;
230} __attribute__ ((packed));
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236struct sl {
237 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
238} __attribute__ ((packed, aligned(1024)));
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244struct slsb {
245 u8 val[QDIO_MAX_BUFFERS_PER_Q];
246} __attribute__ ((packed, aligned(256)));
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256struct qdio_outbuf_state {
257 u8 flags;
258 void *user;
259};
260
261#define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01
262
263#define CHSC_AC1_INITIATE_INPUTQ 0x80
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267#define AC1_SIGA_INPUT_NEEDED 0x40
268#define AC1_SIGA_OUTPUT_NEEDED 0x20
269#define AC1_SIGA_SYNC_NEEDED 0x10
270#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08
271#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04
272#define AC1_SC_QEBSM_AVAILABLE 0x02
273#define AC1_SC_QEBSM_ENABLED 0x01
274
275#define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
276#define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
277#define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
278#define CHSC_AC2_DATA_DIV_ENABLED 0x0002
279
280#define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
281
282struct qdio_ssqd_desc {
283 u8 flags;
284 u8:8;
285 u16 sch;
286 u8 qfmt;
287 u8 parm;
288 u8 qdioac1;
289 u8 sch_class;
290 u8 pcnt;
291 u8 icnt;
292 u8:8;
293 u8 ocnt;
294 u8:8;
295 u8 mbccnt;
296 u16 qdioac2;
297 u64 sch_token;
298 u8 mro;
299 u8 mri;
300 u16 qdioac3;
301 u16:16;
302 u8:8;
303 u8 mmwc;
304} __attribute__ ((packed));
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308typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
309 int, int, unsigned long);
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312#define QDIO_ERROR_ACTIVATE 0x0001
313#define QDIO_ERROR_GET_BUF_STATE 0x0002
314#define QDIO_ERROR_SET_BUF_STATE 0x0004
315#define QDIO_ERROR_SLSB_STATE 0x0100
316
317#define QDIO_ERROR_FATAL 0x00ff
318#define QDIO_ERROR_TEMPORARY 0xff00
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321#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
322#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
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346struct qdio_initialize {
347 struct ccw_device *cdev;
348 unsigned char q_format;
349 unsigned char qdr_ac;
350 unsigned char adapter_name[8];
351 unsigned int qib_param_field_format;
352 unsigned char *qib_param_field;
353 unsigned char qib_rflags;
354 unsigned long *input_slib_elements;
355 unsigned long *output_slib_elements;
356 unsigned int no_input_qs;
357 unsigned int no_output_qs;
358 qdio_handler_t *input_handler;
359 qdio_handler_t *output_handler;
360 void (**queue_start_poll_array) (struct ccw_device *, int,
361 unsigned long);
362 int scan_threshold;
363 unsigned long int_parm;
364 struct qdio_buffer **input_sbal_addr_array;
365 struct qdio_buffer **output_sbal_addr_array;
366 struct qdio_outbuf_state *output_sbal_state_array;
367};
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375enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};
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384struct qdio_brinfo_entry_l3_ipv6 {
385 u64 nit;
386 struct { unsigned char _s6_addr[16]; } addr;
387} __packed;
388struct qdio_brinfo_entry_l3_ipv4 {
389 u64 nit;
390 struct { uint32_t _s_addr; } addr;
391} __packed;
392struct qdio_brinfo_entry_l2 {
393 u64 nit;
394 struct { u8 mac[6]; u16 lnid; } addr_lnid;
395} __packed;
396
397#define QDIO_STATE_INACTIVE 0x00000002
398#define QDIO_STATE_ESTABLISHED 0x00000004
399#define QDIO_STATE_ACTIVE 0x00000008
400#define QDIO_STATE_STOPPED 0x00000010
401
402#define QDIO_FLAG_SYNC_INPUT 0x01
403#define QDIO_FLAG_SYNC_OUTPUT 0x02
404#define QDIO_FLAG_PCI_OUT 0x10
405
406int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
407void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
408void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
409
410extern int qdio_allocate(struct qdio_initialize *);
411extern int qdio_establish(struct qdio_initialize *);
412extern int qdio_activate(struct ccw_device *);
413extern void qdio_release_aob(struct qaob *);
414extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
415 unsigned int);
416extern int qdio_start_irq(struct ccw_device *, int);
417extern int qdio_stop_irq(struct ccw_device *, int);
418extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
419extern int qdio_shutdown(struct ccw_device *, int);
420extern int qdio_free(struct ccw_device *);
421extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
422extern int qdio_pnso_brinfo(struct subchannel_id schid,
423 int cnc, u16 *response,
424 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
425 void *entry),
426 void *priv);
427
428#endif
429