1
2#ifndef _ASM_X86_UV_BIOS_H
3#define _ASM_X86_UV_BIOS_H
4
5
6
7
8
9
10
11
12#include <linux/rtc.h>
13
14
15
16
17
18
19enum uv_bios_cmd {
20 UV_BIOS_COMMON,
21 UV_BIOS_GET_SN_INFO,
22 UV_BIOS_FREQ_BASE,
23 UV_BIOS_WATCHLIST_ALLOC,
24 UV_BIOS_WATCHLIST_FREE,
25 UV_BIOS_MEMPROTECT,
26 UV_BIOS_GET_PARTITION_ADDR,
27 UV_BIOS_SET_LEGACY_VGA_TARGET
28};
29
30
31
32
33enum {
34 BIOS_STATUS_MORE_PASSES = 1,
35 BIOS_STATUS_SUCCESS = 0,
36 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS,
37 BIOS_STATUS_EINVAL = -EINVAL,
38 BIOS_STATUS_UNAVAIL = -EBUSY,
39 BIOS_STATUS_ABORT = -EINTR,
40};
41
42
43struct uv_gam_parameters {
44 u64 mmr_base;
45 u64 gru_base;
46 u8 mmr_shift;
47 u8 gru_shift;
48 u8 gpa_shift;
49 u8 unused1;
50};
51
52
53#define UV_GAM_RANGE_TYPE_UNUSED 0
54#define UV_GAM_RANGE_TYPE_RAM 1
55#define UV_GAM_RANGE_TYPE_NVRAM 2
56#define UV_GAM_RANGE_TYPE_NV_WINDOW 3
57#define UV_GAM_RANGE_TYPE_NV_MAILBOX 4
58#define UV_GAM_RANGE_TYPE_HOLE 5
59#define UV_GAM_RANGE_TYPE_MAX 6
60
61
62#define UV_GAM_RANGE_SHFT 26
63
64struct uv_gam_range_entry {
65 char type;
66 char unused1;
67 u16 nasid;
68 u16 sockid;
69 u16 pnode;
70 u32 unused2;
71 u32 limit;
72};
73
74#define UV_SYSTAB_SIG "UVST"
75#define UV_SYSTAB_VERSION_1 1
76#define UV_SYSTAB_VERSION_UV4 0x400
77#define UV_SYSTAB_VERSION_UV4_1 0x401
78#define UV_SYSTAB_VERSION_UV4_2 0x402
79#define UV_SYSTAB_VERSION_UV4_3 0x403
80#define UV_SYSTAB_VERSION_UV4_LATEST UV_SYSTAB_VERSION_UV4_3
81
82#define UV_SYSTAB_TYPE_UNUSED 0
83#define UV_SYSTAB_TYPE_GAM_PARAMS 1
84#define UV_SYSTAB_TYPE_GAM_RNG_TBL 2
85#define UV_SYSTAB_TYPE_MAX 3
86
87
88
89
90
91struct uv_systab {
92 char signature[4];
93 u32 revision;
94 u64 function;
95 u32 size;
96 struct {
97 u32 type:8;
98 u32 offset:24;
99 } entry[1];
100};
101extern struct uv_systab *uv_systab;
102
103
104enum {
105 BIOS_FREQ_BASE_PLATFORM = 0,
106 BIOS_FREQ_BASE_INTERVAL_TIMER = 1,
107 BIOS_FREQ_BASE_REALTIME_CLOCK = 2
108};
109
110union partition_info_u {
111 u64 val;
112 struct {
113 u64 hub_version : 8,
114 partition_id : 16,
115 coherence_id : 16,
116 region_size : 24;
117 };
118};
119
120enum uv_memprotect {
121 UV_MEMPROT_RESTRICT_ACCESS,
122 UV_MEMPROT_ALLOW_AMO,
123 UV_MEMPROT_ALLOW_RW
124};
125
126
127
128
129extern s64 uv_bios_call(enum uv_bios_cmd, u64, u64, u64, u64, u64);
130extern s64 uv_bios_call_irqsave(enum uv_bios_cmd, u64, u64, u64, u64, u64);
131
132extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *, long *);
133extern s64 uv_bios_freq_base(u64, u64 *);
134extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int,
135 unsigned long *);
136extern int uv_bios_mq_watchlist_free(int, int);
137extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
138extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *);
139extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
140
141extern void uv_bios_init(void);
142
143extern unsigned long sn_rtc_cycles_per_second;
144extern int uv_type;
145extern long sn_partition_id;
146extern long sn_coherency_id;
147extern long sn_region_size;
148extern long system_serial_number;
149#define uv_partition_coherence_id() (sn_coherency_id)
150
151extern struct kobject *sgi_uv_kobj;
152
153
154
155
156extern struct semaphore __efi_uv_runtime_lock;
157
158#endif
159