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12#include <linux/kvm_host.h>
13#include <linux/slab.h>
14#include <linux/export.h>
15#include <linux/rculist.h>
16
17#include <trace/events/kvm.h>
18
19#include <asm/msidef.h>
20
21#include "irq.h"
22
23#include "ioapic.h"
24
25#include "lapic.h"
26
27#include "hyperv.h"
28#include "x86.h"
29
30static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
31 struct kvm *kvm, int irq_source_id, int level,
32 bool line_status)
33{
34 struct kvm_pic *pic = kvm->arch.vpic;
35 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
36}
37
38static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
39 struct kvm *kvm, int irq_source_id, int level,
40 bool line_status)
41{
42 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
43 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
44 line_status);
45}
46
47int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
48 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
49{
50 int i, r = -1;
51 struct kvm_vcpu *vcpu, *lowest = NULL;
52 unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
53 unsigned int dest_vcpus = 0;
54
55 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
56 kvm_lowest_prio_delivery(irq)) {
57 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
58 irq->delivery_mode = APIC_DM_FIXED;
59 }
60
61 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
62 return r;
63
64 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
65
66 kvm_for_each_vcpu(i, vcpu, kvm) {
67 if (!kvm_apic_present(vcpu))
68 continue;
69
70 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
71 irq->dest_id, irq->dest_mode))
72 continue;
73
74 if (!kvm_lowest_prio_delivery(irq)) {
75 if (r < 0)
76 r = 0;
77 r += kvm_apic_set_irq(vcpu, irq, dest_map);
78 } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
79 if (!kvm_vector_hashing_enabled()) {
80 if (!lowest)
81 lowest = vcpu;
82 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
83 lowest = vcpu;
84 } else {
85 __set_bit(i, dest_vcpu_bitmap);
86 dest_vcpus++;
87 }
88 }
89 }
90
91 if (dest_vcpus != 0) {
92 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
93 dest_vcpu_bitmap, KVM_MAX_VCPUS);
94
95 lowest = kvm_get_vcpu(kvm, idx);
96 }
97
98 if (lowest)
99 r = kvm_apic_set_irq(lowest, irq, dest_map);
100
101 return r;
102}
103
104void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
105 struct kvm_lapic_irq *irq)
106{
107 trace_kvm_msi_set_irq(e->msi.address_lo | (kvm->arch.x2apic_format ?
108 (u64)e->msi.address_hi << 32 : 0),
109 e->msi.data);
110
111 irq->dest_id = (e->msi.address_lo &
112 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
113 if (kvm->arch.x2apic_format)
114 irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi);
115 irq->vector = (e->msi.data &
116 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
117 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
118 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
119 irq->delivery_mode = e->msi.data & 0x700;
120 irq->msi_redir_hint = ((e->msi.address_lo
121 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
122 irq->level = 1;
123 irq->shorthand = 0;
124}
125EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
126
127static inline bool kvm_msi_route_invalid(struct kvm *kvm,
128 struct kvm_kernel_irq_routing_entry *e)
129{
130 return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
131}
132
133int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
134 struct kvm *kvm, int irq_source_id, int level, bool line_status)
135{
136 struct kvm_lapic_irq irq;
137
138 if (kvm_msi_route_invalid(kvm, e))
139 return -EINVAL;
140
141 if (!level)
142 return -1;
143
144 kvm_set_msi_irq(kvm, e, &irq);
145
146 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
147}
148
149
150static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
151 struct kvm *kvm, int irq_source_id, int level,
152 bool line_status)
153{
154 if (!level)
155 return -1;
156
157 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
158}
159
160int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
161 struct kvm *kvm, int irq_source_id, int level,
162 bool line_status)
163{
164 struct kvm_lapic_irq irq;
165 int r;
166
167 switch (e->type) {
168 case KVM_IRQ_ROUTING_HV_SINT:
169 return kvm_hv_set_sint(e, kvm, irq_source_id, level,
170 line_status);
171
172 case KVM_IRQ_ROUTING_MSI:
173 if (kvm_msi_route_invalid(kvm, e))
174 return -EINVAL;
175
176 kvm_set_msi_irq(kvm, e, &irq);
177
178 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
179 return r;
180 break;
181
182 default:
183 break;
184 }
185
186 return -EWOULDBLOCK;
187}
188
189int kvm_request_irq_source_id(struct kvm *kvm)
190{
191 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
192 int irq_source_id;
193
194 mutex_lock(&kvm->irq_lock);
195 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
196
197 if (irq_source_id >= BITS_PER_LONG) {
198 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
199 irq_source_id = -EFAULT;
200 goto unlock;
201 }
202
203 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
204 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
205 set_bit(irq_source_id, bitmap);
206unlock:
207 mutex_unlock(&kvm->irq_lock);
208
209 return irq_source_id;
210}
211
212void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
213{
214 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
215 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
216
217 mutex_lock(&kvm->irq_lock);
218 if (irq_source_id < 0 ||
219 irq_source_id >= BITS_PER_LONG) {
220 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
221 goto unlock;
222 }
223 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
224 if (!irqchip_kernel(kvm))
225 goto unlock;
226
227 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
228 kvm_pic_clear_all(kvm->arch.vpic, irq_source_id);
229unlock:
230 mutex_unlock(&kvm->irq_lock);
231}
232
233void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
234 struct kvm_irq_mask_notifier *kimn)
235{
236 mutex_lock(&kvm->irq_lock);
237 kimn->irq = irq;
238 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
239 mutex_unlock(&kvm->irq_lock);
240}
241
242void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
243 struct kvm_irq_mask_notifier *kimn)
244{
245 mutex_lock(&kvm->irq_lock);
246 hlist_del_rcu(&kimn->link);
247 mutex_unlock(&kvm->irq_lock);
248 synchronize_srcu(&kvm->irq_srcu);
249}
250
251void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
252 bool mask)
253{
254 struct kvm_irq_mask_notifier *kimn;
255 int idx, gsi;
256
257 idx = srcu_read_lock(&kvm->irq_srcu);
258 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
259 if (gsi != -1)
260 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
261 if (kimn->irq == gsi)
262 kimn->func(kimn, mask);
263 srcu_read_unlock(&kvm->irq_srcu, idx);
264}
265
266bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
267{
268 return irqchip_in_kernel(kvm);
269}
270
271int kvm_set_routing_entry(struct kvm *kvm,
272 struct kvm_kernel_irq_routing_entry *e,
273 const struct kvm_irq_routing_entry *ue)
274{
275
276
277
278
279 switch (ue->type) {
280 case KVM_IRQ_ROUTING_IRQCHIP:
281 if (irqchip_split(kvm))
282 return -EINVAL;
283 e->irqchip.pin = ue->u.irqchip.pin;
284 switch (ue->u.irqchip.irqchip) {
285 case KVM_IRQCHIP_PIC_SLAVE:
286 e->irqchip.pin += PIC_NUM_PINS / 2;
287
288 case KVM_IRQCHIP_PIC_MASTER:
289 if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
290 return -EINVAL;
291 e->set = kvm_set_pic_irq;
292 break;
293 case KVM_IRQCHIP_IOAPIC:
294 if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
295 return -EINVAL;
296 e->set = kvm_set_ioapic_irq;
297 break;
298 default:
299 return -EINVAL;
300 }
301 e->irqchip.irqchip = ue->u.irqchip.irqchip;
302 break;
303 case KVM_IRQ_ROUTING_MSI:
304 e->set = kvm_set_msi;
305 e->msi.address_lo = ue->u.msi.address_lo;
306 e->msi.address_hi = ue->u.msi.address_hi;
307 e->msi.data = ue->u.msi.data;
308
309 if (kvm_msi_route_invalid(kvm, e))
310 return -EINVAL;
311 break;
312 case KVM_IRQ_ROUTING_HV_SINT:
313 e->set = kvm_hv_set_sint;
314 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
315 e->hv_sint.sint = ue->u.hv_sint.sint;
316 break;
317 default:
318 return -EINVAL;
319 }
320
321 return 0;
322}
323
324bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
325 struct kvm_vcpu **dest_vcpu)
326{
327 int i, r = 0;
328 struct kvm_vcpu *vcpu;
329
330 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
331 return true;
332
333 kvm_for_each_vcpu(i, vcpu, kvm) {
334 if (!kvm_apic_present(vcpu))
335 continue;
336
337 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
338 irq->dest_id, irq->dest_mode))
339 continue;
340
341 if (++r == 2)
342 return false;
343
344 *dest_vcpu = vcpu;
345 }
346
347 return r == 1;
348}
349EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
350
351#define IOAPIC_ROUTING_ENTRY(irq) \
352 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
353 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
354#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
355
356#define PIC_ROUTING_ENTRY(irq) \
357 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
358 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
359#define ROUTING_ENTRY2(irq) \
360 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
361
362static const struct kvm_irq_routing_entry default_routing[] = {
363 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
364 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
365 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
366 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
367 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
368 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
369 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
370 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
371 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
372 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
373 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
374 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
375};
376
377int kvm_setup_default_irq_routing(struct kvm *kvm)
378{
379 return kvm_set_irq_routing(kvm, default_routing,
380 ARRAY_SIZE(default_routing), 0);
381}
382
383static const struct kvm_irq_routing_entry empty_routing[] = {};
384
385int kvm_setup_empty_irq_routing(struct kvm *kvm)
386{
387 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
388}
389
390void kvm_arch_post_irq_routing_update(struct kvm *kvm)
391{
392 if (!irqchip_split(kvm))
393 return;
394 kvm_make_scan_ioapic_request(kvm);
395}
396
397void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
398 ulong *ioapic_handled_vectors)
399{
400 struct kvm *kvm = vcpu->kvm;
401 struct kvm_kernel_irq_routing_entry *entry;
402 struct kvm_irq_routing_table *table;
403 u32 i, nr_ioapic_pins;
404 int idx;
405
406 idx = srcu_read_lock(&kvm->irq_srcu);
407 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
408 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
409 kvm->arch.nr_reserved_ioapic_pins);
410 for (i = 0; i < nr_ioapic_pins; ++i) {
411 hlist_for_each_entry(entry, &table->map[i], link) {
412 struct kvm_lapic_irq irq;
413
414 if (entry->type != KVM_IRQ_ROUTING_MSI)
415 continue;
416
417 kvm_set_msi_irq(vcpu->kvm, entry, &irq);
418
419 if (irq.level && kvm_apic_match_dest(vcpu, NULL, 0,
420 irq.dest_id, irq.dest_mode))
421 __set_bit(irq.vector, ioapic_handled_vectors);
422 }
423 }
424 srcu_read_unlock(&kvm->irq_srcu, idx);
425}
426
427void kvm_arch_irq_routing_update(struct kvm *kvm)
428{
429 kvm_hv_irq_routing_update(kvm);
430}
431
