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18#include <linux/errno.h>
19#include <linux/init.h>
20#include <linux/mm.h>
21#include <linux/proc_fs.h>
22#include <linux/screen_info.h>
23#include <linux/kernel.h>
24#include <linux/percpu.h>
25#include <linux/cpu.h>
26#include <linux/of.h>
27#include <linux/of_fdt.h>
28
29#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
30# include <linux/console.h>
31#endif
32
33#ifdef CONFIG_PROC_FS
34# include <linux/seq_file.h>
35#endif
36
37#include <asm/bootparam.h>
38#include <asm/kasan.h>
39#include <asm/mmu_context.h>
40#include <asm/pgtable.h>
41#include <asm/processor.h>
42#include <asm/timex.h>
43#include <asm/platform.h>
44#include <asm/page.h>
45#include <asm/setup.h>
46#include <asm/param.h>
47#include <asm/smp.h>
48#include <asm/sysmem.h>
49
50#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
51struct screen_info screen_info = {
52 .orig_x = 0,
53 .orig_y = 24,
54 .orig_video_cols = 80,
55 .orig_video_lines = 24,
56 .orig_video_isVGA = 1,
57 .orig_video_points = 16,
58};
59#endif
60
61#ifdef CONFIG_BLK_DEV_INITRD
62extern unsigned long initrd_start;
63extern unsigned long initrd_end;
64int initrd_is_mapped = 0;
65extern int initrd_below_start_ok;
66#endif
67
68#ifdef CONFIG_OF
69void *dtb_start = __dtb_start;
70#endif
71
72extern unsigned long loops_per_jiffy;
73
74
75
76static char __initdata command_line[COMMAND_LINE_SIZE];
77
78#ifdef CONFIG_CMDLINE_BOOL
79static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
80#endif
81
82#ifdef CONFIG_PARSE_BOOTPARAM
83
84
85
86
87
88
89
90
91
92typedef struct tagtable {
93 u32 tag;
94 int (*parse)(const bp_tag_t*);
95} tagtable_t;
96
97#define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
98 __attribute__((used, section(".taglist"))) = { tag, fn }
99
100
101
102static int __init parse_tag_mem(const bp_tag_t *tag)
103{
104 struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
105
106 if (mi->type != MEMORY_TYPE_CONVENTIONAL)
107 return -1;
108
109 return memblock_add(mi->start, mi->end - mi->start);
110}
111
112__tagtable(BP_TAG_MEMORY, parse_tag_mem);
113
114#ifdef CONFIG_BLK_DEV_INITRD
115
116static int __init parse_tag_initrd(const bp_tag_t* tag)
117{
118 struct bp_meminfo *mi = (struct bp_meminfo *)(tag->data);
119
120 initrd_start = (unsigned long)__va(mi->start);
121 initrd_end = (unsigned long)__va(mi->end);
122
123 return 0;
124}
125
126__tagtable(BP_TAG_INITRD, parse_tag_initrd);
127
128#endif
129
130#ifdef CONFIG_OF
131
132static int __init parse_tag_fdt(const bp_tag_t *tag)
133{
134 dtb_start = __va(tag->data[0]);
135 return 0;
136}
137
138__tagtable(BP_TAG_FDT, parse_tag_fdt);
139
140#endif
141
142static int __init parse_tag_cmdline(const bp_tag_t* tag)
143{
144 strlcpy(command_line, (char *)(tag->data), COMMAND_LINE_SIZE);
145 return 0;
146}
147
148__tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
149
150static int __init parse_bootparam(const bp_tag_t* tag)
151{
152 extern tagtable_t __tagtable_begin, __tagtable_end;
153 tagtable_t *t;
154
155
156
157 if (tag->id != BP_TAG_FIRST) {
158 pr_warn("Invalid boot parameters!\n");
159 return 0;
160 }
161
162 tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
163
164
165
166 while (tag != NULL && tag->id != BP_TAG_LAST) {
167 for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
168 if (tag->id == t->tag) {
169 t->parse(tag);
170 break;
171 }
172 }
173 if (t == &__tagtable_end)
174 pr_warn("Ignoring tag 0x%08x\n", tag->id);
175 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
176 }
177
178 return 0;
179}
180#else
181static int __init parse_bootparam(const bp_tag_t *tag)
182{
183 pr_info("Ignoring boot parameters at %p\n", tag);
184 return 0;
185}
186#endif
187
188#ifdef CONFIG_OF
189
190#if !XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY
191unsigned long xtensa_kio_paddr = XCHAL_KIO_DEFAULT_PADDR;
192EXPORT_SYMBOL(xtensa_kio_paddr);
193
194static int __init xtensa_dt_io_area(unsigned long node, const char *uname,
195 int depth, void *data)
196{
197 const __be32 *ranges;
198 int len;
199
200 if (depth > 1)
201 return 0;
202
203 if (!of_flat_dt_is_compatible(node, "simple-bus"))
204 return 0;
205
206 ranges = of_get_flat_dt_prop(node, "ranges", &len);
207 if (!ranges)
208 return 1;
209 if (len == 0)
210 return 1;
211
212 xtensa_kio_paddr = of_read_ulong(ranges+1, 1);
213
214 xtensa_kio_paddr &= 0xf0000000;
215
216 init_kio();
217
218 return 1;
219}
220#else
221static int __init xtensa_dt_io_area(unsigned long node, const char *uname,
222 int depth, void *data)
223{
224 return 1;
225}
226#endif
227
228void __init early_init_devtree(void *params)
229{
230 early_init_dt_scan(params);
231 of_scan_flat_dt(xtensa_dt_io_area, NULL);
232
233 if (!command_line[0])
234 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
235}
236
237#endif
238
239
240
241
242
243void __init init_arch(bp_tag_t *bp_start)
244{
245
246
247 init_mmu();
248
249
250
251 kasan_early_init();
252
253
254
255 if (bp_start)
256 parse_bootparam(bp_start);
257
258#ifdef CONFIG_OF
259 early_init_devtree(dtb_start);
260#endif
261
262#ifdef CONFIG_CMDLINE_BOOL
263 if (!command_line[0])
264 strlcpy(command_line, default_command_line, COMMAND_LINE_SIZE);
265#endif
266
267
268
269 platform_init(bp_start);
270}
271
272
273
274
275
276extern char _end[];
277extern char _stext[];
278extern char _WindowVectors_text_start;
279extern char _WindowVectors_text_end;
280extern char _DebugInterruptVector_text_start;
281extern char _DebugInterruptVector_text_end;
282extern char _KernelExceptionVector_text_start;
283extern char _KernelExceptionVector_text_end;
284extern char _UserExceptionVector_text_start;
285extern char _UserExceptionVector_text_end;
286extern char _DoubleExceptionVector_text_start;
287extern char _DoubleExceptionVector_text_end;
288#if XCHAL_EXCM_LEVEL >= 2
289extern char _Level2InterruptVector_text_start;
290extern char _Level2InterruptVector_text_end;
291#endif
292#if XCHAL_EXCM_LEVEL >= 3
293extern char _Level3InterruptVector_text_start;
294extern char _Level3InterruptVector_text_end;
295#endif
296#if XCHAL_EXCM_LEVEL >= 4
297extern char _Level4InterruptVector_text_start;
298extern char _Level4InterruptVector_text_end;
299#endif
300#if XCHAL_EXCM_LEVEL >= 5
301extern char _Level5InterruptVector_text_start;
302extern char _Level5InterruptVector_text_end;
303#endif
304#if XCHAL_EXCM_LEVEL >= 6
305extern char _Level6InterruptVector_text_start;
306extern char _Level6InterruptVector_text_end;
307#endif
308#ifdef CONFIG_SMP
309extern char _SecondaryResetVector_text_start;
310extern char _SecondaryResetVector_text_end;
311#endif
312
313static inline int __init_memblock mem_reserve(unsigned long start,
314 unsigned long end)
315{
316 return memblock_reserve(start, end - start);
317}
318
319void __init setup_arch(char **cmdline_p)
320{
321 pr_info("config ID: %08x:%08x\n",
322 xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE));
323 if (xtensa_get_sr(SREG_EPC) != XCHAL_HW_CONFIGID0 ||
324 xtensa_get_sr(SREG_EXCSAVE) != XCHAL_HW_CONFIGID1)
325 pr_info("built for config ID: %08x:%08x\n",
326 XCHAL_HW_CONFIGID0, XCHAL_HW_CONFIGID1);
327
328 *cmdline_p = command_line;
329 platform_setup(cmdline_p);
330 strlcpy(boot_command_line, *cmdline_p, COMMAND_LINE_SIZE);
331
332
333
334#ifdef CONFIG_BLK_DEV_INITRD
335 if (initrd_start < initrd_end) {
336 initrd_is_mapped = mem_reserve(__pa(initrd_start),
337 __pa(initrd_end)) == 0;
338 initrd_below_start_ok = 1;
339 } else {
340 initrd_start = 0;
341 }
342#endif
343
344 mem_reserve(__pa(_stext), __pa(_end));
345
346#ifdef CONFIG_VECTORS_OFFSET
347 mem_reserve(__pa(&_WindowVectors_text_start),
348 __pa(&_WindowVectors_text_end));
349
350 mem_reserve(__pa(&_DebugInterruptVector_text_start),
351 __pa(&_DebugInterruptVector_text_end));
352
353 mem_reserve(__pa(&_KernelExceptionVector_text_start),
354 __pa(&_KernelExceptionVector_text_end));
355
356 mem_reserve(__pa(&_UserExceptionVector_text_start),
357 __pa(&_UserExceptionVector_text_end));
358
359 mem_reserve(__pa(&_DoubleExceptionVector_text_start),
360 __pa(&_DoubleExceptionVector_text_end));
361
362#if XCHAL_EXCM_LEVEL >= 2
363 mem_reserve(__pa(&_Level2InterruptVector_text_start),
364 __pa(&_Level2InterruptVector_text_end));
365#endif
366#if XCHAL_EXCM_LEVEL >= 3
367 mem_reserve(__pa(&_Level3InterruptVector_text_start),
368 __pa(&_Level3InterruptVector_text_end));
369#endif
370#if XCHAL_EXCM_LEVEL >= 4
371 mem_reserve(__pa(&_Level4InterruptVector_text_start),
372 __pa(&_Level4InterruptVector_text_end));
373#endif
374#if XCHAL_EXCM_LEVEL >= 5
375 mem_reserve(__pa(&_Level5InterruptVector_text_start),
376 __pa(&_Level5InterruptVector_text_end));
377#endif
378#if XCHAL_EXCM_LEVEL >= 6
379 mem_reserve(__pa(&_Level6InterruptVector_text_start),
380 __pa(&_Level6InterruptVector_text_end));
381#endif
382
383#endif
384
385#ifdef CONFIG_SMP
386 mem_reserve(__pa(&_SecondaryResetVector_text_start),
387 __pa(&_SecondaryResetVector_text_end));
388#endif
389 parse_early_param();
390 bootmem_init();
391 kasan_init();
392 unflatten_and_copy_device_tree();
393
394#ifdef CONFIG_SMP
395 smp_init_cpus();
396#endif
397
398 paging_init();
399 zones_init();
400
401#ifdef CONFIG_VT
402# if defined(CONFIG_VGA_CONSOLE)
403 conswitchp = &vga_con;
404# elif defined(CONFIG_DUMMY_CONSOLE)
405 conswitchp = &dummy_con;
406# endif
407#endif
408}
409
410static DEFINE_PER_CPU(struct cpu, cpu_data);
411
412static int __init topology_init(void)
413{
414 int i;
415
416 for_each_possible_cpu(i) {
417 struct cpu *cpu = &per_cpu(cpu_data, i);
418 cpu->hotpluggable = !!i;
419 register_cpu(cpu, i);
420 }
421
422 return 0;
423}
424subsys_initcall(topology_init);
425
426void cpu_reset(void)
427{
428#if XCHAL_HAVE_PTP_MMU && IS_ENABLED(CONFIG_MMU)
429 local_irq_disable();
430
431
432
433
434
435
436
437
438 local_flush_tlb_all();
439 invalidate_page_directory();
440#if XCHAL_HAVE_SPANNING_WAY
441
442 {
443 unsigned long vaddr = (unsigned long)cpu_reset;
444 unsigned long paddr = __pa(vaddr);
445 unsigned long tmpaddr = vaddr + SZ_512M;
446 unsigned long tmp0, tmp1, tmp2, tmp3;
447
448
449
450
451
452
453
454
455 while (((tmpaddr ^ paddr) & -SZ_512M) == 0)
456 tmpaddr += SZ_512M;
457
458
459 if (itlb_probe(tmpaddr) & BIT(ITLB_HIT_BIT))
460 invalidate_itlb_entry(itlb_probe(tmpaddr));
461 if (itlb_probe(tmpaddr + PAGE_SIZE) & BIT(ITLB_HIT_BIT))
462 invalidate_itlb_entry(itlb_probe(tmpaddr + PAGE_SIZE));
463
464
465
466
467
468 write_itlb_entry(__pte((paddr & PAGE_MASK) |
469 _PAGE_HW_VALID |
470 _PAGE_HW_EXEC |
471 _PAGE_CA_BYPASS),
472 tmpaddr & PAGE_MASK);
473 write_itlb_entry(__pte(((paddr & PAGE_MASK) + PAGE_SIZE) |
474 _PAGE_HW_VALID |
475 _PAGE_HW_EXEC |
476 _PAGE_CA_BYPASS),
477 (tmpaddr & PAGE_MASK) + PAGE_SIZE);
478
479
480 __asm__ __volatile__ ("movi %0, 1f\n\t"
481 "movi %3, 2f\n\t"
482 "add %0, %0, %4\n\t"
483 "add %3, %3, %5\n\t"
484 "jx %0\n"
485
486
487
488
489 "1:\n\t"
490
491 "movi %0, 0\n\t"
492 "wsr %0, itlbcfg\n\t"
493 "wsr %0, dtlbcfg\n\t"
494
495 "movi %0, 4\n\t"
496 "movi %1, 5\n"
497 "1:\n\t"
498 "iitlb %1\n\t"
499 "idtlb %1\n\t"
500 "add %1, %1, %6\n\t"
501 "addi %0, %0, -1\n\t"
502 "bnez %0, 1b\n\t"
503
504 "movi %0, 7\n\t"
505 "addi %1, %9, 3\n\t"
506 "addi %2, %9, 6\n"
507 "1:\n\t"
508 "witlb %1, %2\n\t"
509 "wdtlb %1, %2\n\t"
510 "add %1, %1, %7\n\t"
511 "add %2, %2, %7\n\t"
512 "addi %0, %0, -1\n\t"
513 "bnez %0, 1b\n\t"
514 "isync\n\t"
515
516 "jx %3\n"
517 "2:\n\t"
518
519 "witlb %1, %2\n\t"
520 "wdtlb %1, %2\n\t"
521
522 "sub %0, %9, %7\n\t"
523 "iitlb %0\n\t"
524 "add %0, %0, %8\n\t"
525 "iitlb %0"
526 : "=&a"(tmp0), "=&a"(tmp1), "=&a"(tmp2),
527 "=&a"(tmp3)
528 : "a"(tmpaddr - vaddr),
529 "a"(paddr - vaddr),
530 "a"(SZ_128M), "a"(SZ_512M),
531 "a"(PAGE_SIZE),
532 "a"((tmpaddr + SZ_512M) & PAGE_MASK)
533 : "memory");
534 }
535#endif
536#endif
537 __asm__ __volatile__ ("movi a2, 0\n\t"
538 "wsr a2, icountlevel\n\t"
539 "movi a2, 0\n\t"
540 "wsr a2, icount\n\t"
541#if XCHAL_NUM_IBREAK > 0
542 "wsr a2, ibreakenable\n\t"
543#endif
544#if XCHAL_HAVE_LOOPS
545 "wsr a2, lcount\n\t"
546#endif
547 "movi a2, 0x1f\n\t"
548 "wsr a2, ps\n\t"
549 "isync\n\t"
550 "jx %0\n\t"
551 :
552 : "a" (XCHAL_RESET_VECTOR_VADDR)
553 : "a2");
554 for (;;)
555 ;
556}
557
558void machine_restart(char * cmd)
559{
560 platform_restart();
561}
562
563void machine_halt(void)
564{
565 platform_halt();
566 while (1);
567}
568
569void machine_power_off(void)
570{
571 platform_power_off();
572 while (1);
573}
574#ifdef CONFIG_PROC_FS
575
576
577
578
579
580static int
581c_show(struct seq_file *f, void *slot)
582{
583
584 seq_printf(f, "CPU count\t: %u\n"
585 "CPU list\t: %*pbl\n"
586 "vendor_id\t: Tensilica\n"
587 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
588 "core ID\t\t: " XCHAL_CORE_ID "\n"
589 "build ID\t: 0x%x\n"
590 "config ID\t: %08x:%08x\n"
591 "byte order\t: %s\n"
592 "cpu MHz\t\t: %lu.%02lu\n"
593 "bogomips\t: %lu.%02lu\n",
594 num_online_cpus(),
595 cpumask_pr_args(cpu_online_mask),
596 XCHAL_BUILD_UNIQUE_ID,
597 xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE),
598 XCHAL_HAVE_BE ? "big" : "little",
599 ccount_freq/1000000,
600 (ccount_freq/10000) % 100,
601 loops_per_jiffy/(500000/HZ),
602 (loops_per_jiffy/(5000/HZ)) % 100);
603 seq_puts(f, "flags\t\t: "
604#if XCHAL_HAVE_NMI
605 "nmi "
606#endif
607#if XCHAL_HAVE_DEBUG
608 "debug "
609# if XCHAL_HAVE_OCD
610 "ocd "
611# endif
612#endif
613#if XCHAL_HAVE_DENSITY
614 "density "
615#endif
616#if XCHAL_HAVE_BOOLEANS
617 "boolean "
618#endif
619#if XCHAL_HAVE_LOOPS
620 "loop "
621#endif
622#if XCHAL_HAVE_NSA
623 "nsa "
624#endif
625#if XCHAL_HAVE_MINMAX
626 "minmax "
627#endif
628#if XCHAL_HAVE_SEXT
629 "sext "
630#endif
631#if XCHAL_HAVE_CLAMPS
632 "clamps "
633#endif
634#if XCHAL_HAVE_MAC16
635 "mac16 "
636#endif
637#if XCHAL_HAVE_MUL16
638 "mul16 "
639#endif
640#if XCHAL_HAVE_MUL32
641 "mul32 "
642#endif
643#if XCHAL_HAVE_MUL32_HIGH
644 "mul32h "
645#endif
646#if XCHAL_HAVE_FP
647 "fpu "
648#endif
649#if XCHAL_HAVE_S32C1I
650 "s32c1i "
651#endif
652#if XCHAL_HAVE_EXCLUSIVE
653 "exclusive "
654#endif
655 "\n");
656
657
658 seq_printf(f,"physical aregs\t: %d\n"
659 "misc regs\t: %d\n"
660 "ibreak\t\t: %d\n"
661 "dbreak\t\t: %d\n",
662 XCHAL_NUM_AREGS,
663 XCHAL_NUM_MISC_REGS,
664 XCHAL_NUM_IBREAK,
665 XCHAL_NUM_DBREAK);
666
667
668
669 seq_printf(f,"num ints\t: %d\n"
670 "ext ints\t: %d\n"
671 "int levels\t: %d\n"
672 "timers\t\t: %d\n"
673 "debug level\t: %d\n",
674 XCHAL_NUM_INTERRUPTS,
675 XCHAL_NUM_EXTINTERRUPTS,
676 XCHAL_NUM_INTLEVELS,
677 XCHAL_NUM_TIMERS,
678 XCHAL_DEBUGLEVEL);
679
680
681 seq_printf(f,"icache line size: %d\n"
682 "icache ways\t: %d\n"
683 "icache size\t: %d\n"
684 "icache flags\t: "
685#if XCHAL_ICACHE_LINE_LOCKABLE
686 "lock "
687#endif
688 "\n"
689 "dcache line size: %d\n"
690 "dcache ways\t: %d\n"
691 "dcache size\t: %d\n"
692 "dcache flags\t: "
693#if XCHAL_DCACHE_IS_WRITEBACK
694 "writeback "
695#endif
696#if XCHAL_DCACHE_LINE_LOCKABLE
697 "lock "
698#endif
699 "\n",
700 XCHAL_ICACHE_LINESIZE,
701 XCHAL_ICACHE_WAYS,
702 XCHAL_ICACHE_SIZE,
703 XCHAL_DCACHE_LINESIZE,
704 XCHAL_DCACHE_WAYS,
705 XCHAL_DCACHE_SIZE);
706
707 return 0;
708}
709
710
711
712
713static void *
714c_start(struct seq_file *f, loff_t *pos)
715{
716 return (*pos == 0) ? (void *)1 : NULL;
717}
718
719static void *
720c_next(struct seq_file *f, void *v, loff_t *pos)
721{
722 return NULL;
723}
724
725static void
726c_stop(struct seq_file *f, void *v)
727{
728}
729
730const struct seq_operations cpuinfo_op =
731{
732 .start = c_start,
733 .next = c_next,
734 .stop = c_stop,
735 .show = c_show,
736};
737
738#endif
739
