LXR linux/drivers/ata/pata

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * pata_opti.c  - ATI PATA for new ATA layer
   4 *                        (C) 2005 Red Hat Inc
   5 *
   6 * Based on
   7 *  linux/drivers/ide/pci/opti621.c             Version 0.7     Sept 10, 2002
   8 *
   9 *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
  10 *
  11 * Authors:
  12 * Jaromir Koutek <miri@punknet.cz>,
  13 * Jan Harkes <jaharkes@cwi.nl>,
  14 * Mark Lord <mlord@pobox.com>
  15 * Some parts of code are from ali14xx.c and from rz1000.c.
  16 *
  17 * Also consulted the FreeBSD prototype driver by Kevin Day to try
  18 * and resolve some confusions. Further documentation can be found in
  19 * Ralf Brown's interrupt list
  20 *
  21 * If you have other variants of the Opti range (Viper/Vendetta) please
  22 * try this driver with those PCI idents and report back. For the later
  23 * chips see the pata_optidma driver
  24 *
  25 */
  26
  27#include <linux/kernel.h>
  28#include <linux/module.h>
  29#include <linux/pci.h>
  30#include <linux/blkdev.h>
  31#include <linux/delay.h>
  32#include <scsi/scsi_host.h>
  33#include <linux/libata.h>
  34
  35#define DRV_NAME "pata_opti"
  36#define DRV_VERSION "0.2.9"
  37
  38enum {
  39        READ_REG        = 0,    /* index of Read cycle timing register */
  40        WRITE_REG       = 1,    /* index of Write cycle timing register */
  41        CNTRL_REG       = 3,    /* index of Control register */
  42        STRAP_REG       = 5,    /* index of Strap register */
  43        MISC_REG        = 6     /* index of Miscellaneous register */
  44};
  45
  46/**
  47 *      opti_pre_reset          -       probe begin
  48 *      @link: ATA link
  49 *      @deadline: deadline jiffies for the operation
  50 *
  51 *      Set up cable type and use generic probe init
  52 */
  53
  54static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
  55{
  56        struct ata_port *ap = link->ap;
  57        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  58        static const struct pci_bits opti_enable_bits[] = {
  59                { 0x45, 1, 0x80, 0x00 },
  60                { 0x40, 1, 0x08, 0x00 }
  61        };
  62
  63        if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
  64                return -ENOENT;
  65
  66        return ata_sff_prereset(link, deadline);
  67}
  68
  69/**
  70 *      opti_write_reg          -       control register setup
  71 *      @ap: ATA port
  72 *      @value: value
  73 *      @reg: control register number
  74 *
  75 *      The Opti uses magic 'trapdoor' register accesses to do configuration
  76 *      rather than using PCI space as other controllers do. The double inw
  77 *      on the error register activates configuration mode. We can then write
  78 *      the control register
  79 */
  80
  81static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
  82{
  83        void __iomem *regio = ap->ioaddr.cmd_addr;
  84
  85        /* These 3 unlock the control register access */
  86        ioread16(regio + 1);
  87        ioread16(regio + 1);
  88        iowrite8(3, regio + 2);
  89
  90        /* Do the I/O */
  91        iowrite8(val, regio + reg);
  92
  93        /* Relock */
  94        iowrite8(0x83, regio + 2);
  95}
  96
  97/**
  98 *      opti_set_piomode        -       set initial PIO mode data
  99 *      @ap: ATA interface
 100 *      @adev: ATA device
 101 *
 102 *      Called to do the PIO mode setup. Timing numbers are taken from
 103 *      the FreeBSD driver then pre computed to keep the code clean. There
 104 *      are two tables depending on the hardware clock speed.
 105 */
 106
 107static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
 108{
 109        struct ata_device *pair = ata_dev_pair(adev);
 110        int clock;
 111        int pio = adev->pio_mode - XFER_PIO_0;
 112        void __iomem *regio = ap->ioaddr.cmd_addr;
 113        u8 addr;
 114
 115        /* Address table precomputed with prefetch off and a DCLK of 2 */
 116        static const u8 addr_timing[2][5] = {
 117                { 0x30, 0x20, 0x20, 0x10, 0x10 },
 118                { 0x20, 0x20, 0x10, 0x10, 0x10 }
 119        };
 120        static const u8 data_rec_timing[2][5] = {
 121                { 0x6B, 0x56, 0x42, 0x32, 0x31 },
 122                { 0x58, 0x44, 0x32, 0x22, 0x21 }
 123        };
 124
 125        iowrite8(0xff, regio + 5);
 126        clock = ioread16(regio + 5) & 1;
 127
 128        /*
 129         *      As with many controllers the address setup time is shared
 130         *      and must suit both devices if present.
 131         */
 132
 133        addr = addr_timing[clock][pio];
 134        if (pair) {
 135                /* Hardware constraint */
 136                u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
 137                if (pair_addr > addr)
 138                        addr = pair_addr;
 139        }
 140
 141        /* Commence primary programming sequence */
 142        opti_write_reg(ap, adev->devno, MISC_REG);
 143        opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
 144        opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
 145        opti_write_reg(ap, addr, MISC_REG);
 146
 147        /* Programming sequence complete, override strapping */
 148        opti_write_reg(ap, 0x85, CNTRL_REG);
 149}
 150
 151static struct scsi_host_template opti_sht = {
 152        ATA_PIO_SHT(DRV_NAME),
 153};
 154
 155static struct ata_port_operations opti_port_ops = {
 156        .inherits       = &ata_sff_port_ops,
 157        .cable_detect   = ata_cable_40wire,
 158        .set_piomode    = opti_set_piomode,
 159        .prereset       = opti_pre_reset,
 160};
 161
 162static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 163{
 164        static const struct ata_port_info info = {
 165                .flags = ATA_FLAG_SLAVE_POSS,
 166                .pio_mask = ATA_PIO4,
 167                .port_ops = &opti_port_ops
 168        };
 169        const struct ata_port_info *ppi[] = { &info, NULL };
 170
 171        ata_print_version_once(&dev->dev, DRV_VERSION);
 172
 173        return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
 174}
 175
 176static const struct pci_device_id opti[] = {
 177        { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
 178        { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
 179
 180        { },
 181};
 182
 183static struct pci_driver opti_pci_driver = {
 184        .name           = DRV_NAME,
 185        .id_table       = opti,
 186        .probe          = opti_init_one,
 187        .remove         = ata_pci_remove_one,
 188#ifdef CONFIG_PM_SLEEP
 189        .suspend        = ata_pci_device_suspend,
 190        .resume         = ata_pci_device_resume,
 191#endif
 192};
 193
 194module_pci_driver(opti_pci_driver);
 195
 196MODULE_AUTHOR("Alan Cox");
 197MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
 198MODULE_LICENSE("GPL");
 199MODULE_DEVICE_TABLE(pci, opti);
 200MODULE_VERSION(DRV_VERSION);
 201