linux/drivers/atm/firestream.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2
   3/* drivers/atm/firestream.c - FireStream 155 (MB86697) and
   4 *                            FireStream  50 (MB86695) device driver 
   5 */
   6 
   7/* Written & (C) 2000 by R.E.Wolff@BitWizard.nl 
   8 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA 
   9 * and ambassador.c Copyright (C) 1995-1999  Madge Networks Ltd 
  10 */
  11
  12/*
  13*/
  14
  15
  16#include <linux/module.h>
  17#include <linux/sched.h>
  18#include <linux/kernel.h>
  19#include <linux/mm.h>
  20#include <linux/pci.h>
  21#include <linux/poison.h>
  22#include <linux/errno.h>
  23#include <linux/atm.h>
  24#include <linux/atmdev.h>
  25#include <linux/sonet.h>
  26#include <linux/skbuff.h>
  27#include <linux/netdevice.h>
  28#include <linux/delay.h>
  29#include <linux/ioport.h> /* for request_region */
  30#include <linux/uio.h>
  31#include <linux/init.h>
  32#include <linux/interrupt.h>
  33#include <linux/capability.h>
  34#include <linux/bitops.h>
  35#include <linux/slab.h>
  36#include <asm/byteorder.h>
  37#include <asm/string.h>
  38#include <asm/io.h>
  39#include <linux/atomic.h>
  40#include <linux/uaccess.h>
  41#include <linux/wait.h>
  42
  43#include "firestream.h"
  44
  45static int loopback = 0;
  46static int num=0x5a;
  47
  48/* According to measurements (but they look suspicious to me!) done in
  49 * '97, 37% of the packets are one cell in size. So it pays to have
  50 * buffers allocated at that size. A large jump in percentage of
  51 * packets occurs at packets around 536 bytes in length. So it also
  52 * pays to have those pre-allocated. Unfortunately, we can't fully
  53 * take advantage of this as the majority of the packets is likely to
  54 * be TCP/IP (As where obviously the measurement comes from) There the
  55 * link would be opened with say a 1500 byte MTU, and we can't handle
  56 * smaller buffers more efficiently than the larger ones. -- REW
  57 */
  58
  59/* Due to the way Linux memory management works, specifying "576" as
  60 * an allocation size here isn't going to help. They are allocated
  61 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
  62 * large), it doesn't pay to allocate the smallest size (64) -- REW */
  63
  64/* This is all guesswork. Hard numbers to back this up or disprove this, 
  65 * are appreciated. -- REW */
  66
  67/* The last entry should be about 64k. However, the "buffer size" is
  68 * passed to the chip in a 16 bit field. I don't know how "65536"
  69 * would be interpreted. -- REW */
  70
  71#define NP FS_NR_FREE_POOLS
  72static int rx_buf_sizes[NP]  = {128,  256,  512, 1024, 2048, 4096, 16384, 65520};
  73/* log2:                 7     8     9    10    11    12    14     16 */
  74
  75#if 0
  76static int rx_pool_sizes[NP] = {1024, 1024, 512, 256,  128,  64,   32,    32};
  77#else
  78/* debug */
  79static int rx_pool_sizes[NP] = {128,  128,  128, 64,   64,   64,   32,    32};
  80#endif
  81/* log2:                 10    10    9    8     7     6     5      5  */
  82/* sumlog2:              17    18    18   18    18    18    19     21 */
  83/* mem allocated:        128k  256k  256k 256k  256k  256k  512k   2M */
  84/* tot mem: almost 4M */
  85
  86/* NP is shorter, so that it fits on a single line. */
  87#undef NP
  88
  89
  90/* Small hardware gotcha:
  91
  92   The FS50 CAM (VP/VC match registers) always take the lowest channel
  93   number that matches. This is not a problem.
  94
  95   However, they also ignore whether the channel is enabled or
  96   not. This means that if you allocate channel 0 to 1.2 and then
  97   channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
  98   match channel for channel 0 will "steal" the traffic from channel
  99   1, even if you correctly disable channel 0.
 100
 101   Workaround: 
 102
 103   - When disabling channels, write an invalid VP/VC value to the
 104   match register. (We use 0xffffffff, which in the worst case 
 105   matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
 106   anything as some "when not in use, program to 0" bits are now
 107   programmed to 1...)
 108
 109   - Don't initialize the match registers to 0, as 0.0 is a valid
 110   channel.
 111*/
 112
 113
 114/* Optimization hints and tips.
 115
 116   The FireStream chips are very capable of reducing the amount of
 117   "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
 118   action. You could try to minimize this a bit. 
 119
 120   Besides that, the userspace->kernel copy and the PCI bus are the
 121   performance limiting issues for this driver.
 122
 123   You could queue up a bunch of outgoing packets without telling the
 124   FireStream. I'm not sure that's going to win you much though. The
 125   Linux layer won't tell us in advance when it's not going to give us
 126   any more packets in a while. So this is tricky to implement right without
 127   introducing extra delays. 
 128  
 129   -- REW
 130 */
 131
 132
 133
 134
 135/* The strings that define what the RX queue entry is all about. */
 136/* Fujitsu: Please tell me which ones can have a pointer to a 
 137   freepool descriptor! */
 138static char *res_strings[] = {
 139        "RX OK: streaming not EOP", 
 140        "RX OK: streaming EOP", 
 141        "RX OK: Single buffer packet", 
 142        "RX OK: packet mode", 
 143        "RX OK: F4 OAM (end to end)", 
 144        "RX OK: F4 OAM (Segment)", 
 145        "RX OK: F5 OAM (end to end)", 
 146        "RX OK: F5 OAM (Segment)", 
 147        "RX OK: RM cell", 
 148        "RX OK: TRANSP cell", 
 149        "RX OK: TRANSPC cell", 
 150        "Unmatched cell", 
 151        "reserved 12", 
 152        "reserved 13", 
 153        "reserved 14", 
 154        "Unrecognized cell", 
 155        "reserved 16", 
 156        "reassembly abort: AAL5 abort", 
 157        "packet purged", 
 158        "packet ageing timeout", 
 159        "channel ageing timeout", 
 160        "calculated length error", 
 161        "programmed length limit error", 
 162        "aal5 crc32 error", 
 163        "oam transp or transpc crc10 error", 
 164        "reserved 25", 
 165        "reserved 26", 
 166        "reserved 27", 
 167        "reserved 28", 
 168        "reserved 29", 
 169        "reserved 30", /* FIXME: The strings between 30-40 might be wrong. */
 170        "reassembly abort: no buffers", 
 171        "receive buffer overflow", 
 172        "change in GFC", 
 173        "receive buffer full", 
 174        "low priority discard - no receive descriptor", 
 175        "low priority discard - missing end of packet", 
 176        "reserved 37",
 177        "reserved 38",
 178        "reserved 39",
 179        "reserved 40",
 180        "reserved 41", 
 181        "reserved 42", 
 182        "reserved 43", 
 183        "reserved 44", 
 184        "reserved 45", 
 185        "reserved 46", 
 186        "reserved 47", 
 187        "reserved 48", 
 188        "reserved 49", 
 189        "reserved 50", 
 190        "reserved 51", 
 191        "reserved 52", 
 192        "reserved 53", 
 193        "reserved 54", 
 194        "reserved 55", 
 195        "reserved 56", 
 196        "reserved 57", 
 197        "reserved 58", 
 198        "reserved 59", 
 199        "reserved 60", 
 200        "reserved 61", 
 201        "reserved 62", 
 202        "reserved 63", 
 203};  
 204
 205static char *irq_bitname[] = {
 206        "LPCO",
 207        "DPCO",
 208        "RBRQ0_W",
 209        "RBRQ1_W",
 210        "RBRQ2_W",
 211        "RBRQ3_W",
 212        "RBRQ0_NF",
 213        "RBRQ1_NF",
 214        "RBRQ2_NF",
 215        "RBRQ3_NF",
 216        "BFP_SC",
 217        "INIT",
 218        "INIT_ERR",
 219        "USCEO",
 220        "UPEC0",
 221        "VPFCO",
 222        "CRCCO",
 223        "HECO",
 224        "TBRQ_W",
 225        "TBRQ_NF",
 226        "CTPQ_E",
 227        "GFC_C0",
 228        "PCI_FTL",
 229        "CSQ_W",
 230        "CSQ_NF",
 231        "EXT_INT",
 232        "RXDMA_S"
 233};
 234
 235
 236#define PHY_EOF -1
 237#define PHY_CLEARALL -2
 238
 239struct reginit_item {
 240        int reg, val;
 241};
 242
 243
 244static struct reginit_item PHY_NTC_INIT[] = {
 245        { PHY_CLEARALL, 0x40 }, 
 246        { 0x12,  0x0001 },
 247        { 0x13,  0x7605 },
 248        { 0x1A,  0x0001 },
 249        { 0x1B,  0x0005 },
 250        { 0x38,  0x0003 },
 251        { 0x39,  0x0006 },   /* changed here to make loopback */
 252        { 0x01,  0x5262 },
 253        { 0x15,  0x0213 },
 254        { 0x00,  0x0003 },
 255        { PHY_EOF, 0},    /* -1 signals end of list */
 256};
 257
 258
 259/* Safetyfeature: If the card interrupts more than this number of times
 260   in a jiffy (1/100th of a second) then we just disable the interrupt and
 261   print a message. This prevents the system from hanging. 
 262
 263   150000 packets per second is close to the limit a PC is going to have
 264   anyway. We therefore have to disable this for production. -- REW */
 265#undef IRQ_RATE_LIMIT // 100
 266
 267/* Interrupts work now. Unlike serial cards, ATM cards don't work all
 268   that great without interrupts. -- REW */
 269#undef FS_POLL_FREQ // 100
 270
 271/* 
 272   This driver can spew a whole lot of debugging output at you. If you
 273   need maximum performance, you should disable the DEBUG define. To
 274   aid in debugging in the field, I'm leaving the compile-time debug
 275   features enabled, and disable them "runtime". That allows me to
 276   instruct people with problems to enable debugging without requiring
 277   them to recompile... -- REW
 278*/
 279#define DEBUG
 280
 281#ifdef DEBUG
 282#define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
 283#else
 284#define fs_dprintk(f, str...) /* nothing */
 285#endif
 286
 287
 288static int fs_keystream = 0;
 289
 290#ifdef DEBUG
 291/* I didn't forget to set this to zero before shipping. Hit me with a stick 
 292   if you get this with the debug default not set to zero again. -- REW */
 293static int fs_debug = 0;
 294#else
 295#define fs_debug 0
 296#endif
 297
 298#ifdef MODULE
 299#ifdef DEBUG 
 300module_param(fs_debug, int, 0644);
 301#endif
 302module_param(loopback, int, 0);
 303module_param(num, int, 0);
 304module_param(fs_keystream, int, 0);
 305/* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
 306#endif
 307
 308
 309#define FS_DEBUG_FLOW    0x00000001
 310#define FS_DEBUG_OPEN    0x00000002
 311#define FS_DEBUG_QUEUE   0x00000004
 312#define FS_DEBUG_IRQ     0x00000008
 313#define FS_DEBUG_INIT    0x00000010
 314#define FS_DEBUG_SEND    0x00000020
 315#define FS_DEBUG_PHY     0x00000040
 316#define FS_DEBUG_CLEANUP 0x00000080
 317#define FS_DEBUG_QOS     0x00000100
 318#define FS_DEBUG_TXQ     0x00000200
 319#define FS_DEBUG_ALLOC   0x00000400
 320#define FS_DEBUG_TXMEM   0x00000800
 321#define FS_DEBUG_QSIZE   0x00001000
 322
 323
 324#define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
 325#define func_exit()  fs_dprintk(FS_DEBUG_FLOW, "fs: exit  %s\n", __func__)
 326
 327
 328static struct fs_dev *fs_boards = NULL;
 329
 330#ifdef DEBUG
 331
 332static void my_hd (void *addr, int len)
 333{
 334        int j, ch;
 335        unsigned char *ptr = addr;
 336
 337        while (len > 0) {
 338                printk ("%p ", ptr);
 339                for (j=0;j < ((len < 16)?len:16);j++) {
 340                        printk ("%02x %s", ptr[j], (j==7)?" ":"");
 341                }
 342                for (  ;j < 16;j++) {
 343                        printk ("   %s", (j==7)?" ":"");
 344                }
 345                for (j=0;j < ((len < 16)?len:16);j++) {
 346                        ch = ptr[j];
 347                        printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
 348                }
 349                printk ("\n");
 350                ptr += 16;
 351                len -= 16;
 352        }
 353}
 354#else /* DEBUG */
 355static void my_hd (void *addr, int len){}
 356#endif /* DEBUG */
 357
 358/********** free an skb (as per ATM device driver documentation) **********/
 359
 360/* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
 361 * I copied it over from the ambassador driver. -- REW */
 362
 363static inline void fs_kfree_skb (struct sk_buff * skb) 
 364{
 365        if (ATM_SKB(skb)->vcc->pop)
 366                ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
 367        else
 368                dev_kfree_skb_any (skb);
 369}
 370
 371
 372
 373
 374/* It seems the ATM forum recommends this horribly complicated 16bit
 375 * floating point format. Turns out the Ambassador uses the exact same
 376 * encoding. I just copied it over. If Mitch agrees, I'll move it over
 377 * to the atm_misc file or something like that. (and remove it from 
 378 * here and the ambassador driver) -- REW
 379 */
 380
 381/* The good thing about this format is that it is monotonic. So, 
 382   a conversion routine need not be very complicated. To be able to
 383   round "nearest" we need to take along a few extra bits. Lets
 384   put these after 16 bits, so that we can just return the top 16
 385   bits of the 32bit number as the result:
 386
 387   int mr (unsigned int rate, int r) 
 388     {
 389     int e = 16+9;
 390     static int round[4]={0, 0, 0xffff, 0x8000};
 391     if (!rate) return 0;
 392     while (rate & 0xfc000000) {
 393       rate >>= 1;
 394       e++;
 395     }
 396     while (! (rate & 0xfe000000)) {
 397       rate <<= 1;
 398       e--;
 399     }
 400
 401// Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
 402     rate &= ~0x02000000;
 403// Next add in the exponent
 404     rate |= e << (16+9);
 405// And perform the rounding:
 406     return (rate + round[r]) >> 16;
 407   }
 408
 409   14 lines-of-code. Compare that with the 120 that the Ambassador
 410   guys needed. (would be 8 lines shorter if I'd try to really reduce
 411   the number of lines:
 412
 413   int mr (unsigned int rate, int r) 
 414   {
 415     int e = 16+9;
 416     static int round[4]={0, 0, 0xffff, 0x8000};
 417     if (!rate) return 0;
 418     for (;  rate & 0xfc000000 ;rate >>= 1, e++);
 419     for (;!(rate & 0xfe000000);rate <<= 1, e--);
 420     return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
 421   }
 422
 423   Exercise for the reader: Remove one more line-of-code, without
 424   cheating. (Just joining two lines is cheating). (I know it's
 425   possible, don't think you've beat me if you found it... If you
 426   manage to lose two lines or more, keep me updated! ;-)
 427
 428   -- REW */
 429
 430
 431#define ROUND_UP      1
 432#define ROUND_DOWN    2
 433#define ROUND_NEAREST 3
 434/********** make rate (not quite as much fun as Horizon) **********/
 435
 436static int make_rate(unsigned int rate, int r,
 437                      u16 *bits, unsigned int *actual)
 438{
 439        unsigned char exp = -1; /* hush gcc */
 440        unsigned int man = -1;  /* hush gcc */
 441  
 442        fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
 443  
 444        /* rates in cells per second, ITU format (nasty 16-bit floating-point)
 445           given 5-bit e and 9-bit m:
 446           rate = EITHER (1+m/2^9)*2^e    OR 0
 447           bits = EITHER 1<<14 | e<<9 | m OR 0
 448           (bit 15 is "reserved", bit 14 "non-zero")
 449           smallest rate is 0 (special representation)
 450           largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
 451           smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
 452           simple algorithm:
 453           find position of top bit, this gives e
 454           remove top bit and shift (rounding if feeling clever) by 9-e
 455        */
 456        /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
 457           representable. // This should move into the ambassador driver
 458           when properly merged. -- REW */
 459  
 460        if (rate > 0xffc00000U) {
 461                /* larger than largest representable rate */
 462    
 463                if (r == ROUND_UP) {
 464                        return -EINVAL;
 465                } else {
 466                        exp = 31;
 467                        man = 511;
 468                }
 469    
 470        } else if (rate) {
 471                /* representable rate */
 472    
 473                exp = 31;
 474                man = rate;
 475    
 476                /* invariant: rate = man*2^(exp-31) */
 477                while (!(man & (1<<31))) {
 478                        exp = exp - 1;
 479                        man = man<<1;
 480                }
 481    
 482                /* man has top bit set
 483                   rate = (2^31+(man-2^31))*2^(exp-31)
 484                   rate = (1+(man-2^31)/2^31)*2^exp 
 485                */
 486                man = man<<1;
 487                man &= 0xffffffffU; /* a nop on 32-bit systems */
 488                /* rate = (1+man/2^32)*2^exp
 489    
 490                   exp is in the range 0 to 31, man is in the range 0 to 2^32-1
 491                   time to lose significance... we want m in the range 0 to 2^9-1
 492                   rounding presents a minor problem... we first decide which way
 493                   we are rounding (based on given rounding direction and possibly
 494                   the bits of the mantissa that are to be discarded).
 495                */
 496
 497                switch (r) {
 498                case ROUND_DOWN: {
 499                        /* just truncate */
 500                        man = man>>(32-9);
 501                        break;
 502                }
 503                case ROUND_UP: {
 504                        /* check all bits that we are discarding */
 505                        if (man & (~0U>>9)) {
 506                                man = (man>>(32-9)) + 1;
 507                                if (man == (1<<9)) {
 508                                        /* no need to check for round up outside of range */
 509                                        man = 0;
 510                                        exp += 1;
 511                                }
 512                        } else {
 513                                man = (man>>(32-9));
 514                        }
 515                        break;
 516                }
 517                case ROUND_NEAREST: {
 518                        /* check msb that we are discarding */
 519                        if (man & (1<<(32-9-1))) {
 520                                man = (man>>(32-9)) + 1;
 521                                if (man == (1<<9)) {
 522                                        /* no need to check for round up outside of range */
 523                                        man = 0;
 524                                        exp += 1;
 525                                }
 526                        } else {
 527                                man = (man>>(32-9));
 528                        }
 529                        break;
 530                }
 531                }
 532    
 533        } else {
 534                /* zero rate - not representable */
 535    
 536                if (r == ROUND_DOWN) {
 537                        return -EINVAL;
 538                } else {
 539                        exp = 0;
 540                        man = 0;
 541                }
 542        }
 543  
 544        fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
 545  
 546        if (bits)
 547                *bits = /* (1<<14) | */ (exp<<9) | man;
 548  
 549        if (actual)
 550                *actual = (exp >= 9)
 551                        ? (1 << exp) + (man << (exp-9))
 552                        : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
 553  
 554        return 0;
 555}
 556
 557
 558
 559
 560/* FireStream access routines */
 561/* For DEEP-DOWN debugging these can be rigged to intercept accesses to
 562   certain registers or to just log all accesses. */
 563
 564static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
 565{
 566        writel (val, dev->base + offset);
 567}
 568
 569
 570static inline u32  read_fs (struct fs_dev *dev, int offset)
 571{
 572        return readl (dev->base + offset);
 573}
 574
 575
 576
 577static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
 578{
 579        return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
 580}
 581
 582
 583static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
 584{
 585        u32 wp;
 586        struct FS_QENTRY *cqe;
 587
 588        /* XXX Sanity check: the write pointer can be checked to be 
 589           still the same as the value passed as qe... -- REW */
 590        /*  udelay (5); */
 591        while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
 592                fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n", 
 593                            q->offset);
 594                schedule ();
 595        }
 596
 597        wp &= ~0xf;
 598        cqe = bus_to_virt (wp);
 599        if (qe != cqe) {
 600                fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
 601        }
 602
 603        write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
 604
 605        {
 606                static int c;
 607                if (!(c++ % 100))
 608                        {
 609                                int rp, wp;
 610                                rp =  read_fs (dev, Q_RP(q->offset));
 611                                wp =  read_fs (dev, Q_WP(q->offset));
 612                                fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n", 
 613                                            q->offset, rp, wp, wp-rp);
 614                        }
 615        }
 616}
 617
 618#ifdef DEBUG_EXTRA
 619static struct FS_QENTRY pq[60];
 620static int qp;
 621
 622static struct FS_BPENTRY dq[60];
 623static int qd;
 624static void *da[60];
 625#endif 
 626
 627static void submit_queue (struct fs_dev *dev, struct queue *q, 
 628                          u32 cmd, u32 p1, u32 p2, u32 p3)
 629{
 630        struct FS_QENTRY *qe;
 631
 632        qe = get_qentry (dev, q);
 633        qe->cmd = cmd;
 634        qe->p0 = p1;
 635        qe->p1 = p2;
 636        qe->p2 = p3;
 637        submit_qentry (dev,  q, qe);
 638
 639#ifdef DEBUG_EXTRA
 640        pq[qp].cmd = cmd;
 641        pq[qp].p0 = p1;
 642        pq[qp].p1 = p2;
 643        pq[qp].p2 = p3;
 644        qp++;
 645        if (qp >= 60) qp = 0;
 646#endif
 647}
 648
 649/* Test the "other" way one day... -- REW */
 650#if 1
 651#define submit_command submit_queue
 652#else
 653
 654static void submit_command (struct fs_dev *dev, struct queue *q, 
 655                            u32 cmd, u32 p1, u32 p2, u32 p3)
 656{
 657        write_fs (dev, CMDR0, cmd);
 658        write_fs (dev, CMDR1, p1);
 659        write_fs (dev, CMDR2, p2);
 660        write_fs (dev, CMDR3, p3);
 661}
 662#endif
 663
 664
 665
 666static void process_return_queue (struct fs_dev *dev, struct queue *q)
 667{
 668        long rq;
 669        struct FS_QENTRY *qe;
 670        void *tc;
 671  
 672        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 673                fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq); 
 674                qe = bus_to_virt (rq);
 675    
 676                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n", 
 677                            qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 678
 679                switch (STATUS_CODE (qe)) {
 680                case 5:
 681                        tc = bus_to_virt (qe->p0);
 682                        fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
 683                        kfree (tc);
 684                        break;
 685                }
 686    
 687                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 688        }
 689}
 690
 691
 692static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
 693{
 694        long rq;
 695        long tmp;
 696        struct FS_QENTRY *qe;
 697        struct sk_buff *skb;
 698        struct FS_BPENTRY *td;
 699
 700        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 701                fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq); 
 702                qe = bus_to_virt (rq);
 703    
 704                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n", 
 705                            qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 706
 707                if (STATUS_CODE (qe) != 2)
 708                        fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n", 
 709                                    qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
 710
 711
 712                switch (STATUS_CODE (qe)) {
 713                case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
 714                        /* Fall through */
 715                case 0x02:
 716                        /* Process a real txdone entry. */
 717                        tmp = qe->p0;
 718                        if (tmp & 0x0f)
 719                                printk (KERN_WARNING "td not aligned: %ld\n", tmp);
 720                        tmp &= ~0x0f;
 721                        td = bus_to_virt (tmp);
 722
 723                        fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n", 
 724                                    td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
 725      
 726                        skb = td->skb;
 727                        if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
 728                                FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
 729                                wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
 730                        }
 731                        td->dev->ntxpckts--;
 732
 733                        {
 734                                static int c=0;
 735        
 736                                if (!(c++ % 100)) {
 737                                        fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
 738                                }
 739                        }
 740
 741                        atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
 742
 743                        fs_dprintk (FS_DEBUG_TXMEM, "i");
 744                        fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
 745                        fs_kfree_skb (skb);
 746
 747                        fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td); 
 748                        memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY));
 749                        kfree (td);
 750                        break;
 751                default:
 752                        /* Here we get the tx purge inhibit command ... */
 753                        /* Action, I believe, is "don't do anything". -- REW */
 754                        ;
 755                }
 756    
 757                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 758        }
 759}
 760
 761
 762static void process_incoming (struct fs_dev *dev, struct queue *q)
 763{
 764        long rq;
 765        struct FS_QENTRY *qe;
 766        struct FS_BPENTRY *pe;    
 767        struct sk_buff *skb;
 768        unsigned int channo;
 769        struct atm_vcc *atm_vcc;
 770
 771        while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
 772                fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq); 
 773                qe = bus_to_virt (rq);
 774    
 775                fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x.  ", 
 776                            qe->cmd, qe->p0, qe->p1, qe->p2);
 777
 778                fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n", 
 779                            STATUS_CODE (qe), 
 780                            res_strings[STATUS_CODE(qe)]);
 781
 782                pe = bus_to_virt (qe->p0);
 783                fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n", 
 784                            pe->flags, pe->next, pe->bsa, pe->aal_bufsize, 
 785                            pe->skb, pe->fp);
 786      
 787                channo = qe->cmd & 0xffff;
 788
 789                if (channo < dev->nchannels)
 790                        atm_vcc = dev->atm_vccs[channo];
 791                else
 792                        atm_vcc = NULL;
 793
 794                /* Single buffer packet */
 795                switch (STATUS_CODE (qe)) {
 796                case 0x1:
 797                        /* Fall through for streaming mode */
 798                case 0x2:/* Packet received OK.... */
 799                        if (atm_vcc) {
 800                                skb = pe->skb;
 801                                pe->fp->n--;
 802#if 0
 803                                fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
 804                                if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
 805#endif
 806                                skb_put (skb, qe->p1 & 0xffff); 
 807                                ATM_SKB(skb)->vcc = atm_vcc;
 808                                atomic_inc(&atm_vcc->stats->rx);
 809                                __net_timestamp(skb);
 810                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
 811                                atm_vcc->push (atm_vcc, skb);
 812                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
 813                                kfree (pe);
 814                        } else {
 815                                printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
 816                        }
 817                        break;
 818                case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
 819                             has been consumed and needs to be processed. -- REW */
 820                        if (qe->p1 & 0xffff) {
 821                                pe = bus_to_virt (qe->p0);
 822                                pe->fp->n--;
 823                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
 824                                dev_kfree_skb_any (pe->skb);
 825                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
 826                                kfree (pe);
 827                        }
 828                        if (atm_vcc)
 829                                atomic_inc(&atm_vcc->stats->rx_drop);
 830                        break;
 831                case 0x1f: /*  Reassembly abort: no buffers. */
 832                        /* Silently increment error counter. */
 833                        if (atm_vcc)
 834                                atomic_inc(&atm_vcc->stats->rx_drop);
 835                        break;
 836                default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
 837                        printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n", 
 838                                STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
 839                }
 840                write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
 841        }
 842}
 843
 844
 845
 846#define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
 847
 848static int fs_open(struct atm_vcc *atm_vcc)
 849{
 850        struct fs_dev *dev;
 851        struct fs_vcc *vcc;
 852        struct fs_transmit_config *tc;
 853        struct atm_trafprm * txtp;
 854        struct atm_trafprm * rxtp;
 855        /*  struct fs_receive_config *rc;*/
 856        /*  struct FS_QENTRY *qe; */
 857        int error;
 858        int bfp;
 859        int to;
 860        unsigned short tmc0;
 861        short vpi = atm_vcc->vpi;
 862        int vci = atm_vcc->vci;
 863
 864        func_enter ();
 865
 866        dev = FS_DEV(atm_vcc->dev);
 867        fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n", 
 868                    dev, atm_vcc);
 869
 870        if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
 871                set_bit(ATM_VF_ADDR, &atm_vcc->flags);
 872
 873        if ((atm_vcc->qos.aal != ATM_AAL5) &&
 874            (atm_vcc->qos.aal != ATM_AAL2))
 875          return -EINVAL; /* XXX AAL0 */
 876
 877        fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n", 
 878                    atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);  
 879
 880        /* XXX handle qos parameters (rate limiting) ? */
 881
 882        vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
 883        fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%zd)\n", vcc, sizeof(struct fs_vcc));
 884        if (!vcc) {
 885                clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
 886                return -ENOMEM;
 887        }
 888  
 889        atm_vcc->dev_data = vcc;
 890        vcc->last_skb = NULL;
 891
 892        init_waitqueue_head (&vcc->close_wait);
 893
 894        txtp = &atm_vcc->qos.txtp;
 895        rxtp = &atm_vcc->qos.rxtp;
 896
 897        if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
 898                if (IS_FS50(dev)) {
 899                        /* Increment the channel numer: take a free one next time.  */
 900                        for (to=33;to;to--, dev->channo++) {
 901                                /* We only have 32 channels */
 902                                if (dev->channo >= 32)
 903                                        dev->channo = 0;
 904                                /* If we need to do RX, AND the RX is inuse, try the next */
 905                                if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
 906                                        continue;
 907                                /* If we need to do TX, AND the TX is inuse, try the next */
 908                                if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
 909                                        continue;
 910                                /* Ok, both are free! (or not needed) */
 911                                break;
 912                        }
 913                        if (!to) {
 914                                printk ("No more free channels for FS50..\n");
 915                                return -EBUSY;
 916                        }
 917                        vcc->channo = dev->channo;
 918                        dev->channo &= dev->channel_mask;
 919      
 920                } else {
 921                        vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
 922                        if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
 923                            ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
 924                                printk ("Channel is in use for FS155.\n");
 925                                return -EBUSY;
 926                        }
 927                }
 928                fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n", 
 929                            vcc->channo, vcc->channo);
 930        }
 931
 932        if (DO_DIRECTION (txtp)) {
 933                tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
 934                fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%zd)\n",
 935                            tc, sizeof (struct fs_transmit_config));
 936                if (!tc) {
 937                        fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
 938                        return -ENOMEM;
 939                }
 940
 941                /* Allocate the "open" entry from the high priority txq. This makes
 942                   it most likely that the chip will notice it. It also prevents us
 943                   from having to wait for completion. On the other hand, we may
 944                   need to wait for completion anyway, to see if it completed
 945                   successfully. */
 946
 947                switch (atm_vcc->qos.aal) {
 948                case ATM_AAL2:
 949                case ATM_AAL0:
 950                  tc->flags = 0
 951                    | TC_FLAGS_TRANSPARENT_PAYLOAD
 952                    | TC_FLAGS_PACKET
 953                    | (1 << 28)
 954                    | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
 955                    | TC_FLAGS_CAL0;
 956                  break;
 957                case ATM_AAL5:
 958                  tc->flags = 0
 959                        | TC_FLAGS_AAL5
 960                        | TC_FLAGS_PACKET  /* ??? */
 961                        | TC_FLAGS_TYPE_CBR
 962                        | TC_FLAGS_CAL0;
 963                  break;
 964                default:
 965                        printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
 966                        tc->flags = 0;
 967                }
 968                /* Docs are vague about this atm_hdr field. By the way, the FS
 969                 * chip makes odd errors if lower bits are set.... -- REW */
 970                tc->atm_hdr =  (vpi << 20) | (vci << 4); 
 971                tmc0 = 0;
 972                {
 973                        int pcr = atm_pcr_goal (txtp);
 974
 975                        fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
 976
 977                        /* XXX Hmm. officially we're only allowed to do this if rounding 
 978                           is round_down -- REW */
 979                        if (IS_FS50(dev)) {
 980                                if (pcr > 51840000/53/8)  pcr = 51840000/53/8;
 981                        } else {
 982                                if (pcr > 155520000/53/8) pcr = 155520000/53/8;
 983                        }
 984                        if (!pcr) {
 985                                /* no rate cap */
 986                                tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
 987                        } else {
 988                                int r;
 989                                if (pcr < 0) {
 990                                        r = ROUND_DOWN;
 991                                        pcr = -pcr;
 992                                } else {
 993                                        r = ROUND_UP;
 994                                }
 995                                error = make_rate (pcr, r, &tmc0, NULL);
 996                                if (error) {
 997                                        kfree(tc);
 998                                        return error;
 999                                }
1000                        }
1001                        fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1002                }
1003      
1004                tc->TMC[0] = tmc0 | 0x4000;
1005                tc->TMC[1] = 0; /* Unused */
1006                tc->TMC[2] = 0; /* Unused */
1007                tc->TMC[3] = 0; /* Unused */
1008    
1009                tc->spec = 0;    /* UTOPIA address, UDF, HEC: Unused -> 0 */
1010                tc->rtag[0] = 0; /* What should I do with routing tags??? 
1011                                    -- Not used -- AS -- Thanks -- REW*/
1012                tc->rtag[1] = 0;
1013                tc->rtag[2] = 0;
1014
1015                if (fs_debug & FS_DEBUG_OPEN) {
1016                        fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1017                        my_hd (tc, sizeof (*tc));
1018                }
1019
1020                /* We now use the "submit_command" function to submit commands to
1021                   the firestream. There is a define up near the definition of
1022                   that routine that switches this routine between immediate write
1023                   to the immediate command registers and queuing the commands in
1024                   the HPTXQ for execution. This last technique might be more
1025                   efficient if we know we're going to submit a whole lot of
1026                   commands in one go, but this driver is not setup to be able to
1027                   use such a construct. So it probably doen't matter much right
1028                   now. -- REW */
1029    
1030                /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1031                submit_command (dev, &dev->hp_txq, 
1032                                QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1033                                virt_to_bus (tc), 0, 0);
1034
1035                submit_command (dev, &dev->hp_txq, 
1036                                QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1037                                0, 0, 0);
1038                set_bit (vcc->channo, dev->tx_inuse);
1039        }
1040
1041        if (DO_DIRECTION (rxtp)) {
1042                dev->atm_vccs[vcc->channo] = atm_vcc;
1043
1044                for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1045                        if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1046                if (bfp >= FS_NR_FREE_POOLS) {
1047                        fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n", 
1048                                    atm_vcc->qos.rxtp.max_sdu);
1049                        /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1050
1051                        /* XXX clear tx inuse. Close TX part? */
1052                        dev->atm_vccs[vcc->channo] = NULL;
1053                        kfree (vcc);
1054                        return -EINVAL;
1055                }
1056
1057                switch (atm_vcc->qos.aal) {
1058                case ATM_AAL0:
1059                case ATM_AAL2:
1060                        submit_command (dev, &dev->hp_txq,
1061                                        QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1062                                        RC_FLAGS_TRANSP |
1063                                        RC_FLAGS_BFPS_BFP * bfp |
1064                                        RC_FLAGS_RXBM_PSB, 0, 0);
1065                        break;
1066                case ATM_AAL5:
1067                        submit_command (dev, &dev->hp_txq,
1068                                        QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1069                                        RC_FLAGS_AAL5 |
1070                                        RC_FLAGS_BFPS_BFP * bfp |
1071                                        RC_FLAGS_RXBM_PSB, 0, 0);
1072                        break;
1073                };
1074                if (IS_FS50 (dev)) {
1075                        submit_command (dev, &dev->hp_txq, 
1076                                        QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1077                                        0x80 + vcc->channo,
1078                                        (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1079                }
1080                submit_command (dev, &dev->hp_txq, 
1081                                QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1082                                0, 0, 0);
1083        }
1084    
1085        /* Indicate we're done! */
1086        set_bit(ATM_VF_READY, &atm_vcc->flags);
1087
1088        func_exit ();
1089        return 0;
1090}
1091
1092
1093static void fs_close(struct atm_vcc *atm_vcc)
1094{
1095        struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1096        struct fs_vcc *vcc = FS_VCC (atm_vcc);
1097        struct atm_trafprm * txtp;
1098        struct atm_trafprm * rxtp;
1099
1100        func_enter ();
1101
1102        clear_bit(ATM_VF_READY, &atm_vcc->flags);
1103
1104        fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1105        if (vcc->last_skb) {
1106                fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n", 
1107                            vcc->last_skb);
1108                /* We're going to wait for the last packet to get sent on this VC. It would
1109                   be impolite not to send them don't you think? 
1110                   XXX
1111                   We don't know which packets didn't get sent. So if we get interrupted in 
1112                   this sleep_on, we'll lose any reference to these packets. Memory leak!
1113                   On the other hand, it's awfully convenient that we can abort a "close" that
1114                   is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1115                wait_event_interruptible(vcc->close_wait, !vcc->last_skb);
1116        }
1117
1118        txtp = &atm_vcc->qos.txtp;
1119        rxtp = &atm_vcc->qos.rxtp;
1120  
1121
1122        /* See App note XXX (Unpublished as of now) for the reason for the 
1123           removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1124
1125        if (DO_DIRECTION (txtp)) {
1126                submit_command (dev,  &dev->hp_txq,
1127                                QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1128                clear_bit (vcc->channo, dev->tx_inuse);
1129        }
1130
1131        if (DO_DIRECTION (rxtp)) {
1132                submit_command (dev,  &dev->hp_txq,
1133                                QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1134                dev->atm_vccs [vcc->channo] = NULL;
1135  
1136                /* This means that this is configured as a receive channel */
1137                if (IS_FS50 (dev)) {
1138                        /* Disable the receive filter. Is 0/0 indeed an invalid receive
1139                           channel? -- REW.  Yes it is. -- Hang. Ok. I'll use -1
1140                           (0xfff...) -- REW */
1141                        submit_command (dev, &dev->hp_txq, 
1142                                        QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1143                                        0x80 + vcc->channo, -1, 0 ); 
1144                }
1145        }
1146
1147        fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1148        kfree (vcc);
1149
1150        func_exit ();
1151}
1152
1153
1154static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1155{
1156        struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1157        struct fs_vcc *vcc = FS_VCC (atm_vcc);
1158        struct FS_BPENTRY *td;
1159
1160        func_enter ();
1161
1162        fs_dprintk (FS_DEBUG_TXMEM, "I");
1163        fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n", 
1164                    atm_vcc, skb, vcc, dev);
1165
1166        fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1167
1168        ATM_SKB(skb)->vcc = atm_vcc;
1169
1170        vcc->last_skb = skb;
1171
1172        td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1173        fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%zd)\n", td, sizeof (struct FS_BPENTRY));
1174        if (!td) {
1175                /* Oops out of mem */
1176                return -ENOMEM;
1177        }
1178
1179        fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n", 
1180                    *(int *) skb->data);
1181
1182        td->flags =  TD_EPI | TD_DATA | skb->len;
1183        td->next = 0;
1184        td->bsa  = virt_to_bus (skb->data);
1185        td->skb = skb;
1186        td->dev = dev;
1187        dev->ntxpckts++;
1188
1189#ifdef DEBUG_EXTRA
1190        da[qd] = td;
1191        dq[qd].flags = td->flags;
1192        dq[qd].next  = td->next;
1193        dq[qd].bsa   = td->bsa;
1194        dq[qd].skb   = td->skb;
1195        dq[qd].dev   = td->dev;
1196        qd++;
1197        if (qd >= 60) qd = 0;
1198#endif
1199
1200        submit_queue (dev, &dev->hp_txq, 
1201                      QE_TRANSMIT_DE | vcc->channo,
1202                      virt_to_bus (td), 0, 
1203                      virt_to_bus (td));
1204
1205        fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n", 
1206                    read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1207                    read_fs (dev, Q_SA (dev->hp_txq.offset)),
1208                    read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1209                    read_fs (dev, Q_SA (dev->tx_relq.offset)));
1210
1211        func_exit ();
1212        return 0;
1213}
1214
1215
1216/* Some function placeholders for functions we don't yet support. */
1217
1218#if 0
1219static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1220{
1221        func_enter ();
1222        func_exit ();
1223        return -ENOIOCTLCMD;
1224}
1225
1226
1227static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1228                         void __user *optval,int optlen)
1229{
1230        func_enter ();
1231        func_exit ();
1232        return 0;
1233}
1234
1235
1236static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1237                         void __user *optval,unsigned int optlen)
1238{
1239        func_enter ();
1240        func_exit ();
1241        return 0;
1242}
1243
1244
1245static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1246                       unsigned long addr)
1247{
1248        func_enter ();
1249        func_exit ();
1250}
1251
1252
1253static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1254{
1255        func_enter ();
1256        func_exit ();
1257        return 0;
1258}
1259
1260
1261static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1262{
1263        func_enter ();
1264        func_exit ();
1265        return 0;
1266};
1267
1268#endif
1269
1270
1271static const struct atmdev_ops ops = {
1272        .open =         fs_open,
1273        .close =        fs_close,
1274        .send =         fs_send,
1275        .owner =        THIS_MODULE,
1276        /* ioctl:          fs_ioctl, */
1277        /* getsockopt:     fs_getsockopt, */
1278        /* setsockopt:     fs_setsockopt, */
1279        /* change_qos:     fs_change_qos, */
1280
1281        /* For now implement these internally here... */  
1282        /* phy_put:        fs_phy_put, */
1283        /* phy_get:        fs_phy_get, */
1284};
1285
1286
1287static void undocumented_pci_fix(struct pci_dev *pdev)
1288{
1289        u32 tint;
1290
1291        /* The Windows driver says: */
1292        /* Switch off FireStream Retry Limit Threshold 
1293         */
1294
1295        /* The register at 0x28 is documented as "reserved", no further
1296           comments. */
1297
1298        pci_read_config_dword (pdev, 0x28, &tint);
1299        if (tint != 0x80) {
1300                tint = 0x80;
1301                pci_write_config_dword (pdev, 0x28, tint);
1302        }
1303}
1304
1305
1306
1307/**************************************************************************
1308 *                              PHY routines                              *
1309 **************************************************************************/
1310
1311static void write_phy(struct fs_dev *dev, int regnum, int val)
1312{
1313        submit_command (dev,  &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1314                        regnum, val, 0);
1315}
1316
1317static int init_phy(struct fs_dev *dev, struct reginit_item *reginit)
1318{
1319        int i;
1320
1321        func_enter ();
1322        while (reginit->reg != PHY_EOF) {
1323                if (reginit->reg == PHY_CLEARALL) {
1324                        /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1325                        for (i=0;i<reginit->val;i++) {
1326                                write_phy (dev, i, 0);
1327                        }
1328                } else {
1329                        write_phy (dev, reginit->reg, reginit->val);
1330                }
1331                reginit++;
1332        }
1333        func_exit ();
1334        return 0;
1335}
1336
1337static void reset_chip (struct fs_dev *dev)
1338{
1339        int i;
1340
1341        write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1342
1343        /* Undocumented delay */
1344        udelay (128);
1345
1346        /* The "internal registers are documented to all reset to zero, but 
1347           comments & code in the Windows driver indicates that the pools are
1348           NOT reset. */
1349        for (i=0;i < FS_NR_FREE_POOLS;i++) {
1350                write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1351                write_fs (dev, FP_SA  (RXB_FP(i)), 0);
1352                write_fs (dev, FP_EA  (RXB_FP(i)), 0);
1353                write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1354                write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1355        }
1356
1357        /* The same goes for the match channel registers, although those are
1358           NOT documented that way in the Windows driver. -- REW */
1359        /* The Windows driver DOES write 0 to these registers somewhere in
1360           the init sequence. However, a small hardware-feature, will
1361           prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1362           allocated happens to have no disabled channels that have a lower
1363           number. -- REW */
1364
1365        /* Clear the match channel registers. */
1366        if (IS_FS50 (dev)) {
1367                for (i=0;i<FS50_NR_CHANNELS;i++) {
1368                        write_fs (dev, 0x200 + i * 4, -1);
1369                }
1370        }
1371}
1372
1373static void *aligned_kmalloc(int size, gfp_t flags, int alignment)
1374{
1375        void  *t;
1376
1377        if (alignment <= 0x10) {
1378                t = kmalloc (size, flags);
1379                if ((unsigned long)t & (alignment-1)) {
1380                        printk ("Kmalloc doesn't align things correctly! %p\n", t);
1381                        kfree (t);
1382                        return aligned_kmalloc (size, flags, alignment * 4);
1383                }
1384                return t;
1385        }
1386        printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1387        return NULL;
1388}
1389
1390static int init_q(struct fs_dev *dev, struct queue *txq, int queue,
1391                  int nentries, int is_rq)
1392{
1393        int sz = nentries * sizeof (struct FS_QENTRY);
1394        struct FS_QENTRY *p;
1395
1396        func_enter ();
1397
1398        fs_dprintk (FS_DEBUG_INIT, "Initializing queue at %x: %d entries:\n",
1399                    queue, nentries);
1400
1401        p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1402        fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1403
1404        if (!p) return 0;
1405
1406        write_fs (dev, Q_SA(queue), virt_to_bus(p));
1407        write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1408        write_fs (dev, Q_WP(queue), virt_to_bus(p));
1409        write_fs (dev, Q_RP(queue), virt_to_bus(p));
1410        if (is_rq) {
1411                /* Configuration for the receive queue: 0: interrupt immediately,
1412                   no pre-warning to empty queues: We do our best to keep the
1413                   queue filled anyway. */
1414                write_fs (dev, Q_CNF(queue), 0 ); 
1415        }
1416
1417        txq->sa = p;
1418        txq->ea = p;
1419        txq->offset = queue; 
1420
1421        func_exit ();
1422        return 1;
1423}
1424
1425
1426static int init_fp(struct fs_dev *dev, struct freepool *fp, int queue,
1427                   int bufsize, int nr_buffers)
1428{
1429        func_enter ();
1430
1431        fs_dprintk (FS_DEBUG_INIT, "Initializing free pool at %x:\n", queue);
1432
1433        write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1434        write_fs (dev, FP_SA(queue),  0);
1435        write_fs (dev, FP_EA(queue),  0);
1436        write_fs (dev, FP_CTU(queue), 0);
1437        write_fs (dev, FP_CNT(queue), 0);
1438
1439        fp->offset = queue; 
1440        fp->bufsize = bufsize;
1441        fp->nr_buffers = nr_buffers;
1442
1443        func_exit ();
1444        return 1;
1445}
1446
1447
1448static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1449{
1450#if 0
1451        /* This seems to be unreliable.... */
1452        return read_fs (dev, FP_CNT (fp->offset));
1453#else
1454        return fp->n;
1455#endif
1456}
1457
1458
1459/* Check if this gets going again if a pool ever runs out.  -- Yes, it
1460   does. I've seen "receive abort: no buffers" and things started
1461   working again after that...  -- REW */
1462
1463static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
1464                        gfp_t gfp_flags)
1465{
1466        struct FS_BPENTRY *qe, *ne;
1467        struct sk_buff *skb;
1468        int n = 0;
1469        u32 qe_tmp;
1470
1471        fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n", 
1472                    fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n, 
1473                    fp->nr_buffers);
1474        while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1475
1476                skb = alloc_skb (fp->bufsize, gfp_flags);
1477                fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1478                if (!skb) break;
1479                ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1480                fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%zd)\n", ne, sizeof (struct FS_BPENTRY));
1481                if (!ne) {
1482                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1483                        dev_kfree_skb_any (skb);
1484                        break;
1485                }
1486
1487                fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ", 
1488                            skb, ne, skb->data, skb->head);
1489                n++;
1490                ne->flags = FP_FLAGS_EPI | fp->bufsize;
1491                ne->next  = virt_to_bus (NULL);
1492                ne->bsa   = virt_to_bus (skb->data);
1493                ne->aal_bufsize = fp->bufsize;
1494                ne->skb = skb;
1495                ne->fp = fp;
1496
1497                /*
1498                 * FIXME: following code encodes and decodes
1499                 * machine pointers (could be 64-bit) into a
1500                 * 32-bit register.
1501                 */
1502
1503                qe_tmp = read_fs (dev, FP_EA(fp->offset));
1504                fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp);
1505                if (qe_tmp) {
1506                        qe = bus_to_virt ((long) qe_tmp);
1507                        qe->next = virt_to_bus(ne);
1508                        qe->flags &= ~FP_FLAGS_EPI;
1509                } else
1510                        write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1511
1512                write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1513                fp->n++;   /* XXX Atomic_inc? */
1514                write_fs (dev, FP_CTU(fp->offset), 1);
1515        }
1516
1517        fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1518}
1519
1520static void free_queue(struct fs_dev *dev, struct queue *txq)
1521{
1522        func_enter ();
1523
1524        write_fs (dev, Q_SA(txq->offset), 0);
1525        write_fs (dev, Q_EA(txq->offset), 0);
1526        write_fs (dev, Q_RP(txq->offset), 0);
1527        write_fs (dev, Q_WP(txq->offset), 0);
1528        /* Configuration ? */
1529
1530        fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1531        kfree (txq->sa);
1532
1533        func_exit ();
1534}
1535
1536static void free_freepool(struct fs_dev *dev, struct freepool *fp)
1537{
1538        func_enter ();
1539
1540        write_fs (dev, FP_CNF(fp->offset), 0);
1541        write_fs (dev, FP_SA (fp->offset), 0);
1542        write_fs (dev, FP_EA (fp->offset), 0);
1543        write_fs (dev, FP_CNT(fp->offset), 0);
1544        write_fs (dev, FP_CTU(fp->offset), 0);
1545
1546        func_exit ();
1547}
1548
1549
1550
1551static irqreturn_t fs_irq (int irq, void *dev_id) 
1552{
1553        int i;
1554        u32 status;
1555        struct fs_dev *dev = dev_id;
1556
1557        status = read_fs (dev, ISR);
1558        if (!status)
1559                return IRQ_NONE;
1560
1561        func_enter ();
1562
1563#ifdef IRQ_RATE_LIMIT
1564        /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual 
1565           interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1566        {
1567                static int lastjif;
1568                static int nintr=0;
1569    
1570                if (lastjif == jiffies) {
1571                        if (++nintr > IRQ_RATE_LIMIT) {
1572                                free_irq (dev->irq, dev_id);
1573                                printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n", 
1574                                        dev->irq);
1575                        }
1576                } else {
1577                        lastjif = jiffies;
1578                        nintr = 0;
1579                }
1580        }
1581#endif
1582        fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n", 
1583                    read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1584                    read_fs (dev, Q_SA (dev->hp_txq.offset)),
1585                    read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1586                    read_fs (dev, Q_SA (dev->tx_relq.offset)));
1587
1588        /* print the bits in the ISR register. */
1589        if (fs_debug & FS_DEBUG_IRQ) {
1590                /* The FS_DEBUG things are unnecessary here. But this way it is
1591                   clear for grep that these are debug prints. */
1592                fs_dprintk (FS_DEBUG_IRQ,  "IRQ status:");
1593                for (i=0;i<27;i++) 
1594                        if (status & (1 << i)) 
1595                                fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1596                fs_dprintk (FS_DEBUG_IRQ, "\n");
1597        }
1598  
1599        if (status & ISR_RBRQ0_W) {
1600                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1601                process_incoming (dev, &dev->rx_rq[0]);
1602                /* items mentioned on RBRQ0 are from FP 0 or 1. */
1603                top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1604                top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1605        }
1606
1607        if (status & ISR_RBRQ1_W) {
1608                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1609                process_incoming (dev, &dev->rx_rq[1]);
1610                top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1611                top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1612        }
1613
1614        if (status & ISR_RBRQ2_W) {
1615                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1616                process_incoming (dev, &dev->rx_rq[2]);
1617                top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1618                top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1619        }
1620
1621        if (status & ISR_RBRQ3_W) {
1622                fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1623                process_incoming (dev, &dev->rx_rq[3]);
1624                top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1625                top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1626        }
1627
1628        if (status & ISR_CSQ_W) {
1629                fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1630                process_return_queue (dev, &dev->st_q);
1631        }
1632
1633        if (status & ISR_TBRQ_W) {
1634                fs_dprintk (FS_DEBUG_IRQ, "Data transmitted!\n");
1635                process_txdone_queue (dev, &dev->tx_relq);
1636        }
1637
1638        func_exit ();
1639        return IRQ_HANDLED;
1640}
1641
1642
1643#ifdef FS_POLL_FREQ
1644static void fs_poll (struct timer_list *t)
1645{
1646        struct fs_dev *dev = from_timer(dev, t, timer);
1647  
1648        fs_irq (0, dev);
1649        dev->timer.expires = jiffies + FS_POLL_FREQ;
1650        add_timer (&dev->timer);
1651}
1652#endif
1653
1654static int fs_init(struct fs_dev *dev)
1655{
1656        struct pci_dev  *pci_dev;
1657        int isr, to;
1658        int i;
1659
1660        func_enter ();
1661        pci_dev = dev->pci_dev;
1662
1663        printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n",
1664                IS_FS50(dev)?50:155,
1665                (unsigned long long)pci_resource_start(pci_dev, 0),
1666                dev->pci_dev->irq);
1667
1668        if (fs_debug & FS_DEBUG_INIT)
1669                my_hd ((unsigned char *) dev, sizeof (*dev));
1670
1671        undocumented_pci_fix (pci_dev);
1672
1673        dev->hw_base = pci_resource_start(pci_dev, 0);
1674
1675        dev->base = ioremap(dev->hw_base, 0x1000);
1676
1677        reset_chip (dev);
1678  
1679        write_fs (dev, SARMODE0, 0 
1680                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1681                  | (1 * SARMODE0_INTMODE_READCLEAR)
1682                  | (1 * SARMODE0_CWRE)
1683                  | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
1684                          SARMODE0_PRPWT_FS155_3)
1685                  | (1 * SARMODE0_CALSUP_1)
1686                  | (IS_FS50(dev) ? (0
1687                                   | SARMODE0_RXVCS_32
1688                                   | SARMODE0_ABRVCS_32 
1689                                   | SARMODE0_TXVCS_32):
1690                                  (0
1691                                   | SARMODE0_RXVCS_1k
1692                                   | SARMODE0_ABRVCS_1k 
1693                                   | SARMODE0_TXVCS_1k)));
1694
1695        /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1696           1ms. */
1697        to = 100;
1698        while (--to) {
1699                isr = read_fs (dev, ISR);
1700
1701                /* This bit is documented as "RESERVED" */
1702                if (isr & ISR_INIT_ERR) {
1703                        printk (KERN_ERR "Error initializing the FS... \n");
1704                        goto unmap;
1705                }
1706                if (isr & ISR_INIT) {
1707                        fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1708                        break;
1709                }
1710
1711                /* Try again after 10ms. */
1712                msleep(10);
1713        }
1714
1715        if (!to) {
1716                printk (KERN_ERR "timeout initializing the FS... \n");
1717                goto unmap;
1718        }
1719
1720        /* XXX fix for fs155 */
1721        dev->channel_mask = 0x1f; 
1722        dev->channo = 0;
1723
1724        /* AN3: 10 */
1725        write_fs (dev, SARMODE1, 0 
1726                  | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1727                  | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1728                  | (1 * SARMODE1_DCRM)
1729                  | (1 * SARMODE1_DCOAM)
1730                  | (0 * SARMODE1_OAMCRC)
1731                  | (0 * SARMODE1_DUMPE)
1732                  | (0 * SARMODE1_GPLEN) 
1733                  | (0 * SARMODE1_GNAM)
1734                  | (0 * SARMODE1_GVAS)
1735                  | (0 * SARMODE1_GPAS)
1736                  | (1 * SARMODE1_GPRI)
1737                  | (0 * SARMODE1_PMS)
1738                  | (0 * SARMODE1_GFCR)
1739                  | (1 * SARMODE1_HECM2)
1740                  | (1 * SARMODE1_HECM1)
1741                  | (1 * SARMODE1_HECM0)
1742                  | (1 << 12) /* That's what hang's driver does. Program to 0 */
1743                  | (0 * 0xff) /* XXX FS155 */);
1744
1745
1746        /* Cal prescale etc */
1747
1748        /* AN3: 11 */
1749        write_fs (dev, TMCONF, 0x0000000f);
1750        write_fs (dev, CALPRESCALE, 0x01010101 * num);
1751        write_fs (dev, 0x80, 0x000F00E4);
1752
1753        /* AN3: 12 */
1754        write_fs (dev, CELLOSCONF, 0
1755                  | (   0 * CELLOSCONF_CEN)
1756                  | (       CELLOSCONF_SC1)
1757                  | (0x80 * CELLOSCONF_COBS)
1758                  | (num  * CELLOSCONF_COPK)  /* Changed from 0xff to 0x5a */
1759                  | (num  * CELLOSCONF_COST));/* after a hint from Hang. 
1760                                               * performance jumped 50->70... */
1761
1762        /* Magic value by Hang */
1763        write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1764
1765        if (IS_FS50 (dev)) {
1766                write_fs (dev, RAS0, RAS0_DCD_XHLT);
1767                dev->atm_dev->ci_range.vpi_bits = 12;
1768                dev->atm_dev->ci_range.vci_bits = 16;
1769                dev->nchannels = FS50_NR_CHANNELS;
1770        } else {
1771                write_fs (dev, RAS0, RAS0_DCD_XHLT 
1772                          | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1773                          | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1774                /* We can chose the split arbitrarily. We might be able to 
1775                   support more. Whatever. This should do for now. */
1776                dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1777                dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1778    
1779                /* Address bits we can't use should be compared to 0. */
1780                write_fs (dev, RAC, 0);
1781
1782                /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1783                 * too.  I can't find ASF1 anywhere. Anyway, we AND with just the
1784                 * other bits, then compare with 0, which is exactly what we
1785                 * want. */
1786                write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1787                dev->nchannels = FS155_NR_CHANNELS;
1788        }
1789        dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *),
1790                                 GFP_KERNEL);
1791        fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%zd)\n",
1792                    dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1793
1794        if (!dev->atm_vccs) {
1795                printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1796                /* XXX Clean up..... */
1797                goto unmap;
1798        }
1799
1800        dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1801        fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n", 
1802                    dev->atm_vccs, dev->nchannels / 8);
1803
1804        if (!dev->tx_inuse) {
1805                printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1806                /* XXX Clean up..... */
1807                goto unmap;
1808        }
1809        /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1810        /* -- RAS2 : FS50 only: Default is OK. */
1811
1812        /* DMAMODE, default should be OK. -- REW */
1813        write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1814
1815        init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1816        init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1817        init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1818        init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1819
1820        for (i=0;i < FS_NR_FREE_POOLS;i++) {
1821                init_fp (dev, &dev->rx_fp[i], RXB_FP(i), 
1822                         rx_buf_sizes[i], rx_pool_sizes[i]);
1823                top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1824        }
1825
1826
1827        for (i=0;i < FS_NR_RX_QUEUES;i++)
1828                init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1829
1830        dev->irq = pci_dev->irq;
1831        if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) {
1832                printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1833                /* XXX undo all previous stuff... */
1834                goto unmap;
1835        }
1836        fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1837  
1838        /* We want to be notified of most things. Just the statistics count
1839           overflows are not interesting */
1840        write_fs (dev, IMR, 0
1841                  | ISR_RBRQ0_W 
1842                  | ISR_RBRQ1_W 
1843                  | ISR_RBRQ2_W 
1844                  | ISR_RBRQ3_W 
1845                  | ISR_TBRQ_W
1846                  | ISR_CSQ_W);
1847
1848        write_fs (dev, SARMODE0, 0 
1849                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1850                  | (1 * SARMODE0_GINT)
1851                  | (1 * SARMODE0_INTMODE_READCLEAR)
1852                  | (0 * SARMODE0_CWRE)
1853                  | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: 
1854                                  SARMODE0_PRPWT_FS155_3)
1855                  | (1 * SARMODE0_CALSUP_1)
1856                  | (IS_FS50 (dev)?(0
1857                                    | SARMODE0_RXVCS_32
1858                                    | SARMODE0_ABRVCS_32 
1859                                    | SARMODE0_TXVCS_32):
1860                                   (0
1861                                    | SARMODE0_RXVCS_1k
1862                                    | SARMODE0_ABRVCS_1k 
1863                                    | SARMODE0_TXVCS_1k))
1864                  | (1 * SARMODE0_RUN));
1865
1866        init_phy (dev, PHY_NTC_INIT);
1867
1868        if (loopback == 2) {
1869                write_phy (dev, 0x39, 0x000e);
1870        }
1871
1872#ifdef FS_POLL_FREQ
1873        timer_setup(&dev->timer, fs_poll, 0);
1874        dev->timer.expires = jiffies + FS_POLL_FREQ;
1875        add_timer (&dev->timer);
1876#endif
1877
1878        dev->atm_dev->dev_data = dev;
1879  
1880        func_exit ();
1881        return 0;
1882unmap:
1883        iounmap(dev->base);
1884        return 1;
1885}
1886
1887static int firestream_init_one(struct pci_dev *pci_dev,
1888                               const struct pci_device_id *ent)
1889{
1890        struct atm_dev *atm_dev;
1891        struct fs_dev *fs_dev;
1892        
1893        if (pci_enable_device(pci_dev)) 
1894                goto err_out;
1895
1896        fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL);
1897        fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%zd)\n",
1898                    fs_dev, sizeof (struct fs_dev));
1899        if (!fs_dev)
1900                goto err_out;
1901        atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL);
1902        if (!atm_dev)
1903                goto err_out_free_fs_dev;
1904  
1905        fs_dev->pci_dev = pci_dev;
1906        fs_dev->atm_dev = atm_dev;
1907        fs_dev->flags = ent->driver_data;
1908
1909        if (fs_init(fs_dev))
1910                goto err_out_free_atm_dev;
1911
1912        fs_dev->next = fs_boards;
1913        fs_boards = fs_dev;
1914        return 0;
1915
1916 err_out_free_atm_dev:
1917        atm_dev_deregister(atm_dev);
1918 err_out_free_fs_dev:
1919        kfree(fs_dev);
1920 err_out:
1921        return -ENODEV;
1922}
1923
1924static void firestream_remove_one(struct pci_dev *pdev)
1925{
1926        int i;
1927        struct fs_dev *dev, *nxtdev;
1928        struct fs_vcc *vcc;
1929        struct FS_BPENTRY *fp, *nxt;
1930  
1931        func_enter ();
1932
1933#if 0
1934        printk ("hptxq:\n");
1935        for (i=0;i<60;i++) {
1936                printk ("%d: %08x %08x %08x %08x \n", 
1937                        i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1938                qp++;
1939                if (qp >= 60) qp = 0;
1940        }
1941
1942        printk ("descriptors:\n");
1943        for (i=0;i<60;i++) {
1944                printk ("%d: %p: %08x %08x %p %p\n", 
1945                        i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1946                qd++;
1947                if (qd >= 60) qd = 0;
1948        }
1949#endif
1950
1951        for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1952                fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1953
1954                /* XXX Hit all the tx channels too! */
1955
1956                for (i=0;i < dev->nchannels;i++) {
1957                        if (dev->atm_vccs[i]) {
1958                                vcc = FS_VCC (dev->atm_vccs[i]);
1959                                submit_command (dev,  &dev->hp_txq,
1960                                                QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1961                                submit_command (dev,  &dev->hp_txq,
1962                                                QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1963
1964                        }
1965                }
1966
1967                /* XXX Wait a while for the chip to release all buffers. */
1968
1969                for (i=0;i < FS_NR_FREE_POOLS;i++) {
1970                        for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1971                             !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1972                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1973                                dev_kfree_skb_any (fp->skb);
1974                                nxt = bus_to_virt (fp->next);
1975                                fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1976                                kfree (fp);
1977                        }
1978                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1979                        dev_kfree_skb_any (fp->skb);
1980                        fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1981                        kfree (fp);
1982                }
1983
1984                /* Hang the chip in "reset", prevent it clobbering memory that is
1985                   no longer ours. */
1986                reset_chip (dev);
1987
1988                fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
1989                free_irq (dev->irq, dev);
1990                del_timer_sync (&dev->timer);
1991
1992                atm_dev_deregister(dev->atm_dev);
1993                free_queue (dev, &dev->hp_txq);
1994                free_queue (dev, &dev->lp_txq);
1995                free_queue (dev, &dev->tx_relq);
1996                free_queue (dev, &dev->st_q);
1997
1998                fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
1999                kfree (dev->atm_vccs);
2000
2001                for (i=0;i< FS_NR_FREE_POOLS;i++)
2002                        free_freepool (dev, &dev->rx_fp[i]);
2003    
2004                for (i=0;i < FS_NR_RX_QUEUES;i++)
2005                        free_queue (dev, &dev->rx_rq[i]);
2006
2007                iounmap(dev->base);
2008                fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2009                nxtdev = dev->next;
2010                kfree (dev);
2011        }
2012
2013        func_exit ();
2014}
2015
2016static const struct pci_device_id firestream_pci_tbl[] = {
2017        { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2018        { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2019        { 0, }
2020};
2021
2022MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2023
2024static struct pci_driver firestream_driver = {
2025        .name           = "firestream",
2026        .id_table       = firestream_pci_tbl,
2027        .probe          = firestream_init_one,
2028        .remove         = firestream_remove_one,
2029};
2030
2031static int __init firestream_init_module (void)
2032{
2033        int error;
2034
2035        func_enter ();
2036        error = pci_register_driver(&firestream_driver);
2037        func_exit ();
2038        return error;
2039}
2040
2041static void __exit firestream_cleanup_module(void)
2042{
2043        pci_unregister_driver(&firestream_driver);
2044}
2045
2046module_init(firestream_init_module);
2047module_exit(firestream_cleanup_module);
2048
2049MODULE_LICENSE("GPL");
2050
2051
2052
2053