linux/drivers/clk/at91/pmc.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * drivers/clk/at91/pmc.h
   4 *
   5 *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
   6 */
   7
   8#ifndef __PMC_H_
   9#define __PMC_H_
  10
  11#include <linux/io.h>
  12#include <linux/irqdomain.h>
  13#include <linux/regmap.h>
  14#include <linux/spinlock.h>
  15
  16extern spinlock_t pmc_pcr_lock;
  17
  18struct pmc_data {
  19        unsigned int ncore;
  20        struct clk_hw **chws;
  21        unsigned int nsystem;
  22        struct clk_hw **shws;
  23        unsigned int nperiph;
  24        struct clk_hw **phws;
  25        unsigned int ngck;
  26        struct clk_hw **ghws;
  27};
  28
  29struct clk_range {
  30        unsigned long min;
  31        unsigned long max;
  32};
  33
  34#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
  35
  36struct clk_master_layout {
  37        u32 offset;
  38        u32 mask;
  39        u8 pres_shift;
  40};
  41
  42extern const struct clk_master_layout at91rm9200_master_layout;
  43extern const struct clk_master_layout at91sam9x5_master_layout;
  44
  45struct clk_master_characteristics {
  46        struct clk_range output;
  47        u32 divisors[4];
  48        u8 have_div3_pres;
  49};
  50
  51struct clk_pll_layout {
  52        u32 pllr_mask;
  53        u16 mul_mask;
  54        u8 mul_shift;
  55};
  56
  57extern const struct clk_pll_layout at91rm9200_pll_layout;
  58extern const struct clk_pll_layout at91sam9g45_pll_layout;
  59extern const struct clk_pll_layout at91sam9g20_pllb_layout;
  60extern const struct clk_pll_layout sama5d3_pll_layout;
  61
  62struct clk_pll_characteristics {
  63        struct clk_range input;
  64        int num_output;
  65        const struct clk_range *output;
  66        u16 *icpll;
  67        u8 *out;
  68        u8 upll : 1;
  69};
  70
  71struct clk_programmable_layout {
  72        u8 pres_mask;
  73        u8 pres_shift;
  74        u8 css_mask;
  75        u8 have_slck_mck;
  76        u8 is_pres_direct;
  77};
  78
  79extern const struct clk_programmable_layout at91rm9200_programmable_layout;
  80extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
  81extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
  82
  83struct clk_pcr_layout {
  84        u32 offset;
  85        u32 cmd;
  86        u32 div_mask;
  87        u32 gckcss_mask;
  88        u32 pid_mask;
  89};
  90
  91#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
  92#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
  93
  94#define ndck(a, s) (a[s - 1].id + 1)
  95#define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1)
  96struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem,
  97                                   unsigned int nperiph, unsigned int ngck);
  98void pmc_data_free(struct pmc_data *pmc_data);
  99
 100int of_at91_get_clk_range(struct device_node *np, const char *propname,
 101                          struct clk_range *range);
 102
 103struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);
 104
 105struct clk_hw * __init
 106at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
 107                                 const char *parent_name);
 108
 109struct clk_hw * __init
 110at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
 111                                const char *parent_name);
 112
 113struct clk_hw * __init
 114at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
 115                                const char *parent_name);
 116
 117struct clk_hw * __init
 118at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
 119                            const struct clk_pcr_layout *layout,
 120                            const char *name, const char **parent_names,
 121                            u8 num_parents, u8 id, bool pll_audio,
 122                            const struct clk_range *range);
 123
 124struct clk_hw * __init
 125at91_clk_register_h32mx(struct regmap *regmap, const char *name,
 126                        const char *parent_name);
 127
 128struct clk_hw * __init
 129at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
 130                          const char * const *parent_names,
 131                          unsigned int num_parents, u8 bus_id);
 132
 133struct clk_hw * __init
 134at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name,
 135                              u32 frequency, u32 accuracy);
 136struct clk_hw * __init
 137at91_clk_register_main_osc(struct regmap *regmap, const char *name,
 138                           const char *parent_name, bool bypass);
 139struct clk_hw * __init
 140at91_clk_register_rm9200_main(struct regmap *regmap,
 141                              const char *name,
 142                              const char *parent_name);
 143struct clk_hw * __init
 144at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
 145                              const char **parent_names, int num_parents);
 146
 147struct clk_hw * __init
 148at91_clk_register_master(struct regmap *regmap, const char *name,
 149                         int num_parents, const char **parent_names,
 150                         const struct clk_master_layout *layout,
 151                         const struct clk_master_characteristics *characteristics);
 152
 153struct clk_hw * __init
 154at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 155                             const char *parent_name, u32 id);
 156struct clk_hw * __init
 157at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 158                                    const struct clk_pcr_layout *layout,
 159                                    const char *name, const char *parent_name,
 160                                    u32 id, const struct clk_range *range);
 161
 162struct clk_hw * __init
 163at91_clk_register_pll(struct regmap *regmap, const char *name,
 164                      const char *parent_name, u8 id,
 165                      const struct clk_pll_layout *layout,
 166                      const struct clk_pll_characteristics *characteristics);
 167struct clk_hw * __init
 168at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 169                         const char *parent_name);
 170
 171struct clk_hw * __init
 172sam9x60_clk_register_pll(struct regmap *regmap, spinlock_t *lock,
 173                         const char *name, const char *parent_name, u8 id,
 174                         const struct clk_pll_characteristics *characteristics);
 175
 176struct clk_hw * __init
 177at91_clk_register_programmable(struct regmap *regmap, const char *name,
 178                               const char **parent_names, u8 num_parents, u8 id,
 179                               const struct clk_programmable_layout *layout);
 180
 181struct clk_hw * __init
 182at91_clk_register_sam9260_slow(struct regmap *regmap,
 183                               const char *name,
 184                               const char **parent_names,
 185                               int num_parents);
 186
 187struct clk_hw * __init
 188at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 189                            const char **parent_names, u8 num_parents);
 190
 191struct clk_hw * __init
 192at91_clk_register_system(struct regmap *regmap, const char *name,
 193                         const char *parent_name, u8 id);
 194
 195struct clk_hw * __init
 196at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 197                            const char **parent_names, u8 num_parents);
 198struct clk_hw * __init
 199at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 200                             const char *parent_name);
 201struct clk_hw * __init
 202sam9x60_clk_register_usb(struct regmap *regmap, const char *name,
 203                         const char **parent_names, u8 num_parents);
 204struct clk_hw * __init
 205at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 206                            const char *parent_name, const u32 *divisors);
 207
 208struct clk_hw * __init
 209at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
 210                       const char *name, const char *parent_name);
 211
 212#ifdef CONFIG_PM
 213void pmc_register_id(u8 id);
 214void pmc_register_pck(u8 pck);
 215#else
 216static inline void pmc_register_id(u8 id) {}
 217static inline void pmc_register_pck(u8 pck) {}
 218#endif
 219
 220#endif /* __PMC_H_ */
 221