LXR linux/drivers/crypto/rockchip/rk3288

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __RK3288_CRYPTO_H__
   3#define __RK3288_CRYPTO_H__
   4
   5#include <crypto/aes.h>
   6#include <crypto/des.h>
   7#include <crypto/algapi.h>
   8#include <linux/interrupt.h>
   9#include <linux/delay.h>
  10#include <crypto/internal/hash.h>
  11
  12#include <crypto/md5.h>
  13#include <crypto/sha.h>
  14
  15#define _SBF(v, f)                      ((v) << (f))
  16
  17/* Crypto control registers*/
  18#define RK_CRYPTO_INTSTS                0x0000
  19#define RK_CRYPTO_PKA_DONE_INT          BIT(5)
  20#define RK_CRYPTO_HASH_DONE_INT         BIT(4)
  21#define RK_CRYPTO_HRDMA_ERR_INT         BIT(3)
  22#define RK_CRYPTO_HRDMA_DONE_INT        BIT(2)
  23#define RK_CRYPTO_BCDMA_ERR_INT         BIT(1)
  24#define RK_CRYPTO_BCDMA_DONE_INT        BIT(0)
  25
  26#define RK_CRYPTO_INTENA                0x0004
  27#define RK_CRYPTO_PKA_DONE_ENA          BIT(5)
  28#define RK_CRYPTO_HASH_DONE_ENA         BIT(4)
  29#define RK_CRYPTO_HRDMA_ERR_ENA         BIT(3)
  30#define RK_CRYPTO_HRDMA_DONE_ENA        BIT(2)
  31#define RK_CRYPTO_BCDMA_ERR_ENA         BIT(1)
  32#define RK_CRYPTO_BCDMA_DONE_ENA        BIT(0)
  33
  34#define RK_CRYPTO_CTRL                  0x0008
  35#define RK_CRYPTO_WRITE_MASK            _SBF(0xFFFF, 16)
  36#define RK_CRYPTO_TRNG_FLUSH            BIT(9)
  37#define RK_CRYPTO_TRNG_START            BIT(8)
  38#define RK_CRYPTO_PKA_FLUSH             BIT(7)
  39#define RK_CRYPTO_HASH_FLUSH            BIT(6)
  40#define RK_CRYPTO_BLOCK_FLUSH           BIT(5)
  41#define RK_CRYPTO_PKA_START             BIT(4)
  42#define RK_CRYPTO_HASH_START            BIT(3)
  43#define RK_CRYPTO_BLOCK_START           BIT(2)
  44#define RK_CRYPTO_TDES_START            BIT(1)
  45#define RK_CRYPTO_AES_START             BIT(0)
  46
  47#define RK_CRYPTO_CONF                  0x000c
  48/* HASH Receive DMA Address Mode:   fix | increment */
  49#define RK_CRYPTO_HR_ADDR_MODE          BIT(8)
  50/* Block Transmit DMA Address Mode: fix | increment */
  51#define RK_CRYPTO_BT_ADDR_MODE          BIT(7)
  52/* Block Receive DMA Address Mode:  fix | increment */
  53#define RK_CRYPTO_BR_ADDR_MODE          BIT(6)
  54#define RK_CRYPTO_BYTESWAP_HRFIFO       BIT(5)
  55#define RK_CRYPTO_BYTESWAP_BTFIFO       BIT(4)
  56#define RK_CRYPTO_BYTESWAP_BRFIFO       BIT(3)
  57/* AES = 0 OR DES = 1 */
  58#define RK_CRYPTO_DESSEL                                BIT(2)
  59#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE          _SBF(0x00, 0)
  60#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT          _SBF(0x01, 0)
  61#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT         _SBF(0x02, 0)
  62
  63/* Block Receiving DMA Start Address Register */
  64#define RK_CRYPTO_BRDMAS                0x0010
  65/* Block Transmitting DMA Start Address Register */
  66#define RK_CRYPTO_BTDMAS                0x0014
  67/* Block Receiving DMA Length Register */
  68#define RK_CRYPTO_BRDMAL                0x0018
  69/* Hash Receiving DMA Start Address Register */
  70#define RK_CRYPTO_HRDMAS                0x001c
  71/* Hash Receiving DMA Length Register */
  72#define RK_CRYPTO_HRDMAL                0x0020
  73
  74/* AES registers */
  75#define RK_CRYPTO_AES_CTRL                        0x0080
  76#define RK_CRYPTO_AES_BYTESWAP_CNT      BIT(11)
  77#define RK_CRYPTO_AES_BYTESWAP_KEY      BIT(10)
  78#define RK_CRYPTO_AES_BYTESWAP_IV       BIT(9)
  79#define RK_CRYPTO_AES_BYTESWAP_DO       BIT(8)
  80#define RK_CRYPTO_AES_BYTESWAP_DI       BIT(7)
  81#define RK_CRYPTO_AES_KEY_CHANGE        BIT(6)
  82#define RK_CRYPTO_AES_ECB_MODE          _SBF(0x00, 4)
  83#define RK_CRYPTO_AES_CBC_MODE          _SBF(0x01, 4)
  84#define RK_CRYPTO_AES_CTR_MODE          _SBF(0x02, 4)
  85#define RK_CRYPTO_AES_128BIT_key        _SBF(0x00, 2)
  86#define RK_CRYPTO_AES_192BIT_key        _SBF(0x01, 2)
  87#define RK_CRYPTO_AES_256BIT_key        _SBF(0x02, 2)
  88/* Slave = 0 / fifo = 1 */
  89#define RK_CRYPTO_AES_FIFO_MODE         BIT(1)
  90/* Encryption = 0 , Decryption = 1 */
  91#define RK_CRYPTO_AES_DEC               BIT(0)
  92
  93#define RK_CRYPTO_AES_STS               0x0084
  94#define RK_CRYPTO_AES_DONE              BIT(0)
  95
  96/* AES Input Data 0-3 Register */
  97#define RK_CRYPTO_AES_DIN_0             0x0088
  98#define RK_CRYPTO_AES_DIN_1             0x008c
  99#define RK_CRYPTO_AES_DIN_2             0x0090
 100#define RK_CRYPTO_AES_DIN_3             0x0094
 101
 102/* AES output Data 0-3 Register */
 103#define RK_CRYPTO_AES_DOUT_0            0x0098
 104#define RK_CRYPTO_AES_DOUT_1            0x009c
 105#define RK_CRYPTO_AES_DOUT_2            0x00a0
 106#define RK_CRYPTO_AES_DOUT_3            0x00a4
 107
 108/* AES IV Data 0-3 Register */
 109#define RK_CRYPTO_AES_IV_0              0x00a8
 110#define RK_CRYPTO_AES_IV_1              0x00ac
 111#define RK_CRYPTO_AES_IV_2              0x00b0
 112#define RK_CRYPTO_AES_IV_3              0x00b4
 113
 114/* AES Key Data 0-3 Register */
 115#define RK_CRYPTO_AES_KEY_0             0x00b8
 116#define RK_CRYPTO_AES_KEY_1             0x00bc
 117#define RK_CRYPTO_AES_KEY_2             0x00c0
 118#define RK_CRYPTO_AES_KEY_3             0x00c4
 119#define RK_CRYPTO_AES_KEY_4             0x00c8
 120#define RK_CRYPTO_AES_KEY_5             0x00cc
 121#define RK_CRYPTO_AES_KEY_6             0x00d0
 122#define RK_CRYPTO_AES_KEY_7             0x00d4
 123
 124/* des/tdes */
 125#define RK_CRYPTO_TDES_CTRL             0x0100
 126#define RK_CRYPTO_TDES_BYTESWAP_KEY     BIT(8)
 127#define RK_CRYPTO_TDES_BYTESWAP_IV      BIT(7)
 128#define RK_CRYPTO_TDES_BYTESWAP_DO      BIT(6)
 129#define RK_CRYPTO_TDES_BYTESWAP_DI      BIT(5)
 130/* 0: ECB, 1: CBC */
 131#define RK_CRYPTO_TDES_CHAINMODE_CBC    BIT(4)
 132/* TDES Key Mode, 0 : EDE, 1 : EEE */
 133#define RK_CRYPTO_TDES_EEE              BIT(3)
 134/* 0: DES, 1:TDES */
 135#define RK_CRYPTO_TDES_SELECT           BIT(2)
 136/* 0: Slave, 1:Fifo */
 137#define RK_CRYPTO_TDES_FIFO_MODE        BIT(1)
 138/* Encryption = 0 , Decryption = 1 */
 139#define RK_CRYPTO_TDES_DEC              BIT(0)
 140
 141#define RK_CRYPTO_TDES_STS              0x0104
 142#define RK_CRYPTO_TDES_DONE             BIT(0)
 143
 144#define RK_CRYPTO_TDES_DIN_0            0x0108
 145#define RK_CRYPTO_TDES_DIN_1            0x010c
 146#define RK_CRYPTO_TDES_DOUT_0           0x0110
 147#define RK_CRYPTO_TDES_DOUT_1           0x0114
 148#define RK_CRYPTO_TDES_IV_0             0x0118
 149#define RK_CRYPTO_TDES_IV_1             0x011c
 150#define RK_CRYPTO_TDES_KEY1_0           0x0120
 151#define RK_CRYPTO_TDES_KEY1_1           0x0124
 152#define RK_CRYPTO_TDES_KEY2_0           0x0128
 153#define RK_CRYPTO_TDES_KEY2_1           0x012c
 154#define RK_CRYPTO_TDES_KEY3_0           0x0130
 155#define RK_CRYPTO_TDES_KEY3_1           0x0134
 156
 157/* HASH */
 158#define RK_CRYPTO_HASH_CTRL             0x0180
 159#define RK_CRYPTO_HASH_SWAP_DO          BIT(3)
 160#define RK_CRYPTO_HASH_SWAP_DI          BIT(2)
 161#define RK_CRYPTO_HASH_SHA1             _SBF(0x00, 0)
 162#define RK_CRYPTO_HASH_MD5              _SBF(0x01, 0)
 163#define RK_CRYPTO_HASH_SHA256           _SBF(0x02, 0)
 164#define RK_CRYPTO_HASH_PRNG             _SBF(0x03, 0)
 165
 166#define RK_CRYPTO_HASH_STS              0x0184
 167#define RK_CRYPTO_HASH_DONE             BIT(0)
 168
 169#define RK_CRYPTO_HASH_MSG_LEN          0x0188
 170#define RK_CRYPTO_HASH_DOUT_0           0x018c
 171#define RK_CRYPTO_HASH_DOUT_1           0x0190
 172#define RK_CRYPTO_HASH_DOUT_2           0x0194
 173#define RK_CRYPTO_HASH_DOUT_3           0x0198
 174#define RK_CRYPTO_HASH_DOUT_4           0x019c
 175#define RK_CRYPTO_HASH_DOUT_5           0x01a0
 176#define RK_CRYPTO_HASH_DOUT_6           0x01a4
 177#define RK_CRYPTO_HASH_DOUT_7           0x01a8
 178
 179#define CRYPTO_READ(dev, offset)                  \
 180                readl_relaxed(((dev)->reg + (offset)))
 181#define CRYPTO_WRITE(dev, offset, val)    \
 182                writel_relaxed((val), ((dev)->reg + (offset)))
 183
 184struct rk_crypto_info {
 185        struct device                   *dev;
 186        struct clk                      *aclk;
 187        struct clk                      *hclk;
 188        struct clk                      *sclk;
 189        struct clk                      *dmaclk;
 190        struct reset_control            *rst;
 191        void __iomem                    *reg;
 192        int                             irq;
 193        struct crypto_queue             queue;
 194        struct tasklet_struct           queue_task;
 195        struct tasklet_struct           done_task;
 196        struct crypto_async_request     *async_req;
 197        int                             err;
 198        /* device lock */
 199        spinlock_t                      lock;
 200
 201        /* the public variable */
 202        struct scatterlist              *sg_src;
 203        struct scatterlist              *sg_dst;
 204        struct scatterlist              sg_tmp;
 205        struct scatterlist              *first;
 206        unsigned int                    left_bytes;
 207        void                            *addr_vir;
 208        int                             aligned;
 209        int                             align_size;
 210        size_t                          src_nents;
 211        size_t                          dst_nents;
 212        unsigned int                    total;
 213        unsigned int                    count;
 214        dma_addr_t                      addr_in;
 215        dma_addr_t                      addr_out;
 216        bool                            busy;
 217        int (*start)(struct rk_crypto_info *dev);
 218        int (*update)(struct rk_crypto_info *dev);
 219        void (*complete)(struct crypto_async_request *base, int err);
 220        int (*enable_clk)(struct rk_crypto_info *dev);
 221        void (*disable_clk)(struct rk_crypto_info *dev);
 222        int (*load_data)(struct rk_crypto_info *dev,
 223                         struct scatterlist *sg_src,
 224                         struct scatterlist *sg_dst);
 225        void (*unload_data)(struct rk_crypto_info *dev);
 226        int (*enqueue)(struct rk_crypto_info *dev,
 227                       struct crypto_async_request *async_req);
 228};
 229
 230/* the private variable of hash */
 231struct rk_ahash_ctx {
 232        struct rk_crypto_info           *dev;
 233        /* for fallback */
 234        struct crypto_ahash             *fallback_tfm;
 235};
 236
 237/* the privete variable of hash for fallback */
 238struct rk_ahash_rctx {
 239        struct ahash_request            fallback_req;
 240        u32                             mode;
 241};
 242
 243/* the private variable of cipher */
 244struct rk_cipher_ctx {
 245        struct rk_crypto_info           *dev;
 246        unsigned int                    keylen;
 247        u32                             mode;
 248        u8                              iv[AES_BLOCK_SIZE];
 249};
 250
 251enum alg_type {
 252        ALG_TYPE_HASH,
 253        ALG_TYPE_CIPHER,
 254};
 255
 256struct rk_crypto_tmp {
 257        struct rk_crypto_info           *dev;
 258        union {
 259                struct crypto_alg       crypto;
 260                struct ahash_alg        hash;
 261        } alg;
 262        enum alg_type                   type;
 263};
 264
 265extern struct rk_crypto_tmp rk_ecb_aes_alg;
 266extern struct rk_crypto_tmp rk_cbc_aes_alg;
 267extern struct rk_crypto_tmp rk_ecb_des_alg;
 268extern struct rk_crypto_tmp rk_cbc_des_alg;
 269extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
 270extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
 271
 272extern struct rk_crypto_tmp rk_ahash_sha1;
 273extern struct rk_crypto_tmp rk_ahash_sha256;
 274extern struct rk_crypto_tmp rk_ahash_md5;
 275
 276#endif
 277