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7#include <linux/io.h>
8#include <linux/module.h>
9#include <linux/gpio/driver.h>
10#include <linux/of_gpio.h>
11#include <linux/platform_device.h>
12
13#define ALTERA_GPIO_MAX_NGPIO 32
14#define ALTERA_GPIO_DATA 0x0
15#define ALTERA_GPIO_DIR 0x4
16#define ALTERA_GPIO_IRQ_MASK 0x8
17#define ALTERA_GPIO_EDGE_CAP 0xc
18
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27
28struct altera_gpio_chip {
29 struct of_mm_gpio_chip mmchip;
30 raw_spinlock_t gpio_lock;
31 int interrupt_trigger;
32 int mapped_irq;
33 struct irq_chip irq_chip;
34};
35
36static void altera_gpio_irq_unmask(struct irq_data *d)
37{
38 struct altera_gpio_chip *altera_gc;
39 struct of_mm_gpio_chip *mm_gc;
40 unsigned long flags;
41 u32 intmask;
42
43 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));
44 mm_gc = &altera_gc->mmchip;
45
46 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);
47 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
48
49 intmask |= BIT(irqd_to_hwirq(d));
50 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
51 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);
52}
53
54static void altera_gpio_irq_mask(struct irq_data *d)
55{
56 struct altera_gpio_chip *altera_gc;
57 struct of_mm_gpio_chip *mm_gc;
58 unsigned long flags;
59 u32 intmask;
60
61 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));
62 mm_gc = &altera_gc->mmchip;
63
64 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);
65 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
66
67 intmask &= ~BIT(irqd_to_hwirq(d));
68 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
69 raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);
70}
71
72
73
74
75
76static int altera_gpio_irq_set_type(struct irq_data *d,
77 unsigned int type)
78{
79 struct altera_gpio_chip *altera_gc;
80
81 altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));
82
83 if (type == IRQ_TYPE_NONE) {
84 irq_set_handler_locked(d, handle_bad_irq);
85 return 0;
86 }
87 if (type == altera_gc->interrupt_trigger) {
88 if (type == IRQ_TYPE_LEVEL_HIGH)
89 irq_set_handler_locked(d, handle_level_irq);
90 else
91 irq_set_handler_locked(d, handle_simple_irq);
92 return 0;
93 }
94 irq_set_handler_locked(d, handle_bad_irq);
95 return -EINVAL;
96}
97
98static unsigned int altera_gpio_irq_startup(struct irq_data *d)
99{
100 altera_gpio_irq_unmask(d);
101
102 return 0;
103}
104
105static int altera_gpio_get(struct gpio_chip *gc, unsigned offset)
106{
107 struct of_mm_gpio_chip *mm_gc;
108
109 mm_gc = to_of_mm_gpio_chip(gc);
110
111 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset));
112}
113
114static void altera_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
115{
116 struct of_mm_gpio_chip *mm_gc;
117 struct altera_gpio_chip *chip;
118 unsigned long flags;
119 unsigned int data_reg;
120
121 mm_gc = to_of_mm_gpio_chip(gc);
122 chip = gpiochip_get_data(gc);
123
124 raw_spin_lock_irqsave(&chip->gpio_lock, flags);
125 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
126 if (value)
127 data_reg |= BIT(offset);
128 else
129 data_reg &= ~BIT(offset);
130 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
131 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
132}
133
134static int altera_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
135{
136 struct of_mm_gpio_chip *mm_gc;
137 struct altera_gpio_chip *chip;
138 unsigned long flags;
139 unsigned int gpio_ddr;
140
141 mm_gc = to_of_mm_gpio_chip(gc);
142 chip = gpiochip_get_data(gc);
143
144 raw_spin_lock_irqsave(&chip->gpio_lock, flags);
145
146 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
147 gpio_ddr &= ~BIT(offset);
148 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
149 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
150
151 return 0;
152}
153
154static int altera_gpio_direction_output(struct gpio_chip *gc,
155 unsigned offset, int value)
156{
157 struct of_mm_gpio_chip *mm_gc;
158 struct altera_gpio_chip *chip;
159 unsigned long flags;
160 unsigned int data_reg, gpio_ddr;
161
162 mm_gc = to_of_mm_gpio_chip(gc);
163 chip = gpiochip_get_data(gc);
164
165 raw_spin_lock_irqsave(&chip->gpio_lock, flags);
166
167 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
168 if (value)
169 data_reg |= BIT(offset);
170 else
171 data_reg &= ~BIT(offset);
172 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
173
174
175 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
176 gpio_ddr |= BIT(offset);
177 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
178 raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
179
180 return 0;
181}
182
183static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
184{
185 struct altera_gpio_chip *altera_gc;
186 struct irq_chip *chip;
187 struct of_mm_gpio_chip *mm_gc;
188 struct irq_domain *irqdomain;
189 unsigned long status;
190 int i;
191
192 altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));
193 chip = irq_desc_get_chip(desc);
194 mm_gc = &altera_gc->mmchip;
195 irqdomain = altera_gc->mmchip.gc.irq.domain;
196
197 chained_irq_enter(chip, desc);
198
199 while ((status =
200 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) &
201 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
202 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP);
203 for_each_set_bit(i, &status, mm_gc->gc.ngpio) {
204 generic_handle_irq(irq_find_mapping(irqdomain, i));
205 }
206 }
207
208 chained_irq_exit(chip, desc);
209}
210
211static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
212{
213 struct altera_gpio_chip *altera_gc;
214 struct irq_chip *chip;
215 struct of_mm_gpio_chip *mm_gc;
216 struct irq_domain *irqdomain;
217 unsigned long status;
218 int i;
219
220 altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));
221 chip = irq_desc_get_chip(desc);
222 mm_gc = &altera_gc->mmchip;
223 irqdomain = altera_gc->mmchip.gc.irq.domain;
224
225 chained_irq_enter(chip, desc);
226
227 status = readl(mm_gc->regs + ALTERA_GPIO_DATA);
228 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
229
230 for_each_set_bit(i, &status, mm_gc->gc.ngpio) {
231 generic_handle_irq(irq_find_mapping(irqdomain, i));
232 }
233 chained_irq_exit(chip, desc);
234}
235
236static int altera_gpio_probe(struct platform_device *pdev)
237{
238 struct device_node *node = pdev->dev.of_node;
239 int reg, ret;
240 struct altera_gpio_chip *altera_gc;
241 struct gpio_irq_chip *girq;
242
243 altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL);
244 if (!altera_gc)
245 return -ENOMEM;
246
247 raw_spin_lock_init(&altera_gc->gpio_lock);
248
249 if (of_property_read_u32(node, "altr,ngpio", ®))
250
251 altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO;
252 else
253 altera_gc->mmchip.gc.ngpio = reg;
254
255 if (altera_gc->mmchip.gc.ngpio > ALTERA_GPIO_MAX_NGPIO) {
256 dev_warn(&pdev->dev,
257 "ngpio is greater than %d, defaulting to %d\n",
258 ALTERA_GPIO_MAX_NGPIO, ALTERA_GPIO_MAX_NGPIO);
259 altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO;
260 }
261
262 altera_gc->mmchip.gc.direction_input = altera_gpio_direction_input;
263 altera_gc->mmchip.gc.direction_output = altera_gpio_direction_output;
264 altera_gc->mmchip.gc.get = altera_gpio_get;
265 altera_gc->mmchip.gc.set = altera_gpio_set;
266 altera_gc->mmchip.gc.owner = THIS_MODULE;
267 altera_gc->mmchip.gc.parent = &pdev->dev;
268
269 altera_gc->mapped_irq = platform_get_irq(pdev, 0);
270
271 if (altera_gc->mapped_irq < 0)
272 goto skip_irq;
273
274 if (of_property_read_u32(node, "altr,interrupt-type", ®)) {
275 dev_err(&pdev->dev,
276 "altr,interrupt-type value not set in device tree\n");
277 return -EINVAL;
278 }
279 altera_gc->interrupt_trigger = reg;
280
281 altera_gc->irq_chip.name = "altera-gpio";
282 altera_gc->irq_chip.irq_mask = altera_gpio_irq_mask;
283 altera_gc->irq_chip.irq_unmask = altera_gpio_irq_unmask;
284 altera_gc->irq_chip.irq_set_type = altera_gpio_irq_set_type;
285 altera_gc->irq_chip.irq_startup = altera_gpio_irq_startup;
286 altera_gc->irq_chip.irq_shutdown = altera_gpio_irq_mask;
287
288 girq = &altera_gc->mmchip.gc.irq;
289 girq->chip = &altera_gc->irq_chip;
290 if (altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH)
291 girq->parent_handler = altera_gpio_irq_leveL_high_handler;
292 else
293 girq->parent_handler = altera_gpio_irq_edge_handler;
294 girq->num_parents = 1;
295 girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),
296 GFP_KERNEL);
297 if (!girq->parents)
298 return -ENOMEM;
299 girq->default_type = IRQ_TYPE_NONE;
300 girq->handler = handle_bad_irq;
301 girq->parents[0] = altera_gc->mapped_irq;
302
303skip_irq:
304 ret = of_mm_gpiochip_add_data(node, &altera_gc->mmchip, altera_gc);
305 if (ret) {
306 dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n");
307 return ret;
308 }
309
310 platform_set_drvdata(pdev, altera_gc);
311
312 return 0;
313}
314
315static int altera_gpio_remove(struct platform_device *pdev)
316{
317 struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev);
318
319 of_mm_gpiochip_remove(&altera_gc->mmchip);
320
321 return 0;
322}
323
324static const struct of_device_id altera_gpio_of_match[] = {
325 { .compatible = "altr,pio-1.0", },
326 {},
327};
328MODULE_DEVICE_TABLE(of, altera_gpio_of_match);
329
330static struct platform_driver altera_gpio_driver = {
331 .driver = {
332 .name = "altera_gpio",
333 .of_match_table = of_match_ptr(altera_gpio_of_match),
334 },
335 .probe = altera_gpio_probe,
336 .remove = altera_gpio_remove,
337};
338
339static int __init altera_gpio_init(void)
340{
341 return platform_driver_register(&altera_gpio_driver);
342}
343subsys_initcall(altera_gpio_init);
344
345static void __exit altera_gpio_exit(void)
346{
347 platform_driver_unregister(&altera_gpio_driver);
348}
349module_exit(altera_gpio_exit);
350
351MODULE_AUTHOR("Tien Hock Loh <thloh@altera.com>");
352MODULE_DESCRIPTION("Altera GPIO driver");
353MODULE_LICENSE("GPL");
354
