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11#include <linux/acpi.h>
12#include <linux/gpio/driver.h>
13#include <linux/gpio/consumer.h>
14#include <linux/i2c.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/of_platform.h>
19#include <linux/platform_data/pca953x.h>
20#include <linux/regmap.h>
21#include <linux/regulator/consumer.h>
22#include <linux/slab.h>
23
24#include <asm/unaligned.h>
25
26#define PCA953X_INPUT 0x00
27#define PCA953X_OUTPUT 0x01
28#define PCA953X_INVERT 0x02
29#define PCA953X_DIRECTION 0x03
30
31#define REG_ADDR_MASK 0x3f
32#define REG_ADDR_EXT 0x40
33#define REG_ADDR_AI 0x80
34
35#define PCA957X_IN 0x00
36#define PCA957X_INVRT 0x01
37#define PCA957X_BKEN 0x02
38#define PCA957X_PUPD 0x03
39#define PCA957X_CFG 0x04
40#define PCA957X_OUT 0x05
41#define PCA957X_MSK 0x06
42#define PCA957X_INTS 0x07
43
44#define PCAL953X_OUT_STRENGTH 0x20
45#define PCAL953X_IN_LATCH 0x22
46#define PCAL953X_PULL_EN 0x23
47#define PCAL953X_PULL_SEL 0x24
48#define PCAL953X_INT_MASK 0x25
49#define PCAL953X_INT_STAT 0x26
50#define PCAL953X_OUT_CONF 0x27
51
52#define PCAL6524_INT_EDGE 0x28
53#define PCAL6524_INT_CLR 0x2a
54#define PCAL6524_IN_STATUS 0x2b
55#define PCAL6524_OUT_INDCONF 0x2c
56#define PCAL6524_DEBOUNCE 0x2d
57
58#define PCA_GPIO_MASK 0x00FF
59
60#define PCAL_GPIO_MASK 0x1f
61#define PCAL_PINCTRL_MASK 0x60
62
63#define PCA_INT 0x0100
64#define PCA_PCAL 0x0200
65#define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66#define PCA953X_TYPE 0x1000
67#define PCA957X_TYPE 0x2000
68#define PCA_TYPE_MASK 0xF000
69
70#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
71
72static const struct i2c_device_id pca953x_id[] = {
73 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
74 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
75 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
76 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
77 { "pca9536", 4 | PCA953X_TYPE, },
78 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
79 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
80 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
81 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
82 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
83 { "pca9556", 8 | PCA953X_TYPE, },
84 { "pca9557", 8 | PCA953X_TYPE, },
85 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
86 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
87 { "pca9698", 40 | PCA953X_TYPE, },
88
89 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
90 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
92
93 { "max7310", 8 | PCA953X_TYPE, },
94 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
95 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
97 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
98 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
99 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
101 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
102 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
103 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
104 { "xra1202", 8 | PCA953X_TYPE },
105 { }
106};
107MODULE_DEVICE_TABLE(i2c, pca953x_id);
108
109static const struct acpi_device_id pca953x_acpi_ids[] = {
110 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
111 { }
112};
113MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
114
115#define MAX_BANK 5
116#define BANK_SZ 8
117
118#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
119
120struct pca953x_reg_config {
121 int direction;
122 int output;
123 int input;
124 int invert;
125};
126
127static const struct pca953x_reg_config pca953x_regs = {
128 .direction = PCA953X_DIRECTION,
129 .output = PCA953X_OUTPUT,
130 .input = PCA953X_INPUT,
131 .invert = PCA953X_INVERT,
132};
133
134static const struct pca953x_reg_config pca957x_regs = {
135 .direction = PCA957X_CFG,
136 .output = PCA957X_OUT,
137 .input = PCA957X_IN,
138 .invert = PCA957X_INVRT,
139};
140
141struct pca953x_chip {
142 unsigned gpio_start;
143 struct mutex i2c_lock;
144 struct regmap *regmap;
145
146#ifdef CONFIG_GPIO_PCA953X_IRQ
147 struct mutex irq_lock;
148 u8 irq_mask[MAX_BANK];
149 u8 irq_stat[MAX_BANK];
150 u8 irq_trig_raise[MAX_BANK];
151 u8 irq_trig_fall[MAX_BANK];
152 struct irq_chip irq_chip;
153#endif
154 atomic_t wakeup_path;
155
156 struct i2c_client *client;
157 struct gpio_chip gpio_chip;
158 const char *const *names;
159 unsigned long driver_data;
160 struct regulator *regulator;
161
162 const struct pca953x_reg_config *regs;
163};
164
165static int pca953x_bank_shift(struct pca953x_chip *chip)
166{
167 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
168}
169
170#define PCA953x_BANK_INPUT BIT(0)
171#define PCA953x_BANK_OUTPUT BIT(1)
172#define PCA953x_BANK_POLARITY BIT(2)
173#define PCA953x_BANK_CONFIG BIT(3)
174
175#define PCA957x_BANK_INPUT BIT(0)
176#define PCA957x_BANK_POLARITY BIT(1)
177#define PCA957x_BANK_BUSHOLD BIT(2)
178#define PCA957x_BANK_CONFIG BIT(4)
179#define PCA957x_BANK_OUTPUT BIT(5)
180
181#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
182#define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
183#define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
184#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
185#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
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214
215static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
216 u32 checkbank)
217{
218 int bank_shift = pca953x_bank_shift(chip);
219 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
220 int offset = reg & (BIT(bank_shift) - 1);
221
222
223 if (reg & REG_ADDR_EXT) {
224 if (!(chip->driver_data & PCA_PCAL))
225 return false;
226 bank += 8;
227 }
228
229
230 if (!(BIT(bank) & checkbank))
231 return false;
232
233
234 if (offset >= NBANK(chip))
235 return false;
236
237 return true;
238}
239
240static bool pca953x_readable_register(struct device *dev, unsigned int reg)
241{
242 struct pca953x_chip *chip = dev_get_drvdata(dev);
243 u32 bank;
244
245 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
246 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
247 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
248 } else {
249 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
250 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
251 PCA957x_BANK_BUSHOLD;
252 }
253
254 if (chip->driver_data & PCA_PCAL) {
255 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
256 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
257 PCAL9xxx_BANK_IRQ_STAT;
258 }
259
260 return pca953x_check_register(chip, reg, bank);
261}
262
263static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
264{
265 struct pca953x_chip *chip = dev_get_drvdata(dev);
266 u32 bank;
267
268 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
269 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
270 PCA953x_BANK_CONFIG;
271 } else {
272 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
273 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
274 }
275
276 if (chip->driver_data & PCA_PCAL)
277 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
278 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
279
280 return pca953x_check_register(chip, reg, bank);
281}
282
283static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
284{
285 struct pca953x_chip *chip = dev_get_drvdata(dev);
286 u32 bank;
287
288 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
289 bank = PCA953x_BANK_INPUT;
290 else
291 bank = PCA957x_BANK_INPUT;
292
293 if (chip->driver_data & PCA_PCAL)
294 bank |= PCAL9xxx_BANK_IRQ_STAT;
295
296 return pca953x_check_register(chip, reg, bank);
297}
298
299static const struct regmap_config pca953x_i2c_regmap = {
300 .reg_bits = 8,
301 .val_bits = 8,
302
303 .readable_reg = pca953x_readable_register,
304 .writeable_reg = pca953x_writeable_register,
305 .volatile_reg = pca953x_volatile_register,
306
307 .cache_type = REGCACHE_RBTREE,
308
309 .max_register = 0xff,
310};
311
312static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
313 bool write, bool addrinc)
314{
315 int bank_shift = pca953x_bank_shift(chip);
316 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
317 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
318 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
319
320
321 if (!addrinc)
322 return regaddr;
323
324
325 if (write && NBANK(chip) > 2)
326 regaddr |= REG_ADDR_AI;
327
328
329 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
330 regaddr |= REG_ADDR_AI;
331
332 return regaddr;
333}
334
335static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
336{
337 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
338 int ret;
339
340 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
341 if (ret < 0) {
342 dev_err(&chip->client->dev, "failed writing register\n");
343 return ret;
344 }
345
346 return 0;
347}
348
349static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
350{
351 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
352 int ret;
353
354 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
355 if (ret < 0) {
356 dev_err(&chip->client->dev, "failed reading register\n");
357 return ret;
358 }
359
360 return 0;
361}
362
363static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
364{
365 struct pca953x_chip *chip = gpiochip_get_data(gc);
366 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
367 true, false);
368 u8 bit = BIT(off % BANK_SZ);
369 int ret;
370
371 mutex_lock(&chip->i2c_lock);
372 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
373 mutex_unlock(&chip->i2c_lock);
374 return ret;
375}
376
377static int pca953x_gpio_direction_output(struct gpio_chip *gc,
378 unsigned off, int val)
379{
380 struct pca953x_chip *chip = gpiochip_get_data(gc);
381 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
382 true, false);
383 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
384 true, false);
385 u8 bit = BIT(off % BANK_SZ);
386 int ret;
387
388 mutex_lock(&chip->i2c_lock);
389
390 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
391 if (ret)
392 goto exit;
393
394
395 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
396exit:
397 mutex_unlock(&chip->i2c_lock);
398 return ret;
399}
400
401static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
402{
403 struct pca953x_chip *chip = gpiochip_get_data(gc);
404 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
405 true, false);
406 u8 bit = BIT(off % BANK_SZ);
407 u32 reg_val;
408 int ret;
409
410 mutex_lock(&chip->i2c_lock);
411 ret = regmap_read(chip->regmap, inreg, ®_val);
412 mutex_unlock(&chip->i2c_lock);
413 if (ret < 0) {
414
415
416
417
418 return 0;
419 }
420
421 return !!(reg_val & bit);
422}
423
424static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
425{
426 struct pca953x_chip *chip = gpiochip_get_data(gc);
427 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
428 true, false);
429 u8 bit = BIT(off % BANK_SZ);
430
431 mutex_lock(&chip->i2c_lock);
432 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
433 mutex_unlock(&chip->i2c_lock);
434}
435
436static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
437{
438 struct pca953x_chip *chip = gpiochip_get_data(gc);
439 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
440 true, false);
441 u8 bit = BIT(off % BANK_SZ);
442 u32 reg_val;
443 int ret;
444
445 mutex_lock(&chip->i2c_lock);
446 ret = regmap_read(chip->regmap, dirreg, ®_val);
447 mutex_unlock(&chip->i2c_lock);
448 if (ret < 0)
449 return ret;
450
451 return !!(reg_val & bit);
452}
453
454static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
455 unsigned long *mask, unsigned long *bits)
456{
457 struct pca953x_chip *chip = gpiochip_get_data(gc);
458 unsigned int bank_mask, bank_val;
459 int bank;
460 u8 reg_val[MAX_BANK];
461 int ret;
462
463 mutex_lock(&chip->i2c_lock);
464 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
465 if (ret)
466 goto exit;
467
468 for (bank = 0; bank < NBANK(chip); bank++) {
469 bank_mask = mask[bank / sizeof(*mask)] >>
470 ((bank % sizeof(*mask)) * 8);
471 if (bank_mask) {
472 bank_val = bits[bank / sizeof(*bits)] >>
473 ((bank % sizeof(*bits)) * 8);
474 bank_val &= bank_mask;
475 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
476 }
477 }
478
479 pca953x_write_regs(chip, chip->regs->output, reg_val);
480exit:
481 mutex_unlock(&chip->i2c_lock);
482}
483
484static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
485 unsigned int offset,
486 unsigned long config)
487{
488 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
489 true, false);
490 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
491 true, false);
492 u8 bit = BIT(offset % BANK_SZ);
493 int ret;
494
495
496
497
498
499 if (!(chip->driver_data & PCA_PCAL))
500 return -ENOTSUPP;
501
502 mutex_lock(&chip->i2c_lock);
503
504
505 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
506 if (ret)
507 goto exit;
508
509
510 if (config == PIN_CONFIG_BIAS_PULL_UP)
511 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
512 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
513 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
514 if (ret)
515 goto exit;
516
517
518 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
519
520exit:
521 mutex_unlock(&chip->i2c_lock);
522 return ret;
523}
524
525static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
526 unsigned long config)
527{
528 struct pca953x_chip *chip = gpiochip_get_data(gc);
529
530 switch (config) {
531 case PIN_CONFIG_BIAS_PULL_UP:
532 case PIN_CONFIG_BIAS_PULL_DOWN:
533 return pca953x_gpio_set_pull_up_down(chip, offset, config);
534 default:
535 return -ENOTSUPP;
536 }
537}
538
539static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
540{
541 struct gpio_chip *gc;
542
543 gc = &chip->gpio_chip;
544
545 gc->direction_input = pca953x_gpio_direction_input;
546 gc->direction_output = pca953x_gpio_direction_output;
547 gc->get = pca953x_gpio_get_value;
548 gc->set = pca953x_gpio_set_value;
549 gc->get_direction = pca953x_gpio_get_direction;
550 gc->set_multiple = pca953x_gpio_set_multiple;
551 gc->set_config = pca953x_gpio_set_config;
552 gc->can_sleep = true;
553
554 gc->base = chip->gpio_start;
555 gc->ngpio = gpios;
556 gc->label = dev_name(&chip->client->dev);
557 gc->parent = &chip->client->dev;
558 gc->owner = THIS_MODULE;
559 gc->names = chip->names;
560}
561
562#ifdef CONFIG_GPIO_PCA953X_IRQ
563static void pca953x_irq_mask(struct irq_data *d)
564{
565 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
566 struct pca953x_chip *chip = gpiochip_get_data(gc);
567
568 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
569}
570
571static void pca953x_irq_unmask(struct irq_data *d)
572{
573 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
574 struct pca953x_chip *chip = gpiochip_get_data(gc);
575
576 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
577}
578
579static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
580{
581 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
582 struct pca953x_chip *chip = gpiochip_get_data(gc);
583
584 if (on)
585 atomic_inc(&chip->wakeup_path);
586 else
587 atomic_dec(&chip->wakeup_path);
588
589 return irq_set_irq_wake(chip->client->irq, on);
590}
591
592static void pca953x_irq_bus_lock(struct irq_data *d)
593{
594 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
595 struct pca953x_chip *chip = gpiochip_get_data(gc);
596
597 mutex_lock(&chip->irq_lock);
598}
599
600static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
601{
602 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
603 struct pca953x_chip *chip = gpiochip_get_data(gc);
604 u8 new_irqs;
605 int level, i;
606 u8 invert_irq_mask[MAX_BANK];
607 u8 reg_direction[MAX_BANK];
608
609 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
610
611 if (chip->driver_data & PCA_PCAL) {
612
613 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
614
615 for (i = 0; i < NBANK(chip); i++)
616 invert_irq_mask[i] = ~chip->irq_mask[i];
617
618
619 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
620 }
621
622
623 for (i = 0; i < NBANK(chip); i++) {
624 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
625 new_irqs &= reg_direction[i];
626
627 while (new_irqs) {
628 level = __ffs(new_irqs);
629 pca953x_gpio_direction_input(&chip->gpio_chip,
630 level + (BANK_SZ * i));
631 new_irqs &= ~(1 << level);
632 }
633 }
634
635 mutex_unlock(&chip->irq_lock);
636}
637
638static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
639{
640 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
641 struct pca953x_chip *chip = gpiochip_get_data(gc);
642 int bank_nb = d->hwirq / BANK_SZ;
643 u8 mask = 1 << (d->hwirq % BANK_SZ);
644
645 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
646 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
647 d->irq, type);
648 return -EINVAL;
649 }
650
651 if (type & IRQ_TYPE_EDGE_FALLING)
652 chip->irq_trig_fall[bank_nb] |= mask;
653 else
654 chip->irq_trig_fall[bank_nb] &= ~mask;
655
656 if (type & IRQ_TYPE_EDGE_RISING)
657 chip->irq_trig_raise[bank_nb] |= mask;
658 else
659 chip->irq_trig_raise[bank_nb] &= ~mask;
660
661 return 0;
662}
663
664static void pca953x_irq_shutdown(struct irq_data *d)
665{
666 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
667 struct pca953x_chip *chip = gpiochip_get_data(gc);
668 u8 mask = 1 << (d->hwirq % BANK_SZ);
669
670 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
671 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
672}
673
674static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
675{
676 u8 cur_stat[MAX_BANK];
677 u8 old_stat[MAX_BANK];
678 bool pending_seen = false;
679 bool trigger_seen = false;
680 u8 trigger[MAX_BANK];
681 u8 reg_direction[MAX_BANK];
682 int ret, i;
683
684 if (chip->driver_data & PCA_PCAL) {
685
686 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
687 if (ret)
688 return false;
689
690
691 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
692 if (ret)
693 return false;
694
695 for (i = 0; i < NBANK(chip); i++) {
696
697 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
698 (cur_stat[i] & chip->irq_trig_raise[i]);
699 pending[i] &= trigger[i];
700 if (pending[i])
701 pending_seen = true;
702 }
703
704 return pending_seen;
705 }
706
707 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
708 if (ret)
709 return false;
710
711
712 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
713 for (i = 0; i < NBANK(chip); i++)
714 cur_stat[i] &= reg_direction[i];
715
716 memcpy(old_stat, chip->irq_stat, NBANK(chip));
717
718 for (i = 0; i < NBANK(chip); i++) {
719 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
720 if (trigger[i])
721 trigger_seen = true;
722 }
723
724 if (!trigger_seen)
725 return false;
726
727 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
728
729 for (i = 0; i < NBANK(chip); i++) {
730 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
731 (cur_stat[i] & chip->irq_trig_raise[i]);
732 pending[i] &= trigger[i];
733 if (pending[i])
734 pending_seen = true;
735 }
736
737 return pending_seen;
738}
739
740static irqreturn_t pca953x_irq_handler(int irq, void *devid)
741{
742 struct pca953x_chip *chip = devid;
743 u8 pending[MAX_BANK];
744 u8 level;
745 unsigned nhandled = 0;
746 int i;
747
748 if (!pca953x_irq_pending(chip, pending))
749 return IRQ_NONE;
750
751 for (i = 0; i < NBANK(chip); i++) {
752 while (pending[i]) {
753 level = __ffs(pending[i]);
754 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
755 level + (BANK_SZ * i)));
756 pending[i] &= ~(1 << level);
757 nhandled++;
758 }
759 }
760
761 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
762}
763
764static int pca953x_irq_setup(struct pca953x_chip *chip,
765 int irq_base)
766{
767 struct i2c_client *client = chip->client;
768 struct irq_chip *irq_chip = &chip->irq_chip;
769 u8 reg_direction[MAX_BANK];
770 int ret, i;
771
772 if (!client->irq)
773 return 0;
774
775 if (irq_base == -1)
776 return 0;
777
778 if (!(chip->driver_data & PCA_INT))
779 return 0;
780
781 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
782 if (ret)
783 return ret;
784
785
786
787
788
789
790 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
791 for (i = 0; i < NBANK(chip); i++)
792 chip->irq_stat[i] &= reg_direction[i];
793 mutex_init(&chip->irq_lock);
794
795 ret = devm_request_threaded_irq(&client->dev, client->irq,
796 NULL, pca953x_irq_handler,
797 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
798 IRQF_SHARED,
799 dev_name(&client->dev), chip);
800 if (ret) {
801 dev_err(&client->dev, "failed to request irq %d\n",
802 client->irq);
803 return ret;
804 }
805
806 irq_chip->name = dev_name(&chip->client->dev);
807 irq_chip->irq_mask = pca953x_irq_mask;
808 irq_chip->irq_unmask = pca953x_irq_unmask;
809 irq_chip->irq_set_wake = pca953x_irq_set_wake;
810 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
811 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
812 irq_chip->irq_set_type = pca953x_irq_set_type;
813 irq_chip->irq_shutdown = pca953x_irq_shutdown;
814
815 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
816 irq_base, handle_simple_irq,
817 IRQ_TYPE_NONE);
818 if (ret) {
819 dev_err(&client->dev,
820 "could not connect irqchip to gpiochip\n");
821 return ret;
822 }
823
824 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
825
826 return 0;
827}
828
829#else
830static int pca953x_irq_setup(struct pca953x_chip *chip,
831 int irq_base)
832{
833 struct i2c_client *client = chip->client;
834
835 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
836 dev_warn(&client->dev, "interrupt support not compiled in\n");
837
838 return 0;
839}
840#endif
841
842static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
843{
844 int ret;
845 u8 val[MAX_BANK];
846
847 ret = regcache_sync_region(chip->regmap, chip->regs->output,
848 chip->regs->output + NBANK(chip));
849 if (ret != 0)
850 goto out;
851
852 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
853 chip->regs->direction + NBANK(chip));
854 if (ret != 0)
855 goto out;
856
857
858 if (invert)
859 memset(val, 0xFF, NBANK(chip));
860 else
861 memset(val, 0, NBANK(chip));
862
863 ret = pca953x_write_regs(chip, chip->regs->invert, val);
864out:
865 return ret;
866}
867
868static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
869{
870 int ret;
871 u8 val[MAX_BANK];
872
873 ret = device_pca95xx_init(chip, invert);
874 if (ret)
875 goto out;
876
877
878 memset(val, 0x02, NBANK(chip));
879 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
880 if (ret)
881 goto out;
882
883 return 0;
884out:
885 return ret;
886}
887
888static const struct of_device_id pca953x_dt_ids[];
889
890static int pca953x_probe(struct i2c_client *client,
891 const struct i2c_device_id *i2c_id)
892{
893 struct pca953x_platform_data *pdata;
894 struct pca953x_chip *chip;
895 int irq_base = 0;
896 int ret;
897 u32 invert = 0;
898 struct regulator *reg;
899
900 chip = devm_kzalloc(&client->dev,
901 sizeof(struct pca953x_chip), GFP_KERNEL);
902 if (chip == NULL)
903 return -ENOMEM;
904
905 pdata = dev_get_platdata(&client->dev);
906 if (pdata) {
907 irq_base = pdata->irq_base;
908 chip->gpio_start = pdata->gpio_base;
909 invert = pdata->invert;
910 chip->names = pdata->names;
911 } else {
912 struct gpio_desc *reset_gpio;
913
914 chip->gpio_start = -1;
915 irq_base = 0;
916
917
918
919
920
921
922
923
924 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
925 GPIOD_OUT_LOW);
926 if (IS_ERR(reset_gpio))
927 return PTR_ERR(reset_gpio);
928 }
929
930 chip->client = client;
931
932 reg = devm_regulator_get(&client->dev, "vcc");
933 if (IS_ERR(reg)) {
934 ret = PTR_ERR(reg);
935 if (ret != -EPROBE_DEFER)
936 dev_err(&client->dev, "reg get err: %d\n", ret);
937 return ret;
938 }
939 ret = regulator_enable(reg);
940 if (ret) {
941 dev_err(&client->dev, "reg en err: %d\n", ret);
942 return ret;
943 }
944 chip->regulator = reg;
945
946 if (i2c_id) {
947 chip->driver_data = i2c_id->driver_data;
948 } else {
949 const struct acpi_device_id *acpi_id;
950 struct device *dev = &client->dev;
951
952 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
953 if (!chip->driver_data) {
954 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
955 if (!acpi_id) {
956 ret = -ENODEV;
957 goto err_exit;
958 }
959
960 chip->driver_data = acpi_id->driver_data;
961 }
962 }
963
964 i2c_set_clientdata(client, chip);
965
966 chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
967 if (IS_ERR(chip->regmap)) {
968 ret = PTR_ERR(chip->regmap);
969 goto err_exit;
970 }
971
972 regcache_mark_dirty(chip->regmap);
973
974 mutex_init(&chip->i2c_lock);
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991 lockdep_set_subclass(&chip->i2c_lock,
992 i2c_adapter_depth(client->adapter));
993
994
995
996
997 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
998
999 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1000 chip->regs = &pca953x_regs;
1001 ret = device_pca95xx_init(chip, invert);
1002 } else {
1003 chip->regs = &pca957x_regs;
1004 ret = device_pca957x_init(chip, invert);
1005 }
1006 if (ret)
1007 goto err_exit;
1008
1009 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1010 if (ret)
1011 goto err_exit;
1012
1013 ret = pca953x_irq_setup(chip, irq_base);
1014 if (ret)
1015 goto err_exit;
1016
1017 if (pdata && pdata->setup) {
1018 ret = pdata->setup(client, chip->gpio_chip.base,
1019 chip->gpio_chip.ngpio, pdata->context);
1020 if (ret < 0)
1021 dev_warn(&client->dev, "setup failed, %d\n", ret);
1022 }
1023
1024 return 0;
1025
1026err_exit:
1027 regulator_disable(chip->regulator);
1028 return ret;
1029}
1030
1031static int pca953x_remove(struct i2c_client *client)
1032{
1033 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1034 struct pca953x_chip *chip = i2c_get_clientdata(client);
1035 int ret;
1036
1037 if (pdata && pdata->teardown) {
1038 ret = pdata->teardown(client, chip->gpio_chip.base,
1039 chip->gpio_chip.ngpio, pdata->context);
1040 if (ret < 0)
1041 dev_err(&client->dev, "%s failed, %d\n",
1042 "teardown", ret);
1043 } else {
1044 ret = 0;
1045 }
1046
1047 regulator_disable(chip->regulator);
1048
1049 return ret;
1050}
1051
1052#ifdef CONFIG_PM_SLEEP
1053static int pca953x_regcache_sync(struct device *dev)
1054{
1055 struct pca953x_chip *chip = dev_get_drvdata(dev);
1056 int ret;
1057
1058
1059
1060
1061
1062 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1063 chip->regs->direction + NBANK(chip));
1064 if (ret != 0) {
1065 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1066 return ret;
1067 }
1068
1069 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1070 chip->regs->output + NBANK(chip));
1071 if (ret != 0) {
1072 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1073 return ret;
1074 }
1075
1076#ifdef CONFIG_GPIO_PCA953X_IRQ
1077 if (chip->driver_data & PCA_PCAL) {
1078 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1079 PCAL953X_IN_LATCH + NBANK(chip));
1080 if (ret != 0) {
1081 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1082 ret);
1083 return ret;
1084 }
1085
1086 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1087 PCAL953X_INT_MASK + NBANK(chip));
1088 if (ret != 0) {
1089 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1090 ret);
1091 return ret;
1092 }
1093 }
1094#endif
1095
1096 return 0;
1097}
1098
1099static int pca953x_suspend(struct device *dev)
1100{
1101 struct pca953x_chip *chip = dev_get_drvdata(dev);
1102
1103 regcache_cache_only(chip->regmap, true);
1104
1105 if (atomic_read(&chip->wakeup_path))
1106 device_set_wakeup_path(dev);
1107 else
1108 regulator_disable(chip->regulator);
1109
1110 return 0;
1111}
1112
1113static int pca953x_resume(struct device *dev)
1114{
1115 struct pca953x_chip *chip = dev_get_drvdata(dev);
1116 int ret;
1117
1118 if (!atomic_read(&chip->wakeup_path)) {
1119 ret = regulator_enable(chip->regulator);
1120 if (ret != 0) {
1121 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1122 return 0;
1123 }
1124 }
1125
1126 regcache_cache_only(chip->regmap, false);
1127 regcache_mark_dirty(chip->regmap);
1128 ret = pca953x_regcache_sync(dev);
1129 if (ret)
1130 return ret;
1131
1132 ret = regcache_sync(chip->regmap);
1133 if (ret != 0) {
1134 dev_err(dev, "Failed to restore register map: %d\n", ret);
1135 return ret;
1136 }
1137
1138 return 0;
1139}
1140#endif
1141
1142
1143#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1144#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1145
1146static const struct of_device_id pca953x_dt_ids[] = {
1147 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1148 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1149 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1150 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1151 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1152 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1153 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1154 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1155 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1156 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1157 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1158 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1159 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1160 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1161 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1162
1163 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1164 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1165 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1166
1167 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1168 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1169 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1170 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1171 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1172
1173 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1174 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1175 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1176 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1177 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1178 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1179
1180 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1181 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1182
1183 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1184 { }
1185};
1186
1187MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1188
1189static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1190
1191static struct i2c_driver pca953x_driver = {
1192 .driver = {
1193 .name = "pca953x",
1194 .pm = &pca953x_pm_ops,
1195 .of_match_table = pca953x_dt_ids,
1196 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1197 },
1198 .probe = pca953x_probe,
1199 .remove = pca953x_remove,
1200 .id_table = pca953x_id,
1201};
1202
1203static int __init pca953x_init(void)
1204{
1205 return i2c_add_driver(&pca953x_driver);
1206}
1207
1208
1209
1210subsys_initcall(pca953x_init);
1211
1212static void __exit pca953x_exit(void)
1213{
1214 i2c_del_driver(&pca953x_driver);
1215}
1216module_exit(pca953x_exit);
1217
1218MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1219MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1220MODULE_LICENSE("GPL");
1221