1/* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23#ifndef __KFD_TOPOLOGY_H__ 24#define __KFD_TOPOLOGY_H__ 25 26#include <linux/types.h> 27#include <linux/list.h> 28#include "kfd_crat.h" 29 30#define KFD_TOPOLOGY_PUBLIC_NAME_SIZE 128 31 32#define HSA_CAP_HOT_PLUGGABLE 0x00000001 33#define HSA_CAP_ATS_PRESENT 0x00000002 34#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004 35#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008 36#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010 37#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020 38#define HSA_CAP_VA_LIMIT 0x00000040 39#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080 40#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00 41#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8 42#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000 43#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12 44#define HSA_CAP_RESERVED 0xffffc000 45 46#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0 47#define HSA_CAP_DOORBELL_TYPE_1_0 0x1 48#define HSA_CAP_DOORBELL_TYPE_2_0 0x2 49#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000 50 51#define HSA_CAP_SRAM_EDCSUPPORTED 0x00080000 52#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000 53#define HSA_CAP_RASEVENTNOTIFY 0x00200000 54 55struct kfd_node_properties { 56 uint64_t hive_id; 57 uint32_t cpu_cores_count; 58 uint32_t simd_count; 59 uint32_t mem_banks_count; 60 uint32_t caches_count; 61 uint32_t io_links_count; 62 uint32_t cpu_core_id_base; 63 uint32_t simd_id_base; 64 uint32_t capability; 65 uint32_t max_waves_per_simd; 66 uint32_t lds_size_in_kb; 67 uint32_t gds_size_in_kb; 68 uint32_t num_gws; 69 uint32_t wave_front_size; 70 uint32_t array_count; 71 uint32_t simd_arrays_per_engine; 72 uint32_t cu_per_simd_array; 73 uint32_t simd_per_cu; 74 uint32_t max_slots_scratch_cu; 75 uint32_t engine_id; 76 uint32_t vendor_id; 77 uint32_t device_id; 78 uint32_t location_id; 79 uint32_t max_engine_clk_fcompute; 80 uint32_t max_engine_clk_ccompute; 81 int32_t drm_render_minor; 82 uint32_t num_sdma_engines; 83 uint32_t num_sdma_xgmi_engines; 84 uint16_t marketing_name[KFD_TOPOLOGY_PUBLIC_NAME_SIZE]; 85}; 86 87#define HSA_MEM_HEAP_TYPE_SYSTEM 0 88#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1 89#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2 90#define HSA_MEM_HEAP_TYPE_GPU_GDS 3 91#define HSA_MEM_HEAP_TYPE_GPU_LDS 4 92#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5 93 94#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001 95#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002 96#define HSA_MEM_FLAGS_RESERVED 0xfffffffc 97 98struct kfd_mem_properties { 99 struct list_head list; 100 uint32_t heap_type; 101 uint64_t size_in_bytes; 102 uint32_t flags; 103 uint32_t width; 104 uint32_t mem_clk_max; 105 struct kobject *kobj; 106 struct attribute attr; 107}; 108 109#define HSA_CACHE_TYPE_DATA 0x00000001 110#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002 111#define HSA_CACHE_TYPE_CPU 0x00000004 112#define HSA_CACHE_TYPE_HSACU 0x00000008 113#define HSA_CACHE_TYPE_RESERVED 0xfffffff0 114 115struct kfd_cache_properties { 116 struct list_head list; 117 uint32_t processor_id_low; 118 uint32_t cache_level; 119 uint32_t cache_size; 120 uint32_t cacheline_size; 121 uint32_t cachelines_per_tag; 122 uint32_t cache_assoc; 123 uint32_t cache_latency; 124 uint32_t cache_type; 125 uint8_t sibling_map[CRAT_SIBLINGMAP_SIZE]; 126 struct kobject *kobj; 127 struct attribute attr; 128}; 129 130struct kfd_iolink_properties { 131 struct list_head list; 132 uint32_t iolink_type; 133 uint32_t ver_maj; 134 uint32_t ver_min; 135 uint32_t node_from; 136 uint32_t node_to; 137 uint32_t weight; 138 uint32_t min_latency; 139 uint32_t max_latency; 140 uint32_t min_bandwidth; 141 uint32_t max_bandwidth; 142 uint32_t rec_transfer_size; 143 uint32_t flags; 144 struct kobject *kobj; 145 struct attribute attr; 146}; 147 148struct kfd_perf_properties { 149 struct list_head list; 150 char block_name[16]; 151 uint32_t max_concurrent; 152 struct attribute_group *attr_group; 153}; 154 155struct kfd_topology_device { 156 struct list_head list; 157 uint32_t gpu_id; 158 uint32_t proximity_domain; 159 struct kfd_node_properties node_props; 160 struct list_head mem_props; 161 uint32_t cache_count; 162 struct list_head cache_props; 163 uint32_t io_link_count; 164 struct list_head io_link_props; 165 struct list_head perf_props; 166 struct kfd_dev *gpu; 167 struct kobject *kobj_node; 168 struct kobject *kobj_mem; 169 struct kobject *kobj_cache; 170 struct kobject *kobj_iolink; 171 struct kobject *kobj_perf; 172 struct attribute attr_gpuid; 173 struct attribute attr_name; 174 struct attribute attr_props; 175 uint8_t oem_id[CRAT_OEMID_LENGTH]; 176 uint8_t oem_table_id[CRAT_OEMTABLEID_LENGTH]; 177 uint32_t oem_revision; 178}; 179 180struct kfd_system_properties { 181 uint32_t num_devices; /* Number of H-NUMA nodes */ 182 uint32_t generation_count; 183 uint64_t platform_oem; 184 uint64_t platform_id; 185 uint64_t platform_rev; 186 struct kobject *kobj_topology; 187 struct kobject *kobj_nodes; 188 struct attribute attr_genid; 189 struct attribute attr_props; 190}; 191 192struct kfd_topology_device *kfd_create_topology_device( 193 struct list_head *device_list); 194void kfd_release_topology_device_list(struct list_head *device_list); 195 196#endif /* __KFD_TOPOLOGY_H__ */ 197